smsc95xx.c revision 7b9e75802f1c50bfeae53c86c0bfbc5c45fd8719
1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2008 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21#include <linux/module.h> 22#include <linux/kmod.h> 23#include <linux/init.h> 24#include <linux/netdevice.h> 25#include <linux/etherdevice.h> 26#include <linux/ethtool.h> 27#include <linux/mii.h> 28#include <linux/usb.h> 29#include <linux/bitrev.h> 30#include <linux/crc16.h> 31#include <linux/crc32.h> 32#include <linux/usb/usbnet.h> 33#include <linux/slab.h> 34#include "smsc95xx.h" 35 36#define SMSC_CHIPNAME "smsc95xx" 37#define SMSC_DRIVER_VERSION "1.0.4" 38#define HS_USB_PKT_SIZE (512) 39#define FS_USB_PKT_SIZE (64) 40#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 41#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 42#define DEFAULT_BULK_IN_DELAY (0x00002000) 43#define MAX_SINGLE_PACKET_SIZE (2048) 44#define LAN95XX_EEPROM_MAGIC (0x9500) 45#define EEPROM_MAC_OFFSET (0x01) 46#define DEFAULT_TX_CSUM_ENABLE (true) 47#define DEFAULT_RX_CSUM_ENABLE (true) 48#define SMSC95XX_INTERNAL_PHY_ID (1) 49#define SMSC95XX_TX_OVERHEAD (8) 50#define SMSC95XX_TX_OVERHEAD_CSUM (12) 51#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ 52 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) 53 54#define FEATURE_8_WAKEUP_FILTERS (0x01) 55#define FEATURE_PHY_NLP_CROSSOVER (0x02) 56#define FEATURE_AUTOSUSPEND (0x04) 57 58struct smsc95xx_priv { 59 u32 mac_cr; 60 u32 hash_hi; 61 u32 hash_lo; 62 u32 wolopts; 63 spinlock_t mac_cr_lock; 64 u8 features; 65}; 66 67static bool turbo_mode = true; 68module_param(turbo_mode, bool, 0644); 69MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 70 71static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, 72 u32 *data, int in_pm) 73{ 74 u32 buf; 75 int ret; 76 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); 77 78 BUG_ON(!dev); 79 80 if (!in_pm) 81 fn = usbnet_read_cmd; 82 else 83 fn = usbnet_read_cmd_nopm; 84 85 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN 86 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 87 0, index, &buf, 4); 88 if (unlikely(ret < 0)) 89 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", 90 index, ret); 91 92 le32_to_cpus(&buf); 93 *data = buf; 94 95 return ret; 96} 97 98static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index, 99 u32 data, int in_pm) 100{ 101 u32 buf; 102 int ret; 103 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); 104 105 BUG_ON(!dev); 106 107 if (!in_pm) 108 fn = usbnet_write_cmd; 109 else 110 fn = usbnet_write_cmd_nopm; 111 112 buf = data; 113 cpu_to_le32s(&buf); 114 115 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT 116 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 117 0, index, &buf, 4); 118 if (unlikely(ret < 0)) 119 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", 120 index, ret); 121 122 return ret; 123} 124 125static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index, 126 u32 *data) 127{ 128 return __smsc95xx_read_reg(dev, index, data, 1); 129} 130 131static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index, 132 u32 data) 133{ 134 return __smsc95xx_write_reg(dev, index, data, 1); 135} 136 137static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, 138 u32 *data) 139{ 140 return __smsc95xx_read_reg(dev, index, data, 0); 141} 142 143static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, 144 u32 data) 145{ 146 return __smsc95xx_write_reg(dev, index, data, 0); 147} 148 149/* Loop until the read is completed with timeout 150 * called with phy_mutex held */ 151static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev, 152 int in_pm) 153{ 154 unsigned long start_time = jiffies; 155 u32 val; 156 int ret; 157 158 do { 159 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); 160 if (ret < 0) { 161 netdev_warn(dev->net, "Error reading MII_ACCESS\n"); 162 return ret; 163 } 164 165 if (!(val & MII_BUSY_)) 166 return 0; 167 } while (!time_after(jiffies, start_time + HZ)); 168 169 return -EIO; 170} 171 172static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx, 173 int in_pm) 174{ 175 struct usbnet *dev = netdev_priv(netdev); 176 u32 val, addr; 177 int ret; 178 179 mutex_lock(&dev->phy_mutex); 180 181 /* confirm MII not busy */ 182 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 183 if (ret < 0) { 184 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); 185 goto done; 186 } 187 188 /* set the address, index & direction (read from PHY) */ 189 phy_id &= dev->mii.phy_id_mask; 190 idx &= dev->mii.reg_num_mask; 191 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; 192 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); 193 if (ret < 0) { 194 netdev_warn(dev->net, "Error writing MII_ADDR\n"); 195 goto done; 196 } 197 198 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 199 if (ret < 0) { 200 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); 201 goto done; 202 } 203 204 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); 205 if (ret < 0) { 206 netdev_warn(dev->net, "Error reading MII_DATA\n"); 207 goto done; 208 } 209 210 ret = (u16)(val & 0xFFFF); 211 212done: 213 mutex_unlock(&dev->phy_mutex); 214 return ret; 215} 216 217static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id, 218 int idx, int regval, int in_pm) 219{ 220 struct usbnet *dev = netdev_priv(netdev); 221 u32 val, addr; 222 int ret; 223 224 mutex_lock(&dev->phy_mutex); 225 226 /* confirm MII not busy */ 227 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 228 if (ret < 0) { 229 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); 230 goto done; 231 } 232 233 val = regval; 234 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); 235 if (ret < 0) { 236 netdev_warn(dev->net, "Error writing MII_DATA\n"); 237 goto done; 238 } 239 240 /* set the address, index & direction (write to PHY) */ 241 phy_id &= dev->mii.phy_id_mask; 242 idx &= dev->mii.reg_num_mask; 243 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; 244 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); 245 if (ret < 0) { 246 netdev_warn(dev->net, "Error writing MII_ADDR\n"); 247 goto done; 248 } 249 250 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 251 if (ret < 0) { 252 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); 253 goto done; 254 } 255 256done: 257 mutex_unlock(&dev->phy_mutex); 258} 259 260static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id, 261 int idx) 262{ 263 return __smsc95xx_mdio_read(netdev, phy_id, idx, 1); 264} 265 266static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id, 267 int idx, int regval) 268{ 269 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); 270} 271 272static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 273{ 274 return __smsc95xx_mdio_read(netdev, phy_id, idx, 0); 275} 276 277static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 278 int regval) 279{ 280 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); 281} 282 283static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) 284{ 285 unsigned long start_time = jiffies; 286 u32 val; 287 int ret; 288 289 do { 290 ret = smsc95xx_read_reg(dev, E2P_CMD, &val); 291 if (ret < 0) { 292 netdev_warn(dev->net, "Error reading E2P_CMD\n"); 293 return ret; 294 } 295 296 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) 297 break; 298 udelay(40); 299 } while (!time_after(jiffies, start_time + HZ)); 300 301 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { 302 netdev_warn(dev->net, "EEPROM read operation timeout\n"); 303 return -EIO; 304 } 305 306 return 0; 307} 308 309static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) 310{ 311 unsigned long start_time = jiffies; 312 u32 val; 313 int ret; 314 315 do { 316 ret = smsc95xx_read_reg(dev, E2P_CMD, &val); 317 if (ret < 0) { 318 netdev_warn(dev->net, "Error reading E2P_CMD\n"); 319 return ret; 320 } 321 322 if (!(val & E2P_CMD_BUSY_)) 323 return 0; 324 325 udelay(40); 326 } while (!time_after(jiffies, start_time + HZ)); 327 328 netdev_warn(dev->net, "EEPROM is busy\n"); 329 return -EIO; 330} 331 332static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 333 u8 *data) 334{ 335 u32 val; 336 int i, ret; 337 338 BUG_ON(!dev); 339 BUG_ON(!data); 340 341 ret = smsc95xx_eeprom_confirm_not_busy(dev); 342 if (ret) 343 return ret; 344 345 for (i = 0; i < length; i++) { 346 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); 347 ret = smsc95xx_write_reg(dev, E2P_CMD, val); 348 if (ret < 0) { 349 netdev_warn(dev->net, "Error writing E2P_CMD\n"); 350 return ret; 351 } 352 353 ret = smsc95xx_wait_eeprom(dev); 354 if (ret < 0) 355 return ret; 356 357 ret = smsc95xx_read_reg(dev, E2P_DATA, &val); 358 if (ret < 0) { 359 netdev_warn(dev->net, "Error reading E2P_DATA\n"); 360 return ret; 361 } 362 363 data[i] = val & 0xFF; 364 offset++; 365 } 366 367 return 0; 368} 369 370static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 371 u8 *data) 372{ 373 u32 val; 374 int i, ret; 375 376 BUG_ON(!dev); 377 BUG_ON(!data); 378 379 ret = smsc95xx_eeprom_confirm_not_busy(dev); 380 if (ret) 381 return ret; 382 383 /* Issue write/erase enable command */ 384 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; 385 ret = smsc95xx_write_reg(dev, E2P_CMD, val); 386 if (ret < 0) { 387 netdev_warn(dev->net, "Error writing E2P_DATA\n"); 388 return ret; 389 } 390 391 ret = smsc95xx_wait_eeprom(dev); 392 if (ret < 0) 393 return ret; 394 395 for (i = 0; i < length; i++) { 396 397 /* Fill data register */ 398 val = data[i]; 399 ret = smsc95xx_write_reg(dev, E2P_DATA, val); 400 if (ret < 0) { 401 netdev_warn(dev->net, "Error writing E2P_DATA\n"); 402 return ret; 403 } 404 405 /* Send "write" command */ 406 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); 407 ret = smsc95xx_write_reg(dev, E2P_CMD, val); 408 if (ret < 0) { 409 netdev_warn(dev->net, "Error writing E2P_CMD\n"); 410 return ret; 411 } 412 413 ret = smsc95xx_wait_eeprom(dev); 414 if (ret < 0) 415 return ret; 416 417 offset++; 418 } 419 420 return 0; 421} 422 423static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, 424 u32 data) 425{ 426 const u16 size = 4; 427 u32 buf; 428 int ret; 429 430 buf = data; 431 cpu_to_le32s(&buf); 432 433 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, 434 USB_DIR_OUT | USB_TYPE_VENDOR | 435 USB_RECIP_DEVICE, 436 0, index, &buf, size); 437 if (ret < 0) 438 netdev_warn(dev->net, "Error write async cmd, sts=%d\n", 439 ret); 440 return ret; 441} 442 443/* returns hash bit number for given MAC address 444 * example: 445 * 01 00 5E 00 00 01 -> returns bit number 31 */ 446static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) 447{ 448 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 449} 450 451static void smsc95xx_set_multicast(struct net_device *netdev) 452{ 453 struct usbnet *dev = netdev_priv(netdev); 454 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 455 unsigned long flags; 456 int ret; 457 458 pdata->hash_hi = 0; 459 pdata->hash_lo = 0; 460 461 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 462 463 if (dev->net->flags & IFF_PROMISC) { 464 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); 465 pdata->mac_cr |= MAC_CR_PRMS_; 466 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 467 } else if (dev->net->flags & IFF_ALLMULTI) { 468 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); 469 pdata->mac_cr |= MAC_CR_MCPAS_; 470 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); 471 } else if (!netdev_mc_empty(dev->net)) { 472 struct netdev_hw_addr *ha; 473 474 pdata->mac_cr |= MAC_CR_HPFILT_; 475 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 476 477 netdev_for_each_mc_addr(ha, netdev) { 478 u32 bitnum = smsc95xx_hash(ha->addr); 479 u32 mask = 0x01 << (bitnum & 0x1F); 480 if (bitnum & 0x20) 481 pdata->hash_hi |= mask; 482 else 483 pdata->hash_lo |= mask; 484 } 485 486 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", 487 pdata->hash_hi, pdata->hash_lo); 488 } else { 489 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 490 pdata->mac_cr &= 491 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 492 } 493 494 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 495 496 /* Initiate async writes, as we can't wait for completion here */ 497 ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); 498 if (ret < 0) 499 netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); 500 501 ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); 502 if (ret < 0) 503 netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); 504 505 ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); 506 if (ret < 0) 507 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); 508} 509 510static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, 511 u16 lcladv, u16 rmtadv) 512{ 513 u32 flow, afc_cfg = 0; 514 515 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); 516 if (ret < 0) { 517 netdev_warn(dev->net, "Error reading AFC_CFG\n"); 518 return ret; 519 } 520 521 if (duplex == DUPLEX_FULL) { 522 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 523 524 if (cap & FLOW_CTRL_RX) 525 flow = 0xFFFF0002; 526 else 527 flow = 0; 528 529 if (cap & FLOW_CTRL_TX) 530 afc_cfg |= 0xF; 531 else 532 afc_cfg &= ~0xF; 533 534 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", 535 cap & FLOW_CTRL_RX ? "enabled" : "disabled", 536 cap & FLOW_CTRL_TX ? "enabled" : "disabled"); 537 } else { 538 netif_dbg(dev, link, dev->net, "half duplex\n"); 539 flow = 0; 540 afc_cfg |= 0xF; 541 } 542 543 ret = smsc95xx_write_reg(dev, FLOW, flow); 544 if (ret < 0) { 545 netdev_warn(dev->net, "Error writing FLOW\n"); 546 return ret; 547 } 548 549 ret = smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); 550 if (ret < 0) 551 netdev_warn(dev->net, "Error writing AFC_CFG\n"); 552 553 return ret; 554} 555 556static int smsc95xx_link_reset(struct usbnet *dev) 557{ 558 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 559 struct mii_if_info *mii = &dev->mii; 560 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 561 unsigned long flags; 562 u16 lcladv, rmtadv; 563 int ret; 564 565 /* clear interrupt status */ 566 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 567 if (ret < 0) { 568 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); 569 return ret; 570 } 571 572 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 573 if (ret < 0) { 574 netdev_warn(dev->net, "Error writing INT_STS\n"); 575 return ret; 576 } 577 578 mii_check_media(mii, 1, 1); 579 mii_ethtool_gset(&dev->mii, &ecmd); 580 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 581 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 582 583 netif_dbg(dev, link, dev->net, 584 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", 585 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); 586 587 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 588 if (ecmd.duplex != DUPLEX_FULL) { 589 pdata->mac_cr &= ~MAC_CR_FDPX_; 590 pdata->mac_cr |= MAC_CR_RCVOWN_; 591 } else { 592 pdata->mac_cr &= ~MAC_CR_RCVOWN_; 593 pdata->mac_cr |= MAC_CR_FDPX_; 594 } 595 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 596 597 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 598 if (ret < 0) { 599 netdev_warn(dev->net, "Error writing MAC_CR\n"); 600 return ret; 601 } 602 603 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 604 if (ret < 0) 605 netdev_warn(dev->net, "Error updating PHY flow control\n"); 606 607 return ret; 608} 609 610static void smsc95xx_status(struct usbnet *dev, struct urb *urb) 611{ 612 u32 intdata; 613 614 if (urb->actual_length != 4) { 615 netdev_warn(dev->net, "unexpected urb length %d\n", 616 urb->actual_length); 617 return; 618 } 619 620 memcpy(&intdata, urb->transfer_buffer, 4); 621 le32_to_cpus(&intdata); 622 623 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); 624 625 if (intdata & INT_ENP_PHY_INT_) 626 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 627 else 628 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", 629 intdata); 630} 631 632/* Enable or disable Tx & Rx checksum offload engines */ 633static int smsc95xx_set_features(struct net_device *netdev, 634 netdev_features_t features) 635{ 636 struct usbnet *dev = netdev_priv(netdev); 637 u32 read_buf; 638 int ret; 639 640 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); 641 if (ret < 0) { 642 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret); 643 return ret; 644 } 645 646 if (features & NETIF_F_HW_CSUM) 647 read_buf |= Tx_COE_EN_; 648 else 649 read_buf &= ~Tx_COE_EN_; 650 651 if (features & NETIF_F_RXCSUM) 652 read_buf |= Rx_COE_EN_; 653 else 654 read_buf &= ~Rx_COE_EN_; 655 656 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); 657 if (ret < 0) { 658 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret); 659 return ret; 660 } 661 662 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); 663 return 0; 664} 665 666static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) 667{ 668 return MAX_EEPROM_SIZE; 669} 670 671static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, 672 struct ethtool_eeprom *ee, u8 *data) 673{ 674 struct usbnet *dev = netdev_priv(netdev); 675 676 ee->magic = LAN95XX_EEPROM_MAGIC; 677 678 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); 679} 680 681static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, 682 struct ethtool_eeprom *ee, u8 *data) 683{ 684 struct usbnet *dev = netdev_priv(netdev); 685 686 if (ee->magic != LAN95XX_EEPROM_MAGIC) { 687 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", 688 ee->magic); 689 return -EINVAL; 690 } 691 692 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); 693} 694 695static int smsc95xx_ethtool_getregslen(struct net_device *netdev) 696{ 697 /* all smsc95xx registers */ 698 return COE_CR - ID_REV + sizeof(u32); 699} 700 701static void 702smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, 703 void *buf) 704{ 705 struct usbnet *dev = netdev_priv(netdev); 706 unsigned int i, j; 707 int retval; 708 u32 *data = buf; 709 710 retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); 711 if (retval < 0) { 712 netdev_warn(netdev, "REGS: cannot read ID_REV\n"); 713 return; 714 } 715 716 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { 717 retval = smsc95xx_read_reg(dev, i, &data[j]); 718 if (retval < 0) { 719 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); 720 return; 721 } 722 } 723} 724 725static void smsc95xx_ethtool_get_wol(struct net_device *net, 726 struct ethtool_wolinfo *wolinfo) 727{ 728 struct usbnet *dev = netdev_priv(net); 729 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 730 731 wolinfo->supported = SUPPORTED_WAKE; 732 wolinfo->wolopts = pdata->wolopts; 733} 734 735static int smsc95xx_ethtool_set_wol(struct net_device *net, 736 struct ethtool_wolinfo *wolinfo) 737{ 738 struct usbnet *dev = netdev_priv(net); 739 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 740 int ret; 741 742 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; 743 744 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); 745 if (ret < 0) 746 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); 747 748 return ret; 749} 750 751static const struct ethtool_ops smsc95xx_ethtool_ops = { 752 .get_link = usbnet_get_link, 753 .nway_reset = usbnet_nway_reset, 754 .get_drvinfo = usbnet_get_drvinfo, 755 .get_msglevel = usbnet_get_msglevel, 756 .set_msglevel = usbnet_set_msglevel, 757 .get_settings = usbnet_get_settings, 758 .set_settings = usbnet_set_settings, 759 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, 760 .get_eeprom = smsc95xx_ethtool_get_eeprom, 761 .set_eeprom = smsc95xx_ethtool_set_eeprom, 762 .get_regs_len = smsc95xx_ethtool_getregslen, 763 .get_regs = smsc95xx_ethtool_getregs, 764 .get_wol = smsc95xx_ethtool_get_wol, 765 .set_wol = smsc95xx_ethtool_set_wol, 766}; 767 768static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 769{ 770 struct usbnet *dev = netdev_priv(netdev); 771 772 if (!netif_running(netdev)) 773 return -EINVAL; 774 775 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 776} 777 778static void smsc95xx_init_mac_address(struct usbnet *dev) 779{ 780 /* try reading mac address from EEPROM */ 781 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 782 dev->net->dev_addr) == 0) { 783 if (is_valid_ether_addr(dev->net->dev_addr)) { 784 /* eeprom values are valid so use them */ 785 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); 786 return; 787 } 788 } 789 790 /* no eeprom, or eeprom values are invalid. generate random MAC */ 791 eth_hw_addr_random(dev->net); 792 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); 793} 794 795static int smsc95xx_set_mac_address(struct usbnet *dev) 796{ 797 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 798 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 799 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 800 int ret; 801 802 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); 803 if (ret < 0) { 804 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret); 805 return ret; 806 } 807 808 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi); 809 if (ret < 0) 810 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret); 811 812 return ret; 813} 814 815/* starts the TX path */ 816static int smsc95xx_start_tx_path(struct usbnet *dev) 817{ 818 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 819 unsigned long flags; 820 int ret; 821 822 /* Enable Tx at MAC */ 823 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 824 pdata->mac_cr |= MAC_CR_TXEN_; 825 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 826 827 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 828 if (ret < 0) { 829 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret); 830 return ret; 831 } 832 833 /* Enable Tx at SCSRs */ 834 ret = smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); 835 if (ret < 0) 836 netdev_warn(dev->net, "Failed to write TX_CFG: %d\n", ret); 837 838 return ret; 839} 840 841/* Starts the Receive path */ 842static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm) 843{ 844 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 845 unsigned long flags; 846 int ret; 847 848 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 849 pdata->mac_cr |= MAC_CR_RXEN_; 850 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 851 852 ret = __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); 853 if (ret < 0) 854 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret); 855 856 return ret; 857} 858 859static int smsc95xx_phy_initialize(struct usbnet *dev) 860{ 861 int bmcr, ret, timeout = 0; 862 863 /* Initialize MII structure */ 864 dev->mii.dev = dev->net; 865 dev->mii.mdio_read = smsc95xx_mdio_read; 866 dev->mii.mdio_write = smsc95xx_mdio_write; 867 dev->mii.phy_id_mask = 0x1f; 868 dev->mii.reg_num_mask = 0x1f; 869 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; 870 871 /* reset phy and wait for reset to complete */ 872 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 873 874 do { 875 msleep(10); 876 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 877 timeout++; 878 } while ((bmcr & BMCR_RESET) && (timeout < 100)); 879 880 if (timeout >= 100) { 881 netdev_warn(dev->net, "timeout on PHY Reset"); 882 return -EIO; 883 } 884 885 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 886 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 887 ADVERTISE_PAUSE_ASYM); 888 889 /* read to clear */ 890 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 891 if (ret < 0) { 892 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); 893 return ret; 894 } 895 896 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 897 PHY_INT_MASK_DEFAULT_); 898 mii_nway_restart(&dev->mii); 899 900 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); 901 return 0; 902} 903 904static int smsc95xx_reset(struct usbnet *dev) 905{ 906 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 907 u32 read_buf, write_buf, burst_cap; 908 int ret = 0, timeout; 909 910 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); 911 912 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); 913 if (ret < 0) { 914 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG\n"); 915 return ret; 916 } 917 918 timeout = 0; 919 do { 920 msleep(10); 921 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 922 if (ret < 0) { 923 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 924 return ret; 925 } 926 timeout++; 927 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 928 929 if (timeout >= 100) { 930 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); 931 return ret; 932 } 933 934 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); 935 if (ret < 0) { 936 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret); 937 return ret; 938 } 939 940 timeout = 0; 941 do { 942 msleep(10); 943 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 944 if (ret < 0) { 945 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret); 946 return ret; 947 } 948 timeout++; 949 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 950 951 if (timeout >= 100) { 952 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); 953 return ret; 954 } 955 956 ret = smsc95xx_set_mac_address(dev); 957 if (ret < 0) 958 return ret; 959 960 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", 961 dev->net->dev_addr); 962 963 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 964 if (ret < 0) { 965 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 966 return ret; 967 } 968 969 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", 970 read_buf); 971 972 read_buf |= HW_CFG_BIR_; 973 974 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 975 if (ret < 0) { 976 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG\n"); 977 return ret; 978 } 979 980 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 981 if (ret < 0) { 982 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 983 return ret; 984 } 985 986 netif_dbg(dev, ifup, dev->net, 987 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", 988 read_buf); 989 990 if (!turbo_mode) { 991 burst_cap = 0; 992 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 993 } else if (dev->udev->speed == USB_SPEED_HIGH) { 994 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 995 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 996 } else { 997 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 998 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 999 } 1000 1001 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", 1002 (ulong)dev->rx_urb_size); 1003 1004 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); 1005 if (ret < 0) { 1006 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); 1007 return ret; 1008 } 1009 1010 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); 1011 if (ret < 0) { 1012 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); 1013 return ret; 1014 } 1015 1016 netif_dbg(dev, ifup, dev->net, 1017 "Read Value from BURST_CAP after writing: 0x%08x\n", 1018 read_buf); 1019 1020 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 1021 if (ret < 0) { 1022 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret); 1023 return ret; 1024 } 1025 1026 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); 1027 if (ret < 0) { 1028 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); 1029 return ret; 1030 } 1031 1032 netif_dbg(dev, ifup, dev->net, 1033 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", 1034 read_buf); 1035 1036 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 1037 if (ret < 0) { 1038 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1039 return ret; 1040 } 1041 1042 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", 1043 read_buf); 1044 1045 if (turbo_mode) 1046 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); 1047 1048 read_buf &= ~HW_CFG_RXDOFF_; 1049 1050 /* set Rx data offset=2, Make IP header aligns on word boundary. */ 1051 read_buf |= NET_IP_ALIGN << 9; 1052 1053 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 1054 if (ret < 0) { 1055 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); 1056 return ret; 1057 } 1058 1059 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 1060 if (ret < 0) { 1061 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1062 return ret; 1063 } 1064 1065 netif_dbg(dev, ifup, dev->net, 1066 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); 1067 1068 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 1069 if (ret < 0) { 1070 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret); 1071 return ret; 1072 } 1073 1074 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); 1075 if (ret < 0) { 1076 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); 1077 return ret; 1078 } 1079 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); 1080 1081 /* Configure GPIO pins as LED outputs */ 1082 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | 1083 LED_GPIO_CFG_FDX_LED; 1084 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); 1085 if (ret < 0) { 1086 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret); 1087 return ret; 1088 } 1089 1090 /* Init Tx */ 1091 ret = smsc95xx_write_reg(dev, FLOW, 0); 1092 if (ret < 0) { 1093 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); 1094 return ret; 1095 } 1096 1097 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); 1098 if (ret < 0) { 1099 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret); 1100 return ret; 1101 } 1102 1103 /* Don't need mac_cr_lock during initialisation */ 1104 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); 1105 if (ret < 0) { 1106 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); 1107 return ret; 1108 } 1109 1110 /* Init Rx */ 1111 /* Set Vlan */ 1112 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); 1113 if (ret < 0) { 1114 netdev_warn(dev->net, "Failed to write VLAN1: %d\n", ret); 1115 return ret; 1116 } 1117 1118 /* Enable or disable checksum offload engines */ 1119 ret = smsc95xx_set_features(dev->net, dev->net->features); 1120 if (ret < 0) { 1121 netdev_warn(dev->net, "Failed to set checksum offload features\n"); 1122 return ret; 1123 } 1124 1125 smsc95xx_set_multicast(dev->net); 1126 1127 ret = smsc95xx_phy_initialize(dev); 1128 if (ret < 0) { 1129 netdev_warn(dev->net, "Failed to init PHY\n"); 1130 return ret; 1131 } 1132 1133 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); 1134 if (ret < 0) { 1135 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); 1136 return ret; 1137 } 1138 1139 /* enable PHY interrupts */ 1140 read_buf |= INT_EP_CTL_PHY_INT_; 1141 1142 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); 1143 if (ret < 0) { 1144 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); 1145 return ret; 1146 } 1147 1148 ret = smsc95xx_start_tx_path(dev); 1149 if (ret < 0) { 1150 netdev_warn(dev->net, "Failed to start TX path\n"); 1151 return ret; 1152 } 1153 1154 ret = smsc95xx_start_rx_path(dev, 0); 1155 if (ret < 0) { 1156 netdev_warn(dev->net, "Failed to start RX path\n"); 1157 return ret; 1158 } 1159 1160 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); 1161 return 0; 1162} 1163 1164static const struct net_device_ops smsc95xx_netdev_ops = { 1165 .ndo_open = usbnet_open, 1166 .ndo_stop = usbnet_stop, 1167 .ndo_start_xmit = usbnet_start_xmit, 1168 .ndo_tx_timeout = usbnet_tx_timeout, 1169 .ndo_change_mtu = usbnet_change_mtu, 1170 .ndo_set_mac_address = eth_mac_addr, 1171 .ndo_validate_addr = eth_validate_addr, 1172 .ndo_do_ioctl = smsc95xx_ioctl, 1173 .ndo_set_rx_mode = smsc95xx_set_multicast, 1174 .ndo_set_features = smsc95xx_set_features, 1175}; 1176 1177static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) 1178{ 1179 struct smsc95xx_priv *pdata = NULL; 1180 u32 val; 1181 int ret; 1182 1183 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1184 1185 ret = usbnet_get_endpoints(dev, intf); 1186 if (ret < 0) { 1187 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); 1188 return ret; 1189 } 1190 1191 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), 1192 GFP_KERNEL); 1193 1194 pdata = (struct smsc95xx_priv *)(dev->data[0]); 1195 if (!pdata) { 1196 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n"); 1197 return -ENOMEM; 1198 } 1199 1200 spin_lock_init(&pdata->mac_cr_lock); 1201 1202 if (DEFAULT_TX_CSUM_ENABLE) 1203 dev->net->features |= NETIF_F_HW_CSUM; 1204 if (DEFAULT_RX_CSUM_ENABLE) 1205 dev->net->features |= NETIF_F_RXCSUM; 1206 1207 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 1208 1209 smsc95xx_init_mac_address(dev); 1210 1211 /* Init all registers */ 1212 ret = smsc95xx_reset(dev); 1213 1214 /* detect device revision as different features may be available */ 1215 ret = smsc95xx_read_reg(dev, ID_REV, &val); 1216 if (ret < 0) { 1217 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); 1218 return ret; 1219 } 1220 val >>= 16; 1221 1222 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || 1223 (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) 1224 pdata->features = (FEATURE_8_WAKEUP_FILTERS | 1225 FEATURE_PHY_NLP_CROSSOVER | 1226 FEATURE_AUTOSUSPEND); 1227 else if (val == ID_REV_CHIP_ID_9512_) 1228 pdata->features = FEATURE_8_WAKEUP_FILTERS; 1229 1230 dev->net->netdev_ops = &smsc95xx_netdev_ops; 1231 dev->net->ethtool_ops = &smsc95xx_ethtool_ops; 1232 dev->net->flags |= IFF_MULTICAST; 1233 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; 1234 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; 1235 return 0; 1236} 1237 1238static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1239{ 1240 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1241 if (pdata) { 1242 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); 1243 kfree(pdata); 1244 pdata = NULL; 1245 dev->data[0] = 0; 1246 } 1247} 1248 1249static u32 smsc_crc(const u8 *buffer, size_t len, int filter) 1250{ 1251 u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); 1252 return crc << ((filter % 2) * 16); 1253} 1254 1255static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) 1256{ 1257 struct mii_if_info *mii = &dev->mii; 1258 int ret; 1259 1260 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); 1261 1262 /* read to clear */ 1263 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); 1264 if (ret < 0) { 1265 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); 1266 return ret; 1267 } 1268 1269 /* enable interrupt source */ 1270 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); 1271 if (ret < 0) { 1272 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n"); 1273 return ret; 1274 } 1275 1276 ret |= mask; 1277 1278 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); 1279 1280 return 0; 1281} 1282 1283static int smsc95xx_link_ok_nopm(struct usbnet *dev) 1284{ 1285 struct mii_if_info *mii = &dev->mii; 1286 int ret; 1287 1288 /* first, a dummy read, needed to latch some MII phys */ 1289 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); 1290 if (ret < 0) { 1291 netdev_warn(dev->net, "Error reading MII_BMSR\n"); 1292 return ret; 1293 } 1294 1295 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); 1296 if (ret < 0) { 1297 netdev_warn(dev->net, "Error reading MII_BMSR\n"); 1298 return ret; 1299 } 1300 1301 return !!(ret & BMSR_LSTATUS); 1302} 1303 1304static int smsc95xx_enter_suspend0(struct usbnet *dev) 1305{ 1306 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1307 u32 val; 1308 int ret; 1309 1310 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1311 if (ret < 0) { 1312 netdev_warn(dev->net, "Error reading PM_CTRL\n"); 1313 return ret; 1314 } 1315 1316 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); 1317 val |= PM_CTL_SUS_MODE_0; 1318 1319 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1320 if (ret < 0) { 1321 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1322 return ret; 1323 } 1324 1325 /* clear wol status */ 1326 val &= ~PM_CTL_WUPS_; 1327 val |= PM_CTL_WUPS_WOL_; 1328 1329 /* enable energy detection */ 1330 if (pdata->wolopts & WAKE_PHY) 1331 val |= PM_CTL_WUPS_ED_; 1332 1333 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1334 if (ret < 0) { 1335 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1336 return ret; 1337 } 1338 1339 /* read back PM_CTRL */ 1340 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1341 if (ret < 0) 1342 netdev_warn(dev->net, "Error reading PM_CTRL\n"); 1343 1344 return ret; 1345} 1346 1347static int smsc95xx_enter_suspend1(struct usbnet *dev) 1348{ 1349 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1350 struct mii_if_info *mii = &dev->mii; 1351 u32 val; 1352 int ret; 1353 1354 /* reconfigure link pulse detection timing for 1355 * compatibility with non-standard link partners 1356 */ 1357 if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) 1358 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, 1359 PHY_EDPD_CONFIG_DEFAULT); 1360 1361 /* enable energy detect power-down mode */ 1362 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); 1363 if (ret < 0) { 1364 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n"); 1365 return ret; 1366 } 1367 1368 ret |= MODE_CTRL_STS_EDPWRDOWN_; 1369 1370 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); 1371 1372 /* enter SUSPEND1 mode */ 1373 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1374 if (ret < 0) { 1375 netdev_warn(dev->net, "Error reading PM_CTRL\n"); 1376 return ret; 1377 } 1378 1379 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); 1380 val |= PM_CTL_SUS_MODE_1; 1381 1382 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1383 if (ret < 0) { 1384 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1385 return ret; 1386 } 1387 1388 /* clear wol status, enable energy detection */ 1389 val &= ~PM_CTL_WUPS_; 1390 val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); 1391 1392 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1393 if (ret < 0) 1394 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1395 1396 return ret; 1397} 1398 1399static int smsc95xx_enter_suspend2(struct usbnet *dev) 1400{ 1401 u32 val; 1402 int ret; 1403 1404 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1405 if (ret < 0) { 1406 netdev_warn(dev->net, "Error reading PM_CTRL\n"); 1407 return ret; 1408 } 1409 1410 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); 1411 val |= PM_CTL_SUS_MODE_2; 1412 1413 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1414 if (ret < 0) 1415 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1416 1417 return ret; 1418} 1419 1420static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) 1421{ 1422 struct usbnet *dev = usb_get_intfdata(intf); 1423 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1424 u32 val, link_up; 1425 int ret; 1426 1427 ret = usbnet_suspend(intf, message); 1428 if (ret < 0) { 1429 netdev_warn(dev->net, "usbnet_suspend error\n"); 1430 return ret; 1431 } 1432 1433 /* determine if link is up using only _nopm functions */ 1434 link_up = smsc95xx_link_ok_nopm(dev); 1435 1436 /* if no wol options set, or if link is down and we're not waking on 1437 * PHY activity, enter lowest power SUSPEND2 mode 1438 */ 1439 if (!(pdata->wolopts & SUPPORTED_WAKE) || 1440 !(link_up || (pdata->wolopts & WAKE_PHY))) { 1441 netdev_info(dev->net, "entering SUSPEND2 mode\n"); 1442 1443 /* disable energy detect (link up) & wake up events */ 1444 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1445 if (ret < 0) { 1446 netdev_warn(dev->net, "Error reading WUCSR\n"); 1447 goto done; 1448 } 1449 1450 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); 1451 1452 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1453 if (ret < 0) { 1454 netdev_warn(dev->net, "Error writing WUCSR\n"); 1455 goto done; 1456 } 1457 1458 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1459 if (ret < 0) { 1460 netdev_warn(dev->net, "Error reading PM_CTRL\n"); 1461 goto done; 1462 } 1463 1464 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); 1465 1466 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1467 if (ret < 0) { 1468 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1469 goto done; 1470 } 1471 1472 ret = smsc95xx_enter_suspend2(dev); 1473 goto done; 1474 } 1475 1476 if (pdata->wolopts & WAKE_PHY) { 1477 ret = smsc95xx_enable_phy_wakeup_interrupts(dev, 1478 (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_)); 1479 if (ret < 0) { 1480 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); 1481 goto done; 1482 } 1483 1484 /* if link is down then configure EDPD and enter SUSPEND1, 1485 * otherwise enter SUSPEND0 below 1486 */ 1487 if (!link_up) { 1488 netdev_info(dev->net, "entering SUSPEND1 mode\n"); 1489 ret = smsc95xx_enter_suspend1(dev); 1490 goto done; 1491 } 1492 } 1493 1494 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { 1495 u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL); 1496 u32 command[2]; 1497 u32 offset[2]; 1498 u32 crc[4]; 1499 int wuff_filter_count = 1500 (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? 1501 LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; 1502 int i, filter = 0; 1503 1504 if (!filter_mask) { 1505 netdev_warn(dev->net, "Unable to allocate filter_mask\n"); 1506 ret = -ENOMEM; 1507 goto done; 1508 } 1509 1510 memset(command, 0, sizeof(command)); 1511 memset(offset, 0, sizeof(offset)); 1512 memset(crc, 0, sizeof(crc)); 1513 1514 if (pdata->wolopts & WAKE_BCAST) { 1515 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; 1516 netdev_info(dev->net, "enabling broadcast detection\n"); 1517 filter_mask[filter * 4] = 0x003F; 1518 filter_mask[filter * 4 + 1] = 0x00; 1519 filter_mask[filter * 4 + 2] = 0x00; 1520 filter_mask[filter * 4 + 3] = 0x00; 1521 command[filter/4] |= 0x05UL << ((filter % 4) * 8); 1522 offset[filter/4] |= 0x00 << ((filter % 4) * 8); 1523 crc[filter/2] |= smsc_crc(bcast, 6, filter); 1524 filter++; 1525 } 1526 1527 if (pdata->wolopts & WAKE_MCAST) { 1528 const u8 mcast[] = {0x01, 0x00, 0x5E}; 1529 netdev_info(dev->net, "enabling multicast detection\n"); 1530 filter_mask[filter * 4] = 0x0007; 1531 filter_mask[filter * 4 + 1] = 0x00; 1532 filter_mask[filter * 4 + 2] = 0x00; 1533 filter_mask[filter * 4 + 3] = 0x00; 1534 command[filter/4] |= 0x09UL << ((filter % 4) * 8); 1535 offset[filter/4] |= 0x00 << ((filter % 4) * 8); 1536 crc[filter/2] |= smsc_crc(mcast, 3, filter); 1537 filter++; 1538 } 1539 1540 if (pdata->wolopts & WAKE_ARP) { 1541 const u8 arp[] = {0x08, 0x06}; 1542 netdev_info(dev->net, "enabling ARP detection\n"); 1543 filter_mask[filter * 4] = 0x0003; 1544 filter_mask[filter * 4 + 1] = 0x00; 1545 filter_mask[filter * 4 + 2] = 0x00; 1546 filter_mask[filter * 4 + 3] = 0x00; 1547 command[filter/4] |= 0x05UL << ((filter % 4) * 8); 1548 offset[filter/4] |= 0x0C << ((filter % 4) * 8); 1549 crc[filter/2] |= smsc_crc(arp, 2, filter); 1550 filter++; 1551 } 1552 1553 if (pdata->wolopts & WAKE_UCAST) { 1554 netdev_info(dev->net, "enabling unicast detection\n"); 1555 filter_mask[filter * 4] = 0x003F; 1556 filter_mask[filter * 4 + 1] = 0x00; 1557 filter_mask[filter * 4 + 2] = 0x00; 1558 filter_mask[filter * 4 + 3] = 0x00; 1559 command[filter/4] |= 0x01UL << ((filter % 4) * 8); 1560 offset[filter/4] |= 0x00 << ((filter % 4) * 8); 1561 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); 1562 filter++; 1563 } 1564 1565 for (i = 0; i < (wuff_filter_count * 4); i++) { 1566 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); 1567 if (ret < 0) { 1568 netdev_warn(dev->net, "Error writing WUFF\n"); 1569 kfree(filter_mask); 1570 goto done; 1571 } 1572 } 1573 kfree(filter_mask); 1574 1575 for (i = 0; i < (wuff_filter_count / 4); i++) { 1576 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); 1577 if (ret < 0) { 1578 netdev_warn(dev->net, "Error writing WUFF\n"); 1579 goto done; 1580 } 1581 } 1582 1583 for (i = 0; i < (wuff_filter_count / 4); i++) { 1584 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); 1585 if (ret < 0) { 1586 netdev_warn(dev->net, "Error writing WUFF\n"); 1587 goto done; 1588 } 1589 } 1590 1591 for (i = 0; i < (wuff_filter_count / 2); i++) { 1592 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); 1593 if (ret < 0) { 1594 netdev_warn(dev->net, "Error writing WUFF\n"); 1595 goto done; 1596 } 1597 } 1598 1599 /* clear any pending pattern match packet status */ 1600 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1601 if (ret < 0) { 1602 netdev_warn(dev->net, "Error reading WUCSR\n"); 1603 goto done; 1604 } 1605 1606 val |= WUCSR_WUFR_; 1607 1608 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1609 if (ret < 0) { 1610 netdev_warn(dev->net, "Error writing WUCSR\n"); 1611 goto done; 1612 } 1613 } 1614 1615 if (pdata->wolopts & WAKE_MAGIC) { 1616 /* clear any pending magic packet status */ 1617 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1618 if (ret < 0) { 1619 netdev_warn(dev->net, "Error reading WUCSR\n"); 1620 goto done; 1621 } 1622 1623 val |= WUCSR_MPR_; 1624 1625 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1626 if (ret < 0) { 1627 netdev_warn(dev->net, "Error writing WUCSR\n"); 1628 goto done; 1629 } 1630 } 1631 1632 /* enable/disable wakeup sources */ 1633 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1634 if (ret < 0) { 1635 netdev_warn(dev->net, "Error reading WUCSR\n"); 1636 goto done; 1637 } 1638 1639 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { 1640 netdev_info(dev->net, "enabling pattern match wakeup\n"); 1641 val |= WUCSR_WAKE_EN_; 1642 } else { 1643 netdev_info(dev->net, "disabling pattern match wakeup\n"); 1644 val &= ~WUCSR_WAKE_EN_; 1645 } 1646 1647 if (pdata->wolopts & WAKE_MAGIC) { 1648 netdev_info(dev->net, "enabling magic packet wakeup\n"); 1649 val |= WUCSR_MPEN_; 1650 } else { 1651 netdev_info(dev->net, "disabling magic packet wakeup\n"); 1652 val &= ~WUCSR_MPEN_; 1653 } 1654 1655 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1656 if (ret < 0) { 1657 netdev_warn(dev->net, "Error writing WUCSR\n"); 1658 goto done; 1659 } 1660 1661 /* enable wol wakeup source */ 1662 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1663 if (ret < 0) { 1664 netdev_warn(dev->net, "Error reading PM_CTRL\n"); 1665 goto done; 1666 } 1667 1668 val |= PM_CTL_WOL_EN_; 1669 1670 /* phy energy detect wakeup source */ 1671 if (pdata->wolopts & WAKE_PHY) 1672 val |= PM_CTL_ED_EN_; 1673 1674 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1675 if (ret < 0) { 1676 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1677 goto done; 1678 } 1679 1680 /* enable receiver to enable frame reception */ 1681 smsc95xx_start_rx_path(dev, 1); 1682 1683 /* some wol options are enabled, so enter SUSPEND0 */ 1684 netdev_info(dev->net, "entering SUSPEND0 mode\n"); 1685 ret = smsc95xx_enter_suspend0(dev); 1686 1687done: 1688 if (ret) 1689 usbnet_resume(intf); 1690 return ret; 1691} 1692 1693static int smsc95xx_resume(struct usb_interface *intf) 1694{ 1695 struct usbnet *dev = usb_get_intfdata(intf); 1696 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1697 int ret; 1698 u32 val; 1699 1700 BUG_ON(!dev); 1701 1702 if (pdata->wolopts) { 1703 /* clear wake-up sources */ 1704 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1705 if (ret < 0) { 1706 netdev_warn(dev->net, "Error reading WUCSR\n"); 1707 return ret; 1708 } 1709 1710 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); 1711 1712 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1713 if (ret < 0) { 1714 netdev_warn(dev->net, "Error writing WUCSR\n"); 1715 return ret; 1716 } 1717 1718 /* clear wake-up status */ 1719 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1720 if (ret < 0) { 1721 netdev_warn(dev->net, "Error reading PM_CTRL\n"); 1722 return ret; 1723 } 1724 1725 val &= ~PM_CTL_WOL_EN_; 1726 val |= PM_CTL_WUPS_; 1727 1728 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1729 if (ret < 0) { 1730 netdev_warn(dev->net, "Error writing PM_CTRL\n"); 1731 return ret; 1732 } 1733 } 1734 1735 ret = usbnet_resume(intf); 1736 if (ret < 0) 1737 netdev_warn(dev->net, "usbnet_resume error\n"); 1738 1739 return ret; 1740} 1741 1742static void smsc95xx_rx_csum_offload(struct sk_buff *skb) 1743{ 1744 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); 1745 skb->ip_summed = CHECKSUM_COMPLETE; 1746 skb_trim(skb, skb->len - 2); 1747} 1748 1749static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1750{ 1751 while (skb->len > 0) { 1752 u32 header, align_count; 1753 struct sk_buff *ax_skb; 1754 unsigned char *packet; 1755 u16 size; 1756 1757 memcpy(&header, skb->data, sizeof(header)); 1758 le32_to_cpus(&header); 1759 skb_pull(skb, 4 + NET_IP_ALIGN); 1760 packet = skb->data; 1761 1762 /* get the packet length */ 1763 size = (u16)((header & RX_STS_FL_) >> 16); 1764 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1765 1766 if (unlikely(header & RX_STS_ES_)) { 1767 netif_dbg(dev, rx_err, dev->net, 1768 "Error header=0x%08x\n", header); 1769 dev->net->stats.rx_errors++; 1770 dev->net->stats.rx_dropped++; 1771 1772 if (header & RX_STS_CRC_) { 1773 dev->net->stats.rx_crc_errors++; 1774 } else { 1775 if (header & (RX_STS_TL_ | RX_STS_RF_)) 1776 dev->net->stats.rx_frame_errors++; 1777 1778 if ((header & RX_STS_LE_) && 1779 (!(header & RX_STS_FT_))) 1780 dev->net->stats.rx_length_errors++; 1781 } 1782 } else { 1783 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1784 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1785 netif_dbg(dev, rx_err, dev->net, 1786 "size err header=0x%08x\n", header); 1787 return 0; 1788 } 1789 1790 /* last frame in this batch */ 1791 if (skb->len == size) { 1792 if (dev->net->features & NETIF_F_RXCSUM) 1793 smsc95xx_rx_csum_offload(skb); 1794 skb_trim(skb, skb->len - 4); /* remove fcs */ 1795 skb->truesize = size + sizeof(struct sk_buff); 1796 1797 return 1; 1798 } 1799 1800 ax_skb = skb_clone(skb, GFP_ATOMIC); 1801 if (unlikely(!ax_skb)) { 1802 netdev_warn(dev->net, "Error allocating skb\n"); 1803 return 0; 1804 } 1805 1806 ax_skb->len = size; 1807 ax_skb->data = packet; 1808 skb_set_tail_pointer(ax_skb, size); 1809 1810 if (dev->net->features & NETIF_F_RXCSUM) 1811 smsc95xx_rx_csum_offload(ax_skb); 1812 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1813 ax_skb->truesize = size + sizeof(struct sk_buff); 1814 1815 usbnet_skb_return(dev, ax_skb); 1816 } 1817 1818 skb_pull(skb, size); 1819 1820 /* padding bytes before the next frame starts */ 1821 if (skb->len) 1822 skb_pull(skb, align_count); 1823 } 1824 1825 if (unlikely(skb->len < 0)) { 1826 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); 1827 return 0; 1828 } 1829 1830 return 1; 1831} 1832 1833static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) 1834{ 1835 u16 low_16 = (u16)skb_checksum_start_offset(skb); 1836 u16 high_16 = low_16 + skb->csum_offset; 1837 return (high_16 << 16) | low_16; 1838} 1839 1840static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, 1841 struct sk_buff *skb, gfp_t flags) 1842{ 1843 bool csum = skb->ip_summed == CHECKSUM_PARTIAL; 1844 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; 1845 u32 tx_cmd_a, tx_cmd_b; 1846 1847 /* We do not advertise SG, so skbs should be already linearized */ 1848 BUG_ON(skb_shinfo(skb)->nr_frags); 1849 1850 if (skb_headroom(skb) < overhead) { 1851 struct sk_buff *skb2 = skb_copy_expand(skb, 1852 overhead, 0, flags); 1853 dev_kfree_skb_any(skb); 1854 skb = skb2; 1855 if (!skb) 1856 return NULL; 1857 } 1858 1859 if (csum) { 1860 if (skb->len <= 45) { 1861 /* workaround - hardware tx checksum does not work 1862 * properly with extremely small packets */ 1863 long csstart = skb_checksum_start_offset(skb); 1864 __wsum calc = csum_partial(skb->data + csstart, 1865 skb->len - csstart, 0); 1866 *((__sum16 *)(skb->data + csstart 1867 + skb->csum_offset)) = csum_fold(calc); 1868 1869 csum = false; 1870 } else { 1871 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); 1872 skb_push(skb, 4); 1873 cpu_to_le32s(&csum_preamble); 1874 memcpy(skb->data, &csum_preamble, 4); 1875 } 1876 } 1877 1878 skb_push(skb, 4); 1879 tx_cmd_b = (u32)(skb->len - 4); 1880 if (csum) 1881 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; 1882 cpu_to_le32s(&tx_cmd_b); 1883 memcpy(skb->data, &tx_cmd_b, 4); 1884 1885 skb_push(skb, 4); 1886 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | 1887 TX_CMD_A_LAST_SEG_; 1888 cpu_to_le32s(&tx_cmd_a); 1889 memcpy(skb->data, &tx_cmd_a, 4); 1890 1891 return skb; 1892} 1893 1894static const struct driver_info smsc95xx_info = { 1895 .description = "smsc95xx USB 2.0 Ethernet", 1896 .bind = smsc95xx_bind, 1897 .unbind = smsc95xx_unbind, 1898 .link_reset = smsc95xx_link_reset, 1899 .reset = smsc95xx_reset, 1900 .rx_fixup = smsc95xx_rx_fixup, 1901 .tx_fixup = smsc95xx_tx_fixup, 1902 .status = smsc95xx_status, 1903 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, 1904}; 1905 1906static const struct usb_device_id products[] = { 1907 { 1908 /* SMSC9500 USB Ethernet Device */ 1909 USB_DEVICE(0x0424, 0x9500), 1910 .driver_info = (unsigned long) &smsc95xx_info, 1911 }, 1912 { 1913 /* SMSC9505 USB Ethernet Device */ 1914 USB_DEVICE(0x0424, 0x9505), 1915 .driver_info = (unsigned long) &smsc95xx_info, 1916 }, 1917 { 1918 /* SMSC9500A USB Ethernet Device */ 1919 USB_DEVICE(0x0424, 0x9E00), 1920 .driver_info = (unsigned long) &smsc95xx_info, 1921 }, 1922 { 1923 /* SMSC9505A USB Ethernet Device */ 1924 USB_DEVICE(0x0424, 0x9E01), 1925 .driver_info = (unsigned long) &smsc95xx_info, 1926 }, 1927 { 1928 /* SMSC9512/9514 USB Hub & Ethernet Device */ 1929 USB_DEVICE(0x0424, 0xec00), 1930 .driver_info = (unsigned long) &smsc95xx_info, 1931 }, 1932 { 1933 /* SMSC9500 USB Ethernet Device (SAL10) */ 1934 USB_DEVICE(0x0424, 0x9900), 1935 .driver_info = (unsigned long) &smsc95xx_info, 1936 }, 1937 { 1938 /* SMSC9505 USB Ethernet Device (SAL10) */ 1939 USB_DEVICE(0x0424, 0x9901), 1940 .driver_info = (unsigned long) &smsc95xx_info, 1941 }, 1942 { 1943 /* SMSC9500A USB Ethernet Device (SAL10) */ 1944 USB_DEVICE(0x0424, 0x9902), 1945 .driver_info = (unsigned long) &smsc95xx_info, 1946 }, 1947 { 1948 /* SMSC9505A USB Ethernet Device (SAL10) */ 1949 USB_DEVICE(0x0424, 0x9903), 1950 .driver_info = (unsigned long) &smsc95xx_info, 1951 }, 1952 { 1953 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ 1954 USB_DEVICE(0x0424, 0x9904), 1955 .driver_info = (unsigned long) &smsc95xx_info, 1956 }, 1957 { 1958 /* SMSC9500A USB Ethernet Device (HAL) */ 1959 USB_DEVICE(0x0424, 0x9905), 1960 .driver_info = (unsigned long) &smsc95xx_info, 1961 }, 1962 { 1963 /* SMSC9505A USB Ethernet Device (HAL) */ 1964 USB_DEVICE(0x0424, 0x9906), 1965 .driver_info = (unsigned long) &smsc95xx_info, 1966 }, 1967 { 1968 /* SMSC9500 USB Ethernet Device (Alternate ID) */ 1969 USB_DEVICE(0x0424, 0x9907), 1970 .driver_info = (unsigned long) &smsc95xx_info, 1971 }, 1972 { 1973 /* SMSC9500A USB Ethernet Device (Alternate ID) */ 1974 USB_DEVICE(0x0424, 0x9908), 1975 .driver_info = (unsigned long) &smsc95xx_info, 1976 }, 1977 { 1978 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ 1979 USB_DEVICE(0x0424, 0x9909), 1980 .driver_info = (unsigned long) &smsc95xx_info, 1981 }, 1982 { 1983 /* SMSC LAN9530 USB Ethernet Device */ 1984 USB_DEVICE(0x0424, 0x9530), 1985 .driver_info = (unsigned long) &smsc95xx_info, 1986 }, 1987 { 1988 /* SMSC LAN9730 USB Ethernet Device */ 1989 USB_DEVICE(0x0424, 0x9730), 1990 .driver_info = (unsigned long) &smsc95xx_info, 1991 }, 1992 { 1993 /* SMSC LAN89530 USB Ethernet Device */ 1994 USB_DEVICE(0x0424, 0x9E08), 1995 .driver_info = (unsigned long) &smsc95xx_info, 1996 }, 1997 { }, /* END */ 1998}; 1999MODULE_DEVICE_TABLE(usb, products); 2000 2001static struct usb_driver smsc95xx_driver = { 2002 .name = "smsc95xx", 2003 .id_table = products, 2004 .probe = usbnet_probe, 2005 .suspend = smsc95xx_suspend, 2006 .resume = smsc95xx_resume, 2007 .reset_resume = smsc95xx_resume, 2008 .disconnect = usbnet_disconnect, 2009 .disable_hub_initiated_lpm = 1, 2010}; 2011 2012module_usb_driver(smsc95xx_driver); 2013 2014MODULE_AUTHOR("Nancy Lin"); 2015MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); 2016MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); 2017MODULE_LICENSE("GPL"); 2018