smsc95xx.c revision b2d4b150278a5b9fbd3322a764d7b488be975a8d
1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2008 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21#include <linux/module.h> 22#include <linux/kmod.h> 23#include <linux/init.h> 24#include <linux/netdevice.h> 25#include <linux/etherdevice.h> 26#include <linux/ethtool.h> 27#include <linux/mii.h> 28#include <linux/usb.h> 29#include <linux/bitrev.h> 30#include <linux/crc16.h> 31#include <linux/crc32.h> 32#include <linux/usb/usbnet.h> 33#include <linux/slab.h> 34#include "smsc95xx.h" 35 36#define SMSC_CHIPNAME "smsc95xx" 37#define SMSC_DRIVER_VERSION "1.0.4" 38#define HS_USB_PKT_SIZE (512) 39#define FS_USB_PKT_SIZE (64) 40#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 41#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 42#define DEFAULT_BULK_IN_DELAY (0x00002000) 43#define MAX_SINGLE_PACKET_SIZE (2048) 44#define LAN95XX_EEPROM_MAGIC (0x9500) 45#define EEPROM_MAC_OFFSET (0x01) 46#define DEFAULT_TX_CSUM_ENABLE (true) 47#define DEFAULT_RX_CSUM_ENABLE (true) 48#define SMSC95XX_INTERNAL_PHY_ID (1) 49#define SMSC95XX_TX_OVERHEAD (8) 50#define SMSC95XX_TX_OVERHEAD_CSUM (12) 51#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ 52 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) 53 54#define FEATURE_8_WAKEUP_FILTERS (0x01) 55#define FEATURE_PHY_NLP_CROSSOVER (0x02) 56#define FEATURE_AUTOSUSPEND (0x04) 57 58#define SUSPEND_SUSPEND0 (0x01) 59#define SUSPEND_SUSPEND1 (0x02) 60#define SUSPEND_SUSPEND2 (0x04) 61#define SUSPEND_SUSPEND3 (0x08) 62#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ 63 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) 64 65struct smsc95xx_priv { 66 u32 mac_cr; 67 u32 hash_hi; 68 u32 hash_lo; 69 u32 wolopts; 70 spinlock_t mac_cr_lock; 71 u8 features; 72 u8 suspend_flags; 73}; 74 75static bool turbo_mode = true; 76module_param(turbo_mode, bool, 0644); 77MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 78 79static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index, 80 u32 *data, int in_pm) 81{ 82 u32 buf; 83 int ret; 84 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); 85 86 BUG_ON(!dev); 87 88 if (!in_pm) 89 fn = usbnet_read_cmd; 90 else 91 fn = usbnet_read_cmd_nopm; 92 93 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN 94 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 95 0, index, &buf, 4); 96 if (unlikely(ret < 0)) 97 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", 98 index, ret); 99 100 le32_to_cpus(&buf); 101 *data = buf; 102 103 return ret; 104} 105 106static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index, 107 u32 data, int in_pm) 108{ 109 u32 buf; 110 int ret; 111 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); 112 113 BUG_ON(!dev); 114 115 if (!in_pm) 116 fn = usbnet_write_cmd; 117 else 118 fn = usbnet_write_cmd_nopm; 119 120 buf = data; 121 cpu_to_le32s(&buf); 122 123 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT 124 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 125 0, index, &buf, 4); 126 if (unlikely(ret < 0)) 127 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", 128 index, ret); 129 130 return ret; 131} 132 133static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index, 134 u32 *data) 135{ 136 return __smsc95xx_read_reg(dev, index, data, 1); 137} 138 139static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index, 140 u32 data) 141{ 142 return __smsc95xx_write_reg(dev, index, data, 1); 143} 144 145static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, 146 u32 *data) 147{ 148 return __smsc95xx_read_reg(dev, index, data, 0); 149} 150 151static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index, 152 u32 data) 153{ 154 return __smsc95xx_write_reg(dev, index, data, 0); 155} 156 157/* Loop until the read is completed with timeout 158 * called with phy_mutex held */ 159static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev, 160 int in_pm) 161{ 162 unsigned long start_time = jiffies; 163 u32 val; 164 int ret; 165 166 do { 167 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); 168 if (ret < 0) { 169 netdev_warn(dev->net, "Error reading MII_ACCESS\n"); 170 return ret; 171 } 172 173 if (!(val & MII_BUSY_)) 174 return 0; 175 } while (!time_after(jiffies, start_time + HZ)); 176 177 return -EIO; 178} 179 180static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx, 181 int in_pm) 182{ 183 struct usbnet *dev = netdev_priv(netdev); 184 u32 val, addr; 185 int ret; 186 187 mutex_lock(&dev->phy_mutex); 188 189 /* confirm MII not busy */ 190 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 191 if (ret < 0) { 192 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); 193 goto done; 194 } 195 196 /* set the address, index & direction (read from PHY) */ 197 phy_id &= dev->mii.phy_id_mask; 198 idx &= dev->mii.reg_num_mask; 199 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_; 200 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); 201 if (ret < 0) { 202 netdev_warn(dev->net, "Error writing MII_ADDR\n"); 203 goto done; 204 } 205 206 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 207 if (ret < 0) { 208 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); 209 goto done; 210 } 211 212 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); 213 if (ret < 0) { 214 netdev_warn(dev->net, "Error reading MII_DATA\n"); 215 goto done; 216 } 217 218 ret = (u16)(val & 0xFFFF); 219 220done: 221 mutex_unlock(&dev->phy_mutex); 222 return ret; 223} 224 225static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id, 226 int idx, int regval, int in_pm) 227{ 228 struct usbnet *dev = netdev_priv(netdev); 229 u32 val, addr; 230 int ret; 231 232 mutex_lock(&dev->phy_mutex); 233 234 /* confirm MII not busy */ 235 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 236 if (ret < 0) { 237 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); 238 goto done; 239 } 240 241 val = regval; 242 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); 243 if (ret < 0) { 244 netdev_warn(dev->net, "Error writing MII_DATA\n"); 245 goto done; 246 } 247 248 /* set the address, index & direction (write to PHY) */ 249 phy_id &= dev->mii.phy_id_mask; 250 idx &= dev->mii.reg_num_mask; 251 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_; 252 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); 253 if (ret < 0) { 254 netdev_warn(dev->net, "Error writing MII_ADDR\n"); 255 goto done; 256 } 257 258 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); 259 if (ret < 0) { 260 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); 261 goto done; 262 } 263 264done: 265 mutex_unlock(&dev->phy_mutex); 266} 267 268static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id, 269 int idx) 270{ 271 return __smsc95xx_mdio_read(netdev, phy_id, idx, 1); 272} 273 274static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id, 275 int idx, int regval) 276{ 277 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); 278} 279 280static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 281{ 282 return __smsc95xx_mdio_read(netdev, phy_id, idx, 0); 283} 284 285static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 286 int regval) 287{ 288 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); 289} 290 291static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev) 292{ 293 unsigned long start_time = jiffies; 294 u32 val; 295 int ret; 296 297 do { 298 ret = smsc95xx_read_reg(dev, E2P_CMD, &val); 299 if (ret < 0) { 300 netdev_warn(dev->net, "Error reading E2P_CMD\n"); 301 return ret; 302 } 303 304 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) 305 break; 306 udelay(40); 307 } while (!time_after(jiffies, start_time + HZ)); 308 309 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { 310 netdev_warn(dev->net, "EEPROM read operation timeout\n"); 311 return -EIO; 312 } 313 314 return 0; 315} 316 317static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) 318{ 319 unsigned long start_time = jiffies; 320 u32 val; 321 int ret; 322 323 do { 324 ret = smsc95xx_read_reg(dev, E2P_CMD, &val); 325 if (ret < 0) { 326 netdev_warn(dev->net, "Error reading E2P_CMD\n"); 327 return ret; 328 } 329 330 if (!(val & E2P_CMD_BUSY_)) 331 return 0; 332 333 udelay(40); 334 } while (!time_after(jiffies, start_time + HZ)); 335 336 netdev_warn(dev->net, "EEPROM is busy\n"); 337 return -EIO; 338} 339 340static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 341 u8 *data) 342{ 343 u32 val; 344 int i, ret; 345 346 BUG_ON(!dev); 347 BUG_ON(!data); 348 349 ret = smsc95xx_eeprom_confirm_not_busy(dev); 350 if (ret) 351 return ret; 352 353 for (i = 0; i < length; i++) { 354 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); 355 ret = smsc95xx_write_reg(dev, E2P_CMD, val); 356 if (ret < 0) { 357 netdev_warn(dev->net, "Error writing E2P_CMD\n"); 358 return ret; 359 } 360 361 ret = smsc95xx_wait_eeprom(dev); 362 if (ret < 0) 363 return ret; 364 365 ret = smsc95xx_read_reg(dev, E2P_DATA, &val); 366 if (ret < 0) { 367 netdev_warn(dev->net, "Error reading E2P_DATA\n"); 368 return ret; 369 } 370 371 data[i] = val & 0xFF; 372 offset++; 373 } 374 375 return 0; 376} 377 378static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 379 u8 *data) 380{ 381 u32 val; 382 int i, ret; 383 384 BUG_ON(!dev); 385 BUG_ON(!data); 386 387 ret = smsc95xx_eeprom_confirm_not_busy(dev); 388 if (ret) 389 return ret; 390 391 /* Issue write/erase enable command */ 392 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; 393 ret = smsc95xx_write_reg(dev, E2P_CMD, val); 394 if (ret < 0) { 395 netdev_warn(dev->net, "Error writing E2P_DATA\n"); 396 return ret; 397 } 398 399 ret = smsc95xx_wait_eeprom(dev); 400 if (ret < 0) 401 return ret; 402 403 for (i = 0; i < length; i++) { 404 405 /* Fill data register */ 406 val = data[i]; 407 ret = smsc95xx_write_reg(dev, E2P_DATA, val); 408 if (ret < 0) { 409 netdev_warn(dev->net, "Error writing E2P_DATA\n"); 410 return ret; 411 } 412 413 /* Send "write" command */ 414 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); 415 ret = smsc95xx_write_reg(dev, E2P_CMD, val); 416 if (ret < 0) { 417 netdev_warn(dev->net, "Error writing E2P_CMD\n"); 418 return ret; 419 } 420 421 ret = smsc95xx_wait_eeprom(dev); 422 if (ret < 0) 423 return ret; 424 425 offset++; 426 } 427 428 return 0; 429} 430 431static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index, 432 u32 data) 433{ 434 const u16 size = 4; 435 u32 buf; 436 int ret; 437 438 buf = data; 439 cpu_to_le32s(&buf); 440 441 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, 442 USB_DIR_OUT | USB_TYPE_VENDOR | 443 USB_RECIP_DEVICE, 444 0, index, &buf, size); 445 if (ret < 0) 446 netdev_warn(dev->net, "Error write async cmd, sts=%d\n", 447 ret); 448 return ret; 449} 450 451/* returns hash bit number for given MAC address 452 * example: 453 * 01 00 5E 00 00 01 -> returns bit number 31 */ 454static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) 455{ 456 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 457} 458 459static void smsc95xx_set_multicast(struct net_device *netdev) 460{ 461 struct usbnet *dev = netdev_priv(netdev); 462 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 463 unsigned long flags; 464 int ret; 465 466 pdata->hash_hi = 0; 467 pdata->hash_lo = 0; 468 469 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 470 471 if (dev->net->flags & IFF_PROMISC) { 472 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); 473 pdata->mac_cr |= MAC_CR_PRMS_; 474 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 475 } else if (dev->net->flags & IFF_ALLMULTI) { 476 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); 477 pdata->mac_cr |= MAC_CR_MCPAS_; 478 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); 479 } else if (!netdev_mc_empty(dev->net)) { 480 struct netdev_hw_addr *ha; 481 482 pdata->mac_cr |= MAC_CR_HPFILT_; 483 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 484 485 netdev_for_each_mc_addr(ha, netdev) { 486 u32 bitnum = smsc95xx_hash(ha->addr); 487 u32 mask = 0x01 << (bitnum & 0x1F); 488 if (bitnum & 0x20) 489 pdata->hash_hi |= mask; 490 else 491 pdata->hash_lo |= mask; 492 } 493 494 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", 495 pdata->hash_hi, pdata->hash_lo); 496 } else { 497 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 498 pdata->mac_cr &= 499 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 500 } 501 502 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 503 504 /* Initiate async writes, as we can't wait for completion here */ 505 ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); 506 if (ret < 0) 507 netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); 508 509 ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); 510 if (ret < 0) 511 netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); 512 513 ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); 514 if (ret < 0) 515 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); 516} 517 518static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, 519 u16 lcladv, u16 rmtadv) 520{ 521 u32 flow, afc_cfg = 0; 522 523 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); 524 if (ret < 0) 525 return ret; 526 527 if (duplex == DUPLEX_FULL) { 528 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 529 530 if (cap & FLOW_CTRL_RX) 531 flow = 0xFFFF0002; 532 else 533 flow = 0; 534 535 if (cap & FLOW_CTRL_TX) 536 afc_cfg |= 0xF; 537 else 538 afc_cfg &= ~0xF; 539 540 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", 541 cap & FLOW_CTRL_RX ? "enabled" : "disabled", 542 cap & FLOW_CTRL_TX ? "enabled" : "disabled"); 543 } else { 544 netif_dbg(dev, link, dev->net, "half duplex\n"); 545 flow = 0; 546 afc_cfg |= 0xF; 547 } 548 549 ret = smsc95xx_write_reg(dev, FLOW, flow); 550 if (ret < 0) 551 return ret; 552 553 return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); 554} 555 556static int smsc95xx_link_reset(struct usbnet *dev) 557{ 558 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 559 struct mii_if_info *mii = &dev->mii; 560 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 561 unsigned long flags; 562 u16 lcladv, rmtadv; 563 int ret; 564 565 /* clear interrupt status */ 566 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 567 if (ret < 0) 568 return ret; 569 570 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 571 if (ret < 0) 572 return ret; 573 574 mii_check_media(mii, 1, 1); 575 mii_ethtool_gset(&dev->mii, &ecmd); 576 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 577 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 578 579 netif_dbg(dev, link, dev->net, 580 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", 581 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); 582 583 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 584 if (ecmd.duplex != DUPLEX_FULL) { 585 pdata->mac_cr &= ~MAC_CR_FDPX_; 586 pdata->mac_cr |= MAC_CR_RCVOWN_; 587 } else { 588 pdata->mac_cr &= ~MAC_CR_RCVOWN_; 589 pdata->mac_cr |= MAC_CR_FDPX_; 590 } 591 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 592 593 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 594 if (ret < 0) 595 return ret; 596 597 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 598 if (ret < 0) 599 netdev_warn(dev->net, "Error updating PHY flow control\n"); 600 601 return ret; 602} 603 604static void smsc95xx_status(struct usbnet *dev, struct urb *urb) 605{ 606 u32 intdata; 607 608 if (urb->actual_length != 4) { 609 netdev_warn(dev->net, "unexpected urb length %d\n", 610 urb->actual_length); 611 return; 612 } 613 614 memcpy(&intdata, urb->transfer_buffer, 4); 615 le32_to_cpus(&intdata); 616 617 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); 618 619 if (intdata & INT_ENP_PHY_INT_) 620 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 621 else 622 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", 623 intdata); 624} 625 626/* Enable or disable Tx & Rx checksum offload engines */ 627static int smsc95xx_set_features(struct net_device *netdev, 628 netdev_features_t features) 629{ 630 struct usbnet *dev = netdev_priv(netdev); 631 u32 read_buf; 632 int ret; 633 634 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); 635 if (ret < 0) 636 return ret; 637 638 if (features & NETIF_F_HW_CSUM) 639 read_buf |= Tx_COE_EN_; 640 else 641 read_buf &= ~Tx_COE_EN_; 642 643 if (features & NETIF_F_RXCSUM) 644 read_buf |= Rx_COE_EN_; 645 else 646 read_buf &= ~Rx_COE_EN_; 647 648 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); 649 if (ret < 0) 650 return ret; 651 652 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); 653 return 0; 654} 655 656static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) 657{ 658 return MAX_EEPROM_SIZE; 659} 660 661static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, 662 struct ethtool_eeprom *ee, u8 *data) 663{ 664 struct usbnet *dev = netdev_priv(netdev); 665 666 ee->magic = LAN95XX_EEPROM_MAGIC; 667 668 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); 669} 670 671static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, 672 struct ethtool_eeprom *ee, u8 *data) 673{ 674 struct usbnet *dev = netdev_priv(netdev); 675 676 if (ee->magic != LAN95XX_EEPROM_MAGIC) { 677 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", 678 ee->magic); 679 return -EINVAL; 680 } 681 682 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); 683} 684 685static int smsc95xx_ethtool_getregslen(struct net_device *netdev) 686{ 687 /* all smsc95xx registers */ 688 return COE_CR - ID_REV + sizeof(u32); 689} 690 691static void 692smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, 693 void *buf) 694{ 695 struct usbnet *dev = netdev_priv(netdev); 696 unsigned int i, j; 697 int retval; 698 u32 *data = buf; 699 700 retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); 701 if (retval < 0) { 702 netdev_warn(netdev, "REGS: cannot read ID_REV\n"); 703 return; 704 } 705 706 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { 707 retval = smsc95xx_read_reg(dev, i, &data[j]); 708 if (retval < 0) { 709 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); 710 return; 711 } 712 } 713} 714 715static void smsc95xx_ethtool_get_wol(struct net_device *net, 716 struct ethtool_wolinfo *wolinfo) 717{ 718 struct usbnet *dev = netdev_priv(net); 719 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 720 721 wolinfo->supported = SUPPORTED_WAKE; 722 wolinfo->wolopts = pdata->wolopts; 723} 724 725static int smsc95xx_ethtool_set_wol(struct net_device *net, 726 struct ethtool_wolinfo *wolinfo) 727{ 728 struct usbnet *dev = netdev_priv(net); 729 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 730 int ret; 731 732 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; 733 734 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); 735 if (ret < 0) 736 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); 737 738 return ret; 739} 740 741static const struct ethtool_ops smsc95xx_ethtool_ops = { 742 .get_link = usbnet_get_link, 743 .nway_reset = usbnet_nway_reset, 744 .get_drvinfo = usbnet_get_drvinfo, 745 .get_msglevel = usbnet_get_msglevel, 746 .set_msglevel = usbnet_set_msglevel, 747 .get_settings = usbnet_get_settings, 748 .set_settings = usbnet_set_settings, 749 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, 750 .get_eeprom = smsc95xx_ethtool_get_eeprom, 751 .set_eeprom = smsc95xx_ethtool_set_eeprom, 752 .get_regs_len = smsc95xx_ethtool_getregslen, 753 .get_regs = smsc95xx_ethtool_getregs, 754 .get_wol = smsc95xx_ethtool_get_wol, 755 .set_wol = smsc95xx_ethtool_set_wol, 756}; 757 758static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 759{ 760 struct usbnet *dev = netdev_priv(netdev); 761 762 if (!netif_running(netdev)) 763 return -EINVAL; 764 765 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 766} 767 768static void smsc95xx_init_mac_address(struct usbnet *dev) 769{ 770 /* try reading mac address from EEPROM */ 771 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 772 dev->net->dev_addr) == 0) { 773 if (is_valid_ether_addr(dev->net->dev_addr)) { 774 /* eeprom values are valid so use them */ 775 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); 776 return; 777 } 778 } 779 780 /* no eeprom, or eeprom values are invalid. generate random MAC */ 781 eth_hw_addr_random(dev->net); 782 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); 783} 784 785static int smsc95xx_set_mac_address(struct usbnet *dev) 786{ 787 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 788 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 789 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 790 int ret; 791 792 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); 793 if (ret < 0) 794 return ret; 795 796 return smsc95xx_write_reg(dev, ADDRH, addr_hi); 797} 798 799/* starts the TX path */ 800static int smsc95xx_start_tx_path(struct usbnet *dev) 801{ 802 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 803 unsigned long flags; 804 int ret; 805 806 /* Enable Tx at MAC */ 807 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 808 pdata->mac_cr |= MAC_CR_TXEN_; 809 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 810 811 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 812 if (ret < 0) 813 return ret; 814 815 /* Enable Tx at SCSRs */ 816 return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); 817} 818 819/* Starts the Receive path */ 820static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm) 821{ 822 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 823 unsigned long flags; 824 825 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 826 pdata->mac_cr |= MAC_CR_RXEN_; 827 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 828 829 return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); 830} 831 832static int smsc95xx_phy_initialize(struct usbnet *dev) 833{ 834 int bmcr, ret, timeout = 0; 835 836 /* Initialize MII structure */ 837 dev->mii.dev = dev->net; 838 dev->mii.mdio_read = smsc95xx_mdio_read; 839 dev->mii.mdio_write = smsc95xx_mdio_write; 840 dev->mii.phy_id_mask = 0x1f; 841 dev->mii.reg_num_mask = 0x1f; 842 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; 843 844 /* reset phy and wait for reset to complete */ 845 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 846 847 do { 848 msleep(10); 849 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 850 timeout++; 851 } while ((bmcr & BMCR_RESET) && (timeout < 100)); 852 853 if (timeout >= 100) { 854 netdev_warn(dev->net, "timeout on PHY Reset"); 855 return -EIO; 856 } 857 858 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 859 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 860 ADVERTISE_PAUSE_ASYM); 861 862 /* read to clear */ 863 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 864 if (ret < 0) { 865 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); 866 return ret; 867 } 868 869 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 870 PHY_INT_MASK_DEFAULT_); 871 mii_nway_restart(&dev->mii); 872 873 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); 874 return 0; 875} 876 877static int smsc95xx_reset(struct usbnet *dev) 878{ 879 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 880 u32 read_buf, write_buf, burst_cap; 881 int ret = 0, timeout; 882 883 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); 884 885 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); 886 if (ret < 0) 887 return ret; 888 889 timeout = 0; 890 do { 891 msleep(10); 892 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 893 if (ret < 0) 894 return ret; 895 timeout++; 896 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 897 898 if (timeout >= 100) { 899 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); 900 return ret; 901 } 902 903 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); 904 if (ret < 0) 905 return ret; 906 907 timeout = 0; 908 do { 909 msleep(10); 910 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 911 if (ret < 0) 912 return ret; 913 timeout++; 914 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 915 916 if (timeout >= 100) { 917 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); 918 return ret; 919 } 920 921 ret = smsc95xx_set_mac_address(dev); 922 if (ret < 0) 923 return ret; 924 925 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", 926 dev->net->dev_addr); 927 928 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 929 if (ret < 0) 930 return ret; 931 932 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", 933 read_buf); 934 935 read_buf |= HW_CFG_BIR_; 936 937 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 938 if (ret < 0) 939 return ret; 940 941 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 942 if (ret < 0) 943 return ret; 944 945 netif_dbg(dev, ifup, dev->net, 946 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", 947 read_buf); 948 949 if (!turbo_mode) { 950 burst_cap = 0; 951 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 952 } else if (dev->udev->speed == USB_SPEED_HIGH) { 953 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 954 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 955 } else { 956 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 957 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 958 } 959 960 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", 961 (ulong)dev->rx_urb_size); 962 963 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); 964 if (ret < 0) 965 return ret; 966 967 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); 968 if (ret < 0) 969 return ret; 970 971 netif_dbg(dev, ifup, dev->net, 972 "Read Value from BURST_CAP after writing: 0x%08x\n", 973 read_buf); 974 975 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 976 if (ret < 0) 977 return ret; 978 979 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); 980 if (ret < 0) 981 return ret; 982 983 netif_dbg(dev, ifup, dev->net, 984 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", 985 read_buf); 986 987 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 988 if (ret < 0) 989 return ret; 990 991 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", 992 read_buf); 993 994 if (turbo_mode) 995 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); 996 997 read_buf &= ~HW_CFG_RXDOFF_; 998 999 /* set Rx data offset=2, Make IP header aligns on word boundary. */ 1000 read_buf |= NET_IP_ALIGN << 9; 1001 1002 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 1003 if (ret < 0) 1004 return ret; 1005 1006 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 1007 if (ret < 0) 1008 return ret; 1009 1010 netif_dbg(dev, ifup, dev->net, 1011 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); 1012 1013 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 1014 if (ret < 0) 1015 return ret; 1016 1017 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); 1018 if (ret < 0) 1019 return ret; 1020 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); 1021 1022 /* Configure GPIO pins as LED outputs */ 1023 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | 1024 LED_GPIO_CFG_FDX_LED; 1025 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); 1026 if (ret < 0) 1027 return ret; 1028 1029 /* Init Tx */ 1030 ret = smsc95xx_write_reg(dev, FLOW, 0); 1031 if (ret < 0) 1032 return ret; 1033 1034 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); 1035 if (ret < 0) 1036 return ret; 1037 1038 /* Don't need mac_cr_lock during initialisation */ 1039 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); 1040 if (ret < 0) 1041 return ret; 1042 1043 /* Init Rx */ 1044 /* Set Vlan */ 1045 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); 1046 if (ret < 0) 1047 return ret; 1048 1049 /* Enable or disable checksum offload engines */ 1050 ret = smsc95xx_set_features(dev->net, dev->net->features); 1051 if (ret < 0) { 1052 netdev_warn(dev->net, "Failed to set checksum offload features\n"); 1053 return ret; 1054 } 1055 1056 smsc95xx_set_multicast(dev->net); 1057 1058 ret = smsc95xx_phy_initialize(dev); 1059 if (ret < 0) { 1060 netdev_warn(dev->net, "Failed to init PHY\n"); 1061 return ret; 1062 } 1063 1064 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); 1065 if (ret < 0) 1066 return ret; 1067 1068 /* enable PHY interrupts */ 1069 read_buf |= INT_EP_CTL_PHY_INT_; 1070 1071 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); 1072 if (ret < 0) 1073 return ret; 1074 1075 ret = smsc95xx_start_tx_path(dev); 1076 if (ret < 0) { 1077 netdev_warn(dev->net, "Failed to start TX path\n"); 1078 return ret; 1079 } 1080 1081 ret = smsc95xx_start_rx_path(dev, 0); 1082 if (ret < 0) { 1083 netdev_warn(dev->net, "Failed to start RX path\n"); 1084 return ret; 1085 } 1086 1087 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); 1088 return 0; 1089} 1090 1091static const struct net_device_ops smsc95xx_netdev_ops = { 1092 .ndo_open = usbnet_open, 1093 .ndo_stop = usbnet_stop, 1094 .ndo_start_xmit = usbnet_start_xmit, 1095 .ndo_tx_timeout = usbnet_tx_timeout, 1096 .ndo_change_mtu = usbnet_change_mtu, 1097 .ndo_set_mac_address = eth_mac_addr, 1098 .ndo_validate_addr = eth_validate_addr, 1099 .ndo_do_ioctl = smsc95xx_ioctl, 1100 .ndo_set_rx_mode = smsc95xx_set_multicast, 1101 .ndo_set_features = smsc95xx_set_features, 1102}; 1103 1104static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) 1105{ 1106 struct smsc95xx_priv *pdata = NULL; 1107 u32 val; 1108 int ret; 1109 1110 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1111 1112 ret = usbnet_get_endpoints(dev, intf); 1113 if (ret < 0) { 1114 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); 1115 return ret; 1116 } 1117 1118 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), 1119 GFP_KERNEL); 1120 1121 pdata = (struct smsc95xx_priv *)(dev->data[0]); 1122 if (!pdata) { 1123 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n"); 1124 return -ENOMEM; 1125 } 1126 1127 spin_lock_init(&pdata->mac_cr_lock); 1128 1129 if (DEFAULT_TX_CSUM_ENABLE) 1130 dev->net->features |= NETIF_F_HW_CSUM; 1131 if (DEFAULT_RX_CSUM_ENABLE) 1132 dev->net->features |= NETIF_F_RXCSUM; 1133 1134 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 1135 1136 smsc95xx_init_mac_address(dev); 1137 1138 /* Init all registers */ 1139 ret = smsc95xx_reset(dev); 1140 1141 /* detect device revision as different features may be available */ 1142 ret = smsc95xx_read_reg(dev, ID_REV, &val); 1143 if (ret < 0) 1144 return ret; 1145 val >>= 16; 1146 1147 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) || 1148 (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_)) 1149 pdata->features = (FEATURE_8_WAKEUP_FILTERS | 1150 FEATURE_PHY_NLP_CROSSOVER | 1151 FEATURE_AUTOSUSPEND); 1152 else if (val == ID_REV_CHIP_ID_9512_) 1153 pdata->features = FEATURE_8_WAKEUP_FILTERS; 1154 1155 dev->net->netdev_ops = &smsc95xx_netdev_ops; 1156 dev->net->ethtool_ops = &smsc95xx_ethtool_ops; 1157 dev->net->flags |= IFF_MULTICAST; 1158 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; 1159 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; 1160 return 0; 1161} 1162 1163static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1164{ 1165 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1166 if (pdata) { 1167 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); 1168 kfree(pdata); 1169 pdata = NULL; 1170 dev->data[0] = 0; 1171 } 1172} 1173 1174static u32 smsc_crc(const u8 *buffer, size_t len, int filter) 1175{ 1176 u32 crc = bitrev16(crc16(0xFFFF, buffer, len)); 1177 return crc << ((filter % 2) * 16); 1178} 1179 1180static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) 1181{ 1182 struct mii_if_info *mii = &dev->mii; 1183 int ret; 1184 1185 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); 1186 1187 /* read to clear */ 1188 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); 1189 if (ret < 0) 1190 return ret; 1191 1192 /* enable interrupt source */ 1193 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); 1194 if (ret < 0) 1195 return ret; 1196 1197 ret |= mask; 1198 1199 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); 1200 1201 return 0; 1202} 1203 1204static int smsc95xx_link_ok_nopm(struct usbnet *dev) 1205{ 1206 struct mii_if_info *mii = &dev->mii; 1207 int ret; 1208 1209 /* first, a dummy read, needed to latch some MII phys */ 1210 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); 1211 if (ret < 0) 1212 return ret; 1213 1214 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); 1215 if (ret < 0) 1216 return ret; 1217 1218 return !!(ret & BMSR_LSTATUS); 1219} 1220 1221static int smsc95xx_enter_suspend0(struct usbnet *dev) 1222{ 1223 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1224 u32 val; 1225 int ret; 1226 1227 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1228 if (ret < 0) 1229 return ret; 1230 1231 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_)); 1232 val |= PM_CTL_SUS_MODE_0; 1233 1234 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1235 if (ret < 0) 1236 return ret; 1237 1238 /* clear wol status */ 1239 val &= ~PM_CTL_WUPS_; 1240 val |= PM_CTL_WUPS_WOL_; 1241 1242 /* enable energy detection */ 1243 if (pdata->wolopts & WAKE_PHY) 1244 val |= PM_CTL_WUPS_ED_; 1245 1246 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1247 if (ret < 0) 1248 return ret; 1249 1250 /* read back PM_CTRL */ 1251 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1252 1253 pdata->suspend_flags |= SUSPEND_SUSPEND0; 1254 1255 return ret; 1256} 1257 1258static int smsc95xx_enter_suspend1(struct usbnet *dev) 1259{ 1260 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1261 struct mii_if_info *mii = &dev->mii; 1262 u32 val; 1263 int ret; 1264 1265 /* reconfigure link pulse detection timing for 1266 * compatibility with non-standard link partners 1267 */ 1268 if (pdata->features & FEATURE_PHY_NLP_CROSSOVER) 1269 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, 1270 PHY_EDPD_CONFIG_DEFAULT); 1271 1272 /* enable energy detect power-down mode */ 1273 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); 1274 if (ret < 0) 1275 return ret; 1276 1277 ret |= MODE_CTRL_STS_EDPWRDOWN_; 1278 1279 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); 1280 1281 /* enter SUSPEND1 mode */ 1282 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1283 if (ret < 0) 1284 return ret; 1285 1286 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); 1287 val |= PM_CTL_SUS_MODE_1; 1288 1289 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1290 if (ret < 0) 1291 return ret; 1292 1293 /* clear wol status, enable energy detection */ 1294 val &= ~PM_CTL_WUPS_; 1295 val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_); 1296 1297 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1298 1299 pdata->suspend_flags |= SUSPEND_SUSPEND1; 1300 1301 return ret; 1302} 1303 1304static int smsc95xx_enter_suspend2(struct usbnet *dev) 1305{ 1306 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1307 u32 val; 1308 int ret; 1309 1310 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1311 if (ret < 0) 1312 return ret; 1313 1314 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); 1315 val |= PM_CTL_SUS_MODE_2; 1316 1317 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1318 1319 pdata->suspend_flags |= SUSPEND_SUSPEND2; 1320 1321 return ret; 1322} 1323 1324static int smsc95xx_enter_suspend3(struct usbnet *dev) 1325{ 1326 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1327 u32 val; 1328 int ret; 1329 1330 ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val); 1331 if (ret < 0) 1332 return ret; 1333 1334 if (val & 0xFFFF) { 1335 netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); 1336 return -EBUSY; 1337 } 1338 1339 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1340 if (ret < 0) 1341 return ret; 1342 1343 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_); 1344 val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS; 1345 1346 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1347 if (ret < 0) 1348 return ret; 1349 1350 /* clear wol status */ 1351 val &= ~PM_CTL_WUPS_; 1352 val |= PM_CTL_WUPS_WOL_; 1353 1354 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1355 if (ret < 0) 1356 return ret; 1357 1358 pdata->suspend_flags |= SUSPEND_SUSPEND3; 1359 1360 return 0; 1361} 1362 1363static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up) 1364{ 1365 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1366 int ret; 1367 1368 if (!netif_running(dev->net)) { 1369 /* interface is ifconfig down so fully power down hw */ 1370 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); 1371 return smsc95xx_enter_suspend2(dev); 1372 } 1373 1374 if (!link_up) { 1375 /* link is down so enter EDPD mode, but only if device can 1376 * reliably resume from it. This check should be redundant 1377 * as current FEATURE_AUTOSUSPEND parts also support 1378 * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */ 1379 if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) { 1380 netdev_warn(dev->net, "EDPD not supported\n"); 1381 return -EBUSY; 1382 } 1383 1384 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); 1385 1386 /* enable PHY wakeup events for if cable is attached */ 1387 ret = smsc95xx_enable_phy_wakeup_interrupts(dev, 1388 PHY_INT_MASK_ANEG_COMP_); 1389 if (ret < 0) { 1390 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); 1391 return ret; 1392 } 1393 1394 netdev_info(dev->net, "entering SUSPEND1 mode\n"); 1395 return smsc95xx_enter_suspend1(dev); 1396 } 1397 1398 /* enable PHY wakeup events so we remote wakeup if cable is pulled */ 1399 ret = smsc95xx_enable_phy_wakeup_interrupts(dev, 1400 PHY_INT_MASK_LINK_DOWN_); 1401 if (ret < 0) { 1402 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); 1403 return ret; 1404 } 1405 1406 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); 1407 return smsc95xx_enter_suspend3(dev); 1408} 1409 1410static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message) 1411{ 1412 struct usbnet *dev = usb_get_intfdata(intf); 1413 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1414 u32 val, link_up; 1415 int ret; 1416 1417 /* TODO: don't indicate this feature to usb framework if 1418 * our current hardware doesn't have the capability 1419 */ 1420 if ((message.event == PM_EVENT_AUTO_SUSPEND) && 1421 (!(pdata->features & FEATURE_AUTOSUSPEND))) { 1422 netdev_warn(dev->net, "autosuspend not supported\n"); 1423 return -EBUSY; 1424 } 1425 1426 ret = usbnet_suspend(intf, message); 1427 if (ret < 0) { 1428 netdev_warn(dev->net, "usbnet_suspend error\n"); 1429 return ret; 1430 } 1431 1432 if (pdata->suspend_flags) { 1433 netdev_warn(dev->net, "error during last resume\n"); 1434 pdata->suspend_flags = 0; 1435 } 1436 1437 /* determine if link is up using only _nopm functions */ 1438 link_up = smsc95xx_link_ok_nopm(dev); 1439 1440 if (message.event == PM_EVENT_AUTO_SUSPEND) { 1441 ret = smsc95xx_autosuspend(dev, link_up); 1442 goto done; 1443 } 1444 1445 /* if we get this far we're not autosuspending */ 1446 /* if no wol options set, or if link is down and we're not waking on 1447 * PHY activity, enter lowest power SUSPEND2 mode 1448 */ 1449 if (!(pdata->wolopts & SUPPORTED_WAKE) || 1450 !(link_up || (pdata->wolopts & WAKE_PHY))) { 1451 netdev_info(dev->net, "entering SUSPEND2 mode\n"); 1452 1453 /* disable energy detect (link up) & wake up events */ 1454 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1455 if (ret < 0) 1456 goto done; 1457 1458 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_); 1459 1460 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1461 if (ret < 0) 1462 goto done; 1463 1464 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1465 if (ret < 0) 1466 goto done; 1467 1468 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_); 1469 1470 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1471 if (ret < 0) 1472 goto done; 1473 1474 ret = smsc95xx_enter_suspend2(dev); 1475 goto done; 1476 } 1477 1478 if (pdata->wolopts & WAKE_PHY) { 1479 ret = smsc95xx_enable_phy_wakeup_interrupts(dev, 1480 (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_)); 1481 if (ret < 0) { 1482 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); 1483 goto done; 1484 } 1485 1486 /* if link is down then configure EDPD and enter SUSPEND1, 1487 * otherwise enter SUSPEND0 below 1488 */ 1489 if (!link_up) { 1490 netdev_info(dev->net, "entering SUSPEND1 mode\n"); 1491 ret = smsc95xx_enter_suspend1(dev); 1492 goto done; 1493 } 1494 } 1495 1496 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { 1497 u32 *filter_mask = kzalloc(sizeof(u32) * 32, GFP_KERNEL); 1498 u32 command[2]; 1499 u32 offset[2]; 1500 u32 crc[4]; 1501 int wuff_filter_count = 1502 (pdata->features & FEATURE_8_WAKEUP_FILTERS) ? 1503 LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM; 1504 int i, filter = 0; 1505 1506 if (!filter_mask) { 1507 netdev_warn(dev->net, "Unable to allocate filter_mask\n"); 1508 ret = -ENOMEM; 1509 goto done; 1510 } 1511 1512 memset(command, 0, sizeof(command)); 1513 memset(offset, 0, sizeof(offset)); 1514 memset(crc, 0, sizeof(crc)); 1515 1516 if (pdata->wolopts & WAKE_BCAST) { 1517 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}; 1518 netdev_info(dev->net, "enabling broadcast detection\n"); 1519 filter_mask[filter * 4] = 0x003F; 1520 filter_mask[filter * 4 + 1] = 0x00; 1521 filter_mask[filter * 4 + 2] = 0x00; 1522 filter_mask[filter * 4 + 3] = 0x00; 1523 command[filter/4] |= 0x05UL << ((filter % 4) * 8); 1524 offset[filter/4] |= 0x00 << ((filter % 4) * 8); 1525 crc[filter/2] |= smsc_crc(bcast, 6, filter); 1526 filter++; 1527 } 1528 1529 if (pdata->wolopts & WAKE_MCAST) { 1530 const u8 mcast[] = {0x01, 0x00, 0x5E}; 1531 netdev_info(dev->net, "enabling multicast detection\n"); 1532 filter_mask[filter * 4] = 0x0007; 1533 filter_mask[filter * 4 + 1] = 0x00; 1534 filter_mask[filter * 4 + 2] = 0x00; 1535 filter_mask[filter * 4 + 3] = 0x00; 1536 command[filter/4] |= 0x09UL << ((filter % 4) * 8); 1537 offset[filter/4] |= 0x00 << ((filter % 4) * 8); 1538 crc[filter/2] |= smsc_crc(mcast, 3, filter); 1539 filter++; 1540 } 1541 1542 if (pdata->wolopts & WAKE_ARP) { 1543 const u8 arp[] = {0x08, 0x06}; 1544 netdev_info(dev->net, "enabling ARP detection\n"); 1545 filter_mask[filter * 4] = 0x0003; 1546 filter_mask[filter * 4 + 1] = 0x00; 1547 filter_mask[filter * 4 + 2] = 0x00; 1548 filter_mask[filter * 4 + 3] = 0x00; 1549 command[filter/4] |= 0x05UL << ((filter % 4) * 8); 1550 offset[filter/4] |= 0x0C << ((filter % 4) * 8); 1551 crc[filter/2] |= smsc_crc(arp, 2, filter); 1552 filter++; 1553 } 1554 1555 if (pdata->wolopts & WAKE_UCAST) { 1556 netdev_info(dev->net, "enabling unicast detection\n"); 1557 filter_mask[filter * 4] = 0x003F; 1558 filter_mask[filter * 4 + 1] = 0x00; 1559 filter_mask[filter * 4 + 2] = 0x00; 1560 filter_mask[filter * 4 + 3] = 0x00; 1561 command[filter/4] |= 0x01UL << ((filter % 4) * 8); 1562 offset[filter/4] |= 0x00 << ((filter % 4) * 8); 1563 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); 1564 filter++; 1565 } 1566 1567 for (i = 0; i < (wuff_filter_count * 4); i++) { 1568 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); 1569 if (ret < 0) { 1570 kfree(filter_mask); 1571 goto done; 1572 } 1573 } 1574 kfree(filter_mask); 1575 1576 for (i = 0; i < (wuff_filter_count / 4); i++) { 1577 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); 1578 if (ret < 0) 1579 goto done; 1580 } 1581 1582 for (i = 0; i < (wuff_filter_count / 4); i++) { 1583 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); 1584 if (ret < 0) 1585 goto done; 1586 } 1587 1588 for (i = 0; i < (wuff_filter_count / 2); i++) { 1589 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); 1590 if (ret < 0) 1591 goto done; 1592 } 1593 1594 /* clear any pending pattern match packet status */ 1595 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1596 if (ret < 0) 1597 goto done; 1598 1599 val |= WUCSR_WUFR_; 1600 1601 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1602 if (ret < 0) 1603 goto done; 1604 } 1605 1606 if (pdata->wolopts & WAKE_MAGIC) { 1607 /* clear any pending magic packet status */ 1608 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1609 if (ret < 0) 1610 goto done; 1611 1612 val |= WUCSR_MPR_; 1613 1614 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1615 if (ret < 0) 1616 goto done; 1617 } 1618 1619 /* enable/disable wakeup sources */ 1620 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1621 if (ret < 0) 1622 goto done; 1623 1624 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) { 1625 netdev_info(dev->net, "enabling pattern match wakeup\n"); 1626 val |= WUCSR_WAKE_EN_; 1627 } else { 1628 netdev_info(dev->net, "disabling pattern match wakeup\n"); 1629 val &= ~WUCSR_WAKE_EN_; 1630 } 1631 1632 if (pdata->wolopts & WAKE_MAGIC) { 1633 netdev_info(dev->net, "enabling magic packet wakeup\n"); 1634 val |= WUCSR_MPEN_; 1635 } else { 1636 netdev_info(dev->net, "disabling magic packet wakeup\n"); 1637 val &= ~WUCSR_MPEN_; 1638 } 1639 1640 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1641 if (ret < 0) 1642 goto done; 1643 1644 /* enable wol wakeup source */ 1645 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1646 if (ret < 0) 1647 goto done; 1648 1649 val |= PM_CTL_WOL_EN_; 1650 1651 /* phy energy detect wakeup source */ 1652 if (pdata->wolopts & WAKE_PHY) 1653 val |= PM_CTL_ED_EN_; 1654 1655 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1656 if (ret < 0) 1657 goto done; 1658 1659 /* enable receiver to enable frame reception */ 1660 smsc95xx_start_rx_path(dev, 1); 1661 1662 /* some wol options are enabled, so enter SUSPEND0 */ 1663 netdev_info(dev->net, "entering SUSPEND0 mode\n"); 1664 ret = smsc95xx_enter_suspend0(dev); 1665 1666done: 1667 if (ret) 1668 usbnet_resume(intf); 1669 return ret; 1670} 1671 1672static int smsc95xx_resume(struct usb_interface *intf) 1673{ 1674 struct usbnet *dev = usb_get_intfdata(intf); 1675 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1676 u8 suspend_flags = pdata->suspend_flags; 1677 int ret; 1678 u32 val; 1679 1680 BUG_ON(!dev); 1681 1682 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); 1683 1684 /* do this first to ensure it's cleared even in error case */ 1685 pdata->suspend_flags = 0; 1686 1687 if (suspend_flags & SUSPEND_ALLMODES) { 1688 /* clear wake-up sources */ 1689 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); 1690 if (ret < 0) 1691 return ret; 1692 1693 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_); 1694 1695 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); 1696 if (ret < 0) 1697 return ret; 1698 1699 /* clear wake-up status */ 1700 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); 1701 if (ret < 0) 1702 return ret; 1703 1704 val &= ~PM_CTL_WOL_EN_; 1705 val |= PM_CTL_WUPS_; 1706 1707 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); 1708 if (ret < 0) 1709 return ret; 1710 } 1711 1712 ret = usbnet_resume(intf); 1713 if (ret < 0) 1714 netdev_warn(dev->net, "usbnet_resume error\n"); 1715 1716 return ret; 1717} 1718 1719static void smsc95xx_rx_csum_offload(struct sk_buff *skb) 1720{ 1721 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); 1722 skb->ip_summed = CHECKSUM_COMPLETE; 1723 skb_trim(skb, skb->len - 2); 1724} 1725 1726static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1727{ 1728 while (skb->len > 0) { 1729 u32 header, align_count; 1730 struct sk_buff *ax_skb; 1731 unsigned char *packet; 1732 u16 size; 1733 1734 memcpy(&header, skb->data, sizeof(header)); 1735 le32_to_cpus(&header); 1736 skb_pull(skb, 4 + NET_IP_ALIGN); 1737 packet = skb->data; 1738 1739 /* get the packet length */ 1740 size = (u16)((header & RX_STS_FL_) >> 16); 1741 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1742 1743 if (unlikely(header & RX_STS_ES_)) { 1744 netif_dbg(dev, rx_err, dev->net, 1745 "Error header=0x%08x\n", header); 1746 dev->net->stats.rx_errors++; 1747 dev->net->stats.rx_dropped++; 1748 1749 if (header & RX_STS_CRC_) { 1750 dev->net->stats.rx_crc_errors++; 1751 } else { 1752 if (header & (RX_STS_TL_ | RX_STS_RF_)) 1753 dev->net->stats.rx_frame_errors++; 1754 1755 if ((header & RX_STS_LE_) && 1756 (!(header & RX_STS_FT_))) 1757 dev->net->stats.rx_length_errors++; 1758 } 1759 } else { 1760 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1761 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1762 netif_dbg(dev, rx_err, dev->net, 1763 "size err header=0x%08x\n", header); 1764 return 0; 1765 } 1766 1767 /* last frame in this batch */ 1768 if (skb->len == size) { 1769 if (dev->net->features & NETIF_F_RXCSUM) 1770 smsc95xx_rx_csum_offload(skb); 1771 skb_trim(skb, skb->len - 4); /* remove fcs */ 1772 skb->truesize = size + sizeof(struct sk_buff); 1773 1774 return 1; 1775 } 1776 1777 ax_skb = skb_clone(skb, GFP_ATOMIC); 1778 if (unlikely(!ax_skb)) { 1779 netdev_warn(dev->net, "Error allocating skb\n"); 1780 return 0; 1781 } 1782 1783 ax_skb->len = size; 1784 ax_skb->data = packet; 1785 skb_set_tail_pointer(ax_skb, size); 1786 1787 if (dev->net->features & NETIF_F_RXCSUM) 1788 smsc95xx_rx_csum_offload(ax_skb); 1789 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1790 ax_skb->truesize = size + sizeof(struct sk_buff); 1791 1792 usbnet_skb_return(dev, ax_skb); 1793 } 1794 1795 skb_pull(skb, size); 1796 1797 /* padding bytes before the next frame starts */ 1798 if (skb->len) 1799 skb_pull(skb, align_count); 1800 } 1801 1802 if (unlikely(skb->len < 0)) { 1803 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); 1804 return 0; 1805 } 1806 1807 return 1; 1808} 1809 1810static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) 1811{ 1812 u16 low_16 = (u16)skb_checksum_start_offset(skb); 1813 u16 high_16 = low_16 + skb->csum_offset; 1814 return (high_16 << 16) | low_16; 1815} 1816 1817static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, 1818 struct sk_buff *skb, gfp_t flags) 1819{ 1820 bool csum = skb->ip_summed == CHECKSUM_PARTIAL; 1821 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; 1822 u32 tx_cmd_a, tx_cmd_b; 1823 1824 /* We do not advertise SG, so skbs should be already linearized */ 1825 BUG_ON(skb_shinfo(skb)->nr_frags); 1826 1827 if (skb_headroom(skb) < overhead) { 1828 struct sk_buff *skb2 = skb_copy_expand(skb, 1829 overhead, 0, flags); 1830 dev_kfree_skb_any(skb); 1831 skb = skb2; 1832 if (!skb) 1833 return NULL; 1834 } 1835 1836 if (csum) { 1837 if (skb->len <= 45) { 1838 /* workaround - hardware tx checksum does not work 1839 * properly with extremely small packets */ 1840 long csstart = skb_checksum_start_offset(skb); 1841 __wsum calc = csum_partial(skb->data + csstart, 1842 skb->len - csstart, 0); 1843 *((__sum16 *)(skb->data + csstart 1844 + skb->csum_offset)) = csum_fold(calc); 1845 1846 csum = false; 1847 } else { 1848 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); 1849 skb_push(skb, 4); 1850 cpu_to_le32s(&csum_preamble); 1851 memcpy(skb->data, &csum_preamble, 4); 1852 } 1853 } 1854 1855 skb_push(skb, 4); 1856 tx_cmd_b = (u32)(skb->len - 4); 1857 if (csum) 1858 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; 1859 cpu_to_le32s(&tx_cmd_b); 1860 memcpy(skb->data, &tx_cmd_b, 4); 1861 1862 skb_push(skb, 4); 1863 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | 1864 TX_CMD_A_LAST_SEG_; 1865 cpu_to_le32s(&tx_cmd_a); 1866 memcpy(skb->data, &tx_cmd_a, 4); 1867 1868 return skb; 1869} 1870 1871static int smsc95xx_manage_power(struct usbnet *dev, int on) 1872{ 1873 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1874 1875 dev->intf->needs_remote_wakeup = on; 1876 1877 if (pdata->features & FEATURE_AUTOSUSPEND) 1878 return 0; 1879 1880 /* this chip revision doesn't support autosuspend */ 1881 netdev_info(dev->net, "hardware doesn't support USB autosuspend\n"); 1882 1883 if (on) 1884 usb_autopm_get_interface_no_resume(dev->intf); 1885 else 1886 usb_autopm_put_interface(dev->intf); 1887 1888 return 0; 1889} 1890 1891static const struct driver_info smsc95xx_info = { 1892 .description = "smsc95xx USB 2.0 Ethernet", 1893 .bind = smsc95xx_bind, 1894 .unbind = smsc95xx_unbind, 1895 .link_reset = smsc95xx_link_reset, 1896 .reset = smsc95xx_reset, 1897 .rx_fixup = smsc95xx_rx_fixup, 1898 .tx_fixup = smsc95xx_tx_fixup, 1899 .status = smsc95xx_status, 1900 .manage_power = smsc95xx_manage_power, 1901 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, 1902}; 1903 1904static const struct usb_device_id products[] = { 1905 { 1906 /* SMSC9500 USB Ethernet Device */ 1907 USB_DEVICE(0x0424, 0x9500), 1908 .driver_info = (unsigned long) &smsc95xx_info, 1909 }, 1910 { 1911 /* SMSC9505 USB Ethernet Device */ 1912 USB_DEVICE(0x0424, 0x9505), 1913 .driver_info = (unsigned long) &smsc95xx_info, 1914 }, 1915 { 1916 /* SMSC9500A USB Ethernet Device */ 1917 USB_DEVICE(0x0424, 0x9E00), 1918 .driver_info = (unsigned long) &smsc95xx_info, 1919 }, 1920 { 1921 /* SMSC9505A USB Ethernet Device */ 1922 USB_DEVICE(0x0424, 0x9E01), 1923 .driver_info = (unsigned long) &smsc95xx_info, 1924 }, 1925 { 1926 /* SMSC9512/9514 USB Hub & Ethernet Device */ 1927 USB_DEVICE(0x0424, 0xec00), 1928 .driver_info = (unsigned long) &smsc95xx_info, 1929 }, 1930 { 1931 /* SMSC9500 USB Ethernet Device (SAL10) */ 1932 USB_DEVICE(0x0424, 0x9900), 1933 .driver_info = (unsigned long) &smsc95xx_info, 1934 }, 1935 { 1936 /* SMSC9505 USB Ethernet Device (SAL10) */ 1937 USB_DEVICE(0x0424, 0x9901), 1938 .driver_info = (unsigned long) &smsc95xx_info, 1939 }, 1940 { 1941 /* SMSC9500A USB Ethernet Device (SAL10) */ 1942 USB_DEVICE(0x0424, 0x9902), 1943 .driver_info = (unsigned long) &smsc95xx_info, 1944 }, 1945 { 1946 /* SMSC9505A USB Ethernet Device (SAL10) */ 1947 USB_DEVICE(0x0424, 0x9903), 1948 .driver_info = (unsigned long) &smsc95xx_info, 1949 }, 1950 { 1951 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ 1952 USB_DEVICE(0x0424, 0x9904), 1953 .driver_info = (unsigned long) &smsc95xx_info, 1954 }, 1955 { 1956 /* SMSC9500A USB Ethernet Device (HAL) */ 1957 USB_DEVICE(0x0424, 0x9905), 1958 .driver_info = (unsigned long) &smsc95xx_info, 1959 }, 1960 { 1961 /* SMSC9505A USB Ethernet Device (HAL) */ 1962 USB_DEVICE(0x0424, 0x9906), 1963 .driver_info = (unsigned long) &smsc95xx_info, 1964 }, 1965 { 1966 /* SMSC9500 USB Ethernet Device (Alternate ID) */ 1967 USB_DEVICE(0x0424, 0x9907), 1968 .driver_info = (unsigned long) &smsc95xx_info, 1969 }, 1970 { 1971 /* SMSC9500A USB Ethernet Device (Alternate ID) */ 1972 USB_DEVICE(0x0424, 0x9908), 1973 .driver_info = (unsigned long) &smsc95xx_info, 1974 }, 1975 { 1976 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ 1977 USB_DEVICE(0x0424, 0x9909), 1978 .driver_info = (unsigned long) &smsc95xx_info, 1979 }, 1980 { 1981 /* SMSC LAN9530 USB Ethernet Device */ 1982 USB_DEVICE(0x0424, 0x9530), 1983 .driver_info = (unsigned long) &smsc95xx_info, 1984 }, 1985 { 1986 /* SMSC LAN9730 USB Ethernet Device */ 1987 USB_DEVICE(0x0424, 0x9730), 1988 .driver_info = (unsigned long) &smsc95xx_info, 1989 }, 1990 { 1991 /* SMSC LAN89530 USB Ethernet Device */ 1992 USB_DEVICE(0x0424, 0x9E08), 1993 .driver_info = (unsigned long) &smsc95xx_info, 1994 }, 1995 { }, /* END */ 1996}; 1997MODULE_DEVICE_TABLE(usb, products); 1998 1999static struct usb_driver smsc95xx_driver = { 2000 .name = "smsc95xx", 2001 .id_table = products, 2002 .probe = usbnet_probe, 2003 .suspend = smsc95xx_suspend, 2004 .resume = smsc95xx_resume, 2005 .reset_resume = smsc95xx_resume, 2006 .disconnect = usbnet_disconnect, 2007 .disable_hub_initiated_lpm = 1, 2008 .supports_autosuspend = 1, 2009}; 2010 2011module_usb_driver(smsc95xx_driver); 2012 2013MODULE_AUTHOR("Nancy Lin"); 2014MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); 2015MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); 2016MODULE_LICENSE("GPL"); 2017