smsc95xx.c revision eb93992207dadb946a3b5cf4544957dc924a6f58
1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2008 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21#include <linux/module.h> 22#include <linux/kmod.h> 23#include <linux/init.h> 24#include <linux/netdevice.h> 25#include <linux/etherdevice.h> 26#include <linux/ethtool.h> 27#include <linux/mii.h> 28#include <linux/usb.h> 29#include <linux/crc32.h> 30#include <linux/usb/usbnet.h> 31#include <linux/slab.h> 32#include "smsc95xx.h" 33 34#define SMSC_CHIPNAME "smsc95xx" 35#define SMSC_DRIVER_VERSION "1.0.4" 36#define HS_USB_PKT_SIZE (512) 37#define FS_USB_PKT_SIZE (64) 38#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 39#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 40#define DEFAULT_BULK_IN_DELAY (0x00002000) 41#define MAX_SINGLE_PACKET_SIZE (2048) 42#define LAN95XX_EEPROM_MAGIC (0x9500) 43#define EEPROM_MAC_OFFSET (0x01) 44#define DEFAULT_TX_CSUM_ENABLE (true) 45#define DEFAULT_RX_CSUM_ENABLE (true) 46#define SMSC95XX_INTERNAL_PHY_ID (1) 47#define SMSC95XX_TX_OVERHEAD (8) 48#define SMSC95XX_TX_OVERHEAD_CSUM (12) 49 50struct smsc95xx_priv { 51 u32 mac_cr; 52 u32 hash_hi; 53 u32 hash_lo; 54 spinlock_t mac_cr_lock; 55}; 56 57struct usb_context { 58 struct usb_ctrlrequest req; 59 struct usbnet *dev; 60}; 61 62static bool turbo_mode = true; 63module_param(turbo_mode, bool, 0644); 64MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 65 66static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) 67{ 68 u32 *buf = kmalloc(4, GFP_KERNEL); 69 int ret; 70 71 BUG_ON(!dev); 72 73 if (!buf) 74 return -ENOMEM; 75 76 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 77 USB_VENDOR_REQUEST_READ_REGISTER, 78 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 79 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); 80 81 if (unlikely(ret < 0)) 82 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index); 83 84 le32_to_cpus(buf); 85 *data = *buf; 86 kfree(buf); 87 88 return ret; 89} 90 91static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data) 92{ 93 u32 *buf = kmalloc(4, GFP_KERNEL); 94 int ret; 95 96 BUG_ON(!dev); 97 98 if (!buf) 99 return -ENOMEM; 100 101 *buf = data; 102 cpu_to_le32s(buf); 103 104 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 105 USB_VENDOR_REQUEST_WRITE_REGISTER, 106 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 107 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); 108 109 if (unlikely(ret < 0)) 110 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index); 111 112 kfree(buf); 113 114 return ret; 115} 116 117/* Loop until the read is completed with timeout 118 * called with phy_mutex held */ 119static int smsc95xx_phy_wait_not_busy(struct usbnet *dev) 120{ 121 unsigned long start_time = jiffies; 122 u32 val; 123 124 do { 125 smsc95xx_read_reg(dev, MII_ADDR, &val); 126 if (!(val & MII_BUSY_)) 127 return 0; 128 } while (!time_after(jiffies, start_time + HZ)); 129 130 return -EIO; 131} 132 133static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 134{ 135 struct usbnet *dev = netdev_priv(netdev); 136 u32 val, addr; 137 138 mutex_lock(&dev->phy_mutex); 139 140 /* confirm MII not busy */ 141 if (smsc95xx_phy_wait_not_busy(dev)) { 142 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); 143 mutex_unlock(&dev->phy_mutex); 144 return -EIO; 145 } 146 147 /* set the address, index & direction (read from PHY) */ 148 phy_id &= dev->mii.phy_id_mask; 149 idx &= dev->mii.reg_num_mask; 150 addr = (phy_id << 11) | (idx << 6) | MII_READ_; 151 smsc95xx_write_reg(dev, MII_ADDR, addr); 152 153 if (smsc95xx_phy_wait_not_busy(dev)) { 154 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); 155 mutex_unlock(&dev->phy_mutex); 156 return -EIO; 157 } 158 159 smsc95xx_read_reg(dev, MII_DATA, &val); 160 161 mutex_unlock(&dev->phy_mutex); 162 163 return (u16)(val & 0xFFFF); 164} 165 166static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 167 int regval) 168{ 169 struct usbnet *dev = netdev_priv(netdev); 170 u32 val, addr; 171 172 mutex_lock(&dev->phy_mutex); 173 174 /* confirm MII not busy */ 175 if (smsc95xx_phy_wait_not_busy(dev)) { 176 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); 177 mutex_unlock(&dev->phy_mutex); 178 return; 179 } 180 181 val = regval; 182 smsc95xx_write_reg(dev, MII_DATA, val); 183 184 /* set the address, index & direction (write to PHY) */ 185 phy_id &= dev->mii.phy_id_mask; 186 idx &= dev->mii.reg_num_mask; 187 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; 188 smsc95xx_write_reg(dev, MII_ADDR, addr); 189 190 if (smsc95xx_phy_wait_not_busy(dev)) 191 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); 192 193 mutex_unlock(&dev->phy_mutex); 194} 195 196static int smsc95xx_wait_eeprom(struct usbnet *dev) 197{ 198 unsigned long start_time = jiffies; 199 u32 val; 200 201 do { 202 smsc95xx_read_reg(dev, E2P_CMD, &val); 203 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) 204 break; 205 udelay(40); 206 } while (!time_after(jiffies, start_time + HZ)); 207 208 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { 209 netdev_warn(dev->net, "EEPROM read operation timeout\n"); 210 return -EIO; 211 } 212 213 return 0; 214} 215 216static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) 217{ 218 unsigned long start_time = jiffies; 219 u32 val; 220 221 do { 222 smsc95xx_read_reg(dev, E2P_CMD, &val); 223 224 if (!(val & E2P_CMD_BUSY_)) 225 return 0; 226 227 udelay(40); 228 } while (!time_after(jiffies, start_time + HZ)); 229 230 netdev_warn(dev->net, "EEPROM is busy\n"); 231 return -EIO; 232} 233 234static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 235 u8 *data) 236{ 237 u32 val; 238 int i, ret; 239 240 BUG_ON(!dev); 241 BUG_ON(!data); 242 243 ret = smsc95xx_eeprom_confirm_not_busy(dev); 244 if (ret) 245 return ret; 246 247 for (i = 0; i < length; i++) { 248 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); 249 smsc95xx_write_reg(dev, E2P_CMD, val); 250 251 ret = smsc95xx_wait_eeprom(dev); 252 if (ret < 0) 253 return ret; 254 255 smsc95xx_read_reg(dev, E2P_DATA, &val); 256 257 data[i] = val & 0xFF; 258 offset++; 259 } 260 261 return 0; 262} 263 264static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 265 u8 *data) 266{ 267 u32 val; 268 int i, ret; 269 270 BUG_ON(!dev); 271 BUG_ON(!data); 272 273 ret = smsc95xx_eeprom_confirm_not_busy(dev); 274 if (ret) 275 return ret; 276 277 /* Issue write/erase enable command */ 278 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; 279 smsc95xx_write_reg(dev, E2P_CMD, val); 280 281 ret = smsc95xx_wait_eeprom(dev); 282 if (ret < 0) 283 return ret; 284 285 for (i = 0; i < length; i++) { 286 287 /* Fill data register */ 288 val = data[i]; 289 smsc95xx_write_reg(dev, E2P_DATA, val); 290 291 /* Send "write" command */ 292 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); 293 smsc95xx_write_reg(dev, E2P_CMD, val); 294 295 ret = smsc95xx_wait_eeprom(dev); 296 if (ret < 0) 297 return ret; 298 299 offset++; 300 } 301 302 return 0; 303} 304 305static void smsc95xx_async_cmd_callback(struct urb *urb) 306{ 307 struct usb_context *usb_context = urb->context; 308 struct usbnet *dev = usb_context->dev; 309 int status = urb->status; 310 311 if (status < 0) 312 netdev_warn(dev->net, "async callback failed with %d\n", status); 313 314 kfree(usb_context); 315 usb_free_urb(urb); 316} 317 318static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data) 319{ 320 struct usb_context *usb_context; 321 int status; 322 struct urb *urb; 323 const u16 size = 4; 324 325 urb = usb_alloc_urb(0, GFP_ATOMIC); 326 if (!urb) { 327 netdev_warn(dev->net, "Error allocating URB\n"); 328 return -ENOMEM; 329 } 330 331 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC); 332 if (usb_context == NULL) { 333 netdev_warn(dev->net, "Error allocating control msg\n"); 334 usb_free_urb(urb); 335 return -ENOMEM; 336 } 337 338 usb_context->req.bRequestType = 339 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; 340 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER; 341 usb_context->req.wValue = 00; 342 usb_context->req.wIndex = cpu_to_le16(index); 343 usb_context->req.wLength = cpu_to_le16(size); 344 345 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0), 346 (void *)&usb_context->req, data, size, 347 smsc95xx_async_cmd_callback, 348 (void *)usb_context); 349 350 status = usb_submit_urb(urb, GFP_ATOMIC); 351 if (status < 0) { 352 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n", 353 status); 354 kfree(usb_context); 355 usb_free_urb(urb); 356 } 357 358 return status; 359} 360 361/* returns hash bit number for given MAC address 362 * example: 363 * 01 00 5E 00 00 01 -> returns bit number 31 */ 364static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) 365{ 366 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 367} 368 369static void smsc95xx_set_multicast(struct net_device *netdev) 370{ 371 struct usbnet *dev = netdev_priv(netdev); 372 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 373 unsigned long flags; 374 375 pdata->hash_hi = 0; 376 pdata->hash_lo = 0; 377 378 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 379 380 if (dev->net->flags & IFF_PROMISC) { 381 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); 382 pdata->mac_cr |= MAC_CR_PRMS_; 383 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 384 } else if (dev->net->flags & IFF_ALLMULTI) { 385 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); 386 pdata->mac_cr |= MAC_CR_MCPAS_; 387 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); 388 } else if (!netdev_mc_empty(dev->net)) { 389 struct netdev_hw_addr *ha; 390 391 pdata->mac_cr |= MAC_CR_HPFILT_; 392 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 393 394 netdev_for_each_mc_addr(ha, netdev) { 395 u32 bitnum = smsc95xx_hash(ha->addr); 396 u32 mask = 0x01 << (bitnum & 0x1F); 397 if (bitnum & 0x20) 398 pdata->hash_hi |= mask; 399 else 400 pdata->hash_lo |= mask; 401 } 402 403 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", 404 pdata->hash_hi, pdata->hash_lo); 405 } else { 406 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 407 pdata->mac_cr &= 408 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 409 } 410 411 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 412 413 /* Initiate async writes, as we can't wait for completion here */ 414 smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi); 415 smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo); 416 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr); 417} 418 419static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, 420 u16 lcladv, u16 rmtadv) 421{ 422 u32 flow, afc_cfg = 0; 423 424 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); 425 if (ret < 0) { 426 netdev_warn(dev->net, "error reading AFC_CFG\n"); 427 return; 428 } 429 430 if (duplex == DUPLEX_FULL) { 431 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 432 433 if (cap & FLOW_CTRL_RX) 434 flow = 0xFFFF0002; 435 else 436 flow = 0; 437 438 if (cap & FLOW_CTRL_TX) 439 afc_cfg |= 0xF; 440 else 441 afc_cfg &= ~0xF; 442 443 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", 444 cap & FLOW_CTRL_RX ? "enabled" : "disabled", 445 cap & FLOW_CTRL_TX ? "enabled" : "disabled"); 446 } else { 447 netif_dbg(dev, link, dev->net, "half duplex\n"); 448 flow = 0; 449 afc_cfg |= 0xF; 450 } 451 452 smsc95xx_write_reg(dev, FLOW, flow); 453 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); 454} 455 456static int smsc95xx_link_reset(struct usbnet *dev) 457{ 458 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 459 struct mii_if_info *mii = &dev->mii; 460 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 461 unsigned long flags; 462 u16 lcladv, rmtadv; 463 u32 intdata; 464 465 /* clear interrupt status */ 466 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 467 intdata = 0xFFFFFFFF; 468 smsc95xx_write_reg(dev, INT_STS, intdata); 469 470 mii_check_media(mii, 1, 1); 471 mii_ethtool_gset(&dev->mii, &ecmd); 472 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 473 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 474 475 netif_dbg(dev, link, dev->net, 476 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", 477 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); 478 479 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 480 if (ecmd.duplex != DUPLEX_FULL) { 481 pdata->mac_cr &= ~MAC_CR_FDPX_; 482 pdata->mac_cr |= MAC_CR_RCVOWN_; 483 } else { 484 pdata->mac_cr &= ~MAC_CR_RCVOWN_; 485 pdata->mac_cr |= MAC_CR_FDPX_; 486 } 487 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 488 489 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 490 491 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 492 493 return 0; 494} 495 496static void smsc95xx_status(struct usbnet *dev, struct urb *urb) 497{ 498 u32 intdata; 499 500 if (urb->actual_length != 4) { 501 netdev_warn(dev->net, "unexpected urb length %d\n", 502 urb->actual_length); 503 return; 504 } 505 506 memcpy(&intdata, urb->transfer_buffer, 4); 507 le32_to_cpus(&intdata); 508 509 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); 510 511 if (intdata & INT_ENP_PHY_INT_) 512 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 513 else 514 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", 515 intdata); 516} 517 518/* Enable or disable Tx & Rx checksum offload engines */ 519static int smsc95xx_set_features(struct net_device *netdev, 520 netdev_features_t features) 521{ 522 struct usbnet *dev = netdev_priv(netdev); 523 u32 read_buf; 524 int ret; 525 526 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); 527 if (ret < 0) { 528 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret); 529 return ret; 530 } 531 532 if (features & NETIF_F_HW_CSUM) 533 read_buf |= Tx_COE_EN_; 534 else 535 read_buf &= ~Tx_COE_EN_; 536 537 if (features & NETIF_F_RXCSUM) 538 read_buf |= Rx_COE_EN_; 539 else 540 read_buf &= ~Rx_COE_EN_; 541 542 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); 543 if (ret < 0) { 544 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret); 545 return ret; 546 } 547 548 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); 549 return 0; 550} 551 552static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) 553{ 554 return MAX_EEPROM_SIZE; 555} 556 557static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, 558 struct ethtool_eeprom *ee, u8 *data) 559{ 560 struct usbnet *dev = netdev_priv(netdev); 561 562 ee->magic = LAN95XX_EEPROM_MAGIC; 563 564 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); 565} 566 567static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, 568 struct ethtool_eeprom *ee, u8 *data) 569{ 570 struct usbnet *dev = netdev_priv(netdev); 571 572 if (ee->magic != LAN95XX_EEPROM_MAGIC) { 573 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", 574 ee->magic); 575 return -EINVAL; 576 } 577 578 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); 579} 580 581static const struct ethtool_ops smsc95xx_ethtool_ops = { 582 .get_link = usbnet_get_link, 583 .nway_reset = usbnet_nway_reset, 584 .get_drvinfo = usbnet_get_drvinfo, 585 .get_msglevel = usbnet_get_msglevel, 586 .set_msglevel = usbnet_set_msglevel, 587 .get_settings = usbnet_get_settings, 588 .set_settings = usbnet_set_settings, 589 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, 590 .get_eeprom = smsc95xx_ethtool_get_eeprom, 591 .set_eeprom = smsc95xx_ethtool_set_eeprom, 592}; 593 594static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 595{ 596 struct usbnet *dev = netdev_priv(netdev); 597 598 if (!netif_running(netdev)) 599 return -EINVAL; 600 601 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 602} 603 604static void smsc95xx_init_mac_address(struct usbnet *dev) 605{ 606 /* try reading mac address from EEPROM */ 607 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 608 dev->net->dev_addr) == 0) { 609 if (is_valid_ether_addr(dev->net->dev_addr)) { 610 /* eeprom values are valid so use them */ 611 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); 612 return; 613 } 614 } 615 616 /* no eeprom, or eeprom values are invalid. generate random MAC */ 617 random_ether_addr(dev->net->dev_addr); 618 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr\n"); 619} 620 621static int smsc95xx_set_mac_address(struct usbnet *dev) 622{ 623 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 624 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 625 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 626 int ret; 627 628 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); 629 if (ret < 0) { 630 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret); 631 return ret; 632 } 633 634 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi); 635 if (ret < 0) { 636 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret); 637 return ret; 638 } 639 640 return 0; 641} 642 643/* starts the TX path */ 644static void smsc95xx_start_tx_path(struct usbnet *dev) 645{ 646 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 647 unsigned long flags; 648 u32 reg_val; 649 650 /* Enable Tx at MAC */ 651 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 652 pdata->mac_cr |= MAC_CR_TXEN_; 653 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 654 655 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 656 657 /* Enable Tx at SCSRs */ 658 reg_val = TX_CFG_ON_; 659 smsc95xx_write_reg(dev, TX_CFG, reg_val); 660} 661 662/* Starts the Receive path */ 663static void smsc95xx_start_rx_path(struct usbnet *dev) 664{ 665 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 666 unsigned long flags; 667 668 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 669 pdata->mac_cr |= MAC_CR_RXEN_; 670 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 671 672 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 673} 674 675static int smsc95xx_phy_initialize(struct usbnet *dev) 676{ 677 int bmcr, timeout = 0; 678 679 /* Initialize MII structure */ 680 dev->mii.dev = dev->net; 681 dev->mii.mdio_read = smsc95xx_mdio_read; 682 dev->mii.mdio_write = smsc95xx_mdio_write; 683 dev->mii.phy_id_mask = 0x1f; 684 dev->mii.reg_num_mask = 0x1f; 685 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; 686 687 /* reset phy and wait for reset to complete */ 688 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 689 690 do { 691 msleep(10); 692 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 693 timeout++; 694 } while ((bmcr & BMCR_RESET) && (timeout < 100)); 695 696 if (timeout >= 100) { 697 netdev_warn(dev->net, "timeout on PHY Reset"); 698 return -EIO; 699 } 700 701 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 702 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 703 ADVERTISE_PAUSE_ASYM); 704 705 /* read to clear */ 706 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 707 708 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 709 PHY_INT_MASK_DEFAULT_); 710 mii_nway_restart(&dev->mii); 711 712 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); 713 return 0; 714} 715 716static int smsc95xx_reset(struct usbnet *dev) 717{ 718 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 719 u32 read_buf, write_buf, burst_cap; 720 int ret = 0, timeout; 721 722 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); 723 724 write_buf = HW_CFG_LRST_; 725 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf); 726 if (ret < 0) { 727 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n", 728 ret); 729 return ret; 730 } 731 732 timeout = 0; 733 do { 734 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 735 if (ret < 0) { 736 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 737 return ret; 738 } 739 msleep(10); 740 timeout++; 741 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 742 743 if (timeout >= 100) { 744 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); 745 return ret; 746 } 747 748 write_buf = PM_CTL_PHY_RST_; 749 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf); 750 if (ret < 0) { 751 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret); 752 return ret; 753 } 754 755 timeout = 0; 756 do { 757 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 758 if (ret < 0) { 759 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret); 760 return ret; 761 } 762 msleep(10); 763 timeout++; 764 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 765 766 if (timeout >= 100) { 767 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); 768 return ret; 769 } 770 771 ret = smsc95xx_set_mac_address(dev); 772 if (ret < 0) 773 return ret; 774 775 netif_dbg(dev, ifup, dev->net, 776 "MAC Address: %pM\n", dev->net->dev_addr); 777 778 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 779 if (ret < 0) { 780 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 781 return ret; 782 } 783 784 netif_dbg(dev, ifup, dev->net, 785 "Read Value from HW_CFG : 0x%08x\n", read_buf); 786 787 read_buf |= HW_CFG_BIR_; 788 789 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 790 if (ret < 0) { 791 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n", 792 ret); 793 return ret; 794 } 795 796 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 797 if (ret < 0) { 798 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 799 return ret; 800 } 801 netif_dbg(dev, ifup, dev->net, 802 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", 803 read_buf); 804 805 if (!turbo_mode) { 806 burst_cap = 0; 807 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 808 } else if (dev->udev->speed == USB_SPEED_HIGH) { 809 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 810 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 811 } else { 812 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 813 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 814 } 815 816 netif_dbg(dev, ifup, dev->net, 817 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size); 818 819 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); 820 if (ret < 0) { 821 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); 822 return ret; 823 } 824 825 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); 826 if (ret < 0) { 827 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); 828 return ret; 829 } 830 netif_dbg(dev, ifup, dev->net, 831 "Read Value from BURST_CAP after writing: 0x%08x\n", 832 read_buf); 833 834 read_buf = DEFAULT_BULK_IN_DELAY; 835 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf); 836 if (ret < 0) { 837 netdev_warn(dev->net, "ret = %d\n", ret); 838 return ret; 839 } 840 841 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); 842 if (ret < 0) { 843 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); 844 return ret; 845 } 846 netif_dbg(dev, ifup, dev->net, 847 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", 848 read_buf); 849 850 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 851 if (ret < 0) { 852 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 853 return ret; 854 } 855 netif_dbg(dev, ifup, dev->net, 856 "Read Value from HW_CFG: 0x%08x\n", read_buf); 857 858 if (turbo_mode) 859 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); 860 861 read_buf &= ~HW_CFG_RXDOFF_; 862 863 /* set Rx data offset=2, Make IP header aligns on word boundary. */ 864 read_buf |= NET_IP_ALIGN << 9; 865 866 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 867 if (ret < 0) { 868 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n", 869 ret); 870 return ret; 871 } 872 873 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 874 if (ret < 0) { 875 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 876 return ret; 877 } 878 netif_dbg(dev, ifup, dev->net, 879 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); 880 881 write_buf = 0xFFFFFFFF; 882 ret = smsc95xx_write_reg(dev, INT_STS, write_buf); 883 if (ret < 0) { 884 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n", 885 ret); 886 return ret; 887 } 888 889 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); 890 if (ret < 0) { 891 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); 892 return ret; 893 } 894 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); 895 896 /* Configure GPIO pins as LED outputs */ 897 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | 898 LED_GPIO_CFG_FDX_LED; 899 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); 900 if (ret < 0) { 901 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n", 902 ret); 903 return ret; 904 } 905 906 /* Init Tx */ 907 write_buf = 0; 908 ret = smsc95xx_write_reg(dev, FLOW, write_buf); 909 if (ret < 0) { 910 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); 911 return ret; 912 } 913 914 read_buf = AFC_CFG_DEFAULT; 915 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf); 916 if (ret < 0) { 917 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret); 918 return ret; 919 } 920 921 /* Don't need mac_cr_lock during initialisation */ 922 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); 923 if (ret < 0) { 924 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); 925 return ret; 926 } 927 928 /* Init Rx */ 929 /* Set Vlan */ 930 write_buf = (u32)ETH_P_8021Q; 931 ret = smsc95xx_write_reg(dev, VLAN1, write_buf); 932 if (ret < 0) { 933 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret); 934 return ret; 935 } 936 937 /* Enable or disable checksum offload engines */ 938 smsc95xx_set_features(dev->net, dev->net->features); 939 940 smsc95xx_set_multicast(dev->net); 941 942 if (smsc95xx_phy_initialize(dev) < 0) 943 return -EIO; 944 945 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); 946 if (ret < 0) { 947 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); 948 return ret; 949 } 950 951 /* enable PHY interrupts */ 952 read_buf |= INT_EP_CTL_PHY_INT_; 953 954 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); 955 if (ret < 0) { 956 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); 957 return ret; 958 } 959 960 smsc95xx_start_tx_path(dev); 961 smsc95xx_start_rx_path(dev); 962 963 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); 964 return 0; 965} 966 967static const struct net_device_ops smsc95xx_netdev_ops = { 968 .ndo_open = usbnet_open, 969 .ndo_stop = usbnet_stop, 970 .ndo_start_xmit = usbnet_start_xmit, 971 .ndo_tx_timeout = usbnet_tx_timeout, 972 .ndo_change_mtu = usbnet_change_mtu, 973 .ndo_set_mac_address = eth_mac_addr, 974 .ndo_validate_addr = eth_validate_addr, 975 .ndo_do_ioctl = smsc95xx_ioctl, 976 .ndo_set_rx_mode = smsc95xx_set_multicast, 977 .ndo_set_features = smsc95xx_set_features, 978}; 979 980static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) 981{ 982 struct smsc95xx_priv *pdata = NULL; 983 int ret; 984 985 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 986 987 ret = usbnet_get_endpoints(dev, intf); 988 if (ret < 0) { 989 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); 990 return ret; 991 } 992 993 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), 994 GFP_KERNEL); 995 996 pdata = (struct smsc95xx_priv *)(dev->data[0]); 997 if (!pdata) { 998 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n"); 999 return -ENOMEM; 1000 } 1001 1002 spin_lock_init(&pdata->mac_cr_lock); 1003 1004 if (DEFAULT_TX_CSUM_ENABLE) 1005 dev->net->features |= NETIF_F_HW_CSUM; 1006 if (DEFAULT_RX_CSUM_ENABLE) 1007 dev->net->features |= NETIF_F_RXCSUM; 1008 1009 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 1010 1011 smsc95xx_init_mac_address(dev); 1012 1013 /* Init all registers */ 1014 ret = smsc95xx_reset(dev); 1015 1016 dev->net->netdev_ops = &smsc95xx_netdev_ops; 1017 dev->net->ethtool_ops = &smsc95xx_ethtool_ops; 1018 dev->net->flags |= IFF_MULTICAST; 1019 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; 1020 return 0; 1021} 1022 1023static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1024{ 1025 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1026 if (pdata) { 1027 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); 1028 kfree(pdata); 1029 pdata = NULL; 1030 dev->data[0] = 0; 1031 } 1032} 1033 1034static void smsc95xx_rx_csum_offload(struct sk_buff *skb) 1035{ 1036 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); 1037 skb->ip_summed = CHECKSUM_COMPLETE; 1038 skb_trim(skb, skb->len - 2); 1039} 1040 1041static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1042{ 1043 while (skb->len > 0) { 1044 u32 header, align_count; 1045 struct sk_buff *ax_skb; 1046 unsigned char *packet; 1047 u16 size; 1048 1049 memcpy(&header, skb->data, sizeof(header)); 1050 le32_to_cpus(&header); 1051 skb_pull(skb, 4 + NET_IP_ALIGN); 1052 packet = skb->data; 1053 1054 /* get the packet length */ 1055 size = (u16)((header & RX_STS_FL_) >> 16); 1056 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1057 1058 if (unlikely(header & RX_STS_ES_)) { 1059 netif_dbg(dev, rx_err, dev->net, 1060 "Error header=0x%08x\n", header); 1061 dev->net->stats.rx_errors++; 1062 dev->net->stats.rx_dropped++; 1063 1064 if (header & RX_STS_CRC_) { 1065 dev->net->stats.rx_crc_errors++; 1066 } else { 1067 if (header & (RX_STS_TL_ | RX_STS_RF_)) 1068 dev->net->stats.rx_frame_errors++; 1069 1070 if ((header & RX_STS_LE_) && 1071 (!(header & RX_STS_FT_))) 1072 dev->net->stats.rx_length_errors++; 1073 } 1074 } else { 1075 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1076 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1077 netif_dbg(dev, rx_err, dev->net, 1078 "size err header=0x%08x\n", header); 1079 return 0; 1080 } 1081 1082 /* last frame in this batch */ 1083 if (skb->len == size) { 1084 if (dev->net->features & NETIF_F_RXCSUM) 1085 smsc95xx_rx_csum_offload(skb); 1086 skb_trim(skb, skb->len - 4); /* remove fcs */ 1087 skb->truesize = size + sizeof(struct sk_buff); 1088 1089 return 1; 1090 } 1091 1092 ax_skb = skb_clone(skb, GFP_ATOMIC); 1093 if (unlikely(!ax_skb)) { 1094 netdev_warn(dev->net, "Error allocating skb\n"); 1095 return 0; 1096 } 1097 1098 ax_skb->len = size; 1099 ax_skb->data = packet; 1100 skb_set_tail_pointer(ax_skb, size); 1101 1102 if (dev->net->features & NETIF_F_RXCSUM) 1103 smsc95xx_rx_csum_offload(ax_skb); 1104 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1105 ax_skb->truesize = size + sizeof(struct sk_buff); 1106 1107 usbnet_skb_return(dev, ax_skb); 1108 } 1109 1110 skb_pull(skb, size); 1111 1112 /* padding bytes before the next frame starts */ 1113 if (skb->len) 1114 skb_pull(skb, align_count); 1115 } 1116 1117 if (unlikely(skb->len < 0)) { 1118 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); 1119 return 0; 1120 } 1121 1122 return 1; 1123} 1124 1125static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) 1126{ 1127 u16 low_16 = (u16)skb_checksum_start_offset(skb); 1128 u16 high_16 = low_16 + skb->csum_offset; 1129 return (high_16 << 16) | low_16; 1130} 1131 1132static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, 1133 struct sk_buff *skb, gfp_t flags) 1134{ 1135 bool csum = skb->ip_summed == CHECKSUM_PARTIAL; 1136 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; 1137 u32 tx_cmd_a, tx_cmd_b; 1138 1139 /* We do not advertise SG, so skbs should be already linearized */ 1140 BUG_ON(skb_shinfo(skb)->nr_frags); 1141 1142 if (skb_headroom(skb) < overhead) { 1143 struct sk_buff *skb2 = skb_copy_expand(skb, 1144 overhead, 0, flags); 1145 dev_kfree_skb_any(skb); 1146 skb = skb2; 1147 if (!skb) 1148 return NULL; 1149 } 1150 1151 if (csum) { 1152 if (skb->len <= 45) { 1153 /* workaround - hardware tx checksum does not work 1154 * properly with extremely small packets */ 1155 long csstart = skb_checksum_start_offset(skb); 1156 __wsum calc = csum_partial(skb->data + csstart, 1157 skb->len - csstart, 0); 1158 *((__sum16 *)(skb->data + csstart 1159 + skb->csum_offset)) = csum_fold(calc); 1160 1161 csum = false; 1162 } else { 1163 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); 1164 skb_push(skb, 4); 1165 memcpy(skb->data, &csum_preamble, 4); 1166 } 1167 } 1168 1169 skb_push(skb, 4); 1170 tx_cmd_b = (u32)(skb->len - 4); 1171 if (csum) 1172 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; 1173 cpu_to_le32s(&tx_cmd_b); 1174 memcpy(skb->data, &tx_cmd_b, 4); 1175 1176 skb_push(skb, 4); 1177 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | 1178 TX_CMD_A_LAST_SEG_; 1179 cpu_to_le32s(&tx_cmd_a); 1180 memcpy(skb->data, &tx_cmd_a, 4); 1181 1182 return skb; 1183} 1184 1185static const struct driver_info smsc95xx_info = { 1186 .description = "smsc95xx USB 2.0 Ethernet", 1187 .bind = smsc95xx_bind, 1188 .unbind = smsc95xx_unbind, 1189 .link_reset = smsc95xx_link_reset, 1190 .reset = smsc95xx_reset, 1191 .rx_fixup = smsc95xx_rx_fixup, 1192 .tx_fixup = smsc95xx_tx_fixup, 1193 .status = smsc95xx_status, 1194 .flags = FLAG_ETHER | FLAG_SEND_ZLP, 1195}; 1196 1197static const struct usb_device_id products[] = { 1198 { 1199 /* SMSC9500 USB Ethernet Device */ 1200 USB_DEVICE(0x0424, 0x9500), 1201 .driver_info = (unsigned long) &smsc95xx_info, 1202 }, 1203 { 1204 /* SMSC9505 USB Ethernet Device */ 1205 USB_DEVICE(0x0424, 0x9505), 1206 .driver_info = (unsigned long) &smsc95xx_info, 1207 }, 1208 { 1209 /* SMSC9500A USB Ethernet Device */ 1210 USB_DEVICE(0x0424, 0x9E00), 1211 .driver_info = (unsigned long) &smsc95xx_info, 1212 }, 1213 { 1214 /* SMSC9505A USB Ethernet Device */ 1215 USB_DEVICE(0x0424, 0x9E01), 1216 .driver_info = (unsigned long) &smsc95xx_info, 1217 }, 1218 { 1219 /* SMSC9512/9514 USB Hub & Ethernet Device */ 1220 USB_DEVICE(0x0424, 0xec00), 1221 .driver_info = (unsigned long) &smsc95xx_info, 1222 }, 1223 { 1224 /* SMSC9500 USB Ethernet Device (SAL10) */ 1225 USB_DEVICE(0x0424, 0x9900), 1226 .driver_info = (unsigned long) &smsc95xx_info, 1227 }, 1228 { 1229 /* SMSC9505 USB Ethernet Device (SAL10) */ 1230 USB_DEVICE(0x0424, 0x9901), 1231 .driver_info = (unsigned long) &smsc95xx_info, 1232 }, 1233 { 1234 /* SMSC9500A USB Ethernet Device (SAL10) */ 1235 USB_DEVICE(0x0424, 0x9902), 1236 .driver_info = (unsigned long) &smsc95xx_info, 1237 }, 1238 { 1239 /* SMSC9505A USB Ethernet Device (SAL10) */ 1240 USB_DEVICE(0x0424, 0x9903), 1241 .driver_info = (unsigned long) &smsc95xx_info, 1242 }, 1243 { 1244 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ 1245 USB_DEVICE(0x0424, 0x9904), 1246 .driver_info = (unsigned long) &smsc95xx_info, 1247 }, 1248 { 1249 /* SMSC9500A USB Ethernet Device (HAL) */ 1250 USB_DEVICE(0x0424, 0x9905), 1251 .driver_info = (unsigned long) &smsc95xx_info, 1252 }, 1253 { 1254 /* SMSC9505A USB Ethernet Device (HAL) */ 1255 USB_DEVICE(0x0424, 0x9906), 1256 .driver_info = (unsigned long) &smsc95xx_info, 1257 }, 1258 { 1259 /* SMSC9500 USB Ethernet Device (Alternate ID) */ 1260 USB_DEVICE(0x0424, 0x9907), 1261 .driver_info = (unsigned long) &smsc95xx_info, 1262 }, 1263 { 1264 /* SMSC9500A USB Ethernet Device (Alternate ID) */ 1265 USB_DEVICE(0x0424, 0x9908), 1266 .driver_info = (unsigned long) &smsc95xx_info, 1267 }, 1268 { 1269 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ 1270 USB_DEVICE(0x0424, 0x9909), 1271 .driver_info = (unsigned long) &smsc95xx_info, 1272 }, 1273 { 1274 /* SMSC LAN9530 USB Ethernet Device */ 1275 USB_DEVICE(0x0424, 0x9530), 1276 .driver_info = (unsigned long) &smsc95xx_info, 1277 }, 1278 { 1279 /* SMSC LAN9730 USB Ethernet Device */ 1280 USB_DEVICE(0x0424, 0x9730), 1281 .driver_info = (unsigned long) &smsc95xx_info, 1282 }, 1283 { 1284 /* SMSC LAN89530 USB Ethernet Device */ 1285 USB_DEVICE(0x0424, 0x9E08), 1286 .driver_info = (unsigned long) &smsc95xx_info, 1287 }, 1288 { }, /* END */ 1289}; 1290MODULE_DEVICE_TABLE(usb, products); 1291 1292static struct usb_driver smsc95xx_driver = { 1293 .name = "smsc95xx", 1294 .id_table = products, 1295 .probe = usbnet_probe, 1296 .suspend = usbnet_suspend, 1297 .resume = usbnet_resume, 1298 .disconnect = usbnet_disconnect, 1299}; 1300 1301static int __init smsc95xx_init(void) 1302{ 1303 return usb_register(&smsc95xx_driver); 1304} 1305module_init(smsc95xx_init); 1306 1307static void __exit smsc95xx_exit(void) 1308{ 1309 usb_deregister(&smsc95xx_driver); 1310} 1311module_exit(smsc95xx_exit); 1312 1313MODULE_AUTHOR("Nancy Lin"); 1314MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>"); 1315MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); 1316MODULE_LICENSE("GPL"); 1317