vmxnet3_drv.c revision 115924b6bdc7cc6bf7da5b933b09281e1f4e17a9
1/* 2 * Linux driver for VMware's vmxnet3 ethernet NIC. 3 * 4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License as published by the 8 * Free Software Foundation; version 2 of the License and no later version. 9 * 10 * This program is distributed in the hope that it will be useful, but 11 * WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13 * NON INFRINGEMENT. See the GNU General Public License for more 14 * details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * The full GNU General Public License is included in this distribution in 21 * the file called "COPYING". 22 * 23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com> 24 * 25 */ 26 27#include "vmxnet3_int.h" 28 29char vmxnet3_driver_name[] = "vmxnet3"; 30#define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver" 31 32/* 33 * PCI Device ID Table 34 * Last entry must be all 0s 35 */ 36static const struct pci_device_id vmxnet3_pciid_table[] = { 37 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)}, 38 {0} 39}; 40 41MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table); 42 43static atomic_t devices_found; 44 45 46/* 47 * Enable/Disable the given intr 48 */ 49static void 50vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 51{ 52 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0); 53} 54 55 56static void 57vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx) 58{ 59 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1); 60} 61 62 63/* 64 * Enable/Disable all intrs used by the device 65 */ 66static void 67vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter) 68{ 69 int i; 70 71 for (i = 0; i < adapter->intr.num_intrs; i++) 72 vmxnet3_enable_intr(adapter, i); 73} 74 75 76static void 77vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter) 78{ 79 int i; 80 81 for (i = 0; i < adapter->intr.num_intrs; i++) 82 vmxnet3_disable_intr(adapter, i); 83} 84 85 86static void 87vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events) 88{ 89 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events); 90} 91 92 93static bool 94vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 95{ 96 return netif_queue_stopped(adapter->netdev); 97} 98 99 100static void 101vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 102{ 103 tq->stopped = false; 104 netif_start_queue(adapter->netdev); 105} 106 107 108static void 109vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 110{ 111 tq->stopped = false; 112 netif_wake_queue(adapter->netdev); 113} 114 115 116static void 117vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter) 118{ 119 tq->stopped = true; 120 tq->num_stop++; 121 netif_stop_queue(adapter->netdev); 122} 123 124 125/* 126 * Check the link state. This may start or stop the tx queue. 127 */ 128static void 129vmxnet3_check_link(struct vmxnet3_adapter *adapter) 130{ 131 u32 ret; 132 133 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 134 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 135 adapter->link_speed = ret >> 16; 136 if (ret & 1) { /* Link is up. */ 137 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 138 adapter->netdev->name, adapter->link_speed); 139 if (!netif_carrier_ok(adapter->netdev)) 140 netif_carrier_on(adapter->netdev); 141 142 vmxnet3_tq_start(&adapter->tx_queue, adapter); 143 } else { 144 printk(KERN_INFO "%s: NIC Link is Down\n", 145 adapter->netdev->name); 146 if (netif_carrier_ok(adapter->netdev)) 147 netif_carrier_off(adapter->netdev); 148 149 vmxnet3_tq_stop(&adapter->tx_queue, adapter); 150 } 151} 152 153static void 154vmxnet3_process_events(struct vmxnet3_adapter *adapter) 155{ 156 u32 events = le32_to_cpu(adapter->shared->ecr); 157 if (!events) 158 return; 159 160 vmxnet3_ack_events(adapter, events); 161 162 /* Check if link state has changed */ 163 if (events & VMXNET3_ECR_LINK) 164 vmxnet3_check_link(adapter); 165 166 /* Check if there is an error on xmit/recv queues */ 167 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 168 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 169 VMXNET3_CMD_GET_QUEUE_STATUS); 170 171 if (adapter->tqd_start->status.stopped) { 172 printk(KERN_ERR "%s: tq error 0x%x\n", 173 adapter->netdev->name, 174 le32_to_cpu(adapter->tqd_start->status.error)); 175 } 176 if (adapter->rqd_start->status.stopped) { 177 printk(KERN_ERR "%s: rq error 0x%x\n", 178 adapter->netdev->name, 179 adapter->rqd_start->status.error); 180 } 181 182 schedule_work(&adapter->work); 183 } 184} 185 186#ifdef __BIG_ENDIAN_BITFIELD 187/* 188 * The device expects the bitfields in shared structures to be written in 189 * little endian. When CPU is big endian, the following routines are used to 190 * correctly read and write into ABI. 191 * The general technique used here is : double word bitfields are defined in 192 * opposite order for big endian architecture. Then before reading them in 193 * driver the complete double word is translated using le32_to_cpu. Similarly 194 * After the driver writes into bitfields, cpu_to_le32 is used to translate the 195 * double words into required format. 196 * In order to avoid touching bits in shared structure more than once, temporary 197 * descriptors are used. These are passed as srcDesc to following functions. 198 */ 199static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc, 200 struct Vmxnet3_RxDesc *dstDesc) 201{ 202 u32 *src = (u32 *)srcDesc + 2; 203 u32 *dst = (u32 *)dstDesc + 2; 204 dstDesc->addr = le64_to_cpu(srcDesc->addr); 205 *dst = le32_to_cpu(*src); 206 dstDesc->ext1 = le32_to_cpu(srcDesc->ext1); 207} 208 209static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc, 210 struct Vmxnet3_TxDesc *dstDesc) 211{ 212 int i; 213 u32 *src = (u32 *)(srcDesc + 1); 214 u32 *dst = (u32 *)(dstDesc + 1); 215 216 /* Working backwards so that the gen bit is set at the end. */ 217 for (i = 2; i > 0; i--) { 218 src--; 219 dst--; 220 *dst = cpu_to_le32(*src); 221 } 222} 223 224 225static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc, 226 struct Vmxnet3_RxCompDesc *dstDesc) 227{ 228 int i = 0; 229 u32 *src = (u32 *)srcDesc; 230 u32 *dst = (u32 *)dstDesc; 231 for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) { 232 *dst = le32_to_cpu(*src); 233 src++; 234 dst++; 235 } 236} 237 238 239/* Used to read bitfield values from double words. */ 240static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size) 241{ 242 u32 temp = le32_to_cpu(*bitfield); 243 u32 mask = ((1 << size) - 1) << pos; 244 temp &= mask; 245 temp >>= pos; 246 return temp; 247} 248 249 250 251#endif /* __BIG_ENDIAN_BITFIELD */ 252 253#ifdef __BIG_ENDIAN_BITFIELD 254 255# define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \ 256 txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \ 257 VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE) 258# define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \ 259 txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \ 260 VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE) 261# define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \ 262 VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \ 263 VMXNET3_TCD_GEN_SIZE) 264# define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \ 265 VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE) 266# define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \ 267 (dstrcd) = (tmp); \ 268 vmxnet3_RxCompToCPU((rcd), (tmp)); \ 269 } while (0) 270# define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \ 271 (dstrxd) = (tmp); \ 272 vmxnet3_RxDescToCPU((rxd), (tmp)); \ 273 } while (0) 274 275#else 276 277# define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen) 278# define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop) 279# define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen) 280# define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx) 281# define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd) 282# define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd) 283 284#endif /* __BIG_ENDIAN_BITFIELD */ 285 286 287static void 288vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi, 289 struct pci_dev *pdev) 290{ 291 if (tbi->map_type == VMXNET3_MAP_SINGLE) 292 pci_unmap_single(pdev, tbi->dma_addr, tbi->len, 293 PCI_DMA_TODEVICE); 294 else if (tbi->map_type == VMXNET3_MAP_PAGE) 295 pci_unmap_page(pdev, tbi->dma_addr, tbi->len, 296 PCI_DMA_TODEVICE); 297 else 298 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE); 299 300 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */ 301} 302 303 304static int 305vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq, 306 struct pci_dev *pdev, struct vmxnet3_adapter *adapter) 307{ 308 struct sk_buff *skb; 309 int entries = 0; 310 311 /* no out of order completion */ 312 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp); 313 BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1); 314 315 skb = tq->buf_info[eop_idx].skb; 316 BUG_ON(skb == NULL); 317 tq->buf_info[eop_idx].skb = NULL; 318 319 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size); 320 321 while (tq->tx_ring.next2comp != eop_idx) { 322 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp, 323 pdev); 324 325 /* update next2comp w/o tx_lock. Since we are marking more, 326 * instead of less, tx ring entries avail, the worst case is 327 * that the tx routine incorrectly re-queues a pkt due to 328 * insufficient tx ring entries. 329 */ 330 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 331 entries++; 332 } 333 334 dev_kfree_skb_any(skb); 335 return entries; 336} 337 338 339static int 340vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq, 341 struct vmxnet3_adapter *adapter) 342{ 343 int completed = 0; 344 union Vmxnet3_GenericDesc *gdesc; 345 346 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 347 while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) { 348 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX( 349 &gdesc->tcd), tq, adapter->pdev, 350 adapter); 351 352 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring); 353 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc; 354 } 355 356 if (completed) { 357 spin_lock(&tq->tx_lock); 358 if (unlikely(vmxnet3_tq_stopped(tq, adapter) && 359 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) > 360 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) && 361 netif_carrier_ok(adapter->netdev))) { 362 vmxnet3_tq_wake(tq, adapter); 363 } 364 spin_unlock(&tq->tx_lock); 365 } 366 return completed; 367} 368 369 370static void 371vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq, 372 struct vmxnet3_adapter *adapter) 373{ 374 int i; 375 376 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) { 377 struct vmxnet3_tx_buf_info *tbi; 378 union Vmxnet3_GenericDesc *gdesc; 379 380 tbi = tq->buf_info + tq->tx_ring.next2comp; 381 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp; 382 383 vmxnet3_unmap_tx_buf(tbi, adapter->pdev); 384 if (tbi->skb) { 385 dev_kfree_skb_any(tbi->skb); 386 tbi->skb = NULL; 387 } 388 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring); 389 } 390 391 /* sanity check, verify all buffers are indeed unmapped and freed */ 392 for (i = 0; i < tq->tx_ring.size; i++) { 393 BUG_ON(tq->buf_info[i].skb != NULL || 394 tq->buf_info[i].map_type != VMXNET3_MAP_NONE); 395 } 396 397 tq->tx_ring.gen = VMXNET3_INIT_GEN; 398 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 399 400 tq->comp_ring.gen = VMXNET3_INIT_GEN; 401 tq->comp_ring.next2proc = 0; 402} 403 404 405void 406vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq, 407 struct vmxnet3_adapter *adapter) 408{ 409 if (tq->tx_ring.base) { 410 pci_free_consistent(adapter->pdev, tq->tx_ring.size * 411 sizeof(struct Vmxnet3_TxDesc), 412 tq->tx_ring.base, tq->tx_ring.basePA); 413 tq->tx_ring.base = NULL; 414 } 415 if (tq->data_ring.base) { 416 pci_free_consistent(adapter->pdev, tq->data_ring.size * 417 sizeof(struct Vmxnet3_TxDataDesc), 418 tq->data_ring.base, tq->data_ring.basePA); 419 tq->data_ring.base = NULL; 420 } 421 if (tq->comp_ring.base) { 422 pci_free_consistent(adapter->pdev, tq->comp_ring.size * 423 sizeof(struct Vmxnet3_TxCompDesc), 424 tq->comp_ring.base, tq->comp_ring.basePA); 425 tq->comp_ring.base = NULL; 426 } 427 kfree(tq->buf_info); 428 tq->buf_info = NULL; 429} 430 431 432static void 433vmxnet3_tq_init(struct vmxnet3_tx_queue *tq, 434 struct vmxnet3_adapter *adapter) 435{ 436 int i; 437 438 /* reset the tx ring contents to 0 and reset the tx ring states */ 439 memset(tq->tx_ring.base, 0, tq->tx_ring.size * 440 sizeof(struct Vmxnet3_TxDesc)); 441 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0; 442 tq->tx_ring.gen = VMXNET3_INIT_GEN; 443 444 memset(tq->data_ring.base, 0, tq->data_ring.size * 445 sizeof(struct Vmxnet3_TxDataDesc)); 446 447 /* reset the tx comp ring contents to 0 and reset comp ring states */ 448 memset(tq->comp_ring.base, 0, tq->comp_ring.size * 449 sizeof(struct Vmxnet3_TxCompDesc)); 450 tq->comp_ring.next2proc = 0; 451 tq->comp_ring.gen = VMXNET3_INIT_GEN; 452 453 /* reset the bookkeeping data */ 454 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size); 455 for (i = 0; i < tq->tx_ring.size; i++) 456 tq->buf_info[i].map_type = VMXNET3_MAP_NONE; 457 458 /* stats are not reset */ 459} 460 461 462static int 463vmxnet3_tq_create(struct vmxnet3_tx_queue *tq, 464 struct vmxnet3_adapter *adapter) 465{ 466 BUG_ON(tq->tx_ring.base || tq->data_ring.base || 467 tq->comp_ring.base || tq->buf_info); 468 469 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size 470 * sizeof(struct Vmxnet3_TxDesc), 471 &tq->tx_ring.basePA); 472 if (!tq->tx_ring.base) { 473 printk(KERN_ERR "%s: failed to allocate tx ring\n", 474 adapter->netdev->name); 475 goto err; 476 } 477 478 tq->data_ring.base = pci_alloc_consistent(adapter->pdev, 479 tq->data_ring.size * 480 sizeof(struct Vmxnet3_TxDataDesc), 481 &tq->data_ring.basePA); 482 if (!tq->data_ring.base) { 483 printk(KERN_ERR "%s: failed to allocate data ring\n", 484 adapter->netdev->name); 485 goto err; 486 } 487 488 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev, 489 tq->comp_ring.size * 490 sizeof(struct Vmxnet3_TxCompDesc), 491 &tq->comp_ring.basePA); 492 if (!tq->comp_ring.base) { 493 printk(KERN_ERR "%s: failed to allocate tx comp ring\n", 494 adapter->netdev->name); 495 goto err; 496 } 497 498 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]), 499 GFP_KERNEL); 500 if (!tq->buf_info) { 501 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n", 502 adapter->netdev->name); 503 goto err; 504 } 505 506 return 0; 507 508err: 509 vmxnet3_tq_destroy(tq, adapter); 510 return -ENOMEM; 511} 512 513 514/* 515 * starting from ring->next2fill, allocate rx buffers for the given ring 516 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers 517 * are allocated or allocation fails 518 */ 519 520static int 521vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx, 522 int num_to_alloc, struct vmxnet3_adapter *adapter) 523{ 524 int num_allocated = 0; 525 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx]; 526 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx]; 527 u32 val; 528 529 while (num_allocated < num_to_alloc) { 530 struct vmxnet3_rx_buf_info *rbi; 531 union Vmxnet3_GenericDesc *gd; 532 533 rbi = rbi_base + ring->next2fill; 534 gd = ring->base + ring->next2fill; 535 536 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) { 537 if (rbi->skb == NULL) { 538 rbi->skb = dev_alloc_skb(rbi->len + 539 NET_IP_ALIGN); 540 if (unlikely(rbi->skb == NULL)) { 541 rq->stats.rx_buf_alloc_failure++; 542 break; 543 } 544 rbi->skb->dev = adapter->netdev; 545 546 skb_reserve(rbi->skb, NET_IP_ALIGN); 547 rbi->dma_addr = pci_map_single(adapter->pdev, 548 rbi->skb->data, rbi->len, 549 PCI_DMA_FROMDEVICE); 550 } else { 551 /* rx buffer skipped by the device */ 552 } 553 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT; 554 } else { 555 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE || 556 rbi->len != PAGE_SIZE); 557 558 if (rbi->page == NULL) { 559 rbi->page = alloc_page(GFP_ATOMIC); 560 if (unlikely(rbi->page == NULL)) { 561 rq->stats.rx_buf_alloc_failure++; 562 break; 563 } 564 rbi->dma_addr = pci_map_page(adapter->pdev, 565 rbi->page, 0, PAGE_SIZE, 566 PCI_DMA_FROMDEVICE); 567 } else { 568 /* rx buffers skipped by the device */ 569 } 570 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT; 571 } 572 573 BUG_ON(rbi->dma_addr == 0); 574 gd->rxd.addr = cpu_to_le64(rbi->dma_addr); 575 gd->dword[2] = cpu_to_le32((ring->gen << VMXNET3_RXD_GEN_SHIFT) 576 | val | rbi->len); 577 578 num_allocated++; 579 vmxnet3_cmd_ring_adv_next2fill(ring); 580 } 581 rq->uncommitted[ring_idx] += num_allocated; 582 583 dev_dbg(&adapter->netdev->dev, 584 "alloc_rx_buf: %d allocated, next2fill %u, next2comp " 585 "%u, uncommited %u\n", num_allocated, ring->next2fill, 586 ring->next2comp, rq->uncommitted[ring_idx]); 587 588 /* so that the device can distinguish a full ring and an empty ring */ 589 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp); 590 591 return num_allocated; 592} 593 594 595static void 596vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd, 597 struct vmxnet3_rx_buf_info *rbi) 598{ 599 struct skb_frag_struct *frag = skb_shinfo(skb)->frags + 600 skb_shinfo(skb)->nr_frags; 601 602 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS); 603 604 frag->page = rbi->page; 605 frag->page_offset = 0; 606 frag->size = rcd->len; 607 skb->data_len += frag->size; 608 skb_shinfo(skb)->nr_frags++; 609} 610 611 612static void 613vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx, 614 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev, 615 struct vmxnet3_adapter *adapter) 616{ 617 u32 dw2, len; 618 unsigned long buf_offset; 619 int i; 620 union Vmxnet3_GenericDesc *gdesc; 621 struct vmxnet3_tx_buf_info *tbi = NULL; 622 623 BUG_ON(ctx->copy_size > skb_headlen(skb)); 624 625 /* use the previous gen bit for the SOP desc */ 626 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT; 627 628 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill; 629 gdesc = ctx->sop_txd; /* both loops below can be skipped */ 630 631 /* no need to map the buffer if headers are copied */ 632 if (ctx->copy_size) { 633 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA + 634 tq->tx_ring.next2fill * 635 sizeof(struct Vmxnet3_TxDataDesc)); 636 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size); 637 ctx->sop_txd->dword[3] = 0; 638 639 tbi = tq->buf_info + tq->tx_ring.next2fill; 640 tbi->map_type = VMXNET3_MAP_NONE; 641 642 dev_dbg(&adapter->netdev->dev, 643 "txd[%u]: 0x%Lx 0x%x 0x%x\n", 644 tq->tx_ring.next2fill, 645 le64_to_cpu(ctx->sop_txd->txd.addr), 646 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]); 647 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 648 649 /* use the right gen for non-SOP desc */ 650 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 651 } 652 653 /* linear part can use multiple tx desc if it's big */ 654 len = skb_headlen(skb) - ctx->copy_size; 655 buf_offset = ctx->copy_size; 656 while (len) { 657 u32 buf_size; 658 659 buf_size = len > VMXNET3_MAX_TX_BUF_SIZE ? 660 VMXNET3_MAX_TX_BUF_SIZE : len; 661 662 tbi = tq->buf_info + tq->tx_ring.next2fill; 663 tbi->map_type = VMXNET3_MAP_SINGLE; 664 tbi->dma_addr = pci_map_single(adapter->pdev, 665 skb->data + buf_offset, buf_size, 666 PCI_DMA_TODEVICE); 667 668 tbi->len = buf_size; /* this automatically convert 2^14 to 0 */ 669 670 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 671 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 672 673 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 674 gdesc->dword[2] = cpu_to_le32(dw2 | buf_size); 675 gdesc->dword[3] = 0; 676 677 dev_dbg(&adapter->netdev->dev, 678 "txd[%u]: 0x%Lx 0x%x 0x%x\n", 679 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 680 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 681 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 682 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 683 684 len -= buf_size; 685 buf_offset += buf_size; 686 } 687 688 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 689 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i]; 690 691 tbi = tq->buf_info + tq->tx_ring.next2fill; 692 tbi->map_type = VMXNET3_MAP_PAGE; 693 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page, 694 frag->page_offset, frag->size, 695 PCI_DMA_TODEVICE); 696 697 tbi->len = frag->size; 698 699 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill; 700 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen); 701 702 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr); 703 gdesc->dword[2] = cpu_to_le32(dw2 | frag->size); 704 gdesc->dword[3] = 0; 705 706 dev_dbg(&adapter->netdev->dev, 707 "txd[%u]: 0x%llu %u %u\n", 708 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr), 709 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]); 710 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring); 711 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT; 712 } 713 714 ctx->eop_txd = gdesc; 715 716 /* set the last buf_info for the pkt */ 717 tbi->skb = skb; 718 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base; 719} 720 721 722/* 723 * parse and copy relevant protocol headers: 724 * For a tso pkt, relevant headers are L2/3/4 including options 725 * For a pkt requesting csum offloading, they are L2/3 and may include L4 726 * if it's a TCP/UDP pkt 727 * 728 * Returns: 729 * -1: error happens during parsing 730 * 0: protocol headers parsed, but too big to be copied 731 * 1: protocol headers parsed and copied 732 * 733 * Other effects: 734 * 1. related *ctx fields are updated. 735 * 2. ctx->copy_size is # of bytes copied 736 * 3. the portion copied is guaranteed to be in the linear part 737 * 738 */ 739static int 740vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 741 struct vmxnet3_tx_ctx *ctx, 742 struct vmxnet3_adapter *adapter) 743{ 744 struct Vmxnet3_TxDataDesc *tdd; 745 746 if (ctx->mss) { 747 ctx->eth_ip_hdr_size = skb_transport_offset(skb); 748 ctx->l4_hdr_size = ((struct tcphdr *) 749 skb_transport_header(skb))->doff * 4; 750 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 751 } else { 752 unsigned int pull_size; 753 754 if (skb->ip_summed == CHECKSUM_PARTIAL) { 755 ctx->eth_ip_hdr_size = skb_transport_offset(skb); 756 757 if (ctx->ipv4) { 758 struct iphdr *iph = (struct iphdr *) 759 skb_network_header(skb); 760 if (iph->protocol == IPPROTO_TCP) { 761 pull_size = ctx->eth_ip_hdr_size + 762 sizeof(struct tcphdr); 763 764 if (unlikely(!pskb_may_pull(skb, 765 pull_size))) { 766 goto err; 767 } 768 ctx->l4_hdr_size = ((struct tcphdr *) 769 skb_transport_header(skb))->doff * 4; 770 } else if (iph->protocol == IPPROTO_UDP) { 771 ctx->l4_hdr_size = 772 sizeof(struct udphdr); 773 } else { 774 ctx->l4_hdr_size = 0; 775 } 776 } else { 777 /* for simplicity, don't copy L4 headers */ 778 ctx->l4_hdr_size = 0; 779 } 780 ctx->copy_size = ctx->eth_ip_hdr_size + 781 ctx->l4_hdr_size; 782 } else { 783 ctx->eth_ip_hdr_size = 0; 784 ctx->l4_hdr_size = 0; 785 /* copy as much as allowed */ 786 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE 787 , skb_headlen(skb)); 788 } 789 790 /* make sure headers are accessible directly */ 791 if (unlikely(!pskb_may_pull(skb, ctx->copy_size))) 792 goto err; 793 } 794 795 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) { 796 tq->stats.oversized_hdr++; 797 ctx->copy_size = 0; 798 return 0; 799 } 800 801 tdd = tq->data_ring.base + tq->tx_ring.next2fill; 802 803 memcpy(tdd->data, skb->data, ctx->copy_size); 804 dev_dbg(&adapter->netdev->dev, 805 "copy %u bytes to dataRing[%u]\n", 806 ctx->copy_size, tq->tx_ring.next2fill); 807 return 1; 808 809err: 810 return -1; 811} 812 813 814static void 815vmxnet3_prepare_tso(struct sk_buff *skb, 816 struct vmxnet3_tx_ctx *ctx) 817{ 818 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb); 819 if (ctx->ipv4) { 820 struct iphdr *iph = (struct iphdr *)skb_network_header(skb); 821 iph->check = 0; 822 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0, 823 IPPROTO_TCP, 0); 824 } else { 825 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb); 826 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0, 827 IPPROTO_TCP, 0); 828 } 829} 830 831 832/* 833 * Transmits a pkt thru a given tq 834 * Returns: 835 * NETDEV_TX_OK: descriptors are setup successfully 836 * NETDEV_TX_OK: error occured, the pkt is dropped 837 * NETDEV_TX_BUSY: tx ring is full, queue is stopped 838 * 839 * Side-effects: 840 * 1. tx ring may be changed 841 * 2. tq stats may be updated accordingly 842 * 3. shared->txNumDeferred may be updated 843 */ 844 845static int 846vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq, 847 struct vmxnet3_adapter *adapter, struct net_device *netdev) 848{ 849 int ret; 850 u32 count; 851 unsigned long flags; 852 struct vmxnet3_tx_ctx ctx; 853 union Vmxnet3_GenericDesc *gdesc; 854#ifdef __BIG_ENDIAN_BITFIELD 855 /* Use temporary descriptor to avoid touching bits multiple times */ 856 union Vmxnet3_GenericDesc tempTxDesc; 857#endif 858 859 /* conservatively estimate # of descriptors to use */ 860 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 861 skb_shinfo(skb)->nr_frags + 1; 862 863 ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP)); 864 865 ctx.mss = skb_shinfo(skb)->gso_size; 866 if (ctx.mss) { 867 if (skb_header_cloned(skb)) { 868 if (unlikely(pskb_expand_head(skb, 0, 0, 869 GFP_ATOMIC) != 0)) { 870 tq->stats.drop_tso++; 871 goto drop_pkt; 872 } 873 tq->stats.copy_skb_header++; 874 } 875 vmxnet3_prepare_tso(skb, &ctx); 876 } else { 877 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) { 878 879 /* non-tso pkts must not use more than 880 * VMXNET3_MAX_TXD_PER_PKT entries 881 */ 882 if (skb_linearize(skb) != 0) { 883 tq->stats.drop_too_many_frags++; 884 goto drop_pkt; 885 } 886 tq->stats.linearized++; 887 888 /* recalculate the # of descriptors to use */ 889 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1; 890 } 891 } 892 893 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter); 894 if (ret >= 0) { 895 BUG_ON(ret <= 0 && ctx.copy_size != 0); 896 /* hdrs parsed, check against other limits */ 897 if (ctx.mss) { 898 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size > 899 VMXNET3_MAX_TX_BUF_SIZE)) { 900 goto hdr_too_big; 901 } 902 } else { 903 if (skb->ip_summed == CHECKSUM_PARTIAL) { 904 if (unlikely(ctx.eth_ip_hdr_size + 905 skb->csum_offset > 906 VMXNET3_MAX_CSUM_OFFSET)) { 907 goto hdr_too_big; 908 } 909 } 910 } 911 } else { 912 tq->stats.drop_hdr_inspect_err++; 913 goto drop_pkt; 914 } 915 916 spin_lock_irqsave(&tq->tx_lock, flags); 917 918 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) { 919 tq->stats.tx_ring_full++; 920 dev_dbg(&adapter->netdev->dev, 921 "tx queue stopped on %s, next2comp %u" 922 " next2fill %u\n", adapter->netdev->name, 923 tq->tx_ring.next2comp, tq->tx_ring.next2fill); 924 925 vmxnet3_tq_stop(tq, adapter); 926 spin_unlock_irqrestore(&tq->tx_lock, flags); 927 return NETDEV_TX_BUSY; 928 } 929 930 /* fill tx descs related to addr & len */ 931 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter); 932 933 /* setup the EOP desc */ 934 ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP); 935 936 /* setup the SOP desc */ 937#ifdef __BIG_ENDIAN_BITFIELD 938 gdesc = &tempTxDesc; 939 gdesc->dword[2] = ctx.sop_txd->dword[2]; 940 gdesc->dword[3] = ctx.sop_txd->dword[3]; 941#else 942 gdesc = ctx.sop_txd; 943#endif 944 if (ctx.mss) { 945 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size; 946 gdesc->txd.om = VMXNET3_OM_TSO; 947 gdesc->txd.msscof = ctx.mss; 948 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len - 949 gdesc->txd.hlen + ctx.mss - 1) / ctx.mss); 950 } else { 951 if (skb->ip_summed == CHECKSUM_PARTIAL) { 952 gdesc->txd.hlen = ctx.eth_ip_hdr_size; 953 gdesc->txd.om = VMXNET3_OM_CSUM; 954 gdesc->txd.msscof = ctx.eth_ip_hdr_size + 955 skb->csum_offset; 956 } else { 957 gdesc->txd.om = 0; 958 gdesc->txd.msscof = 0; 959 } 960 le32_add_cpu(&tq->shared->txNumDeferred, 1); 961 } 962 963 if (vlan_tx_tag_present(skb)) { 964 gdesc->txd.ti = 1; 965 gdesc->txd.tci = vlan_tx_tag_get(skb); 966 } 967 968 /* finally flips the GEN bit of the SOP desc. */ 969 gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^ 970 VMXNET3_TXD_GEN); 971#ifdef __BIG_ENDIAN_BITFIELD 972 /* Finished updating in bitfields of Tx Desc, so write them in original 973 * place. 974 */ 975 vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc, 976 (struct Vmxnet3_TxDesc *)ctx.sop_txd); 977 gdesc = ctx.sop_txd; 978#endif 979 dev_dbg(&adapter->netdev->dev, 980 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n", 981 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd - 982 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr), 983 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3])); 984 985 spin_unlock_irqrestore(&tq->tx_lock, flags); 986 987 if (le32_to_cpu(tq->shared->txNumDeferred) >= 988 le32_to_cpu(tq->shared->txThreshold)) { 989 tq->shared->txNumDeferred = 0; 990 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD, 991 tq->tx_ring.next2fill); 992 } 993 netdev->trans_start = jiffies; 994 995 return NETDEV_TX_OK; 996 997hdr_too_big: 998 tq->stats.drop_oversized_hdr++; 999drop_pkt: 1000 tq->stats.drop_total++; 1001 dev_kfree_skb(skb); 1002 return NETDEV_TX_OK; 1003} 1004 1005 1006static netdev_tx_t 1007vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev) 1008{ 1009 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1010 1011 return vmxnet3_tq_xmit(skb, &adapter->tx_queue, adapter, netdev); 1012} 1013 1014 1015static void 1016vmxnet3_rx_csum(struct vmxnet3_adapter *adapter, 1017 struct sk_buff *skb, 1018 union Vmxnet3_GenericDesc *gdesc) 1019{ 1020 if (!gdesc->rcd.cnc && adapter->rxcsum) { 1021 /* typical case: TCP/UDP over IP and both csums are correct */ 1022 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) == 1023 VMXNET3_RCD_CSUM_OK) { 1024 skb->ip_summed = CHECKSUM_UNNECESSARY; 1025 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp)); 1026 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6)); 1027 BUG_ON(gdesc->rcd.frg); 1028 } else { 1029 if (gdesc->rcd.csum) { 1030 skb->csum = htons(gdesc->rcd.csum); 1031 skb->ip_summed = CHECKSUM_PARTIAL; 1032 } else { 1033 skb->ip_summed = CHECKSUM_NONE; 1034 } 1035 } 1036 } else { 1037 skb->ip_summed = CHECKSUM_NONE; 1038 } 1039} 1040 1041 1042static void 1043vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd, 1044 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter) 1045{ 1046 rq->stats.drop_err++; 1047 if (!rcd->fcs) 1048 rq->stats.drop_fcs++; 1049 1050 rq->stats.drop_total++; 1051 1052 /* 1053 * We do not unmap and chain the rx buffer to the skb. 1054 * We basically pretend this buffer is not used and will be recycled 1055 * by vmxnet3_rq_alloc_rx_buf() 1056 */ 1057 1058 /* 1059 * ctx->skb may be NULL if this is the first and the only one 1060 * desc for the pkt 1061 */ 1062 if (ctx->skb) 1063 dev_kfree_skb_irq(ctx->skb); 1064 1065 ctx->skb = NULL; 1066} 1067 1068 1069static int 1070vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq, 1071 struct vmxnet3_adapter *adapter, int quota) 1072{ 1073 static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2}; 1074 u32 num_rxd = 0; 1075 struct Vmxnet3_RxCompDesc *rcd; 1076 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx; 1077#ifdef __BIG_ENDIAN_BITFIELD 1078 struct Vmxnet3_RxDesc rxCmdDesc; 1079 struct Vmxnet3_RxCompDesc rxComp; 1080#endif 1081 vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, 1082 &rxComp); 1083 while (rcd->gen == rq->comp_ring.gen) { 1084 struct vmxnet3_rx_buf_info *rbi; 1085 struct sk_buff *skb; 1086 int num_to_alloc; 1087 struct Vmxnet3_RxDesc *rxd; 1088 u32 idx, ring_idx; 1089 1090 if (num_rxd >= quota) { 1091 /* we may stop even before we see the EOP desc of 1092 * the current pkt 1093 */ 1094 break; 1095 } 1096 num_rxd++; 1097 1098 idx = rcd->rxdIdx; 1099 ring_idx = rcd->rqID == rq->qid ? 0 : 1; 1100 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd, 1101 &rxCmdDesc); 1102 rbi = rq->buf_info[ring_idx] + idx; 1103 1104 BUG_ON(rxd->addr != rbi->dma_addr || 1105 rxd->len != rbi->len); 1106 1107 if (unlikely(rcd->eop && rcd->err)) { 1108 vmxnet3_rx_error(rq, rcd, ctx, adapter); 1109 goto rcd_done; 1110 } 1111 1112 if (rcd->sop) { /* first buf of the pkt */ 1113 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD || 1114 rcd->rqID != rq->qid); 1115 1116 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB); 1117 BUG_ON(ctx->skb != NULL || rbi->skb == NULL); 1118 1119 if (unlikely(rcd->len == 0)) { 1120 /* Pretend the rx buffer is skipped. */ 1121 BUG_ON(!(rcd->sop && rcd->eop)); 1122 dev_dbg(&adapter->netdev->dev, 1123 "rxRing[%u][%u] 0 length\n", 1124 ring_idx, idx); 1125 goto rcd_done; 1126 } 1127 1128 ctx->skb = rbi->skb; 1129 rbi->skb = NULL; 1130 1131 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len, 1132 PCI_DMA_FROMDEVICE); 1133 1134 skb_put(ctx->skb, rcd->len); 1135 } else { 1136 BUG_ON(ctx->skb == NULL); 1137 /* non SOP buffer must be type 1 in most cases */ 1138 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) { 1139 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY); 1140 1141 if (rcd->len) { 1142 pci_unmap_page(adapter->pdev, 1143 rbi->dma_addr, rbi->len, 1144 PCI_DMA_FROMDEVICE); 1145 1146 vmxnet3_append_frag(ctx->skb, rcd, rbi); 1147 rbi->page = NULL; 1148 } 1149 } else { 1150 /* 1151 * The only time a non-SOP buffer is type 0 is 1152 * when it's EOP and error flag is raised, which 1153 * has already been handled. 1154 */ 1155 BUG_ON(true); 1156 } 1157 } 1158 1159 skb = ctx->skb; 1160 if (rcd->eop) { 1161 skb->len += skb->data_len; 1162 skb->truesize += skb->data_len; 1163 1164 vmxnet3_rx_csum(adapter, skb, 1165 (union Vmxnet3_GenericDesc *)rcd); 1166 skb->protocol = eth_type_trans(skb, adapter->netdev); 1167 1168 if (unlikely(adapter->vlan_grp && rcd->ts)) { 1169 vlan_hwaccel_receive_skb(skb, 1170 adapter->vlan_grp, rcd->tci); 1171 } else { 1172 netif_receive_skb(skb); 1173 } 1174 1175 adapter->netdev->last_rx = jiffies; 1176 ctx->skb = NULL; 1177 } 1178 1179rcd_done: 1180 /* device may skip some rx descs */ 1181 rq->rx_ring[ring_idx].next2comp = idx; 1182 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp, 1183 rq->rx_ring[ring_idx].size); 1184 1185 /* refill rx buffers frequently to avoid starving the h/w */ 1186 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring + 1187 ring_idx); 1188 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq, 1189 ring_idx, adapter))) { 1190 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc, 1191 adapter); 1192 1193 /* if needed, update the register */ 1194 if (unlikely(rq->shared->updateRxProd)) { 1195 VMXNET3_WRITE_BAR0_REG(adapter, 1196 rxprod_reg[ring_idx] + rq->qid * 8, 1197 rq->rx_ring[ring_idx].next2fill); 1198 rq->uncommitted[ring_idx] = 0; 1199 } 1200 } 1201 1202 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring); 1203 vmxnet3_getRxComp(rcd, 1204 &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp); 1205 } 1206 1207 return num_rxd; 1208} 1209 1210 1211static void 1212vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq, 1213 struct vmxnet3_adapter *adapter) 1214{ 1215 u32 i, ring_idx; 1216 struct Vmxnet3_RxDesc *rxd; 1217 1218 for (ring_idx = 0; ring_idx < 2; ring_idx++) { 1219 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) { 1220#ifdef __BIG_ENDIAN_BITFIELD 1221 struct Vmxnet3_RxDesc rxDesc; 1222#endif 1223 vmxnet3_getRxDesc(rxd, 1224 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc); 1225 1226 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD && 1227 rq->buf_info[ring_idx][i].skb) { 1228 pci_unmap_single(adapter->pdev, rxd->addr, 1229 rxd->len, PCI_DMA_FROMDEVICE); 1230 dev_kfree_skb(rq->buf_info[ring_idx][i].skb); 1231 rq->buf_info[ring_idx][i].skb = NULL; 1232 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY && 1233 rq->buf_info[ring_idx][i].page) { 1234 pci_unmap_page(adapter->pdev, rxd->addr, 1235 rxd->len, PCI_DMA_FROMDEVICE); 1236 put_page(rq->buf_info[ring_idx][i].page); 1237 rq->buf_info[ring_idx][i].page = NULL; 1238 } 1239 } 1240 1241 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN; 1242 rq->rx_ring[ring_idx].next2fill = 1243 rq->rx_ring[ring_idx].next2comp = 0; 1244 rq->uncommitted[ring_idx] = 0; 1245 } 1246 1247 rq->comp_ring.gen = VMXNET3_INIT_GEN; 1248 rq->comp_ring.next2proc = 0; 1249} 1250 1251 1252void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq, 1253 struct vmxnet3_adapter *adapter) 1254{ 1255 int i; 1256 int j; 1257 1258 /* all rx buffers must have already been freed */ 1259 for (i = 0; i < 2; i++) { 1260 if (rq->buf_info[i]) { 1261 for (j = 0; j < rq->rx_ring[i].size; j++) 1262 BUG_ON(rq->buf_info[i][j].page != NULL); 1263 } 1264 } 1265 1266 1267 kfree(rq->buf_info[0]); 1268 1269 for (i = 0; i < 2; i++) { 1270 if (rq->rx_ring[i].base) { 1271 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size 1272 * sizeof(struct Vmxnet3_RxDesc), 1273 rq->rx_ring[i].base, 1274 rq->rx_ring[i].basePA); 1275 rq->rx_ring[i].base = NULL; 1276 } 1277 rq->buf_info[i] = NULL; 1278 } 1279 1280 if (rq->comp_ring.base) { 1281 pci_free_consistent(adapter->pdev, rq->comp_ring.size * 1282 sizeof(struct Vmxnet3_RxCompDesc), 1283 rq->comp_ring.base, rq->comp_ring.basePA); 1284 rq->comp_ring.base = NULL; 1285 } 1286} 1287 1288 1289static int 1290vmxnet3_rq_init(struct vmxnet3_rx_queue *rq, 1291 struct vmxnet3_adapter *adapter) 1292{ 1293 int i; 1294 1295 /* initialize buf_info */ 1296 for (i = 0; i < rq->rx_ring[0].size; i++) { 1297 1298 /* 1st buf for a pkt is skbuff */ 1299 if (i % adapter->rx_buf_per_pkt == 0) { 1300 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB; 1301 rq->buf_info[0][i].len = adapter->skb_buf_size; 1302 } else { /* subsequent bufs for a pkt is frag */ 1303 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE; 1304 rq->buf_info[0][i].len = PAGE_SIZE; 1305 } 1306 } 1307 for (i = 0; i < rq->rx_ring[1].size; i++) { 1308 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE; 1309 rq->buf_info[1][i].len = PAGE_SIZE; 1310 } 1311 1312 /* reset internal state and allocate buffers for both rings */ 1313 for (i = 0; i < 2; i++) { 1314 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0; 1315 rq->uncommitted[i] = 0; 1316 1317 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size * 1318 sizeof(struct Vmxnet3_RxDesc)); 1319 rq->rx_ring[i].gen = VMXNET3_INIT_GEN; 1320 } 1321 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1, 1322 adapter) == 0) { 1323 /* at least has 1 rx buffer for the 1st ring */ 1324 return -ENOMEM; 1325 } 1326 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter); 1327 1328 /* reset the comp ring */ 1329 rq->comp_ring.next2proc = 0; 1330 memset(rq->comp_ring.base, 0, rq->comp_ring.size * 1331 sizeof(struct Vmxnet3_RxCompDesc)); 1332 rq->comp_ring.gen = VMXNET3_INIT_GEN; 1333 1334 /* reset rxctx */ 1335 rq->rx_ctx.skb = NULL; 1336 1337 /* stats are not reset */ 1338 return 0; 1339} 1340 1341 1342static int 1343vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter) 1344{ 1345 int i; 1346 size_t sz; 1347 struct vmxnet3_rx_buf_info *bi; 1348 1349 for (i = 0; i < 2; i++) { 1350 1351 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc); 1352 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz, 1353 &rq->rx_ring[i].basePA); 1354 if (!rq->rx_ring[i].base) { 1355 printk(KERN_ERR "%s: failed to allocate rx ring %d\n", 1356 adapter->netdev->name, i); 1357 goto err; 1358 } 1359 } 1360 1361 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc); 1362 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz, 1363 &rq->comp_ring.basePA); 1364 if (!rq->comp_ring.base) { 1365 printk(KERN_ERR "%s: failed to allocate rx comp ring\n", 1366 adapter->netdev->name); 1367 goto err; 1368 } 1369 1370 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size + 1371 rq->rx_ring[1].size); 1372 bi = kmalloc(sz, GFP_KERNEL); 1373 if (!bi) { 1374 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n", 1375 adapter->netdev->name); 1376 goto err; 1377 } 1378 memset(bi, 0, sz); 1379 rq->buf_info[0] = bi; 1380 rq->buf_info[1] = bi + rq->rx_ring[0].size; 1381 1382 return 0; 1383 1384err: 1385 vmxnet3_rq_destroy(rq, adapter); 1386 return -ENOMEM; 1387} 1388 1389 1390static int 1391vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget) 1392{ 1393 if (unlikely(adapter->shared->ecr)) 1394 vmxnet3_process_events(adapter); 1395 1396 vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter); 1397 return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget); 1398} 1399 1400 1401static int 1402vmxnet3_poll(struct napi_struct *napi, int budget) 1403{ 1404 struct vmxnet3_adapter *adapter = container_of(napi, 1405 struct vmxnet3_adapter, napi); 1406 int rxd_done; 1407 1408 rxd_done = vmxnet3_do_poll(adapter, budget); 1409 1410 if (rxd_done < budget) { 1411 napi_complete(napi); 1412 vmxnet3_enable_intr(adapter, 0); 1413 } 1414 return rxd_done; 1415} 1416 1417 1418/* Interrupt handler for vmxnet3 */ 1419static irqreturn_t 1420vmxnet3_intr(int irq, void *dev_id) 1421{ 1422 struct net_device *dev = dev_id; 1423 struct vmxnet3_adapter *adapter = netdev_priv(dev); 1424 1425 if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) { 1426 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR); 1427 if (unlikely(icr == 0)) 1428 /* not ours */ 1429 return IRQ_NONE; 1430 } 1431 1432 1433 /* disable intr if needed */ 1434 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE) 1435 vmxnet3_disable_intr(adapter, 0); 1436 1437 napi_schedule(&adapter->napi); 1438 1439 return IRQ_HANDLED; 1440} 1441 1442#ifdef CONFIG_NET_POLL_CONTROLLER 1443 1444 1445/* netpoll callback. */ 1446static void 1447vmxnet3_netpoll(struct net_device *netdev) 1448{ 1449 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1450 int irq; 1451 1452#ifdef CONFIG_PCI_MSI 1453 if (adapter->intr.type == VMXNET3_IT_MSIX) 1454 irq = adapter->intr.msix_entries[0].vector; 1455 else 1456#endif 1457 irq = adapter->pdev->irq; 1458 1459 disable_irq(irq); 1460 vmxnet3_intr(irq, netdev); 1461 enable_irq(irq); 1462} 1463#endif 1464 1465static int 1466vmxnet3_request_irqs(struct vmxnet3_adapter *adapter) 1467{ 1468 int err; 1469 1470#ifdef CONFIG_PCI_MSI 1471 if (adapter->intr.type == VMXNET3_IT_MSIX) { 1472 /* we only use 1 MSI-X vector */ 1473 err = request_irq(adapter->intr.msix_entries[0].vector, 1474 vmxnet3_intr, 0, adapter->netdev->name, 1475 adapter->netdev); 1476 } else if (adapter->intr.type == VMXNET3_IT_MSI) { 1477 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0, 1478 adapter->netdev->name, adapter->netdev); 1479 } else 1480#endif 1481 { 1482 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 1483 IRQF_SHARED, adapter->netdev->name, 1484 adapter->netdev); 1485 } 1486 1487 if (err) 1488 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error" 1489 ":%d\n", adapter->netdev->name, adapter->intr.type, err); 1490 1491 1492 if (!err) { 1493 int i; 1494 /* init our intr settings */ 1495 for (i = 0; i < adapter->intr.num_intrs; i++) 1496 adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE; 1497 1498 /* next setup intr index for all intr sources */ 1499 adapter->tx_queue.comp_ring.intr_idx = 0; 1500 adapter->rx_queue.comp_ring.intr_idx = 0; 1501 adapter->intr.event_intr_idx = 0; 1502 1503 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors " 1504 "allocated\n", adapter->netdev->name, adapter->intr.type, 1505 adapter->intr.mask_mode, adapter->intr.num_intrs); 1506 } 1507 1508 return err; 1509} 1510 1511 1512static void 1513vmxnet3_free_irqs(struct vmxnet3_adapter *adapter) 1514{ 1515 BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO || 1516 adapter->intr.num_intrs <= 0); 1517 1518 switch (adapter->intr.type) { 1519#ifdef CONFIG_PCI_MSI 1520 case VMXNET3_IT_MSIX: 1521 { 1522 int i; 1523 1524 for (i = 0; i < adapter->intr.num_intrs; i++) 1525 free_irq(adapter->intr.msix_entries[i].vector, 1526 adapter->netdev); 1527 break; 1528 } 1529#endif 1530 case VMXNET3_IT_MSI: 1531 free_irq(adapter->pdev->irq, adapter->netdev); 1532 break; 1533 case VMXNET3_IT_INTX: 1534 free_irq(adapter->pdev->irq, adapter->netdev); 1535 break; 1536 default: 1537 BUG_ON(true); 1538 } 1539} 1540 1541 1542inline void set_flag_le16(__le16 *data, u16 flag) 1543{ 1544 *data = cpu_to_le16(le16_to_cpu(*data) | flag); 1545} 1546 1547inline void set_flag_le64(__le64 *data, u64 flag) 1548{ 1549 *data = cpu_to_le64(le64_to_cpu(*data) | flag); 1550} 1551 1552inline void reset_flag_le64(__le64 *data, u64 flag) 1553{ 1554 *data = cpu_to_le64(le64_to_cpu(*data) & ~flag); 1555} 1556 1557 1558static void 1559vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) 1560{ 1561 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1562 struct Vmxnet3_DriverShared *shared = adapter->shared; 1563 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1564 1565 if (grp) { 1566 /* add vlan rx stripping. */ 1567 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1568 int i; 1569 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1570 adapter->vlan_grp = grp; 1571 1572 /* update FEATURES to device */ 1573 set_flag_le64(&devRead->misc.uptFeatures, 1574 UPT1_F_RXVLAN); 1575 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1576 VMXNET3_CMD_UPDATE_FEATURE); 1577 /* 1578 * Clear entire vfTable; then enable untagged pkts. 1579 * Note: setting one entry in vfTable to non-zero turns 1580 * on VLAN rx filtering. 1581 */ 1582 for (i = 0; i < VMXNET3_VFT_SIZE; i++) 1583 vfTable[i] = 0; 1584 1585 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1586 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1587 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1588 } else { 1589 printk(KERN_ERR "%s: vlan_rx_register when device has " 1590 "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1591 } 1592 } else { 1593 /* remove vlan rx stripping. */ 1594 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1595 adapter->vlan_grp = NULL; 1596 1597 if (le64_to_cpu(devRead->misc.uptFeatures) & UPT1_F_RXVLAN) { 1598 int i; 1599 1600 for (i = 0; i < VMXNET3_VFT_SIZE; i++) { 1601 /* clear entire vfTable; this also disables 1602 * VLAN rx filtering 1603 */ 1604 vfTable[i] = 0; 1605 } 1606 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1607 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1608 1609 /* update FEATURES to device */ 1610 reset_flag_le64(&devRead->misc.uptFeatures, 1611 UPT1_F_RXVLAN); 1612 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1613 VMXNET3_CMD_UPDATE_FEATURE); 1614 } 1615 } 1616} 1617 1618 1619static void 1620vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter) 1621{ 1622 if (adapter->vlan_grp) { 1623 u16 vid; 1624 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1625 bool activeVlan = false; 1626 1627 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { 1628 if (vlan_group_get_device(adapter->vlan_grp, vid)) { 1629 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1630 activeVlan = true; 1631 } 1632 } 1633 if (activeVlan) { 1634 /* continue to allow untagged pkts */ 1635 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1636 } 1637 } 1638} 1639 1640 1641static void 1642vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid) 1643{ 1644 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1645 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1646 1647 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1648 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1649 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1650} 1651 1652 1653static void 1654vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) 1655{ 1656 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1657 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1658 1659 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 1660 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1661 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1662} 1663 1664 1665static u8 * 1666vmxnet3_copy_mc(struct net_device *netdev) 1667{ 1668 u8 *buf = NULL; 1669 u32 sz = netdev->mc_count * ETH_ALEN; 1670 1671 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */ 1672 if (sz <= 0xffff) { 1673 /* We may be called with BH disabled */ 1674 buf = kmalloc(sz, GFP_ATOMIC); 1675 if (buf) { 1676 int i; 1677 struct dev_mc_list *mc = netdev->mc_list; 1678 1679 for (i = 0; i < netdev->mc_count; i++) { 1680 BUG_ON(!mc); 1681 memcpy(buf + i * ETH_ALEN, mc->dmi_addr, 1682 ETH_ALEN); 1683 mc = mc->next; 1684 } 1685 } 1686 } 1687 return buf; 1688} 1689 1690 1691static void 1692vmxnet3_set_mc(struct net_device *netdev) 1693{ 1694 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1695 struct Vmxnet3_RxFilterConf *rxConf = 1696 &adapter->shared->devRead.rxFilterConf; 1697 u8 *new_table = NULL; 1698 u32 new_mode = VMXNET3_RXM_UCAST; 1699 1700 if (netdev->flags & IFF_PROMISC) 1701 new_mode |= VMXNET3_RXM_PROMISC; 1702 1703 if (netdev->flags & IFF_BROADCAST) 1704 new_mode |= VMXNET3_RXM_BCAST; 1705 1706 if (netdev->flags & IFF_ALLMULTI) 1707 new_mode |= VMXNET3_RXM_ALL_MULTI; 1708 else 1709 if (netdev->mc_count > 0) { 1710 new_table = vmxnet3_copy_mc(netdev); 1711 if (new_table) { 1712 new_mode |= VMXNET3_RXM_MCAST; 1713 rxConf->mfTableLen = cpu_to_le16( 1714 netdev->mc_count * ETH_ALEN); 1715 rxConf->mfTablePA = cpu_to_le64(virt_to_phys( 1716 new_table)); 1717 } else { 1718 printk(KERN_INFO "%s: failed to copy mcast list" 1719 ", setting ALL_MULTI\n", netdev->name); 1720 new_mode |= VMXNET3_RXM_ALL_MULTI; 1721 } 1722 } 1723 1724 1725 if (!(new_mode & VMXNET3_RXM_MCAST)) { 1726 rxConf->mfTableLen = 0; 1727 rxConf->mfTablePA = 0; 1728 } 1729 1730 if (new_mode != rxConf->rxMode) { 1731 rxConf->rxMode = cpu_to_le32(new_mode); 1732 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1733 VMXNET3_CMD_UPDATE_RX_MODE); 1734 } 1735 1736 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1737 VMXNET3_CMD_UPDATE_MAC_FILTERS); 1738 1739 kfree(new_table); 1740} 1741 1742 1743/* 1744 * Set up driver_shared based on settings in adapter. 1745 */ 1746 1747static void 1748vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter) 1749{ 1750 struct Vmxnet3_DriverShared *shared = adapter->shared; 1751 struct Vmxnet3_DSDevRead *devRead = &shared->devRead; 1752 struct Vmxnet3_TxQueueConf *tqc; 1753 struct Vmxnet3_RxQueueConf *rqc; 1754 int i; 1755 1756 memset(shared, 0, sizeof(*shared)); 1757 1758 /* driver settings */ 1759 shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC); 1760 devRead->misc.driverInfo.version = cpu_to_le32( 1761 VMXNET3_DRIVER_VERSION_NUM); 1762 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ? 1763 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64); 1764 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX; 1765 *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32( 1766 *((u32 *)&devRead->misc.driverInfo.gos)); 1767 devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1); 1768 devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1); 1769 1770 devRead->misc.ddPA = cpu_to_le64(virt_to_phys(adapter)); 1771 devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter)); 1772 1773 /* set up feature flags */ 1774 if (adapter->rxcsum) 1775 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXCSUM); 1776 1777 if (adapter->lro) { 1778 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_LRO); 1779 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 1780 } 1781 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) 1782 && adapter->vlan_grp) { 1783 set_flag_le64(&devRead->misc.uptFeatures, UPT1_F_RXVLAN); 1784 } 1785 1786 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 1787 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 1788 devRead->misc.queueDescLen = cpu_to_le32( 1789 sizeof(struct Vmxnet3_TxQueueDesc) + 1790 sizeof(struct Vmxnet3_RxQueueDesc)); 1791 1792 /* tx queue settings */ 1793 BUG_ON(adapter->tx_queue.tx_ring.base == NULL); 1794 1795 devRead->misc.numTxQueues = 1; 1796 tqc = &adapter->tqd_start->conf; 1797 tqc->txRingBasePA = cpu_to_le64(adapter->tx_queue.tx_ring.basePA); 1798 tqc->dataRingBasePA = cpu_to_le64(adapter->tx_queue.data_ring.basePA); 1799 tqc->compRingBasePA = cpu_to_le64(adapter->tx_queue.comp_ring.basePA); 1800 tqc->ddPA = cpu_to_le64(virt_to_phys( 1801 adapter->tx_queue.buf_info)); 1802 tqc->txRingSize = cpu_to_le32(adapter->tx_queue.tx_ring.size); 1803 tqc->dataRingSize = cpu_to_le32(adapter->tx_queue.data_ring.size); 1804 tqc->compRingSize = cpu_to_le32(adapter->tx_queue.comp_ring.size); 1805 tqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_tx_buf_info) * 1806 tqc->txRingSize); 1807 tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx; 1808 1809 /* rx queue settings */ 1810 devRead->misc.numRxQueues = 1; 1811 rqc = &adapter->rqd_start->conf; 1812 rqc->rxRingBasePA[0] = cpu_to_le64(adapter->rx_queue.rx_ring[0].basePA); 1813 rqc->rxRingBasePA[1] = cpu_to_le64(adapter->rx_queue.rx_ring[1].basePA); 1814 rqc->compRingBasePA = cpu_to_le64(adapter->rx_queue.comp_ring.basePA); 1815 rqc->ddPA = cpu_to_le64(virt_to_phys( 1816 adapter->rx_queue.buf_info)); 1817 rqc->rxRingSize[0] = cpu_to_le32(adapter->rx_queue.rx_ring[0].size); 1818 rqc->rxRingSize[1] = cpu_to_le32(adapter->rx_queue.rx_ring[1].size); 1819 rqc->compRingSize = cpu_to_le32(adapter->rx_queue.comp_ring.size); 1820 rqc->ddLen = cpu_to_le32(sizeof(struct vmxnet3_rx_buf_info) * 1821 (rqc->rxRingSize[0] + rqc->rxRingSize[1])); 1822 rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx; 1823 1824 /* intr settings */ 1825 devRead->intrConf.autoMask = adapter->intr.mask_mode == 1826 VMXNET3_IMM_AUTO; 1827 devRead->intrConf.numIntrs = adapter->intr.num_intrs; 1828 for (i = 0; i < adapter->intr.num_intrs; i++) 1829 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i]; 1830 1831 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx; 1832 1833 /* rx filter settings */ 1834 devRead->rxFilterConf.rxMode = 0; 1835 vmxnet3_restore_vlan(adapter); 1836 /* the rest are already zeroed */ 1837} 1838 1839 1840int 1841vmxnet3_activate_dev(struct vmxnet3_adapter *adapter) 1842{ 1843 int err; 1844 u32 ret; 1845 1846 dev_dbg(&adapter->netdev->dev, 1847 "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes" 1848 " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size, 1849 adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size, 1850 adapter->rx_queue.rx_ring[0].size, 1851 adapter->rx_queue.rx_ring[1].size); 1852 1853 vmxnet3_tq_init(&adapter->tx_queue, adapter); 1854 err = vmxnet3_rq_init(&adapter->rx_queue, adapter); 1855 if (err) { 1856 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n", 1857 adapter->netdev->name, err); 1858 goto rq_err; 1859 } 1860 1861 err = vmxnet3_request_irqs(adapter); 1862 if (err) { 1863 printk(KERN_ERR "Failed to setup irq for %s: error %d\n", 1864 adapter->netdev->name, err); 1865 goto irq_err; 1866 } 1867 1868 vmxnet3_setup_driver_shared(adapter); 1869 1870 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO( 1871 adapter->shared_pa)); 1872 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 1873 adapter->shared_pa)); 1874 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1875 VMXNET3_CMD_ACTIVATE_DEV); 1876 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 1877 1878 if (ret != 0) { 1879 printk(KERN_ERR "Failed to activate dev %s: error %u\n", 1880 adapter->netdev->name, ret); 1881 err = -EINVAL; 1882 goto activate_err; 1883 } 1884 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD, 1885 adapter->rx_queue.rx_ring[0].next2fill); 1886 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2, 1887 adapter->rx_queue.rx_ring[1].next2fill); 1888 1889 /* Apply the rx filter settins last. */ 1890 vmxnet3_set_mc(adapter->netdev); 1891 1892 /* 1893 * Check link state when first activating device. It will start the 1894 * tx queue if the link is up. 1895 */ 1896 vmxnet3_check_link(adapter); 1897 1898 napi_enable(&adapter->napi); 1899 vmxnet3_enable_all_intrs(adapter); 1900 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 1901 return 0; 1902 1903activate_err: 1904 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0); 1905 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0); 1906 vmxnet3_free_irqs(adapter); 1907irq_err: 1908rq_err: 1909 /* free up buffers we allocated */ 1910 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter); 1911 return err; 1912} 1913 1914 1915void 1916vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 1917{ 1918 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 1919} 1920 1921 1922int 1923vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 1924{ 1925 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 1926 return 0; 1927 1928 1929 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1930 VMXNET3_CMD_QUIESCE_DEV); 1931 vmxnet3_disable_all_intrs(adapter); 1932 1933 napi_disable(&adapter->napi); 1934 netif_tx_disable(adapter->netdev); 1935 adapter->link_speed = 0; 1936 netif_carrier_off(adapter->netdev); 1937 1938 vmxnet3_tq_cleanup(&adapter->tx_queue, adapter); 1939 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter); 1940 vmxnet3_free_irqs(adapter); 1941 return 0; 1942} 1943 1944 1945static void 1946vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 1947{ 1948 u32 tmp; 1949 1950 tmp = *(u32 *)mac; 1951 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp); 1952 1953 tmp = (mac[5] << 8) | mac[4]; 1954 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp); 1955} 1956 1957 1958static int 1959vmxnet3_set_mac_addr(struct net_device *netdev, void *p) 1960{ 1961 struct sockaddr *addr = p; 1962 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1963 1964 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); 1965 vmxnet3_write_mac_addr(adapter, addr->sa_data); 1966 1967 return 0; 1968} 1969 1970 1971/* ==================== initialization and cleanup routines ============ */ 1972 1973static int 1974vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64) 1975{ 1976 int err; 1977 unsigned long mmio_start, mmio_len; 1978 struct pci_dev *pdev = adapter->pdev; 1979 1980 err = pci_enable_device(pdev); 1981 if (err) { 1982 printk(KERN_ERR "Failed to enable adapter %s: error %d\n", 1983 pci_name(pdev), err); 1984 return err; 1985 } 1986 1987 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) { 1988 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) { 1989 printk(KERN_ERR "pci_set_consistent_dma_mask failed " 1990 "for adapter %s\n", pci_name(pdev)); 1991 err = -EIO; 1992 goto err_set_mask; 1993 } 1994 *dma64 = true; 1995 } else { 1996 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) { 1997 printk(KERN_ERR "pci_set_dma_mask failed for adapter " 1998 "%s\n", pci_name(pdev)); 1999 err = -EIO; 2000 goto err_set_mask; 2001 } 2002 *dma64 = false; 2003 } 2004 2005 err = pci_request_selected_regions(pdev, (1 << 2) - 1, 2006 vmxnet3_driver_name); 2007 if (err) { 2008 printk(KERN_ERR "Failed to request region for adapter %s: " 2009 "error %d\n", pci_name(pdev), err); 2010 goto err_set_mask; 2011 } 2012 2013 pci_set_master(pdev); 2014 2015 mmio_start = pci_resource_start(pdev, 0); 2016 mmio_len = pci_resource_len(pdev, 0); 2017 adapter->hw_addr0 = ioremap(mmio_start, mmio_len); 2018 if (!adapter->hw_addr0) { 2019 printk(KERN_ERR "Failed to map bar0 for adapter %s\n", 2020 pci_name(pdev)); 2021 err = -EIO; 2022 goto err_ioremap; 2023 } 2024 2025 mmio_start = pci_resource_start(pdev, 1); 2026 mmio_len = pci_resource_len(pdev, 1); 2027 adapter->hw_addr1 = ioremap(mmio_start, mmio_len); 2028 if (!adapter->hw_addr1) { 2029 printk(KERN_ERR "Failed to map bar1 for adapter %s\n", 2030 pci_name(pdev)); 2031 err = -EIO; 2032 goto err_bar1; 2033 } 2034 return 0; 2035 2036err_bar1: 2037 iounmap(adapter->hw_addr0); 2038err_ioremap: 2039 pci_release_selected_regions(pdev, (1 << 2) - 1); 2040err_set_mask: 2041 pci_disable_device(pdev); 2042 return err; 2043} 2044 2045 2046static void 2047vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter) 2048{ 2049 BUG_ON(!adapter->pdev); 2050 2051 iounmap(adapter->hw_addr0); 2052 iounmap(adapter->hw_addr1); 2053 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1); 2054 pci_disable_device(adapter->pdev); 2055} 2056 2057 2058static void 2059vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter) 2060{ 2061 size_t sz; 2062 2063 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE - 2064 VMXNET3_MAX_ETH_HDR_SIZE) { 2065 adapter->skb_buf_size = adapter->netdev->mtu + 2066 VMXNET3_MAX_ETH_HDR_SIZE; 2067 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE) 2068 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE; 2069 2070 adapter->rx_buf_per_pkt = 1; 2071 } else { 2072 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE; 2073 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE + 2074 VMXNET3_MAX_ETH_HDR_SIZE; 2075 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE; 2076 } 2077 2078 /* 2079 * for simplicity, force the ring0 size to be a multiple of 2080 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN 2081 */ 2082 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 2083 adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size + 2084 sz - 1) / sz * sz; 2085 adapter->rx_queue.rx_ring[0].size = min_t(u32, 2086 adapter->rx_queue.rx_ring[0].size, 2087 VMXNET3_RX_RING_MAX_SIZE / sz * sz); 2088} 2089 2090 2091int 2092vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size, 2093 u32 rx_ring_size, u32 rx_ring2_size) 2094{ 2095 int err; 2096 2097 adapter->tx_queue.tx_ring.size = tx_ring_size; 2098 adapter->tx_queue.data_ring.size = tx_ring_size; 2099 adapter->tx_queue.comp_ring.size = tx_ring_size; 2100 adapter->tx_queue.shared = &adapter->tqd_start->ctrl; 2101 adapter->tx_queue.stopped = true; 2102 err = vmxnet3_tq_create(&adapter->tx_queue, adapter); 2103 if (err) 2104 return err; 2105 2106 adapter->rx_queue.rx_ring[0].size = rx_ring_size; 2107 adapter->rx_queue.rx_ring[1].size = rx_ring2_size; 2108 vmxnet3_adjust_rx_ring_size(adapter); 2109 adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size + 2110 adapter->rx_queue.rx_ring[1].size; 2111 adapter->rx_queue.qid = 0; 2112 adapter->rx_queue.qid2 = 1; 2113 adapter->rx_queue.shared = &adapter->rqd_start->ctrl; 2114 err = vmxnet3_rq_create(&adapter->rx_queue, adapter); 2115 if (err) 2116 vmxnet3_tq_destroy(&adapter->tx_queue, adapter); 2117 2118 return err; 2119} 2120 2121static int 2122vmxnet3_open(struct net_device *netdev) 2123{ 2124 struct vmxnet3_adapter *adapter; 2125 int err; 2126 2127 adapter = netdev_priv(netdev); 2128 2129 spin_lock_init(&adapter->tx_queue.tx_lock); 2130 2131 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE, 2132 VMXNET3_DEF_RX_RING_SIZE, 2133 VMXNET3_DEF_RX_RING_SIZE); 2134 if (err) 2135 goto queue_err; 2136 2137 err = vmxnet3_activate_dev(adapter); 2138 if (err) 2139 goto activate_err; 2140 2141 return 0; 2142 2143activate_err: 2144 vmxnet3_rq_destroy(&adapter->rx_queue, adapter); 2145 vmxnet3_tq_destroy(&adapter->tx_queue, adapter); 2146queue_err: 2147 return err; 2148} 2149 2150 2151static int 2152vmxnet3_close(struct net_device *netdev) 2153{ 2154 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2155 2156 /* 2157 * Reset_work may be in the middle of resetting the device, wait for its 2158 * completion. 2159 */ 2160 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2161 msleep(1); 2162 2163 vmxnet3_quiesce_dev(adapter); 2164 2165 vmxnet3_rq_destroy(&adapter->rx_queue, adapter); 2166 vmxnet3_tq_destroy(&adapter->tx_queue, adapter); 2167 2168 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2169 2170 2171 return 0; 2172} 2173 2174 2175void 2176vmxnet3_force_close(struct vmxnet3_adapter *adapter) 2177{ 2178 /* 2179 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise 2180 * vmxnet3_close() will deadlock. 2181 */ 2182 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)); 2183 2184 /* we need to enable NAPI, otherwise dev_close will deadlock */ 2185 napi_enable(&adapter->napi); 2186 dev_close(adapter->netdev); 2187} 2188 2189 2190static int 2191vmxnet3_change_mtu(struct net_device *netdev, int new_mtu) 2192{ 2193 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2194 int err = 0; 2195 2196 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU) 2197 return -EINVAL; 2198 2199 if (new_mtu > 1500 && !adapter->jumbo_frame) 2200 return -EINVAL; 2201 2202 netdev->mtu = new_mtu; 2203 2204 /* 2205 * Reset_work may be in the middle of resetting the device, wait for its 2206 * completion. 2207 */ 2208 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2209 msleep(1); 2210 2211 if (netif_running(netdev)) { 2212 vmxnet3_quiesce_dev(adapter); 2213 vmxnet3_reset_dev(adapter); 2214 2215 /* we need to re-create the rx queue based on the new mtu */ 2216 vmxnet3_rq_destroy(&adapter->rx_queue, adapter); 2217 vmxnet3_adjust_rx_ring_size(adapter); 2218 adapter->rx_queue.comp_ring.size = 2219 adapter->rx_queue.rx_ring[0].size + 2220 adapter->rx_queue.rx_ring[1].size; 2221 err = vmxnet3_rq_create(&adapter->rx_queue, adapter); 2222 if (err) { 2223 printk(KERN_ERR "%s: failed to re-create rx queue," 2224 " error %d. Closing it.\n", netdev->name, err); 2225 goto out; 2226 } 2227 2228 err = vmxnet3_activate_dev(adapter); 2229 if (err) { 2230 printk(KERN_ERR "%s: failed to re-activate, error %d. " 2231 "Closing it\n", netdev->name, err); 2232 goto out; 2233 } 2234 } 2235 2236out: 2237 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2238 if (err) 2239 vmxnet3_force_close(adapter); 2240 2241 return err; 2242} 2243 2244 2245static void 2246vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64) 2247{ 2248 struct net_device *netdev = adapter->netdev; 2249 2250 netdev->features = NETIF_F_SG | 2251 NETIF_F_HW_CSUM | 2252 NETIF_F_HW_VLAN_TX | 2253 NETIF_F_HW_VLAN_RX | 2254 NETIF_F_HW_VLAN_FILTER | 2255 NETIF_F_TSO | 2256 NETIF_F_TSO6 | 2257 NETIF_F_LRO; 2258 2259 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro"); 2260 2261 adapter->rxcsum = true; 2262 adapter->jumbo_frame = true; 2263 adapter->lro = true; 2264 2265 if (dma64) { 2266 netdev->features |= NETIF_F_HIGHDMA; 2267 printk(" highDMA"); 2268 } 2269 2270 netdev->vlan_features = netdev->features; 2271 printk("\n"); 2272} 2273 2274 2275static void 2276vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac) 2277{ 2278 u32 tmp; 2279 2280 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL); 2281 *(u32 *)mac = tmp; 2282 2283 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH); 2284 mac[4] = tmp & 0xff; 2285 mac[5] = (tmp >> 8) & 0xff; 2286} 2287 2288 2289static void 2290vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter) 2291{ 2292 u32 cfg; 2293 2294 /* intr settings */ 2295 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2296 VMXNET3_CMD_GET_CONF_INTR); 2297 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2298 adapter->intr.type = cfg & 0x3; 2299 adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2300 2301 if (adapter->intr.type == VMXNET3_IT_AUTO) { 2302 int err; 2303 2304#ifdef CONFIG_PCI_MSI 2305 adapter->intr.msix_entries[0].entry = 0; 2306 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries, 2307 VMXNET3_LINUX_MAX_MSIX_VECT); 2308 if (!err) { 2309 adapter->intr.num_intrs = 1; 2310 adapter->intr.type = VMXNET3_IT_MSIX; 2311 return; 2312 } 2313#endif 2314 2315 err = pci_enable_msi(adapter->pdev); 2316 if (!err) { 2317 adapter->intr.num_intrs = 1; 2318 adapter->intr.type = VMXNET3_IT_MSI; 2319 return; 2320 } 2321 } 2322 2323 adapter->intr.type = VMXNET3_IT_INTX; 2324 2325 /* INT-X related setting */ 2326 adapter->intr.num_intrs = 1; 2327} 2328 2329 2330static void 2331vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter) 2332{ 2333 if (adapter->intr.type == VMXNET3_IT_MSIX) 2334 pci_disable_msix(adapter->pdev); 2335 else if (adapter->intr.type == VMXNET3_IT_MSI) 2336 pci_disable_msi(adapter->pdev); 2337 else 2338 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX); 2339} 2340 2341 2342static void 2343vmxnet3_tx_timeout(struct net_device *netdev) 2344{ 2345 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2346 adapter->tx_timeout_count++; 2347 2348 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name); 2349 schedule_work(&adapter->work); 2350} 2351 2352 2353static void 2354vmxnet3_reset_work(struct work_struct *data) 2355{ 2356 struct vmxnet3_adapter *adapter; 2357 2358 adapter = container_of(data, struct vmxnet3_adapter, work); 2359 2360 /* if another thread is resetting the device, no need to proceed */ 2361 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state)) 2362 return; 2363 2364 /* if the device is closed, we must leave it alone */ 2365 if (netif_running(adapter->netdev)) { 2366 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name); 2367 vmxnet3_quiesce_dev(adapter); 2368 vmxnet3_reset_dev(adapter); 2369 vmxnet3_activate_dev(adapter); 2370 } else { 2371 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name); 2372 } 2373 2374 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state); 2375} 2376 2377 2378static int __devinit 2379vmxnet3_probe_device(struct pci_dev *pdev, 2380 const struct pci_device_id *id) 2381{ 2382 static const struct net_device_ops vmxnet3_netdev_ops = { 2383 .ndo_open = vmxnet3_open, 2384 .ndo_stop = vmxnet3_close, 2385 .ndo_start_xmit = vmxnet3_xmit_frame, 2386 .ndo_set_mac_address = vmxnet3_set_mac_addr, 2387 .ndo_change_mtu = vmxnet3_change_mtu, 2388 .ndo_get_stats = vmxnet3_get_stats, 2389 .ndo_tx_timeout = vmxnet3_tx_timeout, 2390 .ndo_set_multicast_list = vmxnet3_set_mc, 2391 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register, 2392 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid, 2393 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid, 2394#ifdef CONFIG_NET_POLL_CONTROLLER 2395 .ndo_poll_controller = vmxnet3_netpoll, 2396#endif 2397 }; 2398 int err; 2399 bool dma64 = false; /* stupid gcc */ 2400 u32 ver; 2401 struct net_device *netdev; 2402 struct vmxnet3_adapter *adapter; 2403 u8 mac[ETH_ALEN]; 2404 2405 netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter)); 2406 if (!netdev) { 2407 printk(KERN_ERR "Failed to alloc ethernet device for adapter " 2408 "%s\n", pci_name(pdev)); 2409 return -ENOMEM; 2410 } 2411 2412 pci_set_drvdata(pdev, netdev); 2413 adapter = netdev_priv(netdev); 2414 adapter->netdev = netdev; 2415 adapter->pdev = pdev; 2416 2417 adapter->shared = pci_alloc_consistent(adapter->pdev, 2418 sizeof(struct Vmxnet3_DriverShared), 2419 &adapter->shared_pa); 2420 if (!adapter->shared) { 2421 printk(KERN_ERR "Failed to allocate memory for %s\n", 2422 pci_name(pdev)); 2423 err = -ENOMEM; 2424 goto err_alloc_shared; 2425 } 2426 2427 adapter->tqd_start = pci_alloc_consistent(adapter->pdev, 2428 sizeof(struct Vmxnet3_TxQueueDesc) + 2429 sizeof(struct Vmxnet3_RxQueueDesc), 2430 &adapter->queue_desc_pa); 2431 2432 if (!adapter->tqd_start) { 2433 printk(KERN_ERR "Failed to allocate memory for %s\n", 2434 pci_name(pdev)); 2435 err = -ENOMEM; 2436 goto err_alloc_queue_desc; 2437 } 2438 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start 2439 + 1); 2440 2441 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL); 2442 if (adapter->pm_conf == NULL) { 2443 printk(KERN_ERR "Failed to allocate memory for %s\n", 2444 pci_name(pdev)); 2445 err = -ENOMEM; 2446 goto err_alloc_pm; 2447 } 2448 2449 err = vmxnet3_alloc_pci_resources(adapter, &dma64); 2450 if (err < 0) 2451 goto err_alloc_pci; 2452 2453 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS); 2454 if (ver & 1) { 2455 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1); 2456 } else { 2457 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter" 2458 " %s\n", ver, pci_name(pdev)); 2459 err = -EBUSY; 2460 goto err_ver; 2461 } 2462 2463 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS); 2464 if (ver & 1) { 2465 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1); 2466 } else { 2467 printk(KERN_ERR "Incompatible upt version (0x%x) for " 2468 "adapter %s\n", ver, pci_name(pdev)); 2469 err = -EBUSY; 2470 goto err_ver; 2471 } 2472 2473 vmxnet3_declare_features(adapter, dma64); 2474 2475 adapter->dev_number = atomic_read(&devices_found); 2476 vmxnet3_alloc_intr_resources(adapter); 2477 2478 vmxnet3_read_mac_addr(adapter, mac); 2479 memcpy(netdev->dev_addr, mac, netdev->addr_len); 2480 2481 netdev->netdev_ops = &vmxnet3_netdev_ops; 2482 netdev->watchdog_timeo = 5 * HZ; 2483 vmxnet3_set_ethtool_ops(netdev); 2484 2485 INIT_WORK(&adapter->work, vmxnet3_reset_work); 2486 2487 netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64); 2488 SET_NETDEV_DEV(netdev, &pdev->dev); 2489 err = register_netdev(netdev); 2490 2491 if (err) { 2492 printk(KERN_ERR "Failed to register adapter %s\n", 2493 pci_name(pdev)); 2494 goto err_register; 2495 } 2496 2497 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state); 2498 atomic_inc(&devices_found); 2499 return 0; 2500 2501err_register: 2502 vmxnet3_free_intr_resources(adapter); 2503err_ver: 2504 vmxnet3_free_pci_resources(adapter); 2505err_alloc_pci: 2506 kfree(adapter->pm_conf); 2507err_alloc_pm: 2508 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) + 2509 sizeof(struct Vmxnet3_RxQueueDesc), 2510 adapter->tqd_start, adapter->queue_desc_pa); 2511err_alloc_queue_desc: 2512 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 2513 adapter->shared, adapter->shared_pa); 2514err_alloc_shared: 2515 pci_set_drvdata(pdev, NULL); 2516 free_netdev(netdev); 2517 return err; 2518} 2519 2520 2521static void __devexit 2522vmxnet3_remove_device(struct pci_dev *pdev) 2523{ 2524 struct net_device *netdev = pci_get_drvdata(pdev); 2525 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2526 2527 flush_scheduled_work(); 2528 2529 unregister_netdev(netdev); 2530 2531 vmxnet3_free_intr_resources(adapter); 2532 vmxnet3_free_pci_resources(adapter); 2533 kfree(adapter->pm_conf); 2534 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) + 2535 sizeof(struct Vmxnet3_RxQueueDesc), 2536 adapter->tqd_start, adapter->queue_desc_pa); 2537 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared), 2538 adapter->shared, adapter->shared_pa); 2539 free_netdev(netdev); 2540} 2541 2542 2543#ifdef CONFIG_PM 2544 2545static int 2546vmxnet3_suspend(struct device *device) 2547{ 2548 struct pci_dev *pdev = to_pci_dev(device); 2549 struct net_device *netdev = pci_get_drvdata(pdev); 2550 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2551 struct Vmxnet3_PMConf *pmConf; 2552 struct ethhdr *ehdr; 2553 struct arphdr *ahdr; 2554 u8 *arpreq; 2555 struct in_device *in_dev; 2556 struct in_ifaddr *ifa; 2557 int i = 0; 2558 2559 if (!netif_running(netdev)) 2560 return 0; 2561 2562 vmxnet3_disable_all_intrs(adapter); 2563 vmxnet3_free_irqs(adapter); 2564 vmxnet3_free_intr_resources(adapter); 2565 2566 netif_device_detach(netdev); 2567 netif_stop_queue(netdev); 2568 2569 /* Create wake-up filters. */ 2570 pmConf = adapter->pm_conf; 2571 memset(pmConf, 0, sizeof(*pmConf)); 2572 2573 if (adapter->wol & WAKE_UCAST) { 2574 pmConf->filters[i].patternSize = ETH_ALEN; 2575 pmConf->filters[i].maskSize = 1; 2576 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN); 2577 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */ 2578 2579 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER); 2580 i++; 2581 } 2582 2583 if (adapter->wol & WAKE_ARP) { 2584 in_dev = in_dev_get(netdev); 2585 if (!in_dev) 2586 goto skip_arp; 2587 2588 ifa = (struct in_ifaddr *)in_dev->ifa_list; 2589 if (!ifa) 2590 goto skip_arp; 2591 2592 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/ 2593 sizeof(struct arphdr) + /* ARP header */ 2594 2 * ETH_ALEN + /* 2 Ethernet addresses*/ 2595 2 * sizeof(u32); /*2 IPv4 addresses */ 2596 pmConf->filters[i].maskSize = 2597 (pmConf->filters[i].patternSize - 1) / 8 + 1; 2598 2599 /* ETH_P_ARP in Ethernet header. */ 2600 ehdr = (struct ethhdr *)pmConf->filters[i].pattern; 2601 ehdr->h_proto = htons(ETH_P_ARP); 2602 2603 /* ARPOP_REQUEST in ARP header. */ 2604 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN]; 2605 ahdr->ar_op = htons(ARPOP_REQUEST); 2606 arpreq = (u8 *)(ahdr + 1); 2607 2608 /* The Unicast IPv4 address in 'tip' field. */ 2609 arpreq += 2 * ETH_ALEN + sizeof(u32); 2610 *(u32 *)arpreq = ifa->ifa_address; 2611 2612 /* The mask for the relevant bits. */ 2613 pmConf->filters[i].mask[0] = 0x00; 2614 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */ 2615 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */ 2616 pmConf->filters[i].mask[3] = 0x00; 2617 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */ 2618 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */ 2619 in_dev_put(in_dev); 2620 2621 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_FILTER); 2622 i++; 2623 } 2624 2625skip_arp: 2626 if (adapter->wol & WAKE_MAGIC) 2627 set_flag_le16(&pmConf->wakeUpEvents, VMXNET3_PM_WAKEUP_MAGIC); 2628 2629 pmConf->numFilters = i; 2630 2631 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 2632 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 2633 *pmConf)); 2634 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 2635 pmConf)); 2636 2637 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2638 VMXNET3_CMD_UPDATE_PMCFG); 2639 2640 pci_save_state(pdev); 2641 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 2642 adapter->wol); 2643 pci_disable_device(pdev); 2644 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND)); 2645 2646 return 0; 2647} 2648 2649 2650static int 2651vmxnet3_resume(struct device *device) 2652{ 2653 int err; 2654 struct pci_dev *pdev = to_pci_dev(device); 2655 struct net_device *netdev = pci_get_drvdata(pdev); 2656 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 2657 struct Vmxnet3_PMConf *pmConf; 2658 2659 if (!netif_running(netdev)) 2660 return 0; 2661 2662 /* Destroy wake-up filters. */ 2663 pmConf = adapter->pm_conf; 2664 memset(pmConf, 0, sizeof(*pmConf)); 2665 2666 adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1); 2667 adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof( 2668 *pmConf)); 2669 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le32(virt_to_phys( 2670 pmConf)); 2671 2672 netif_device_attach(netdev); 2673 pci_set_power_state(pdev, PCI_D0); 2674 pci_restore_state(pdev); 2675 err = pci_enable_device_mem(pdev); 2676 if (err != 0) 2677 return err; 2678 2679 pci_enable_wake(pdev, PCI_D0, 0); 2680 2681 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2682 VMXNET3_CMD_UPDATE_PMCFG); 2683 vmxnet3_alloc_intr_resources(adapter); 2684 vmxnet3_request_irqs(adapter); 2685 vmxnet3_enable_all_intrs(adapter); 2686 2687 return 0; 2688} 2689 2690static struct dev_pm_ops vmxnet3_pm_ops = { 2691 .suspend = vmxnet3_suspend, 2692 .resume = vmxnet3_resume, 2693}; 2694#endif 2695 2696static struct pci_driver vmxnet3_driver = { 2697 .name = vmxnet3_driver_name, 2698 .id_table = vmxnet3_pciid_table, 2699 .probe = vmxnet3_probe_device, 2700 .remove = __devexit_p(vmxnet3_remove_device), 2701#ifdef CONFIG_PM 2702 .driver.pm = &vmxnet3_pm_ops, 2703#endif 2704}; 2705 2706 2707static int __init 2708vmxnet3_init_module(void) 2709{ 2710 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC, 2711 VMXNET3_DRIVER_VERSION_REPORT); 2712 return pci_register_driver(&vmxnet3_driver); 2713} 2714 2715module_init(vmxnet3_init_module); 2716 2717 2718static void 2719vmxnet3_exit_module(void) 2720{ 2721 pci_unregister_driver(&vmxnet3_driver); 2722} 2723 2724module_exit(vmxnet3_exit_module); 2725 2726MODULE_AUTHOR("VMware, Inc."); 2727MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC); 2728MODULE_LICENSE("GPL v2"); 2729MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING); 2730