pci200syn.c revision 1fb9df5d3069064c037c81c0ab8bf783ffa5e373
1/*
2 * Goramo PCI200SYN synchronous serial card driver for Linux
3 *
4 * Copyright (C) 2002-2003 Krzysztof Halasa <khc@pm.waw.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 *
10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
11 *
12 * Sources of information:
13 *    Hitachi HD64572 SCA-II User's Manual
14 *    PLX Technology Inc. PCI9052 Data Book
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/slab.h>
20#include <linux/sched.h>
21#include <linux/types.h>
22#include <linux/fcntl.h>
23#include <linux/in.h>
24#include <linux/string.h>
25#include <linux/errno.h>
26#include <linux/init.h>
27#include <linux/ioport.h>
28#include <linux/moduleparam.h>
29#include <linux/netdevice.h>
30#include <linux/hdlc.h>
31#include <linux/pci.h>
32#include <linux/delay.h>
33#include <asm/io.h>
34
35#include "hd64572.h"
36
37static const char* version = "Goramo PCI200SYN driver version: 1.16";
38static const char* devname = "PCI200SYN";
39
40#undef DEBUG_PKT
41#define DEBUG_RINGS
42
43#define PCI200SYN_PLX_SIZE	0x80	/* PLX control window size (128b) */
44#define PCI200SYN_SCA_SIZE	0x400	/* SCA window size (1Kb) */
45#define ALL_PAGES_ALWAYS_MAPPED
46#define NEED_DETECT_RAM
47#define NEED_SCA_MSCI_INTR
48#define MAX_TX_BUFFERS		10
49
50static int pci_clock_freq = 33000000;
51#define CLOCK_BASE pci_clock_freq
52
53/*
54 *      PLX PCI9052 local configuration and shared runtime registers.
55 *      This structure can be used to access 9052 registers (memory mapped).
56 */
57typedef struct {
58	u32 loc_addr_range[4];	/* 00-0Ch : Local Address Ranges */
59	u32 loc_rom_range;	/* 10h : Local ROM Range */
60	u32 loc_addr_base[4];	/* 14-20h : Local Address Base Addrs */
61	u32 loc_rom_base;	/* 24h : Local ROM Base */
62	u32 loc_bus_descr[4];	/* 28-34h : Local Bus Descriptors */
63	u32 rom_bus_descr;	/* 38h : ROM Bus Descriptor */
64	u32 cs_base[4];		/* 3C-48h : Chip Select Base Addrs */
65	u32 intr_ctrl_stat;	/* 4Ch : Interrupt Control/Status */
66	u32 init_ctrl;		/* 50h : EEPROM ctrl, Init Ctrl, etc */
67}plx9052;
68
69
70
71typedef struct port_s {
72	struct net_device *dev;
73	struct card_s *card;
74	spinlock_t lock;	/* TX lock */
75	sync_serial_settings settings;
76	int rxpart;		/* partial frame received, next frame invalid*/
77	unsigned short encoding;
78	unsigned short parity;
79	u16 rxin;		/* rx ring buffer 'in' pointer */
80	u16 txin;		/* tx ring buffer 'in' and 'last' pointers */
81	u16 txlast;
82	u8 rxs, txs, tmc;	/* SCA registers */
83	u8 phy_node;		/* physical port # - 0 or 1 */
84}port_t;
85
86
87
88typedef struct card_s {
89	u8 __iomem *rambase;	/* buffer memory base (virtual) */
90	u8 __iomem *scabase;	/* SCA memory base (virtual) */
91	plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */
92	u16 rx_ring_buffers;	/* number of buffers in a ring */
93	u16 tx_ring_buffers;
94	u16 buff_offset;	/* offset of first buffer of first channel */
95	u8 irq;			/* interrupt request level */
96
97	port_t ports[2];
98}card_t;
99
100
101#define sca_in(reg, card)	     readb(card->scabase + (reg))
102#define sca_out(value, reg, card)    writeb(value, card->scabase + (reg))
103#define sca_inw(reg, card)	     readw(card->scabase + (reg))
104#define sca_outw(value, reg, card)   writew(value, card->scabase + (reg))
105#define sca_inl(reg, card)	     readl(card->scabase + (reg))
106#define sca_outl(value, reg, card)   writel(value, card->scabase + (reg))
107
108#define port_to_card(port)	     (port->card)
109#define log_node(port)		     (port->phy_node)
110#define phy_node(port)		     (port->phy_node)
111#define winbase(card)		     (card->rambase)
112#define get_port(card, port)	     (&card->ports[port])
113#define sca_flush(card)		     (sca_in(IER0, card));
114
115static inline void new_memcpy_toio(char __iomem *dest, char *src, int length)
116{
117	int len;
118	do {
119		len = length > 256 ? 256 : length;
120		memcpy_toio(dest, src, len);
121		dest += len;
122		src += len;
123		length -= len;
124		readb(dest);
125	} while (len);
126}
127
128#undef memcpy_toio
129#define memcpy_toio new_memcpy_toio
130
131#include "hd6457x.c"
132
133
134static void pci200_set_iface(port_t *port)
135{
136	card_t *card = port->card;
137	u16 msci = get_msci(port);
138	u8 rxs = port->rxs & CLK_BRG_MASK;
139	u8 txs = port->txs & CLK_BRG_MASK;
140
141	sca_out(EXS_TES1, (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
142		port_to_card(port));
143	switch(port->settings.clock_type) {
144	case CLOCK_INT:
145		rxs |= CLK_BRG; /* BRG output */
146		txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
147		break;
148
149	case CLOCK_TXINT:
150		rxs |= CLK_LINE; /* RXC input */
151		txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */
152		break;
153
154	case CLOCK_TXFROMRX:
155		rxs |= CLK_LINE; /* RXC input */
156		txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
157		break;
158
159	default:		/* EXTernal clock */
160		rxs |= CLK_LINE; /* RXC input */
161		txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */
162		break;
163	}
164
165	port->rxs = rxs;
166	port->txs = txs;
167	sca_out(rxs, msci + RXS, card);
168	sca_out(txs, msci + TXS, card);
169	sca_set_port(port);
170}
171
172
173
174static int pci200_open(struct net_device *dev)
175{
176	port_t *port = dev_to_port(dev);
177
178	int result = hdlc_open(dev);
179	if (result)
180		return result;
181
182	sca_open(dev);
183	pci200_set_iface(port);
184	sca_flush(port_to_card(port));
185	return 0;
186}
187
188
189
190static int pci200_close(struct net_device *dev)
191{
192	sca_close(dev);
193	sca_flush(port_to_card(dev_to_port(dev)));
194	hdlc_close(dev);
195	return 0;
196}
197
198
199
200static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
201{
202	const size_t size = sizeof(sync_serial_settings);
203	sync_serial_settings new_line;
204	sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
205	port_t *port = dev_to_port(dev);
206
207#ifdef DEBUG_RINGS
208	if (cmd == SIOCDEVPRIVATE) {
209		sca_dump_rings(dev);
210		return 0;
211	}
212#endif
213	if (cmd != SIOCWANDEV)
214		return hdlc_ioctl(dev, ifr, cmd);
215
216	switch(ifr->ifr_settings.type) {
217	case IF_GET_IFACE:
218		ifr->ifr_settings.type = IF_IFACE_V35;
219		if (ifr->ifr_settings.size < size) {
220			ifr->ifr_settings.size = size; /* data size wanted */
221			return -ENOBUFS;
222		}
223		if (copy_to_user(line, &port->settings, size))
224			return -EFAULT;
225		return 0;
226
227	case IF_IFACE_V35:
228	case IF_IFACE_SYNC_SERIAL:
229		if (!capable(CAP_NET_ADMIN))
230			return -EPERM;
231
232		if (copy_from_user(&new_line, line, size))
233			return -EFAULT;
234
235		if (new_line.clock_type != CLOCK_EXT &&
236		    new_line.clock_type != CLOCK_TXFROMRX &&
237		    new_line.clock_type != CLOCK_INT &&
238		    new_line.clock_type != CLOCK_TXINT)
239		return -EINVAL;	/* No such clock setting */
240
241		if (new_line.loopback != 0 && new_line.loopback != 1)
242			return -EINVAL;
243
244		memcpy(&port->settings, &new_line, size); /* Update settings */
245		pci200_set_iface(port);
246		sca_flush(port_to_card(port));
247		return 0;
248
249	default:
250		return hdlc_ioctl(dev, ifr, cmd);
251	}
252}
253
254
255
256static void pci200_pci_remove_one(struct pci_dev *pdev)
257{
258	int i;
259	card_t *card = pci_get_drvdata(pdev);
260
261	for (i = 0; i < 2; i++)
262		if (card->ports[i].card) {
263			struct net_device *dev = port_to_dev(&card->ports[i]);
264			unregister_hdlc_device(dev);
265		}
266
267	if (card->irq)
268		free_irq(card->irq, card);
269
270	if (card->rambase)
271		iounmap(card->rambase);
272	if (card->scabase)
273		iounmap(card->scabase);
274	if (card->plxbase)
275		iounmap(card->plxbase);
276
277	pci_release_regions(pdev);
278	pci_disable_device(pdev);
279	pci_set_drvdata(pdev, NULL);
280	if (card->ports[0].dev)
281		free_netdev(card->ports[0].dev);
282	if (card->ports[1].dev)
283		free_netdev(card->ports[1].dev);
284	kfree(card);
285}
286
287
288
289static int __devinit pci200_pci_init_one(struct pci_dev *pdev,
290					 const struct pci_device_id *ent)
291{
292	card_t *card;
293	u8 rev_id;
294	u32 __iomem *p;
295	int i;
296	u32 ramsize;
297	u32 ramphys;		/* buffer memory base */
298	u32 scaphys;		/* SCA memory base */
299	u32 plxphys;		/* PLX registers memory base */
300
301#ifndef MODULE
302	static int printed_version;
303	if (!printed_version++)
304		printk(KERN_INFO "%s\n", version);
305#endif
306
307	i = pci_enable_device(pdev);
308	if (i)
309		return i;
310
311	i = pci_request_regions(pdev, "PCI200SYN");
312	if (i) {
313		pci_disable_device(pdev);
314		return i;
315	}
316
317	card = kmalloc(sizeof(card_t), GFP_KERNEL);
318	if (card == NULL) {
319		printk(KERN_ERR "pci200syn: unable to allocate memory\n");
320		pci_release_regions(pdev);
321		pci_disable_device(pdev);
322		return -ENOBUFS;
323	}
324	memset(card, 0, sizeof(card_t));
325	pci_set_drvdata(pdev, card);
326	card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
327	card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
328	if (!card->ports[0].dev || !card->ports[1].dev) {
329		printk(KERN_ERR "pci200syn: unable to allocate memory\n");
330		pci200_pci_remove_one(pdev);
331		return -ENOMEM;
332	}
333
334	pci_read_config_byte(pdev, PCI_REVISION_ID, &rev_id);
335	if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE ||
336	    pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE ||
337	    pci_resource_len(pdev, 3) < 16384) {
338		printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n");
339		pci200_pci_remove_one(pdev);
340		return -EFAULT;
341	}
342
343	plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK;
344	card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE);
345
346	scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK;
347	card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE);
348
349	ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK;
350	card->rambase = ioremap(ramphys, pci_resource_len(pdev,3));
351
352	if (card->plxbase == NULL ||
353	    card->scabase == NULL ||
354	    card->rambase == NULL) {
355		printk(KERN_ERR "pci200syn: ioremap() failed\n");
356		pci200_pci_remove_one(pdev);
357		return -EFAULT;
358	}
359
360	/* Reset PLX */
361	p = &card->plxbase->init_ctrl;
362	writel(readl(p) | 0x40000000, p);
363	readl(p);		/* Flush the write - do not use sca_flush */
364	udelay(1);
365
366	writel(readl(p) & ~0x40000000, p);
367	readl(p);		/* Flush the write - do not use sca_flush */
368	udelay(1);
369
370	ramsize = sca_detect_ram(card, card->rambase,
371				 pci_resource_len(pdev, 3));
372
373	/* number of TX + RX buffers for one port - this is dual port card */
374	i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU));
375	card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
376	card->rx_ring_buffers = i - card->tx_ring_buffers;
377
378	card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers +
379						    card->rx_ring_buffers);
380
381	printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +"
382	       " %u RX packets rings\n", ramsize / 1024, ramphys,
383	       pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers);
384
385	if (pdev->subsystem_device == PCI_DEVICE_ID_PLX_9050) {
386		printk(KERN_ERR "Detected PCI200SYN card with old "
387		       "configuration data.\n");
388		printk(KERN_ERR "See <http://www.kernel.org/pub/"
389		       "linux/utils/net/hdlc/pci200syn/> for update.\n");
390		printk(KERN_ERR "The card will stop working with"
391		       " future versions of Linux if not updated.\n");
392	}
393
394	if (card->tx_ring_buffers < 1) {
395		printk(KERN_ERR "pci200syn: RAM test failed\n");
396		pci200_pci_remove_one(pdev);
397		return -EFAULT;
398	}
399
400	/* Enable interrupts on the PCI bridge */
401	p = &card->plxbase->intr_ctrl_stat;
402	writew(readw(p) | 0x0040, p);
403
404	/* Allocate IRQ */
405	if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, devname, card)) {
406		printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n",
407		       pdev->irq);
408		pci200_pci_remove_one(pdev);
409		return -EBUSY;
410	}
411	card->irq = pdev->irq;
412
413	sca_init(card, 0);
414
415	for (i = 0; i < 2; i++) {
416		port_t *port = &card->ports[i];
417		struct net_device *dev = port_to_dev(port);
418		hdlc_device *hdlc = dev_to_hdlc(dev);
419		port->phy_node = i;
420
421		spin_lock_init(&port->lock);
422		SET_MODULE_OWNER(dev);
423		dev->irq = card->irq;
424		dev->mem_start = ramphys;
425		dev->mem_end = ramphys + ramsize - 1;
426		dev->tx_queue_len = 50;
427		dev->do_ioctl = pci200_ioctl;
428		dev->open = pci200_open;
429		dev->stop = pci200_close;
430		hdlc->attach = sca_attach;
431		hdlc->xmit = sca_xmit;
432		port->settings.clock_type = CLOCK_EXT;
433		port->card = card;
434		if (register_hdlc_device(dev)) {
435			printk(KERN_ERR "pci200syn: unable to register hdlc "
436			       "device\n");
437			port->card = NULL;
438			pci200_pci_remove_one(pdev);
439			return -ENOBUFS;
440		}
441		sca_init_sync_port(port);	/* Set up SCA memory */
442
443		printk(KERN_INFO "%s: PCI200SYN node %d\n",
444		       dev->name, port->phy_node);
445	}
446
447	sca_flush(card);
448	return 0;
449}
450
451
452
453static struct pci_device_id pci200_pci_tbl[] __devinitdata = {
454	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
455	  PCI_DEVICE_ID_PLX_9050, 0, 0, 0 },
456	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
457	  PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 },
458	{ 0, }
459};
460
461
462static struct pci_driver pci200_pci_driver = {
463	.name		= "PCI200SYN",
464	.id_table	= pci200_pci_tbl,
465	.probe		= pci200_pci_init_one,
466	.remove		= pci200_pci_remove_one,
467};
468
469
470static int __init pci200_init_module(void)
471{
472#ifdef MODULE
473	printk(KERN_INFO "%s\n", version);
474#endif
475	if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
476		printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n");
477		return -EINVAL;
478	}
479	return pci_module_init(&pci200_pci_driver);
480}
481
482
483
484static void __exit pci200_cleanup_module(void)
485{
486	pci_unregister_driver(&pci200_pci_driver);
487}
488
489MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
490MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
491MODULE_LICENSE("GPL v2");
492MODULE_DEVICE_TABLE(pci, pci200_pci_tbl);
493module_param(pci_clock_freq, int, 0444);
494MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
495module_init(pci200_init_module);
496module_exit(pci200_cleanup_module);
497