pci200syn.c revision 302243922b374b147380f61774b44612eb2040fd
1/* 2 * Goramo PCI200SYN synchronous serial card driver for Linux 3 * 4 * Copyright (C) 2002-2003 Krzysztof Halasa <khc@pm.waw.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License 8 * as published by the Free Software Foundation. 9 * 10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/> 11 * 12 * Sources of information: 13 * Hitachi HD64572 SCA-II User's Manual 14 * PLX Technology Inc. PCI9052 Data Book 15 */ 16 17#include <linux/module.h> 18#include <linux/kernel.h> 19#include <linux/slab.h> 20#include <linux/types.h> 21#include <linux/fcntl.h> 22#include <linux/in.h> 23#include <linux/string.h> 24#include <linux/errno.h> 25#include <linux/init.h> 26#include <linux/ioport.h> 27#include <linux/moduleparam.h> 28#include <linux/netdevice.h> 29#include <linux/hdlc.h> 30#include <linux/pci.h> 31#include <linux/delay.h> 32#include <asm/io.h> 33 34#include "hd64572.h" 35 36static const char* version = "Goramo PCI200SYN driver version: 1.16"; 37static const char* devname = "PCI200SYN"; 38 39#undef DEBUG_PKT 40#define DEBUG_RINGS 41 42#define PCI200SYN_PLX_SIZE 0x80 /* PLX control window size (128b) */ 43#define PCI200SYN_SCA_SIZE 0x400 /* SCA window size (1Kb) */ 44#define MAX_TX_BUFFERS 10 45 46static int pci_clock_freq = 33000000; 47#define CLOCK_BASE pci_clock_freq 48 49/* 50 * PLX PCI9052 local configuration and shared runtime registers. 51 * This structure can be used to access 9052 registers (memory mapped). 52 */ 53typedef struct { 54 u32 loc_addr_range[4]; /* 00-0Ch : Local Address Ranges */ 55 u32 loc_rom_range; /* 10h : Local ROM Range */ 56 u32 loc_addr_base[4]; /* 14-20h : Local Address Base Addrs */ 57 u32 loc_rom_base; /* 24h : Local ROM Base */ 58 u32 loc_bus_descr[4]; /* 28-34h : Local Bus Descriptors */ 59 u32 rom_bus_descr; /* 38h : ROM Bus Descriptor */ 60 u32 cs_base[4]; /* 3C-48h : Chip Select Base Addrs */ 61 u32 intr_ctrl_stat; /* 4Ch : Interrupt Control/Status */ 62 u32 init_ctrl; /* 50h : EEPROM ctrl, Init Ctrl, etc */ 63}plx9052; 64 65 66 67typedef struct port_s { 68 struct net_device *dev; 69 struct card_s *card; 70 spinlock_t lock; /* TX lock */ 71 sync_serial_settings settings; 72 int rxpart; /* partial frame received, next frame invalid*/ 73 unsigned short encoding; 74 unsigned short parity; 75 u16 rxin; /* rx ring buffer 'in' pointer */ 76 u16 txin; /* tx ring buffer 'in' and 'last' pointers */ 77 u16 txlast; 78 u8 rxs, txs, tmc; /* SCA registers */ 79 u8 phy_node; /* physical port # - 0 or 1 */ 80}port_t; 81 82 83 84typedef struct card_s { 85 u8 __iomem *rambase; /* buffer memory base (virtual) */ 86 u8 __iomem *scabase; /* SCA memory base (virtual) */ 87 plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */ 88 u16 rx_ring_buffers; /* number of buffers in a ring */ 89 u16 tx_ring_buffers; 90 u16 buff_offset; /* offset of first buffer of first channel */ 91 u8 irq; /* interrupt request level */ 92 93 port_t ports[2]; 94}card_t; 95 96 97#define sca_in(reg, card) readb(card->scabase + (reg)) 98#define sca_out(value, reg, card) writeb(value, card->scabase + (reg)) 99#define sca_inw(reg, card) readw(card->scabase + (reg)) 100#define sca_outw(value, reg, card) writew(value, card->scabase + (reg)) 101#define sca_inl(reg, card) readl(card->scabase + (reg)) 102#define sca_outl(value, reg, card) writel(value, card->scabase + (reg)) 103 104#define port_to_card(port) (port->card) 105#define log_node(port) (port->phy_node) 106#define phy_node(port) (port->phy_node) 107#define winbase(card) (card->rambase) 108#define get_port(card, port) (&card->ports[port]) 109#define sca_flush(card) (sca_in(IER0, card)); 110 111static inline void new_memcpy_toio(char __iomem *dest, char *src, int length) 112{ 113 int len; 114 do { 115 len = length > 256 ? 256 : length; 116 memcpy_toio(dest, src, len); 117 dest += len; 118 src += len; 119 length -= len; 120 readb(dest); 121 } while (len); 122} 123 124#undef memcpy_toio 125#define memcpy_toio new_memcpy_toio 126 127#include "hd64572.c" 128 129 130static void pci200_set_iface(port_t *port) 131{ 132 card_t *card = port->card; 133 u16 msci = get_msci(port); 134 u8 rxs = port->rxs & CLK_BRG_MASK; 135 u8 txs = port->txs & CLK_BRG_MASK; 136 137 sca_out(EXS_TES1, (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS, 138 port_to_card(port)); 139 switch(port->settings.clock_type) { 140 case CLOCK_INT: 141 rxs |= CLK_BRG; /* BRG output */ 142 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */ 143 break; 144 145 case CLOCK_TXINT: 146 rxs |= CLK_LINE; /* RXC input */ 147 txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */ 148 break; 149 150 case CLOCK_TXFROMRX: 151 rxs |= CLK_LINE; /* RXC input */ 152 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */ 153 break; 154 155 default: /* EXTernal clock */ 156 rxs |= CLK_LINE; /* RXC input */ 157 txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */ 158 break; 159 } 160 161 port->rxs = rxs; 162 port->txs = txs; 163 sca_out(rxs, msci + RXS, card); 164 sca_out(txs, msci + TXS, card); 165 sca_set_port(port); 166} 167 168 169 170static int pci200_open(struct net_device *dev) 171{ 172 port_t *port = dev_to_port(dev); 173 174 int result = hdlc_open(dev); 175 if (result) 176 return result; 177 178 sca_open(dev); 179 pci200_set_iface(port); 180 sca_flush(port_to_card(port)); 181 return 0; 182} 183 184 185 186static int pci200_close(struct net_device *dev) 187{ 188 sca_close(dev); 189 sca_flush(port_to_card(dev_to_port(dev))); 190 hdlc_close(dev); 191 return 0; 192} 193 194 195 196static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 197{ 198 const size_t size = sizeof(sync_serial_settings); 199 sync_serial_settings new_line; 200 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync; 201 port_t *port = dev_to_port(dev); 202 203#ifdef DEBUG_RINGS 204 if (cmd == SIOCDEVPRIVATE) { 205 sca_dump_rings(dev); 206 return 0; 207 } 208#endif 209 if (cmd != SIOCWANDEV) 210 return hdlc_ioctl(dev, ifr, cmd); 211 212 switch(ifr->ifr_settings.type) { 213 case IF_GET_IFACE: 214 ifr->ifr_settings.type = IF_IFACE_V35; 215 if (ifr->ifr_settings.size < size) { 216 ifr->ifr_settings.size = size; /* data size wanted */ 217 return -ENOBUFS; 218 } 219 if (copy_to_user(line, &port->settings, size)) 220 return -EFAULT; 221 return 0; 222 223 case IF_IFACE_V35: 224 case IF_IFACE_SYNC_SERIAL: 225 if (!capable(CAP_NET_ADMIN)) 226 return -EPERM; 227 228 if (copy_from_user(&new_line, line, size)) 229 return -EFAULT; 230 231 if (new_line.clock_type != CLOCK_EXT && 232 new_line.clock_type != CLOCK_TXFROMRX && 233 new_line.clock_type != CLOCK_INT && 234 new_line.clock_type != CLOCK_TXINT) 235 return -EINVAL; /* No such clock setting */ 236 237 if (new_line.loopback != 0 && new_line.loopback != 1) 238 return -EINVAL; 239 240 memcpy(&port->settings, &new_line, size); /* Update settings */ 241 pci200_set_iface(port); 242 sca_flush(port_to_card(port)); 243 return 0; 244 245 default: 246 return hdlc_ioctl(dev, ifr, cmd); 247 } 248} 249 250 251 252static void pci200_pci_remove_one(struct pci_dev *pdev) 253{ 254 int i; 255 card_t *card = pci_get_drvdata(pdev); 256 257 for (i = 0; i < 2; i++) 258 if (card->ports[i].card) { 259 struct net_device *dev = port_to_dev(&card->ports[i]); 260 unregister_hdlc_device(dev); 261 } 262 263 if (card->irq) 264 free_irq(card->irq, card); 265 266 if (card->rambase) 267 iounmap(card->rambase); 268 if (card->scabase) 269 iounmap(card->scabase); 270 if (card->plxbase) 271 iounmap(card->plxbase); 272 273 pci_release_regions(pdev); 274 pci_disable_device(pdev); 275 pci_set_drvdata(pdev, NULL); 276 if (card->ports[0].dev) 277 free_netdev(card->ports[0].dev); 278 if (card->ports[1].dev) 279 free_netdev(card->ports[1].dev); 280 kfree(card); 281} 282 283 284 285static int __devinit pci200_pci_init_one(struct pci_dev *pdev, 286 const struct pci_device_id *ent) 287{ 288 card_t *card; 289 u32 __iomem *p; 290 int i; 291 u32 ramsize; 292 u32 ramphys; /* buffer memory base */ 293 u32 scaphys; /* SCA memory base */ 294 u32 plxphys; /* PLX registers memory base */ 295 296#ifndef MODULE 297 static int printed_version; 298 if (!printed_version++) 299 printk(KERN_INFO "%s\n", version); 300#endif 301 302 i = pci_enable_device(pdev); 303 if (i) 304 return i; 305 306 i = pci_request_regions(pdev, "PCI200SYN"); 307 if (i) { 308 pci_disable_device(pdev); 309 return i; 310 } 311 312 card = kzalloc(sizeof(card_t), GFP_KERNEL); 313 if (card == NULL) { 314 printk(KERN_ERR "pci200syn: unable to allocate memory\n"); 315 pci_release_regions(pdev); 316 pci_disable_device(pdev); 317 return -ENOBUFS; 318 } 319 pci_set_drvdata(pdev, card); 320 card->ports[0].dev = alloc_hdlcdev(&card->ports[0]); 321 card->ports[1].dev = alloc_hdlcdev(&card->ports[1]); 322 if (!card->ports[0].dev || !card->ports[1].dev) { 323 printk(KERN_ERR "pci200syn: unable to allocate memory\n"); 324 pci200_pci_remove_one(pdev); 325 return -ENOMEM; 326 } 327 328 if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE || 329 pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE || 330 pci_resource_len(pdev, 3) < 16384) { 331 printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n"); 332 pci200_pci_remove_one(pdev); 333 return -EFAULT; 334 } 335 336 plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK; 337 card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE); 338 339 scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK; 340 card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE); 341 342 ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK; 343 card->rambase = pci_ioremap_bar(pdev, 3); 344 345 if (card->plxbase == NULL || 346 card->scabase == NULL || 347 card->rambase == NULL) { 348 printk(KERN_ERR "pci200syn: ioremap() failed\n"); 349 pci200_pci_remove_one(pdev); 350 return -EFAULT; 351 } 352 353 /* Reset PLX */ 354 p = &card->plxbase->init_ctrl; 355 writel(readl(p) | 0x40000000, p); 356 readl(p); /* Flush the write - do not use sca_flush */ 357 udelay(1); 358 359 writel(readl(p) & ~0x40000000, p); 360 readl(p); /* Flush the write - do not use sca_flush */ 361 udelay(1); 362 363 ramsize = sca_detect_ram(card, card->rambase, 364 pci_resource_len(pdev, 3)); 365 366 /* number of TX + RX buffers for one port - this is dual port card */ 367 i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU)); 368 card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS); 369 card->rx_ring_buffers = i - card->tx_ring_buffers; 370 371 card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers + 372 card->rx_ring_buffers); 373 374 printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +" 375 " %u RX packets rings\n", ramsize / 1024, ramphys, 376 pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers); 377 378 if (pdev->subsystem_device == PCI_DEVICE_ID_PLX_9050) { 379 printk(KERN_ERR "Detected PCI200SYN card with old " 380 "configuration data.\n"); 381 printk(KERN_ERR "See <http://www.kernel.org/pub/" 382 "linux/utils/net/hdlc/pci200syn/> for update.\n"); 383 printk(KERN_ERR "The card will stop working with" 384 " future versions of Linux if not updated.\n"); 385 } 386 387 if (card->tx_ring_buffers < 1) { 388 printk(KERN_ERR "pci200syn: RAM test failed\n"); 389 pci200_pci_remove_one(pdev); 390 return -EFAULT; 391 } 392 393 /* Enable interrupts on the PCI bridge */ 394 p = &card->plxbase->intr_ctrl_stat; 395 writew(readw(p) | 0x0040, p); 396 397 /* Allocate IRQ */ 398 if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, devname, card)) { 399 printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n", 400 pdev->irq); 401 pci200_pci_remove_one(pdev); 402 return -EBUSY; 403 } 404 card->irq = pdev->irq; 405 406 sca_init(card, 0); 407 408 for (i = 0; i < 2; i++) { 409 port_t *port = &card->ports[i]; 410 struct net_device *dev = port_to_dev(port); 411 hdlc_device *hdlc = dev_to_hdlc(dev); 412 port->phy_node = i; 413 414 spin_lock_init(&port->lock); 415 dev->irq = card->irq; 416 dev->mem_start = ramphys; 417 dev->mem_end = ramphys + ramsize - 1; 418 dev->tx_queue_len = 50; 419 dev->do_ioctl = pci200_ioctl; 420 dev->open = pci200_open; 421 dev->stop = pci200_close; 422 hdlc->attach = sca_attach; 423 hdlc->xmit = sca_xmit; 424 port->settings.clock_type = CLOCK_EXT; 425 port->card = card; 426 if (register_hdlc_device(dev)) { 427 printk(KERN_ERR "pci200syn: unable to register hdlc " 428 "device\n"); 429 port->card = NULL; 430 pci200_pci_remove_one(pdev); 431 return -ENOBUFS; 432 } 433 sca_init_port(port); /* Set up SCA memory */ 434 435 printk(KERN_INFO "%s: PCI200SYN node %d\n", 436 dev->name, port->phy_node); 437 } 438 439 sca_flush(card); 440 return 0; 441} 442 443 444 445static struct pci_device_id pci200_pci_tbl[] __devinitdata = { 446 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, 447 PCI_DEVICE_ID_PLX_9050, 0, 0, 0 }, 448 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, 449 PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 }, 450 { 0, } 451}; 452 453 454static struct pci_driver pci200_pci_driver = { 455 .name = "PCI200SYN", 456 .id_table = pci200_pci_tbl, 457 .probe = pci200_pci_init_one, 458 .remove = pci200_pci_remove_one, 459}; 460 461 462static int __init pci200_init_module(void) 463{ 464#ifdef MODULE 465 printk(KERN_INFO "%s\n", version); 466#endif 467 if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) { 468 printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n"); 469 return -EINVAL; 470 } 471 return pci_register_driver(&pci200_pci_driver); 472} 473 474 475 476static void __exit pci200_cleanup_module(void) 477{ 478 pci_unregister_driver(&pci200_pci_driver); 479} 480 481MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>"); 482MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver"); 483MODULE_LICENSE("GPL v2"); 484MODULE_DEVICE_TABLE(pci, pci200_pci_tbl); 485module_param(pci_clock_freq, int, 0444); 486MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz"); 487module_init(pci200_init_module); 488module_exit(pci200_cleanup_module); 489