pci200syn.c revision 967834361a4beb3bbd3069189c192dc6fdeef8a9 
1/*
2 * Goramo PCI200SYN synchronous serial card driver for Linux
3 *
4 * Copyright (C) 2002-2003 Krzysztof Halasa <khc@pm.waw.pl>
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License
8 * as published by the Free Software Foundation.
9 *
10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/>
11 *
12 * Sources of information:
13 *    Hitachi HD64572 SCA-II User's Manual
14 *    PLX Technology Inc. PCI9052 Data Book
15 */
16
17#include <linux/module.h>
18#include <linux/kernel.h>
19#include <linux/slab.h>
20#include <linux/types.h>
21#include <linux/fcntl.h>
22#include <linux/in.h>
23#include <linux/string.h>
24#include <linux/errno.h>
25#include <linux/init.h>
26#include <linux/ioport.h>
27#include <linux/moduleparam.h>
28#include <linux/netdevice.h>
29#include <linux/hdlc.h>
30#include <linux/pci.h>
31#include <linux/delay.h>
32#include <asm/io.h>
33
34#include "hd64572.h"
35
36#undef DEBUG_PKT
37#define DEBUG_RINGS
38
39#define PCI200SYN_PLX_SIZE	0x80	/* PLX control window size (128b) */
40#define PCI200SYN_SCA_SIZE	0x400	/* SCA window size (1Kb) */
41#define MAX_TX_BUFFERS		10
42
43static int pci_clock_freq = 33000000;
44#define CLOCK_BASE pci_clock_freq
45
46/*
47 *      PLX PCI9052 local configuration and shared runtime registers.
48 *      This structure can be used to access 9052 registers (memory mapped).
49 */
50typedef struct {
51	u32 loc_addr_range[4];	/* 00-0Ch : Local Address Ranges */
52	u32 loc_rom_range;	/* 10h : Local ROM Range */
53	u32 loc_addr_base[4];	/* 14-20h : Local Address Base Addrs */
54	u32 loc_rom_base;	/* 24h : Local ROM Base */
55	u32 loc_bus_descr[4];	/* 28-34h : Local Bus Descriptors */
56	u32 rom_bus_descr;	/* 38h : ROM Bus Descriptor */
57	u32 cs_base[4];		/* 3C-48h : Chip Select Base Addrs */
58	u32 intr_ctrl_stat;	/* 4Ch : Interrupt Control/Status */
59	u32 init_ctrl;		/* 50h : EEPROM ctrl, Init Ctrl, etc */
60}plx9052;
61
62
63
64typedef struct port_s {
65	struct napi_struct napi;
66	struct net_device *dev;
67	struct card_s *card;
68	spinlock_t lock;	/* TX lock */
69	sync_serial_settings settings;
70	int rxpart;		/* partial frame received, next frame invalid*/
71	unsigned short encoding;
72	unsigned short parity;
73	u16 rxin;		/* rx ring buffer 'in' pointer */
74	u16 txin;		/* tx ring buffer 'in' and 'last' pointers */
75	u16 txlast;
76	u8 rxs, txs, tmc;	/* SCA registers */
77	u8 phy_node;		/* physical port # - 0 or 1 */
78}port_t;
79
80
81
82typedef struct card_s {
83	u8 __iomem *rambase;	/* buffer memory base (virtual) */
84	u8 __iomem *scabase;	/* SCA memory base (virtual) */
85	plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */
86	u16 rx_ring_buffers;	/* number of buffers in a ring */
87	u16 tx_ring_buffers;
88	u16 buff_offset;	/* offset of first buffer of first channel */
89	u8 irq;			/* interrupt request level */
90
91	port_t ports[2];
92}card_t;
93
94
95#define sca_in(reg, card)	     readb(card->scabase + (reg))
96#define sca_out(value, reg, card)    writeb(value, card->scabase + (reg))
97#define sca_inw(reg, card)	     readw(card->scabase + (reg))
98#define sca_outw(value, reg, card)   writew(value, card->scabase + (reg))
99#define sca_inl(reg, card)	     readl(card->scabase + (reg))
100#define sca_outl(value, reg, card)   writel(value, card->scabase + (reg))
101
102#define port_to_card(port)	     (port->card)
103#define log_node(port)		     (port->phy_node)
104#define phy_node(port)		     (port->phy_node)
105#define winbase(card)		     (card->rambase)
106#define get_port(card, port)	     (&card->ports[port])
107#define sca_flush(card)		     (sca_in(IER0, card));
108
109static inline void new_memcpy_toio(char __iomem *dest, char *src, int length)
110{
111	int len;
112	do {
113		len = length > 256 ? 256 : length;
114		memcpy_toio(dest, src, len);
115		dest += len;
116		src += len;
117		length -= len;
118		readb(dest);
119	} while (len);
120}
121
122#undef memcpy_toio
123#define memcpy_toio new_memcpy_toio
124
125#include "hd64572.c"
126
127
128static void pci200_set_iface(port_t *port)
129{
130	card_t *card = port->card;
131	u16 msci = get_msci(port);
132	u8 rxs = port->rxs & CLK_BRG_MASK;
133	u8 txs = port->txs & CLK_BRG_MASK;
134
135	sca_out(EXS_TES1, (phy_node(port) ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS,
136		port_to_card(port));
137	switch(port->settings.clock_type) {
138	case CLOCK_INT:
139		rxs |= CLK_BRG; /* BRG output */
140		txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
141		break;
142
143	case CLOCK_TXINT:
144		rxs |= CLK_LINE; /* RXC input */
145		txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */
146		break;
147
148	case CLOCK_TXFROMRX:
149		rxs |= CLK_LINE; /* RXC input */
150		txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */
151		break;
152
153	default:		/* EXTernal clock */
154		rxs |= CLK_LINE; /* RXC input */
155		txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */
156		break;
157	}
158
159	port->rxs = rxs;
160	port->txs = txs;
161	sca_out(rxs, msci + RXS, card);
162	sca_out(txs, msci + TXS, card);
163	sca_set_port(port);
164}
165
166
167
168static int pci200_open(struct net_device *dev)
169{
170	port_t *port = dev_to_port(dev);
171
172	int result = hdlc_open(dev);
173	if (result)
174		return result;
175
176	sca_open(dev);
177	pci200_set_iface(port);
178	sca_flush(port_to_card(port));
179	return 0;
180}
181
182
183
184static int pci200_close(struct net_device *dev)
185{
186	sca_close(dev);
187	sca_flush(port_to_card(dev_to_port(dev)));
188	hdlc_close(dev);
189	return 0;
190}
191
192
193
194static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
195{
196	const size_t size = sizeof(sync_serial_settings);
197	sync_serial_settings new_line;
198	sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
199	port_t *port = dev_to_port(dev);
200
201#ifdef DEBUG_RINGS
202	if (cmd == SIOCDEVPRIVATE) {
203		sca_dump_rings(dev);
204		return 0;
205	}
206#endif
207	if (cmd != SIOCWANDEV)
208		return hdlc_ioctl(dev, ifr, cmd);
209
210	switch(ifr->ifr_settings.type) {
211	case IF_GET_IFACE:
212		ifr->ifr_settings.type = IF_IFACE_V35;
213		if (ifr->ifr_settings.size < size) {
214			ifr->ifr_settings.size = size; /* data size wanted */
215			return -ENOBUFS;
216		}
217		if (copy_to_user(line, &port->settings, size))
218			return -EFAULT;
219		return 0;
220
221	case IF_IFACE_V35:
222	case IF_IFACE_SYNC_SERIAL:
223		if (!capable(CAP_NET_ADMIN))
224			return -EPERM;
225
226		if (copy_from_user(&new_line, line, size))
227			return -EFAULT;
228
229		if (new_line.clock_type != CLOCK_EXT &&
230		    new_line.clock_type != CLOCK_TXFROMRX &&
231		    new_line.clock_type != CLOCK_INT &&
232		    new_line.clock_type != CLOCK_TXINT)
233		return -EINVAL;	/* No such clock setting */
234
235		if (new_line.loopback != 0 && new_line.loopback != 1)
236			return -EINVAL;
237
238		memcpy(&port->settings, &new_line, size); /* Update settings */
239		pci200_set_iface(port);
240		sca_flush(port_to_card(port));
241		return 0;
242
243	default:
244		return hdlc_ioctl(dev, ifr, cmd);
245	}
246}
247
248
249
250static void pci200_pci_remove_one(struct pci_dev *pdev)
251{
252	int i;
253	card_t *card = pci_get_drvdata(pdev);
254
255	for (i = 0; i < 2; i++)
256		if (card->ports[i].card) {
257			struct net_device *dev = port_to_dev(&card->ports[i]);
258			unregister_hdlc_device(dev);
259		}
260
261	if (card->irq)
262		free_irq(card->irq, card);
263
264	if (card->rambase)
265		iounmap(card->rambase);
266	if (card->scabase)
267		iounmap(card->scabase);
268	if (card->plxbase)
269		iounmap(card->plxbase);
270
271	pci_release_regions(pdev);
272	pci_disable_device(pdev);
273	pci_set_drvdata(pdev, NULL);
274	if (card->ports[0].dev)
275		free_netdev(card->ports[0].dev);
276	if (card->ports[1].dev)
277		free_netdev(card->ports[1].dev);
278	kfree(card);
279}
280
281
282
283static int __devinit pci200_pci_init_one(struct pci_dev *pdev,
284					 const struct pci_device_id *ent)
285{
286	card_t *card;
287	u32 __iomem *p;
288	int i;
289	u32 ramsize;
290	u32 ramphys;		/* buffer memory base */
291	u32 scaphys;		/* SCA memory base */
292	u32 plxphys;		/* PLX registers memory base */
293
294	i = pci_enable_device(pdev);
295	if (i)
296		return i;
297
298	i = pci_request_regions(pdev, "PCI200SYN");
299	if (i) {
300		pci_disable_device(pdev);
301		return i;
302	}
303
304	card = kzalloc(sizeof(card_t), GFP_KERNEL);
305	if (card == NULL) {
306		printk(KERN_ERR "pci200syn: unable to allocate memory\n");
307		pci_release_regions(pdev);
308		pci_disable_device(pdev);
309		return -ENOBUFS;
310	}
311	pci_set_drvdata(pdev, card);
312	card->ports[0].dev = alloc_hdlcdev(&card->ports[0]);
313	card->ports[1].dev = alloc_hdlcdev(&card->ports[1]);
314	if (!card->ports[0].dev || !card->ports[1].dev) {
315		printk(KERN_ERR "pci200syn: unable to allocate memory\n");
316		pci200_pci_remove_one(pdev);
317		return -ENOMEM;
318	}
319
320	if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE ||
321	    pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE ||
322	    pci_resource_len(pdev, 3) < 16384) {
323		printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n");
324		pci200_pci_remove_one(pdev);
325		return -EFAULT;
326	}
327
328	plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK;
329	card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE);
330
331	scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK;
332	card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE);
333
334	ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK;
335	card->rambase = pci_ioremap_bar(pdev, 3);
336
337	if (card->plxbase == NULL ||
338	    card->scabase == NULL ||
339	    card->rambase == NULL) {
340		printk(KERN_ERR "pci200syn: ioremap() failed\n");
341		pci200_pci_remove_one(pdev);
342		return -EFAULT;
343	}
344
345	/* Reset PLX */
346	p = &card->plxbase->init_ctrl;
347	writel(readl(p) | 0x40000000, p);
348	readl(p);		/* Flush the write - do not use sca_flush */
349	udelay(1);
350
351	writel(readl(p) & ~0x40000000, p);
352	readl(p);		/* Flush the write - do not use sca_flush */
353	udelay(1);
354
355	ramsize = sca_detect_ram(card, card->rambase,
356				 pci_resource_len(pdev, 3));
357
358	/* number of TX + RX buffers for one port - this is dual port card */
359	i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU));
360	card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS);
361	card->rx_ring_buffers = i - card->tx_ring_buffers;
362
363	card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers +
364						    card->rx_ring_buffers);
365
366	printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +"
367	       " %u RX packets rings\n", ramsize / 1024, ramphys,
368	       pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers);
369
370	if (pdev->subsystem_device == PCI_DEVICE_ID_PLX_9050) {
371		printk(KERN_ERR "Detected PCI200SYN card with old "
372		       "configuration data.\n");
373		printk(KERN_ERR "See <http://www.kernel.org/pub/"
374		       "linux/utils/net/hdlc/pci200syn/> for update.\n");
375		printk(KERN_ERR "The card will stop working with"
376		       " future versions of Linux if not updated.\n");
377	}
378
379	if (card->tx_ring_buffers < 1) {
380		printk(KERN_ERR "pci200syn: RAM test failed\n");
381		pci200_pci_remove_one(pdev);
382		return -EFAULT;
383	}
384
385	/* Enable interrupts on the PCI bridge */
386	p = &card->plxbase->intr_ctrl_stat;
387	writew(readw(p) | 0x0040, p);
388
389	/* Allocate IRQ */
390	if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, "pci200syn", card)) {
391		printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n",
392		       pdev->irq);
393		pci200_pci_remove_one(pdev);
394		return -EBUSY;
395	}
396	card->irq = pdev->irq;
397
398	sca_init(card, 0);
399
400	for (i = 0; i < 2; i++) {
401		port_t *port = &card->ports[i];
402		struct net_device *dev = port_to_dev(port);
403		hdlc_device *hdlc = dev_to_hdlc(dev);
404		port->phy_node = i;
405
406		spin_lock_init(&port->lock);
407		dev->irq = card->irq;
408		dev->mem_start = ramphys;
409		dev->mem_end = ramphys + ramsize - 1;
410		dev->tx_queue_len = 50;
411		dev->do_ioctl = pci200_ioctl;
412		dev->open = pci200_open;
413		dev->stop = pci200_close;
414		hdlc->attach = sca_attach;
415		hdlc->xmit = sca_xmit;
416		port->settings.clock_type = CLOCK_EXT;
417		port->card = card;
418		sca_init_port(port);
419		if (register_hdlc_device(dev)) {
420			printk(KERN_ERR "pci200syn: unable to register hdlc "
421			       "device\n");
422			port->card = NULL;
423			pci200_pci_remove_one(pdev);
424			return -ENOBUFS;
425		}
426
427		printk(KERN_INFO "%s: PCI200SYN node %d\n",
428		       dev->name, port->phy_node);
429	}
430
431	sca_flush(card);
432	return 0;
433}
434
435
436
437static struct pci_device_id pci200_pci_tbl[] __devinitdata = {
438	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
439	  PCI_DEVICE_ID_PLX_9050, 0, 0, 0 },
440	{ PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX,
441	  PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 },
442	{ 0, }
443};
444
445
446static struct pci_driver pci200_pci_driver = {
447	.name		= "PCI200SYN",
448	.id_table	= pci200_pci_tbl,
449	.probe		= pci200_pci_init_one,
450	.remove		= pci200_pci_remove_one,
451};
452
453
454static int __init pci200_init_module(void)
455{
456	if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) {
457		printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n");
458		return -EINVAL;
459	}
460	return pci_register_driver(&pci200_pci_driver);
461}
462
463
464
465static void __exit pci200_cleanup_module(void)
466{
467	pci_unregister_driver(&pci200_pci_driver);
468}
469
470MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
471MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver");
472MODULE_LICENSE("GPL v2");
473MODULE_DEVICE_TABLE(pci, pci200_pci_tbl);
474module_param(pci_clock_freq, int, 0444);
475MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz");
476module_init(pci200_init_module);
477module_exit(pci200_cleanup_module);
478