core.c revision a491a920ff5c22cc09700a2660f6eac55b1ce4c1
1/* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18#include <linux/module.h> 19#include <linux/firmware.h> 20 21#include "core.h" 22#include "mac.h" 23#include "htc.h" 24#include "hif.h" 25#include "wmi.h" 26#include "bmi.h" 27#include "debug.h" 28#include "htt.h" 29 30unsigned int ath10k_debug_mask; 31static bool uart_print; 32static unsigned int ath10k_p2p; 33module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 34module_param(uart_print, bool, 0644); 35module_param_named(p2p, ath10k_p2p, uint, 0644); 36MODULE_PARM_DESC(debug_mask, "Debugging mask"); 37MODULE_PARM_DESC(uart_print, "Uart target debugging"); 38MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); 39 40static const struct ath10k_hw_params ath10k_hw_params_list[] = { 41 { 42 .id = QCA988X_HW_2_0_VERSION, 43 .name = "qca988x hw2.0", 44 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 45 .fw = { 46 .dir = QCA988X_HW_2_0_FW_DIR, 47 .fw = QCA988X_HW_2_0_FW_FILE, 48 .otp = QCA988X_HW_2_0_OTP_FILE, 49 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 50 }, 51 }, 52}; 53 54static void ath10k_send_suspend_complete(struct ath10k *ar) 55{ 56 ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n"); 57 58 complete(&ar->target_suspend); 59} 60 61static int ath10k_init_configure_target(struct ath10k *ar) 62{ 63 u32 param_host; 64 int ret; 65 66 /* tell target which HTC version it is used*/ 67 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 68 HTC_PROTOCOL_VERSION); 69 if (ret) { 70 ath10k_err("settings HTC version failed\n"); 71 return ret; 72 } 73 74 /* set the firmware mode to STA/IBSS/AP */ 75 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 76 if (ret) { 77 ath10k_err("setting firmware mode (1/2) failed\n"); 78 return ret; 79 } 80 81 /* TODO following parameters need to be re-visited. */ 82 /* num_device */ 83 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 84 /* Firmware mode */ 85 /* FIXME: Why FW_MODE_AP ??.*/ 86 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 87 /* mac_addr_method */ 88 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 89 /* firmware_bridge */ 90 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 91 /* fwsubmode */ 92 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 93 94 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 95 if (ret) { 96 ath10k_err("setting firmware mode (2/2) failed\n"); 97 return ret; 98 } 99 100 /* We do all byte-swapping on the host */ 101 ret = ath10k_bmi_write32(ar, hi_be, 0); 102 if (ret) { 103 ath10k_err("setting host CPU BE mode failed\n"); 104 return ret; 105 } 106 107 /* FW descriptor/Data swap flags */ 108 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 109 110 if (ret) { 111 ath10k_err("setting FW data/desc swap flags failed\n"); 112 return ret; 113 } 114 115 return 0; 116} 117 118static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 119 const char *dir, 120 const char *file) 121{ 122 char filename[100]; 123 const struct firmware *fw; 124 int ret; 125 126 if (file == NULL) 127 return ERR_PTR(-ENOENT); 128 129 if (dir == NULL) 130 dir = "."; 131 132 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 133 ret = request_firmware(&fw, filename, ar->dev); 134 if (ret) 135 return ERR_PTR(ret); 136 137 return fw; 138} 139 140static int ath10k_push_board_ext_data(struct ath10k *ar) 141{ 142 u32 board_data_size = QCA988X_BOARD_DATA_SZ; 143 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ; 144 u32 board_ext_data_addr; 145 int ret; 146 147 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 148 if (ret) { 149 ath10k_err("could not read board ext data addr (%d)\n", ret); 150 return ret; 151 } 152 153 ath10k_dbg(ATH10K_DBG_BOOT, 154 "boot push board extended data addr 0x%x\n", 155 board_ext_data_addr); 156 157 if (board_ext_data_addr == 0) 158 return 0; 159 160 if (ar->board_len != (board_data_size + board_ext_data_size)) { 161 ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n", 162 ar->board_len, board_data_size, board_ext_data_size); 163 return -EINVAL; 164 } 165 166 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 167 ar->board_data + board_data_size, 168 board_ext_data_size); 169 if (ret) { 170 ath10k_err("could not write board ext data (%d)\n", ret); 171 return ret; 172 } 173 174 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 175 (board_ext_data_size << 16) | 1); 176 if (ret) { 177 ath10k_err("could not write board ext data bit (%d)\n", ret); 178 return ret; 179 } 180 181 return 0; 182} 183 184static int ath10k_download_board_data(struct ath10k *ar) 185{ 186 u32 board_data_size = QCA988X_BOARD_DATA_SZ; 187 u32 address; 188 int ret; 189 190 ret = ath10k_push_board_ext_data(ar); 191 if (ret) { 192 ath10k_err("could not push board ext data (%d)\n", ret); 193 goto exit; 194 } 195 196 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 197 if (ret) { 198 ath10k_err("could not read board data addr (%d)\n", ret); 199 goto exit; 200 } 201 202 ret = ath10k_bmi_write_memory(ar, address, ar->board_data, 203 min_t(u32, board_data_size, 204 ar->board_len)); 205 if (ret) { 206 ath10k_err("could not write board data (%d)\n", ret); 207 goto exit; 208 } 209 210 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 211 if (ret) { 212 ath10k_err("could not write board data bit (%d)\n", ret); 213 goto exit; 214 } 215 216exit: 217 return ret; 218} 219 220static int ath10k_download_and_run_otp(struct ath10k *ar) 221{ 222 u32 result, address = ar->hw_params.patch_load_addr; 223 int ret; 224 225 /* OTP is optional */ 226 227 if (!ar->otp_data || !ar->otp_len) { 228 ath10k_warn("Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", 229 ar->otp_data, ar->otp_len); 230 return 0; 231 } 232 233 ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 234 address, ar->otp_len); 235 236 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); 237 if (ret) { 238 ath10k_err("could not write otp (%d)\n", ret); 239 return ret; 240 } 241 242 ret = ath10k_bmi_execute(ar, address, 0, &result); 243 if (ret) { 244 ath10k_err("could not execute otp (%d)\n", ret); 245 return ret; 246 } 247 248 ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 249 250 if (result != 0) { 251 ath10k_err("otp calibration failed: %d", result); 252 return -EINVAL; 253 } 254 255 return 0; 256} 257 258static int ath10k_download_fw(struct ath10k *ar) 259{ 260 u32 address; 261 int ret; 262 263 address = ar->hw_params.patch_load_addr; 264 265 ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data, 266 ar->firmware_len); 267 if (ret) { 268 ath10k_err("could not write fw (%d)\n", ret); 269 goto exit; 270 } 271 272exit: 273 return ret; 274} 275 276static void ath10k_core_free_firmware_files(struct ath10k *ar) 277{ 278 if (ar->board && !IS_ERR(ar->board)) 279 release_firmware(ar->board); 280 281 if (ar->otp && !IS_ERR(ar->otp)) 282 release_firmware(ar->otp); 283 284 if (ar->firmware && !IS_ERR(ar->firmware)) 285 release_firmware(ar->firmware); 286 287 ar->board = NULL; 288 ar->board_data = NULL; 289 ar->board_len = 0; 290 291 ar->otp = NULL; 292 ar->otp_data = NULL; 293 ar->otp_len = 0; 294 295 ar->firmware = NULL; 296 ar->firmware_data = NULL; 297 ar->firmware_len = 0; 298} 299 300static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) 301{ 302 int ret = 0; 303 304 if (ar->hw_params.fw.fw == NULL) { 305 ath10k_err("firmware file not defined\n"); 306 return -EINVAL; 307 } 308 309 if (ar->hw_params.fw.board == NULL) { 310 ath10k_err("board data file not defined"); 311 return -EINVAL; 312 } 313 314 ar->board = ath10k_fetch_fw_file(ar, 315 ar->hw_params.fw.dir, 316 ar->hw_params.fw.board); 317 if (IS_ERR(ar->board)) { 318 ret = PTR_ERR(ar->board); 319 ath10k_err("could not fetch board data (%d)\n", ret); 320 goto err; 321 } 322 323 ar->board_data = ar->board->data; 324 ar->board_len = ar->board->size; 325 326 ar->firmware = ath10k_fetch_fw_file(ar, 327 ar->hw_params.fw.dir, 328 ar->hw_params.fw.fw); 329 if (IS_ERR(ar->firmware)) { 330 ret = PTR_ERR(ar->firmware); 331 ath10k_err("could not fetch firmware (%d)\n", ret); 332 goto err; 333 } 334 335 ar->firmware_data = ar->firmware->data; 336 ar->firmware_len = ar->firmware->size; 337 338 /* OTP may be undefined. If so, don't fetch it at all */ 339 if (ar->hw_params.fw.otp == NULL) 340 return 0; 341 342 ar->otp = ath10k_fetch_fw_file(ar, 343 ar->hw_params.fw.dir, 344 ar->hw_params.fw.otp); 345 if (IS_ERR(ar->otp)) { 346 ret = PTR_ERR(ar->otp); 347 ath10k_err("could not fetch otp (%d)\n", ret); 348 goto err; 349 } 350 351 ar->otp_data = ar->otp->data; 352 ar->otp_len = ar->otp->size; 353 354 return 0; 355 356err: 357 ath10k_core_free_firmware_files(ar); 358 return ret; 359} 360 361static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) 362{ 363 size_t magic_len, len, ie_len; 364 int ie_id, i, index, bit, ret; 365 struct ath10k_fw_ie *hdr; 366 const u8 *data; 367 __le32 *timestamp; 368 369 /* first fetch the firmware file (firmware-*.bin) */ 370 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); 371 if (IS_ERR(ar->firmware)) { 372 ath10k_err("could not fetch firmware file '%s/%s': %ld\n", 373 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); 374 return PTR_ERR(ar->firmware); 375 } 376 377 data = ar->firmware->data; 378 len = ar->firmware->size; 379 380 /* magic also includes the null byte, check that as well */ 381 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 382 383 if (len < magic_len) { 384 ath10k_err("firmware file '%s/%s' too small to contain magic: %zu\n", 385 ar->hw_params.fw.dir, name, len); 386 ret = -EINVAL; 387 goto err; 388 } 389 390 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 391 ath10k_err("invalid firmware magic\n"); 392 ret = -EINVAL; 393 goto err; 394 } 395 396 /* jump over the padding */ 397 magic_len = ALIGN(magic_len, 4); 398 399 len -= magic_len; 400 data += magic_len; 401 402 /* loop elements */ 403 while (len > sizeof(struct ath10k_fw_ie)) { 404 hdr = (struct ath10k_fw_ie *)data; 405 406 ie_id = le32_to_cpu(hdr->id); 407 ie_len = le32_to_cpu(hdr->len); 408 409 len -= sizeof(*hdr); 410 data += sizeof(*hdr); 411 412 if (len < ie_len) { 413 ath10k_err("invalid length for FW IE %d (%zu < %zu)\n", 414 ie_id, len, ie_len); 415 ret = -EINVAL; 416 goto err; 417 } 418 419 switch (ie_id) { 420 case ATH10K_FW_IE_FW_VERSION: 421 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) 422 break; 423 424 memcpy(ar->hw->wiphy->fw_version, data, ie_len); 425 ar->hw->wiphy->fw_version[ie_len] = '\0'; 426 427 ath10k_dbg(ATH10K_DBG_BOOT, 428 "found fw version %s\n", 429 ar->hw->wiphy->fw_version); 430 break; 431 case ATH10K_FW_IE_TIMESTAMP: 432 if (ie_len != sizeof(u32)) 433 break; 434 435 timestamp = (__le32 *)data; 436 437 ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n", 438 le32_to_cpup(timestamp)); 439 break; 440 case ATH10K_FW_IE_FEATURES: 441 ath10k_dbg(ATH10K_DBG_BOOT, 442 "found firmware features ie (%zd B)\n", 443 ie_len); 444 445 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 446 index = i / 8; 447 bit = i % 8; 448 449 if (index == ie_len) 450 break; 451 452 if (data[index] & (1 << bit)) { 453 ath10k_dbg(ATH10K_DBG_BOOT, 454 "Enabling feature bit: %i\n", 455 i); 456 __set_bit(i, ar->fw_features); 457 } 458 } 459 460 ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "", 461 ar->fw_features, 462 sizeof(ar->fw_features)); 463 break; 464 case ATH10K_FW_IE_FW_IMAGE: 465 ath10k_dbg(ATH10K_DBG_BOOT, 466 "found fw image ie (%zd B)\n", 467 ie_len); 468 469 ar->firmware_data = data; 470 ar->firmware_len = ie_len; 471 472 break; 473 case ATH10K_FW_IE_OTP_IMAGE: 474 ath10k_dbg(ATH10K_DBG_BOOT, 475 "found otp image ie (%zd B)\n", 476 ie_len); 477 478 ar->otp_data = data; 479 ar->otp_len = ie_len; 480 481 break; 482 default: 483 ath10k_warn("Unknown FW IE: %u\n", 484 le32_to_cpu(hdr->id)); 485 break; 486 } 487 488 /* jump over the padding */ 489 ie_len = ALIGN(ie_len, 4); 490 491 len -= ie_len; 492 data += ie_len; 493 } 494 495 if (!ar->firmware_data || !ar->firmware_len) { 496 ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 497 ar->hw_params.fw.dir, name); 498 ret = -ENOMEDIUM; 499 goto err; 500 } 501 502 /* now fetch the board file */ 503 if (ar->hw_params.fw.board == NULL) { 504 ath10k_err("board data file not defined"); 505 ret = -EINVAL; 506 goto err; 507 } 508 509 ar->board = ath10k_fetch_fw_file(ar, 510 ar->hw_params.fw.dir, 511 ar->hw_params.fw.board); 512 if (IS_ERR(ar->board)) { 513 ret = PTR_ERR(ar->board); 514 ath10k_err("could not fetch board data '%s/%s' (%d)\n", 515 ar->hw_params.fw.dir, ar->hw_params.fw.board, 516 ret); 517 goto err; 518 } 519 520 ar->board_data = ar->board->data; 521 ar->board_len = ar->board->size; 522 523 return 0; 524 525err: 526 ath10k_core_free_firmware_files(ar); 527 return ret; 528} 529 530static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 531{ 532 int ret; 533 534 ar->fw_api = 2; 535 ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 536 537 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); 538 if (ret == 0) 539 goto success; 540 541 ar->fw_api = 1; 542 ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 543 544 ret = ath10k_core_fetch_firmware_api_1(ar); 545 if (ret) 546 return ret; 547 548success: 549 ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 550 551 return 0; 552} 553 554static int ath10k_init_download_firmware(struct ath10k *ar) 555{ 556 int ret; 557 558 ret = ath10k_download_board_data(ar); 559 if (ret) { 560 ath10k_err("failed to download board data: %d\n", ret); 561 return ret; 562 } 563 564 ret = ath10k_download_and_run_otp(ar); 565 if (ret) { 566 ath10k_err("failed to run otp: %d\n", ret); 567 return ret; 568 } 569 570 ret = ath10k_download_fw(ar); 571 if (ret) { 572 ath10k_err("failed to download firmware: %d\n", ret); 573 return ret; 574 } 575 576 return ret; 577} 578 579static int ath10k_init_uart(struct ath10k *ar) 580{ 581 int ret; 582 583 /* 584 * Explicitly setting UART prints to zero as target turns it on 585 * based on scratch registers. 586 */ 587 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 588 if (ret) { 589 ath10k_warn("could not disable UART prints (%d)\n", ret); 590 return ret; 591 } 592 593 if (!uart_print) 594 return 0; 595 596 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); 597 if (ret) { 598 ath10k_warn("could not enable UART prints (%d)\n", ret); 599 return ret; 600 } 601 602 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 603 if (ret) { 604 ath10k_warn("could not enable UART prints (%d)\n", ret); 605 return ret; 606 } 607 608 /* Set the UART baud rate to 19200. */ 609 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 610 if (ret) { 611 ath10k_warn("could not set the baud rate (%d)\n", ret); 612 return ret; 613 } 614 615 ath10k_info("UART prints enabled\n"); 616 return 0; 617} 618 619static int ath10k_init_hw_params(struct ath10k *ar) 620{ 621 const struct ath10k_hw_params *uninitialized_var(hw_params); 622 int i; 623 624 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 625 hw_params = &ath10k_hw_params_list[i]; 626 627 if (hw_params->id == ar->target_version) 628 break; 629 } 630 631 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 632 ath10k_err("Unsupported hardware version: 0x%x\n", 633 ar->target_version); 634 return -EINVAL; 635 } 636 637 ar->hw_params = *hw_params; 638 639 ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 640 ar->hw_params.name, ar->target_version); 641 642 return 0; 643} 644 645static void ath10k_core_restart(struct work_struct *work) 646{ 647 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 648 649 mutex_lock(&ar->conf_mutex); 650 651 switch (ar->state) { 652 case ATH10K_STATE_ON: 653 ar->state = ATH10K_STATE_RESTARTING; 654 del_timer_sync(&ar->scan.timeout); 655 ath10k_reset_scan((unsigned long)ar); 656 ieee80211_restart_hw(ar->hw); 657 break; 658 case ATH10K_STATE_OFF: 659 /* this can happen if driver is being unloaded 660 * or if the crash happens during FW probing */ 661 ath10k_warn("cannot restart a device that hasn't been started\n"); 662 break; 663 case ATH10K_STATE_RESTARTING: 664 /* hw restart might be requested from multiple places */ 665 break; 666 case ATH10K_STATE_RESTARTED: 667 ar->state = ATH10K_STATE_WEDGED; 668 /* fall through */ 669 case ATH10K_STATE_WEDGED: 670 ath10k_warn("device is wedged, will not restart\n"); 671 break; 672 } 673 674 mutex_unlock(&ar->conf_mutex); 675} 676 677int ath10k_core_start(struct ath10k *ar) 678{ 679 int status; 680 681 lockdep_assert_held(&ar->conf_mutex); 682 683 ath10k_bmi_start(ar); 684 685 if (ath10k_init_configure_target(ar)) { 686 status = -EINVAL; 687 goto err; 688 } 689 690 status = ath10k_init_download_firmware(ar); 691 if (status) 692 goto err; 693 694 status = ath10k_init_uart(ar); 695 if (status) 696 goto err; 697 698 ar->htc.htc_ops.target_send_suspend_complete = 699 ath10k_send_suspend_complete; 700 701 status = ath10k_htc_init(ar); 702 if (status) { 703 ath10k_err("could not init HTC (%d)\n", status); 704 goto err; 705 } 706 707 status = ath10k_bmi_done(ar); 708 if (status) 709 goto err; 710 711 status = ath10k_wmi_attach(ar); 712 if (status) { 713 ath10k_err("WMI attach failed: %d\n", status); 714 goto err; 715 } 716 717 status = ath10k_htt_init(ar); 718 if (status) { 719 ath10k_err("failed to init htt: %d\n", status); 720 goto err_wmi_detach; 721 } 722 723 status = ath10k_htt_tx_alloc(&ar->htt); 724 if (status) { 725 ath10k_err("failed to alloc htt tx: %d\n", status); 726 goto err_wmi_detach; 727 } 728 729 status = ath10k_htt_rx_alloc(&ar->htt); 730 if (status) { 731 ath10k_err("failed to alloc htt rx: %d\n", status); 732 goto err_htt_tx_detach; 733 } 734 735 status = ath10k_hif_start(ar); 736 if (status) { 737 ath10k_err("could not start HIF: %d\n", status); 738 goto err_htt_rx_detach; 739 } 740 741 status = ath10k_htc_wait_target(&ar->htc); 742 if (status) { 743 ath10k_err("failed to connect to HTC: %d\n", status); 744 goto err_hif_stop; 745 } 746 747 status = ath10k_htt_connect(&ar->htt); 748 if (status) { 749 ath10k_err("failed to connect htt (%d)\n", status); 750 goto err_hif_stop; 751 } 752 753 status = ath10k_wmi_connect(ar); 754 if (status) { 755 ath10k_err("could not connect wmi: %d\n", status); 756 goto err_hif_stop; 757 } 758 759 status = ath10k_htc_start(&ar->htc); 760 if (status) { 761 ath10k_err("failed to start htc: %d\n", status); 762 goto err_hif_stop; 763 } 764 765 status = ath10k_wmi_wait_for_service_ready(ar); 766 if (status <= 0) { 767 ath10k_warn("wmi service ready event not received"); 768 status = -ETIMEDOUT; 769 goto err_htc_stop; 770 } 771 772 ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n", 773 ar->hw->wiphy->fw_version); 774 775 status = ath10k_wmi_cmd_init(ar); 776 if (status) { 777 ath10k_err("could not send WMI init command (%d)\n", status); 778 goto err_htc_stop; 779 } 780 781 status = ath10k_wmi_wait_for_unified_ready(ar); 782 if (status <= 0) { 783 ath10k_err("wmi unified ready event not received\n"); 784 status = -ETIMEDOUT; 785 goto err_htc_stop; 786 } 787 788 status = ath10k_htt_setup(&ar->htt); 789 if (status) { 790 ath10k_err("failed to setup htt: %d\n", status); 791 goto err_htc_stop; 792 } 793 794 status = ath10k_debug_start(ar); 795 if (status) 796 goto err_htc_stop; 797 798 ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1; 799 INIT_LIST_HEAD(&ar->arvifs); 800 801 if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags)) { 802 ath10k_info("%s (0x%08x, 0x%08x) fw %s api %d htt %d.%d\n", 803 ar->hw_params.name, 804 ar->target_version, 805 ar->chip_id, 806 ar->hw->wiphy->fw_version, 807 ar->fw_api, 808 ar->htt.target_version_major, 809 ar->htt.target_version_minor); 810 ath10k_info("debug %d debugfs %d tracing %d dfs %d\n", 811 config_enabled(CONFIG_ATH10K_DEBUG), 812 config_enabled(CONFIG_ATH10K_DEBUGFS), 813 config_enabled(CONFIG_ATH10K_TRACING), 814 config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)); 815 } 816 817 __set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags); 818 819 return 0; 820 821err_htc_stop: 822 ath10k_htc_stop(&ar->htc); 823err_hif_stop: 824 ath10k_hif_stop(ar); 825err_htt_rx_detach: 826 ath10k_htt_rx_free(&ar->htt); 827err_htt_tx_detach: 828 ath10k_htt_tx_free(&ar->htt); 829err_wmi_detach: 830 ath10k_wmi_detach(ar); 831err: 832 return status; 833} 834EXPORT_SYMBOL(ath10k_core_start); 835 836int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 837{ 838 int ret; 839 840 reinit_completion(&ar->target_suspend); 841 842 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 843 if (ret) { 844 ath10k_warn("could not suspend target (%d)\n", ret); 845 return ret; 846 } 847 848 ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 849 850 if (ret == 0) { 851 ath10k_warn("suspend timed out - target pause event never came\n"); 852 return -ETIMEDOUT; 853 } 854 855 return 0; 856} 857 858void ath10k_core_stop(struct ath10k *ar) 859{ 860 lockdep_assert_held(&ar->conf_mutex); 861 862 /* try to suspend target */ 863 if (ar->state != ATH10K_STATE_RESTARTING) 864 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 865 866 ath10k_debug_stop(ar); 867 ath10k_htc_stop(&ar->htc); 868 ath10k_hif_stop(ar); 869 ath10k_htt_tx_free(&ar->htt); 870 ath10k_htt_rx_free(&ar->htt); 871 ath10k_wmi_detach(ar); 872} 873EXPORT_SYMBOL(ath10k_core_stop); 874 875/* mac80211 manages fw/hw initialization through start/stop hooks. However in 876 * order to know what hw capabilities should be advertised to mac80211 it is 877 * necessary to load the firmware (and tear it down immediately since start 878 * hook will try to init it again) before registering */ 879static int ath10k_core_probe_fw(struct ath10k *ar) 880{ 881 struct bmi_target_info target_info; 882 int ret = 0; 883 884 ret = ath10k_hif_power_up(ar); 885 if (ret) { 886 ath10k_err("could not start pci hif (%d)\n", ret); 887 return ret; 888 } 889 890 memset(&target_info, 0, sizeof(target_info)); 891 ret = ath10k_bmi_get_target_info(ar, &target_info); 892 if (ret) { 893 ath10k_err("could not get target info (%d)\n", ret); 894 ath10k_hif_power_down(ar); 895 return ret; 896 } 897 898 ar->target_version = target_info.version; 899 ar->hw->wiphy->hw_version = target_info.version; 900 901 ret = ath10k_init_hw_params(ar); 902 if (ret) { 903 ath10k_err("could not get hw params (%d)\n", ret); 904 ath10k_hif_power_down(ar); 905 return ret; 906 } 907 908 ret = ath10k_core_fetch_firmware_files(ar); 909 if (ret) { 910 ath10k_err("could not fetch firmware files (%d)\n", ret); 911 ath10k_hif_power_down(ar); 912 return ret; 913 } 914 915 mutex_lock(&ar->conf_mutex); 916 917 ret = ath10k_core_start(ar); 918 if (ret) { 919 ath10k_err("could not init core (%d)\n", ret); 920 ath10k_core_free_firmware_files(ar); 921 ath10k_hif_power_down(ar); 922 mutex_unlock(&ar->conf_mutex); 923 return ret; 924 } 925 926 ath10k_core_stop(ar); 927 928 mutex_unlock(&ar->conf_mutex); 929 930 ath10k_hif_power_down(ar); 931 return 0; 932} 933 934static int ath10k_core_check_chip_id(struct ath10k *ar) 935{ 936 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV); 937 938 ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n", 939 ar->chip_id, hw_revision); 940 941 /* Check that we are not using hw1.0 (some of them have same pci id 942 * as hw2.0) before doing anything else as ath10k crashes horribly 943 * due to missing hw1.0 workarounds. */ 944 switch (hw_revision) { 945 case QCA988X_HW_1_0_CHIP_ID_REV: 946 ath10k_err("ERROR: qca988x hw1.0 is not supported\n"); 947 return -EOPNOTSUPP; 948 949 case QCA988X_HW_2_0_CHIP_ID_REV: 950 /* known hardware revision, continue normally */ 951 return 0; 952 953 default: 954 ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n", 955 ar->chip_id); 956 return 0; 957 } 958 959 return 0; 960} 961 962static void ath10k_core_register_work(struct work_struct *work) 963{ 964 struct ath10k *ar = container_of(work, struct ath10k, register_work); 965 int status; 966 967 status = ath10k_core_probe_fw(ar); 968 if (status) { 969 ath10k_err("could not probe fw (%d)\n", status); 970 goto err; 971 } 972 973 status = ath10k_mac_register(ar); 974 if (status) { 975 ath10k_err("could not register to mac80211 (%d)\n", status); 976 goto err_release_fw; 977 } 978 979 status = ath10k_debug_create(ar); 980 if (status) { 981 ath10k_err("unable to initialize debugfs\n"); 982 goto err_unregister_mac; 983 } 984 985 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 986 return; 987 988err_unregister_mac: 989 ath10k_mac_unregister(ar); 990err_release_fw: 991 ath10k_core_free_firmware_files(ar); 992err: 993 /* TODO: It's probably a good idea to release device from the driver 994 * but calling device_release_driver() here will cause a deadlock. 995 */ 996 return; 997} 998 999int ath10k_core_register(struct ath10k *ar, u32 chip_id) 1000{ 1001 int status; 1002 1003 ar->chip_id = chip_id; 1004 1005 status = ath10k_core_check_chip_id(ar); 1006 if (status) { 1007 ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id); 1008 return status; 1009 } 1010 1011 queue_work(ar->workqueue, &ar->register_work); 1012 1013 return 0; 1014} 1015EXPORT_SYMBOL(ath10k_core_register); 1016 1017void ath10k_core_unregister(struct ath10k *ar) 1018{ 1019 cancel_work_sync(&ar->register_work); 1020 1021 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 1022 return; 1023 1024 /* We must unregister from mac80211 before we stop HTC and HIF. 1025 * Otherwise we will fail to submit commands to FW and mac80211 will be 1026 * unhappy about callback failures. */ 1027 ath10k_mac_unregister(ar); 1028 1029 ath10k_core_free_firmware_files(ar); 1030 1031 ath10k_debug_destroy(ar); 1032} 1033EXPORT_SYMBOL(ath10k_core_unregister); 1034 1035struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, 1036 const struct ath10k_hif_ops *hif_ops) 1037{ 1038 struct ath10k *ar; 1039 1040 ar = ath10k_mac_create(); 1041 if (!ar) 1042 return NULL; 1043 1044 ar->ath_common.priv = ar; 1045 ar->ath_common.hw = ar->hw; 1046 1047 ar->p2p = !!ath10k_p2p; 1048 ar->dev = dev; 1049 1050 ar->hif.priv = hif_priv; 1051 ar->hif.ops = hif_ops; 1052 1053 init_completion(&ar->scan.started); 1054 init_completion(&ar->scan.completed); 1055 init_completion(&ar->scan.on_channel); 1056 init_completion(&ar->target_suspend); 1057 1058 init_completion(&ar->install_key_done); 1059 init_completion(&ar->vdev_setup_done); 1060 1061 setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar); 1062 1063 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 1064 if (!ar->workqueue) 1065 goto err_wq; 1066 1067 mutex_init(&ar->conf_mutex); 1068 spin_lock_init(&ar->data_lock); 1069 1070 INIT_LIST_HEAD(&ar->peers); 1071 init_waitqueue_head(&ar->peer_mapping_wq); 1072 1073 init_completion(&ar->offchan_tx_completed); 1074 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 1075 skb_queue_head_init(&ar->offchan_tx_queue); 1076 1077 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 1078 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 1079 1080 INIT_WORK(&ar->register_work, ath10k_core_register_work); 1081 INIT_WORK(&ar->restart_work, ath10k_core_restart); 1082 1083 return ar; 1084 1085err_wq: 1086 ath10k_mac_destroy(ar); 1087 return NULL; 1088} 1089EXPORT_SYMBOL(ath10k_core_create); 1090 1091void ath10k_core_destroy(struct ath10k *ar) 1092{ 1093 flush_workqueue(ar->workqueue); 1094 destroy_workqueue(ar->workqueue); 1095 1096 ath10k_mac_destroy(ar); 1097} 1098EXPORT_SYMBOL(ath10k_core_destroy); 1099 1100MODULE_AUTHOR("Qualcomm Atheros"); 1101MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); 1102MODULE_LICENSE("Dual BSD/GPL"); 1103