core.c revision c508671dd589e75c0d5092a0a3c15d0375d3ce48
1/*
2 * Copyright (c) 2005-2011 Atheros Communications Inc.
3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 */
17
18#include <linux/module.h>
19#include <linux/firmware.h>
20
21#include "core.h"
22#include "mac.h"
23#include "htc.h"
24#include "hif.h"
25#include "wmi.h"
26#include "bmi.h"
27#include "debug.h"
28#include "htt.h"
29
30unsigned int ath10k_debug_mask;
31static bool uart_print;
32static unsigned int ath10k_p2p;
33module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
34module_param(uart_print, bool, 0644);
35module_param_named(p2p, ath10k_p2p, uint, 0644);
36MODULE_PARM_DESC(debug_mask, "Debugging mask");
37MODULE_PARM_DESC(uart_print, "Uart target debugging");
38MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
39
40static const struct ath10k_hw_params ath10k_hw_params_list[] = {
41	{
42		.id = QCA988X_HW_2_0_VERSION,
43		.name = "qca988x hw2.0",
44		.patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
45		.fw = {
46			.dir = QCA988X_HW_2_0_FW_DIR,
47			.fw = QCA988X_HW_2_0_FW_FILE,
48			.otp = QCA988X_HW_2_0_OTP_FILE,
49			.board = QCA988X_HW_2_0_BOARD_DATA_FILE,
50		},
51	},
52};
53
54static void ath10k_send_suspend_complete(struct ath10k *ar)
55{
56	ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
57
58	complete(&ar->target_suspend);
59}
60
61static int ath10k_init_connect_htc(struct ath10k *ar)
62{
63	int status;
64
65	status = ath10k_wmi_connect_htc_service(ar);
66	if (status)
67		goto conn_fail;
68
69	/* Start HTC */
70	status = ath10k_htc_start(&ar->htc);
71	if (status)
72		goto conn_fail;
73
74	/* Wait for WMI event to be ready */
75	status = ath10k_wmi_wait_for_service_ready(ar);
76	if (status <= 0) {
77		ath10k_warn("wmi service ready event not received");
78		status = -ETIMEDOUT;
79		goto timeout;
80	}
81
82	ath10k_dbg(ATH10K_DBG_BOOT, "boot wmi ready\n");
83	return 0;
84
85timeout:
86	ath10k_htc_stop(&ar->htc);
87conn_fail:
88	return status;
89}
90
91static int ath10k_init_configure_target(struct ath10k *ar)
92{
93	u32 param_host;
94	int ret;
95
96	/* tell target which HTC version it is used*/
97	ret = ath10k_bmi_write32(ar, hi_app_host_interest,
98				 HTC_PROTOCOL_VERSION);
99	if (ret) {
100		ath10k_err("settings HTC version failed\n");
101		return ret;
102	}
103
104	/* set the firmware mode to STA/IBSS/AP */
105	ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
106	if (ret) {
107		ath10k_err("setting firmware mode (1/2) failed\n");
108		return ret;
109	}
110
111	/* TODO following parameters need to be re-visited. */
112	/* num_device */
113	param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
114	/* Firmware mode */
115	/* FIXME: Why FW_MODE_AP ??.*/
116	param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
117	/* mac_addr_method */
118	param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
119	/* firmware_bridge */
120	param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
121	/* fwsubmode */
122	param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
123
124	ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
125	if (ret) {
126		ath10k_err("setting firmware mode (2/2) failed\n");
127		return ret;
128	}
129
130	/* We do all byte-swapping on the host */
131	ret = ath10k_bmi_write32(ar, hi_be, 0);
132	if (ret) {
133		ath10k_err("setting host CPU BE mode failed\n");
134		return ret;
135	}
136
137	/* FW descriptor/Data swap flags */
138	ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
139
140	if (ret) {
141		ath10k_err("setting FW data/desc swap flags failed\n");
142		return ret;
143	}
144
145	return 0;
146}
147
148static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
149						   const char *dir,
150						   const char *file)
151{
152	char filename[100];
153	const struct firmware *fw;
154	int ret;
155
156	if (file == NULL)
157		return ERR_PTR(-ENOENT);
158
159	if (dir == NULL)
160		dir = ".";
161
162	snprintf(filename, sizeof(filename), "%s/%s", dir, file);
163	ret = request_firmware(&fw, filename, ar->dev);
164	if (ret)
165		return ERR_PTR(ret);
166
167	return fw;
168}
169
170static int ath10k_push_board_ext_data(struct ath10k *ar)
171{
172	u32 board_data_size = QCA988X_BOARD_DATA_SZ;
173	u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
174	u32 board_ext_data_addr;
175	int ret;
176
177	ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
178	if (ret) {
179		ath10k_err("could not read board ext data addr (%d)\n", ret);
180		return ret;
181	}
182
183	ath10k_dbg(ATH10K_DBG_BOOT,
184		   "boot push board extended data addr 0x%x\n",
185		   board_ext_data_addr);
186
187	if (board_ext_data_addr == 0)
188		return 0;
189
190	if (ar->board_len != (board_data_size + board_ext_data_size)) {
191		ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
192			   ar->board_len, board_data_size, board_ext_data_size);
193		return -EINVAL;
194	}
195
196	ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
197				      ar->board_data + board_data_size,
198				      board_ext_data_size);
199	if (ret) {
200		ath10k_err("could not write board ext data (%d)\n", ret);
201		return ret;
202	}
203
204	ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
205				 (board_ext_data_size << 16) | 1);
206	if (ret) {
207		ath10k_err("could not write board ext data bit (%d)\n", ret);
208		return ret;
209	}
210
211	return 0;
212}
213
214static int ath10k_download_board_data(struct ath10k *ar)
215{
216	u32 board_data_size = QCA988X_BOARD_DATA_SZ;
217	u32 address;
218	int ret;
219
220	ret = ath10k_push_board_ext_data(ar);
221	if (ret) {
222		ath10k_err("could not push board ext data (%d)\n", ret);
223		goto exit;
224	}
225
226	ret = ath10k_bmi_read32(ar, hi_board_data, &address);
227	if (ret) {
228		ath10k_err("could not read board data addr (%d)\n", ret);
229		goto exit;
230	}
231
232	ret = ath10k_bmi_write_memory(ar, address, ar->board_data,
233				      min_t(u32, board_data_size,
234					    ar->board_len));
235	if (ret) {
236		ath10k_err("could not write board data (%d)\n", ret);
237		goto exit;
238	}
239
240	ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
241	if (ret) {
242		ath10k_err("could not write board data bit (%d)\n", ret);
243		goto exit;
244	}
245
246exit:
247	return ret;
248}
249
250static int ath10k_download_and_run_otp(struct ath10k *ar)
251{
252	u32 result, address = ar->hw_params.patch_load_addr;
253	int ret;
254
255	/* OTP is optional */
256
257	if (!ar->otp_data || !ar->otp_len) {
258		ath10k_warn("Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
259			    ar->otp_data, ar->otp_len);
260		return 0;
261	}
262
263	ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
264		   address, ar->otp_len);
265
266	ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
267	if (ret) {
268		ath10k_err("could not write otp (%d)\n", ret);
269		return ret;
270	}
271
272	ret = ath10k_bmi_execute(ar, address, 0, &result);
273	if (ret) {
274		ath10k_err("could not execute otp (%d)\n", ret);
275		return ret;
276	}
277
278	ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
279
280	if (result != 0) {
281		ath10k_err("otp calibration failed: %d", result);
282		return -EINVAL;
283	}
284
285	return 0;
286}
287
288static int ath10k_download_fw(struct ath10k *ar)
289{
290	u32 address;
291	int ret;
292
293	address = ar->hw_params.patch_load_addr;
294
295	ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data,
296				       ar->firmware_len);
297	if (ret) {
298		ath10k_err("could not write fw (%d)\n", ret);
299		goto exit;
300	}
301
302exit:
303	return ret;
304}
305
306static void ath10k_core_free_firmware_files(struct ath10k *ar)
307{
308	if (ar->board && !IS_ERR(ar->board))
309		release_firmware(ar->board);
310
311	if (ar->otp && !IS_ERR(ar->otp))
312		release_firmware(ar->otp);
313
314	if (ar->firmware && !IS_ERR(ar->firmware))
315		release_firmware(ar->firmware);
316
317	ar->board = NULL;
318	ar->board_data = NULL;
319	ar->board_len = 0;
320
321	ar->otp = NULL;
322	ar->otp_data = NULL;
323	ar->otp_len = 0;
324
325	ar->firmware = NULL;
326	ar->firmware_data = NULL;
327	ar->firmware_len = 0;
328}
329
330static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
331{
332	int ret = 0;
333
334	if (ar->hw_params.fw.fw == NULL) {
335		ath10k_err("firmware file not defined\n");
336		return -EINVAL;
337	}
338
339	if (ar->hw_params.fw.board == NULL) {
340		ath10k_err("board data file not defined");
341		return -EINVAL;
342	}
343
344	ar->board = ath10k_fetch_fw_file(ar,
345					 ar->hw_params.fw.dir,
346					 ar->hw_params.fw.board);
347	if (IS_ERR(ar->board)) {
348		ret = PTR_ERR(ar->board);
349		ath10k_err("could not fetch board data (%d)\n", ret);
350		goto err;
351	}
352
353	ar->board_data = ar->board->data;
354	ar->board_len = ar->board->size;
355
356	ar->firmware = ath10k_fetch_fw_file(ar,
357					    ar->hw_params.fw.dir,
358					    ar->hw_params.fw.fw);
359	if (IS_ERR(ar->firmware)) {
360		ret = PTR_ERR(ar->firmware);
361		ath10k_err("could not fetch firmware (%d)\n", ret);
362		goto err;
363	}
364
365	ar->firmware_data = ar->firmware->data;
366	ar->firmware_len = ar->firmware->size;
367
368	/* OTP may be undefined. If so, don't fetch it at all */
369	if (ar->hw_params.fw.otp == NULL)
370		return 0;
371
372	ar->otp = ath10k_fetch_fw_file(ar,
373				       ar->hw_params.fw.dir,
374				       ar->hw_params.fw.otp);
375	if (IS_ERR(ar->otp)) {
376		ret = PTR_ERR(ar->otp);
377		ath10k_err("could not fetch otp (%d)\n", ret);
378		goto err;
379	}
380
381	ar->otp_data = ar->otp->data;
382	ar->otp_len = ar->otp->size;
383
384	return 0;
385
386err:
387	ath10k_core_free_firmware_files(ar);
388	return ret;
389}
390
391static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
392{
393	size_t magic_len, len, ie_len;
394	int ie_id, i, index, bit, ret;
395	struct ath10k_fw_ie *hdr;
396	const u8 *data;
397	__le32 *timestamp;
398
399	/* first fetch the firmware file (firmware-*.bin) */
400	ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
401	if (IS_ERR(ar->firmware)) {
402		ath10k_err("could not fetch firmware file '%s/%s': %ld\n",
403			   ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
404		return PTR_ERR(ar->firmware);
405	}
406
407	data = ar->firmware->data;
408	len = ar->firmware->size;
409
410	/* magic also includes the null byte, check that as well */
411	magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
412
413	if (len < magic_len) {
414		ath10k_err("firmware file '%s/%s' too small to contain magic: %zu\n",
415			   ar->hw_params.fw.dir, name, len);
416		ret = -EINVAL;
417		goto err;
418	}
419
420	if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
421		ath10k_err("invalid firmware magic\n");
422		ret = -EINVAL;
423		goto err;
424	}
425
426	/* jump over the padding */
427	magic_len = ALIGN(magic_len, 4);
428
429	len -= magic_len;
430	data += magic_len;
431
432	/* loop elements */
433	while (len > sizeof(struct ath10k_fw_ie)) {
434		hdr = (struct ath10k_fw_ie *)data;
435
436		ie_id = le32_to_cpu(hdr->id);
437		ie_len = le32_to_cpu(hdr->len);
438
439		len -= sizeof(*hdr);
440		data += sizeof(*hdr);
441
442		if (len < ie_len) {
443			ath10k_err("invalid length for FW IE %d (%zu < %zu)\n",
444				   ie_id, len, ie_len);
445			ret = -EINVAL;
446			goto err;
447		}
448
449		switch (ie_id) {
450		case ATH10K_FW_IE_FW_VERSION:
451			if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
452				break;
453
454			memcpy(ar->hw->wiphy->fw_version, data, ie_len);
455			ar->hw->wiphy->fw_version[ie_len] = '\0';
456
457			ath10k_dbg(ATH10K_DBG_BOOT,
458				   "found fw version %s\n",
459				    ar->hw->wiphy->fw_version);
460			break;
461		case ATH10K_FW_IE_TIMESTAMP:
462			if (ie_len != sizeof(u32))
463				break;
464
465			timestamp = (__le32 *)data;
466
467			ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n",
468				   le32_to_cpup(timestamp));
469			break;
470		case ATH10K_FW_IE_FEATURES:
471			ath10k_dbg(ATH10K_DBG_BOOT,
472				   "found firmware features ie (%zd B)\n",
473				   ie_len);
474
475			for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
476				index = i / 8;
477				bit = i % 8;
478
479				if (index == ie_len)
480					break;
481
482				if (data[index] & (1 << bit)) {
483					ath10k_dbg(ATH10K_DBG_BOOT,
484						   "Enabling feature bit: %i\n",
485						   i);
486					__set_bit(i, ar->fw_features);
487				}
488			}
489
490			ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "",
491					ar->fw_features,
492					sizeof(ar->fw_features));
493			break;
494		case ATH10K_FW_IE_FW_IMAGE:
495			ath10k_dbg(ATH10K_DBG_BOOT,
496				   "found fw image ie (%zd B)\n",
497				   ie_len);
498
499			ar->firmware_data = data;
500			ar->firmware_len = ie_len;
501
502			break;
503		case ATH10K_FW_IE_OTP_IMAGE:
504			ath10k_dbg(ATH10K_DBG_BOOT,
505				   "found otp image ie (%zd B)\n",
506				   ie_len);
507
508			ar->otp_data = data;
509			ar->otp_len = ie_len;
510
511			break;
512		default:
513			ath10k_warn("Unknown FW IE: %u\n",
514				    le32_to_cpu(hdr->id));
515			break;
516		}
517
518		/* jump over the padding */
519		ie_len = ALIGN(ie_len, 4);
520
521		len -= ie_len;
522		data += ie_len;
523	}
524
525	if (!ar->firmware_data || !ar->firmware_len) {
526		ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
527			    ar->hw_params.fw.dir, name);
528		ret = -ENOMEDIUM;
529		goto err;
530	}
531
532	/* now fetch the board file */
533	if (ar->hw_params.fw.board == NULL) {
534		ath10k_err("board data file not defined");
535		ret = -EINVAL;
536		goto err;
537	}
538
539	ar->board = ath10k_fetch_fw_file(ar,
540					 ar->hw_params.fw.dir,
541					 ar->hw_params.fw.board);
542	if (IS_ERR(ar->board)) {
543		ret = PTR_ERR(ar->board);
544		ath10k_err("could not fetch board data '%s/%s' (%d)\n",
545			   ar->hw_params.fw.dir, ar->hw_params.fw.board,
546			   ret);
547		goto err;
548	}
549
550	ar->board_data = ar->board->data;
551	ar->board_len = ar->board->size;
552
553	return 0;
554
555err:
556	ath10k_core_free_firmware_files(ar);
557	return ret;
558}
559
560static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
561{
562	int ret;
563
564	ar->fw_api = 2;
565	ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
566
567	ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
568	if (ret == 0)
569		goto success;
570
571	ar->fw_api = 1;
572	ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
573
574	ret = ath10k_core_fetch_firmware_api_1(ar);
575	if (ret)
576		return ret;
577
578success:
579	ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
580
581	return 0;
582}
583
584static int ath10k_init_download_firmware(struct ath10k *ar)
585{
586	int ret;
587
588	ret = ath10k_download_board_data(ar);
589	if (ret) {
590		ath10k_err("failed to download board data: %d\n", ret);
591		return ret;
592	}
593
594	ret = ath10k_download_and_run_otp(ar);
595	if (ret) {
596		ath10k_err("failed to run otp: %d\n", ret);
597		return ret;
598	}
599
600	ret = ath10k_download_fw(ar);
601	if (ret) {
602		ath10k_err("failed to download firmware: %d\n", ret);
603		return ret;
604	}
605
606	return ret;
607}
608
609static int ath10k_init_uart(struct ath10k *ar)
610{
611	int ret;
612
613	/*
614	 * Explicitly setting UART prints to zero as target turns it on
615	 * based on scratch registers.
616	 */
617	ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
618	if (ret) {
619		ath10k_warn("could not disable UART prints (%d)\n", ret);
620		return ret;
621	}
622
623	if (!uart_print)
624		return 0;
625
626	ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
627	if (ret) {
628		ath10k_warn("could not enable UART prints (%d)\n", ret);
629		return ret;
630	}
631
632	ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
633	if (ret) {
634		ath10k_warn("could not enable UART prints (%d)\n", ret);
635		return ret;
636	}
637
638	/* Set the UART baud rate to 19200. */
639	ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
640	if (ret) {
641		ath10k_warn("could not set the baud rate (%d)\n", ret);
642		return ret;
643	}
644
645	ath10k_info("UART prints enabled\n");
646	return 0;
647}
648
649static int ath10k_init_hw_params(struct ath10k *ar)
650{
651	const struct ath10k_hw_params *uninitialized_var(hw_params);
652	int i;
653
654	for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
655		hw_params = &ath10k_hw_params_list[i];
656
657		if (hw_params->id == ar->target_version)
658			break;
659	}
660
661	if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
662		ath10k_err("Unsupported hardware version: 0x%x\n",
663			   ar->target_version);
664		return -EINVAL;
665	}
666
667	ar->hw_params = *hw_params;
668
669	ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
670		   ar->hw_params.name, ar->target_version);
671
672	return 0;
673}
674
675static void ath10k_core_restart(struct work_struct *work)
676{
677	struct ath10k *ar = container_of(work, struct ath10k, restart_work);
678
679	mutex_lock(&ar->conf_mutex);
680
681	switch (ar->state) {
682	case ATH10K_STATE_ON:
683		ath10k_halt(ar);
684		ar->state = ATH10K_STATE_RESTARTING;
685		ieee80211_restart_hw(ar->hw);
686		break;
687	case ATH10K_STATE_OFF:
688		/* this can happen if driver is being unloaded
689		 * or if the crash happens during FW probing */
690		ath10k_warn("cannot restart a device that hasn't been started\n");
691		break;
692	case ATH10K_STATE_RESTARTING:
693	case ATH10K_STATE_RESTARTED:
694		ar->state = ATH10K_STATE_WEDGED;
695		/* fall through */
696	case ATH10K_STATE_WEDGED:
697		ath10k_warn("device is wedged, will not restart\n");
698		break;
699	}
700
701	mutex_unlock(&ar->conf_mutex);
702}
703
704struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev,
705				  const struct ath10k_hif_ops *hif_ops)
706{
707	struct ath10k *ar;
708
709	ar = ath10k_mac_create();
710	if (!ar)
711		return NULL;
712
713	ar->ath_common.priv = ar;
714	ar->ath_common.hw = ar->hw;
715
716	ar->p2p = !!ath10k_p2p;
717	ar->dev = dev;
718
719	ar->hif.priv = hif_priv;
720	ar->hif.ops = hif_ops;
721
722	init_completion(&ar->scan.started);
723	init_completion(&ar->scan.completed);
724	init_completion(&ar->scan.on_channel);
725	init_completion(&ar->target_suspend);
726
727	init_completion(&ar->install_key_done);
728	init_completion(&ar->vdev_setup_done);
729
730	setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar);
731
732	ar->workqueue = create_singlethread_workqueue("ath10k_wq");
733	if (!ar->workqueue)
734		goto err_wq;
735
736	mutex_init(&ar->conf_mutex);
737	spin_lock_init(&ar->data_lock);
738
739	INIT_LIST_HEAD(&ar->peers);
740	init_waitqueue_head(&ar->peer_mapping_wq);
741
742	init_completion(&ar->offchan_tx_completed);
743	INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
744	skb_queue_head_init(&ar->offchan_tx_queue);
745
746	INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
747	skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
748
749	INIT_WORK(&ar->restart_work, ath10k_core_restart);
750
751	return ar;
752
753err_wq:
754	ath10k_mac_destroy(ar);
755	return NULL;
756}
757EXPORT_SYMBOL(ath10k_core_create);
758
759void ath10k_core_destroy(struct ath10k *ar)
760{
761	flush_workqueue(ar->workqueue);
762	destroy_workqueue(ar->workqueue);
763
764	ath10k_mac_destroy(ar);
765}
766EXPORT_SYMBOL(ath10k_core_destroy);
767
768int ath10k_core_start(struct ath10k *ar)
769{
770	int status;
771
772	lockdep_assert_held(&ar->conf_mutex);
773
774	ath10k_bmi_start(ar);
775
776	if (ath10k_init_configure_target(ar)) {
777		status = -EINVAL;
778		goto err;
779	}
780
781	status = ath10k_init_download_firmware(ar);
782	if (status)
783		goto err;
784
785	status = ath10k_init_uart(ar);
786	if (status)
787		goto err;
788
789	ar->htc.htc_ops.target_send_suspend_complete =
790		ath10k_send_suspend_complete;
791
792	status = ath10k_htc_init(ar);
793	if (status) {
794		ath10k_err("could not init HTC (%d)\n", status);
795		goto err;
796	}
797
798	status = ath10k_bmi_done(ar);
799	if (status)
800		goto err;
801
802	status = ath10k_wmi_attach(ar);
803	if (status) {
804		ath10k_err("WMI attach failed: %d\n", status);
805		goto err;
806	}
807
808	status = ath10k_hif_start(ar);
809	if (status) {
810		ath10k_err("could not start HIF: %d\n", status);
811		goto err_wmi_detach;
812	}
813
814	status = ath10k_htc_wait_target(&ar->htc);
815	if (status) {
816		ath10k_err("failed to connect to HTC: %d\n", status);
817		goto err_hif_stop;
818	}
819
820	status = ath10k_htt_attach(ar);
821	if (status) {
822		ath10k_err("could not attach htt (%d)\n", status);
823		goto err_hif_stop;
824	}
825
826	status = ath10k_init_connect_htc(ar);
827	if (status)
828		goto err_htt_detach;
829
830	ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n",
831		   ar->hw->wiphy->fw_version);
832
833	status = ath10k_wmi_cmd_init(ar);
834	if (status) {
835		ath10k_err("could not send WMI init command (%d)\n", status);
836		goto err_disconnect_htc;
837	}
838
839	status = ath10k_wmi_wait_for_unified_ready(ar);
840	if (status <= 0) {
841		ath10k_err("wmi unified ready event not received\n");
842		status = -ETIMEDOUT;
843		goto err_disconnect_htc;
844	}
845
846	status = ath10k_htt_attach_target(&ar->htt);
847	if (status)
848		goto err_disconnect_htc;
849
850	status = ath10k_debug_start(ar);
851	if (status)
852		goto err_disconnect_htc;
853
854	ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1;
855	INIT_LIST_HEAD(&ar->arvifs);
856
857	if (!test_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags))
858		ath10k_info("%s (0x%08x, 0x%08x) fw %s api %d htt %d.%d\n",
859			    ar->hw_params.name,
860			    ar->target_version,
861			    ar->chip_id,
862			    ar->hw->wiphy->fw_version,
863			    ar->fw_api,
864			    ar->htt.target_version_major,
865			    ar->htt.target_version_minor);
866
867	__set_bit(ATH10K_FLAG_FIRST_BOOT_DONE, &ar->dev_flags);
868
869	return 0;
870
871err_disconnect_htc:
872	ath10k_htc_stop(&ar->htc);
873err_htt_detach:
874	ath10k_htt_detach(&ar->htt);
875err_hif_stop:
876	ath10k_hif_stop(ar);
877err_wmi_detach:
878	ath10k_wmi_detach(ar);
879err:
880	return status;
881}
882EXPORT_SYMBOL(ath10k_core_start);
883
884int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
885{
886	int ret;
887
888	reinit_completion(&ar->target_suspend);
889
890	ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
891	if (ret) {
892		ath10k_warn("could not suspend target (%d)\n", ret);
893		return ret;
894	}
895
896	ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
897
898	if (ret == 0) {
899		ath10k_warn("suspend timed out - target pause event never came\n");
900		return -ETIMEDOUT;
901	}
902
903	return 0;
904}
905
906void ath10k_core_stop(struct ath10k *ar)
907{
908	lockdep_assert_held(&ar->conf_mutex);
909
910	/* try to suspend target */
911	ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
912	ath10k_debug_stop(ar);
913	ath10k_htc_stop(&ar->htc);
914	ath10k_htt_detach(&ar->htt);
915	ath10k_wmi_detach(ar);
916}
917EXPORT_SYMBOL(ath10k_core_stop);
918
919/* mac80211 manages fw/hw initialization through start/stop hooks. However in
920 * order to know what hw capabilities should be advertised to mac80211 it is
921 * necessary to load the firmware (and tear it down immediately since start
922 * hook will try to init it again) before registering */
923static int ath10k_core_probe_fw(struct ath10k *ar)
924{
925	struct bmi_target_info target_info;
926	int ret = 0;
927
928	ret = ath10k_hif_power_up(ar);
929	if (ret) {
930		ath10k_err("could not start pci hif (%d)\n", ret);
931		return ret;
932	}
933
934	memset(&target_info, 0, sizeof(target_info));
935	ret = ath10k_bmi_get_target_info(ar, &target_info);
936	if (ret) {
937		ath10k_err("could not get target info (%d)\n", ret);
938		ath10k_hif_power_down(ar);
939		return ret;
940	}
941
942	ar->target_version = target_info.version;
943	ar->hw->wiphy->hw_version = target_info.version;
944
945	ret = ath10k_init_hw_params(ar);
946	if (ret) {
947		ath10k_err("could not get hw params (%d)\n", ret);
948		ath10k_hif_power_down(ar);
949		return ret;
950	}
951
952	ret = ath10k_core_fetch_firmware_files(ar);
953	if (ret) {
954		ath10k_err("could not fetch firmware files (%d)\n", ret);
955		ath10k_hif_power_down(ar);
956		return ret;
957	}
958
959	mutex_lock(&ar->conf_mutex);
960
961	ret = ath10k_core_start(ar);
962	if (ret) {
963		ath10k_err("could not init core (%d)\n", ret);
964		ath10k_core_free_firmware_files(ar);
965		ath10k_hif_power_down(ar);
966		mutex_unlock(&ar->conf_mutex);
967		return ret;
968	}
969
970	ath10k_core_stop(ar);
971
972	mutex_unlock(&ar->conf_mutex);
973
974	ath10k_hif_power_down(ar);
975	return 0;
976}
977
978static int ath10k_core_check_chip_id(struct ath10k *ar)
979{
980	u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
981
982	ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
983		   ar->chip_id, hw_revision);
984
985	/* Check that we are not using hw1.0 (some of them have same pci id
986	 * as hw2.0) before doing anything else as ath10k crashes horribly
987	 * due to missing hw1.0 workarounds. */
988	switch (hw_revision) {
989	case QCA988X_HW_1_0_CHIP_ID_REV:
990		ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
991		return -EOPNOTSUPP;
992
993	case QCA988X_HW_2_0_CHIP_ID_REV:
994		/* known hardware revision, continue normally */
995		return 0;
996
997	default:
998		ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
999			    ar->chip_id);
1000		return 0;
1001	}
1002
1003	return 0;
1004}
1005
1006int ath10k_core_register(struct ath10k *ar, u32 chip_id)
1007{
1008	int status;
1009
1010	ar->chip_id = chip_id;
1011
1012	status = ath10k_core_check_chip_id(ar);
1013	if (status) {
1014		ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
1015		return status;
1016	}
1017
1018	status = ath10k_core_probe_fw(ar);
1019	if (status) {
1020		ath10k_err("could not probe fw (%d)\n", status);
1021		return status;
1022	}
1023
1024	status = ath10k_mac_register(ar);
1025	if (status) {
1026		ath10k_err("could not register to mac80211 (%d)\n", status);
1027		goto err_release_fw;
1028	}
1029
1030	status = ath10k_debug_create(ar);
1031	if (status) {
1032		ath10k_err("unable to initialize debugfs\n");
1033		goto err_unregister_mac;
1034	}
1035
1036	return 0;
1037
1038err_unregister_mac:
1039	ath10k_mac_unregister(ar);
1040err_release_fw:
1041	ath10k_core_free_firmware_files(ar);
1042	return status;
1043}
1044EXPORT_SYMBOL(ath10k_core_register);
1045
1046void ath10k_core_unregister(struct ath10k *ar)
1047{
1048	/* We must unregister from mac80211 before we stop HTC and HIF.
1049	 * Otherwise we will fail to submit commands to FW and mac80211 will be
1050	 * unhappy about callback failures. */
1051	ath10k_mac_unregister(ar);
1052
1053	ath10k_core_free_firmware_files(ar);
1054
1055	ath10k_debug_destroy(ar);
1056}
1057EXPORT_SYMBOL(ath10k_core_unregister);
1058
1059MODULE_AUTHOR("Qualcomm Atheros");
1060MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
1061MODULE_LICENSE("Dual BSD/GPL");
1062