core.c revision effea9688dae6ac1073b9f086903ddda8dda0b5a
1/* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18#include <linux/module.h> 19#include <linux/firmware.h> 20 21#include "core.h" 22#include "mac.h" 23#include "htc.h" 24#include "hif.h" 25#include "wmi.h" 26#include "bmi.h" 27#include "debug.h" 28#include "htt.h" 29 30unsigned int ath10k_debug_mask; 31static bool uart_print; 32static unsigned int ath10k_p2p; 33module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 34module_param(uart_print, bool, 0644); 35module_param_named(p2p, ath10k_p2p, uint, 0644); 36MODULE_PARM_DESC(debug_mask, "Debugging mask"); 37MODULE_PARM_DESC(uart_print, "Uart target debugging"); 38MODULE_PARM_DESC(p2p, "Enable ath10k P2P support"); 39 40static const struct ath10k_hw_params ath10k_hw_params_list[] = { 41 { 42 .id = QCA988X_HW_2_0_VERSION, 43 .name = "qca988x hw2.0", 44 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 45 .fw = { 46 .dir = QCA988X_HW_2_0_FW_DIR, 47 .fw = QCA988X_HW_2_0_FW_FILE, 48 .otp = QCA988X_HW_2_0_OTP_FILE, 49 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 50 }, 51 }, 52}; 53 54static void ath10k_send_suspend_complete(struct ath10k *ar) 55{ 56 ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n"); 57 58 ar->is_target_paused = true; 59 wake_up(&ar->event_queue); 60} 61 62static int ath10k_check_fw_version(struct ath10k *ar) 63{ 64 char version[32]; 65 66 if (ar->fw_version_major >= SUPPORTED_FW_MAJOR && 67 ar->fw_version_minor >= SUPPORTED_FW_MINOR && 68 ar->fw_version_release >= SUPPORTED_FW_RELEASE && 69 ar->fw_version_build >= SUPPORTED_FW_BUILD) 70 return 0; 71 72 snprintf(version, sizeof(version), "%u.%u.%u.%u", 73 SUPPORTED_FW_MAJOR, SUPPORTED_FW_MINOR, 74 SUPPORTED_FW_RELEASE, SUPPORTED_FW_BUILD); 75 76 ath10k_warn("WARNING: Firmware version %s is not officially supported.\n", 77 ar->hw->wiphy->fw_version); 78 ath10k_warn("Please upgrade to version %s (or newer)\n", version); 79 80 return 0; 81} 82 83static int ath10k_init_connect_htc(struct ath10k *ar) 84{ 85 int status; 86 87 status = ath10k_wmi_connect_htc_service(ar); 88 if (status) 89 goto conn_fail; 90 91 /* Start HTC */ 92 status = ath10k_htc_start(&ar->htc); 93 if (status) 94 goto conn_fail; 95 96 /* Wait for WMI event to be ready */ 97 status = ath10k_wmi_wait_for_service_ready(ar); 98 if (status <= 0) { 99 ath10k_warn("wmi service ready event not received"); 100 status = -ETIMEDOUT; 101 goto timeout; 102 } 103 104 ath10k_dbg(ATH10K_DBG_BOOT, "boot wmi ready\n"); 105 return 0; 106 107timeout: 108 ath10k_htc_stop(&ar->htc); 109conn_fail: 110 return status; 111} 112 113static int ath10k_init_configure_target(struct ath10k *ar) 114{ 115 u32 param_host; 116 int ret; 117 118 /* tell target which HTC version it is used*/ 119 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 120 HTC_PROTOCOL_VERSION); 121 if (ret) { 122 ath10k_err("settings HTC version failed\n"); 123 return ret; 124 } 125 126 /* set the firmware mode to STA/IBSS/AP */ 127 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 128 if (ret) { 129 ath10k_err("setting firmware mode (1/2) failed\n"); 130 return ret; 131 } 132 133 /* TODO following parameters need to be re-visited. */ 134 /* num_device */ 135 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 136 /* Firmware mode */ 137 /* FIXME: Why FW_MODE_AP ??.*/ 138 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 139 /* mac_addr_method */ 140 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 141 /* firmware_bridge */ 142 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 143 /* fwsubmode */ 144 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 145 146 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 147 if (ret) { 148 ath10k_err("setting firmware mode (2/2) failed\n"); 149 return ret; 150 } 151 152 /* We do all byte-swapping on the host */ 153 ret = ath10k_bmi_write32(ar, hi_be, 0); 154 if (ret) { 155 ath10k_err("setting host CPU BE mode failed\n"); 156 return ret; 157 } 158 159 /* FW descriptor/Data swap flags */ 160 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 161 162 if (ret) { 163 ath10k_err("setting FW data/desc swap flags failed\n"); 164 return ret; 165 } 166 167 return 0; 168} 169 170static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 171 const char *dir, 172 const char *file) 173{ 174 char filename[100]; 175 const struct firmware *fw; 176 int ret; 177 178 if (file == NULL) 179 return ERR_PTR(-ENOENT); 180 181 if (dir == NULL) 182 dir = "."; 183 184 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 185 ret = request_firmware(&fw, filename, ar->dev); 186 if (ret) 187 return ERR_PTR(ret); 188 189 return fw; 190} 191 192static int ath10k_push_board_ext_data(struct ath10k *ar, 193 const struct firmware *fw) 194{ 195 u32 board_data_size = QCA988X_BOARD_DATA_SZ; 196 u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ; 197 u32 board_ext_data_addr; 198 int ret; 199 200 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 201 if (ret) { 202 ath10k_err("could not read board ext data addr (%d)\n", ret); 203 return ret; 204 } 205 206 ath10k_dbg(ATH10K_DBG_BOOT, 207 "boot push board extended data addr 0x%x\n", 208 board_ext_data_addr); 209 210 if (board_ext_data_addr == 0) 211 return 0; 212 213 if (fw->size != (board_data_size + board_ext_data_size)) { 214 ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n", 215 fw->size, board_data_size, board_ext_data_size); 216 return -EINVAL; 217 } 218 219 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 220 fw->data + board_data_size, 221 board_ext_data_size); 222 if (ret) { 223 ath10k_err("could not write board ext data (%d)\n", ret); 224 return ret; 225 } 226 227 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 228 (board_ext_data_size << 16) | 1); 229 if (ret) { 230 ath10k_err("could not write board ext data bit (%d)\n", ret); 231 return ret; 232 } 233 234 return 0; 235} 236 237static int ath10k_download_board_data(struct ath10k *ar) 238{ 239 const struct firmware *fw = ar->board_data; 240 u32 board_data_size = QCA988X_BOARD_DATA_SZ; 241 u32 address; 242 int ret; 243 244 ret = ath10k_push_board_ext_data(ar, fw); 245 if (ret) { 246 ath10k_err("could not push board ext data (%d)\n", ret); 247 goto exit; 248 } 249 250 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 251 if (ret) { 252 ath10k_err("could not read board data addr (%d)\n", ret); 253 goto exit; 254 } 255 256 ret = ath10k_bmi_write_memory(ar, address, fw->data, 257 min_t(u32, board_data_size, fw->size)); 258 if (ret) { 259 ath10k_err("could not write board data (%d)\n", ret); 260 goto exit; 261 } 262 263 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 264 if (ret) { 265 ath10k_err("could not write board data bit (%d)\n", ret); 266 goto exit; 267 } 268 269exit: 270 return ret; 271} 272 273static int ath10k_download_and_run_otp(struct ath10k *ar) 274{ 275 const struct firmware *fw = ar->otp; 276 u32 address = ar->hw_params.patch_load_addr; 277 u32 exec_param; 278 int ret; 279 280 /* OTP is optional */ 281 282 if (!ar->otp) 283 return 0; 284 285 ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size); 286 if (ret) { 287 ath10k_err("could not write otp (%d)\n", ret); 288 goto exit; 289 } 290 291 exec_param = 0; 292 ret = ath10k_bmi_execute(ar, address, &exec_param); 293 if (ret) { 294 ath10k_err("could not execute otp (%d)\n", ret); 295 goto exit; 296 } 297 298exit: 299 return ret; 300} 301 302static int ath10k_download_fw(struct ath10k *ar) 303{ 304 const struct firmware *fw = ar->firmware; 305 u32 address; 306 int ret; 307 308 address = ar->hw_params.patch_load_addr; 309 310 ret = ath10k_bmi_fast_download(ar, address, fw->data, fw->size); 311 if (ret) { 312 ath10k_err("could not write fw (%d)\n", ret); 313 goto exit; 314 } 315 316exit: 317 return ret; 318} 319 320static void ath10k_core_free_firmware_files(struct ath10k *ar) 321{ 322 if (ar->board_data && !IS_ERR(ar->board_data)) 323 release_firmware(ar->board_data); 324 325 if (ar->otp && !IS_ERR(ar->otp)) 326 release_firmware(ar->otp); 327 328 if (ar->firmware && !IS_ERR(ar->firmware)) 329 release_firmware(ar->firmware); 330 331 ar->board_data = NULL; 332 ar->otp = NULL; 333 ar->firmware = NULL; 334} 335 336static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 337{ 338 int ret = 0; 339 340 if (ar->hw_params.fw.fw == NULL) { 341 ath10k_err("firmware file not defined\n"); 342 return -EINVAL; 343 } 344 345 if (ar->hw_params.fw.board == NULL) { 346 ath10k_err("board data file not defined"); 347 return -EINVAL; 348 } 349 350 ar->board_data = ath10k_fetch_fw_file(ar, 351 ar->hw_params.fw.dir, 352 ar->hw_params.fw.board); 353 if (IS_ERR(ar->board_data)) { 354 ret = PTR_ERR(ar->board_data); 355 ath10k_err("could not fetch board data (%d)\n", ret); 356 goto err; 357 } 358 359 ar->firmware = ath10k_fetch_fw_file(ar, 360 ar->hw_params.fw.dir, 361 ar->hw_params.fw.fw); 362 if (IS_ERR(ar->firmware)) { 363 ret = PTR_ERR(ar->firmware); 364 ath10k_err("could not fetch firmware (%d)\n", ret); 365 goto err; 366 } 367 368 /* OTP may be undefined. If so, don't fetch it at all */ 369 if (ar->hw_params.fw.otp == NULL) 370 return 0; 371 372 ar->otp = ath10k_fetch_fw_file(ar, 373 ar->hw_params.fw.dir, 374 ar->hw_params.fw.otp); 375 if (IS_ERR(ar->otp)) { 376 ret = PTR_ERR(ar->otp); 377 ath10k_err("could not fetch otp (%d)\n", ret); 378 goto err; 379 } 380 381 return 0; 382 383err: 384 ath10k_core_free_firmware_files(ar); 385 return ret; 386} 387 388static int ath10k_init_download_firmware(struct ath10k *ar) 389{ 390 int ret; 391 392 ret = ath10k_download_board_data(ar); 393 if (ret) 394 return ret; 395 396 ret = ath10k_download_and_run_otp(ar); 397 if (ret) 398 return ret; 399 400 ret = ath10k_download_fw(ar); 401 if (ret) 402 return ret; 403 404 return ret; 405} 406 407static int ath10k_init_uart(struct ath10k *ar) 408{ 409 int ret; 410 411 /* 412 * Explicitly setting UART prints to zero as target turns it on 413 * based on scratch registers. 414 */ 415 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 416 if (ret) { 417 ath10k_warn("could not disable UART prints (%d)\n", ret); 418 return ret; 419 } 420 421 if (!uart_print) { 422 ath10k_info("UART prints disabled\n"); 423 return 0; 424 } 425 426 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7); 427 if (ret) { 428 ath10k_warn("could not enable UART prints (%d)\n", ret); 429 return ret; 430 } 431 432 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 433 if (ret) { 434 ath10k_warn("could not enable UART prints (%d)\n", ret); 435 return ret; 436 } 437 438 /* Set the UART baud rate to 19200. */ 439 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 440 if (ret) { 441 ath10k_warn("could not set the baud rate (%d)\n", ret); 442 return ret; 443 } 444 445 ath10k_info("UART prints enabled\n"); 446 return 0; 447} 448 449static int ath10k_init_hw_params(struct ath10k *ar) 450{ 451 const struct ath10k_hw_params *uninitialized_var(hw_params); 452 int i; 453 454 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 455 hw_params = &ath10k_hw_params_list[i]; 456 457 if (hw_params->id == ar->target_version) 458 break; 459 } 460 461 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 462 ath10k_err("Unsupported hardware version: 0x%x\n", 463 ar->target_version); 464 return -EINVAL; 465 } 466 467 ar->hw_params = *hw_params; 468 469 ath10k_info("Hardware name %s version 0x%x\n", 470 ar->hw_params.name, ar->target_version); 471 472 return 0; 473} 474 475static void ath10k_core_restart(struct work_struct *work) 476{ 477 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 478 479 mutex_lock(&ar->conf_mutex); 480 481 switch (ar->state) { 482 case ATH10K_STATE_ON: 483 ath10k_halt(ar); 484 ar->state = ATH10K_STATE_RESTARTING; 485 ieee80211_restart_hw(ar->hw); 486 break; 487 case ATH10K_STATE_OFF: 488 /* this can happen if driver is being unloaded */ 489 ath10k_warn("cannot restart a device that hasn't been started\n"); 490 break; 491 case ATH10K_STATE_RESTARTING: 492 case ATH10K_STATE_RESTARTED: 493 ar->state = ATH10K_STATE_WEDGED; 494 /* fall through */ 495 case ATH10K_STATE_WEDGED: 496 ath10k_warn("device is wedged, will not restart\n"); 497 break; 498 } 499 500 mutex_unlock(&ar->conf_mutex); 501} 502 503struct ath10k *ath10k_core_create(void *hif_priv, struct device *dev, 504 const struct ath10k_hif_ops *hif_ops) 505{ 506 struct ath10k *ar; 507 508 ar = ath10k_mac_create(); 509 if (!ar) 510 return NULL; 511 512 ar->ath_common.priv = ar; 513 ar->ath_common.hw = ar->hw; 514 515 ar->p2p = !!ath10k_p2p; 516 ar->dev = dev; 517 518 ar->hif.priv = hif_priv; 519 ar->hif.ops = hif_ops; 520 521 init_completion(&ar->scan.started); 522 init_completion(&ar->scan.completed); 523 init_completion(&ar->scan.on_channel); 524 525 init_completion(&ar->install_key_done); 526 init_completion(&ar->vdev_setup_done); 527 528 setup_timer(&ar->scan.timeout, ath10k_reset_scan, (unsigned long)ar); 529 530 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 531 if (!ar->workqueue) 532 goto err_wq; 533 534 mutex_init(&ar->conf_mutex); 535 spin_lock_init(&ar->data_lock); 536 537 INIT_LIST_HEAD(&ar->peers); 538 init_waitqueue_head(&ar->peer_mapping_wq); 539 540 init_completion(&ar->offchan_tx_completed); 541 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 542 skb_queue_head_init(&ar->offchan_tx_queue); 543 544 init_waitqueue_head(&ar->event_queue); 545 546 INIT_WORK(&ar->restart_work, ath10k_core_restart); 547 548 return ar; 549 550err_wq: 551 ath10k_mac_destroy(ar); 552 return NULL; 553} 554EXPORT_SYMBOL(ath10k_core_create); 555 556void ath10k_core_destroy(struct ath10k *ar) 557{ 558 flush_workqueue(ar->workqueue); 559 destroy_workqueue(ar->workqueue); 560 561 ath10k_mac_destroy(ar); 562} 563EXPORT_SYMBOL(ath10k_core_destroy); 564 565int ath10k_core_start(struct ath10k *ar) 566{ 567 int status; 568 569 ath10k_bmi_start(ar); 570 571 if (ath10k_init_configure_target(ar)) { 572 status = -EINVAL; 573 goto err; 574 } 575 576 status = ath10k_init_download_firmware(ar); 577 if (status) 578 goto err; 579 580 status = ath10k_init_uart(ar); 581 if (status) 582 goto err; 583 584 ar->htc.htc_ops.target_send_suspend_complete = 585 ath10k_send_suspend_complete; 586 587 status = ath10k_htc_init(ar); 588 if (status) { 589 ath10k_err("could not init HTC (%d)\n", status); 590 goto err; 591 } 592 593 status = ath10k_bmi_done(ar); 594 if (status) 595 goto err; 596 597 status = ath10k_wmi_attach(ar); 598 if (status) { 599 ath10k_err("WMI attach failed: %d\n", status); 600 goto err; 601 } 602 603 status = ath10k_htc_wait_target(&ar->htc); 604 if (status) 605 goto err_wmi_detach; 606 607 status = ath10k_htt_attach(ar); 608 if (status) { 609 ath10k_err("could not attach htt (%d)\n", status); 610 goto err_wmi_detach; 611 } 612 613 status = ath10k_init_connect_htc(ar); 614 if (status) 615 goto err_htt_detach; 616 617 ath10k_info("firmware %s booted\n", ar->hw->wiphy->fw_version); 618 619 status = ath10k_check_fw_version(ar); 620 if (status) 621 goto err_disconnect_htc; 622 623 status = ath10k_wmi_cmd_init(ar); 624 if (status) { 625 ath10k_err("could not send WMI init command (%d)\n", status); 626 goto err_disconnect_htc; 627 } 628 629 status = ath10k_wmi_wait_for_unified_ready(ar); 630 if (status <= 0) { 631 ath10k_err("wmi unified ready event not received\n"); 632 status = -ETIMEDOUT; 633 goto err_disconnect_htc; 634 } 635 636 status = ath10k_htt_attach_target(&ar->htt); 637 if (status) 638 goto err_disconnect_htc; 639 640 status = ath10k_debug_start(ar); 641 if (status) 642 goto err_disconnect_htc; 643 644 ar->free_vdev_map = (1 << TARGET_NUM_VDEVS) - 1; 645 646 return 0; 647 648err_disconnect_htc: 649 ath10k_htc_stop(&ar->htc); 650err_htt_detach: 651 ath10k_htt_detach(&ar->htt); 652err_wmi_detach: 653 ath10k_wmi_detach(ar); 654err: 655 return status; 656} 657EXPORT_SYMBOL(ath10k_core_start); 658 659void ath10k_core_stop(struct ath10k *ar) 660{ 661 ath10k_debug_stop(ar); 662 ath10k_htc_stop(&ar->htc); 663 ath10k_htt_detach(&ar->htt); 664 ath10k_wmi_detach(ar); 665} 666EXPORT_SYMBOL(ath10k_core_stop); 667 668/* mac80211 manages fw/hw initialization through start/stop hooks. However in 669 * order to know what hw capabilities should be advertised to mac80211 it is 670 * necessary to load the firmware (and tear it down immediately since start 671 * hook will try to init it again) before registering */ 672static int ath10k_core_probe_fw(struct ath10k *ar) 673{ 674 struct bmi_target_info target_info; 675 int ret = 0; 676 677 ret = ath10k_hif_power_up(ar); 678 if (ret) { 679 ath10k_err("could not start pci hif (%d)\n", ret); 680 return ret; 681 } 682 683 memset(&target_info, 0, sizeof(target_info)); 684 ret = ath10k_bmi_get_target_info(ar, &target_info); 685 if (ret) { 686 ath10k_err("could not get target info (%d)\n", ret); 687 ath10k_hif_power_down(ar); 688 return ret; 689 } 690 691 ar->target_version = target_info.version; 692 ar->hw->wiphy->hw_version = target_info.version; 693 694 ret = ath10k_init_hw_params(ar); 695 if (ret) { 696 ath10k_err("could not get hw params (%d)\n", ret); 697 ath10k_hif_power_down(ar); 698 return ret; 699 } 700 701 ret = ath10k_core_fetch_firmware_files(ar); 702 if (ret) { 703 ath10k_err("could not fetch firmware files (%d)\n", ret); 704 ath10k_hif_power_down(ar); 705 return ret; 706 } 707 708 ret = ath10k_core_start(ar); 709 if (ret) { 710 ath10k_err("could not init core (%d)\n", ret); 711 ath10k_core_free_firmware_files(ar); 712 ath10k_hif_power_down(ar); 713 return ret; 714 } 715 716 ath10k_core_stop(ar); 717 ath10k_hif_power_down(ar); 718 return 0; 719} 720 721static int ath10k_core_check_chip_id(struct ath10k *ar) 722{ 723 u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV); 724 725 ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n", 726 ar->chip_id, hw_revision); 727 728 /* Check that we are not using hw1.0 (some of them have same pci id 729 * as hw2.0) before doing anything else as ath10k crashes horribly 730 * due to missing hw1.0 workarounds. */ 731 switch (hw_revision) { 732 case QCA988X_HW_1_0_CHIP_ID_REV: 733 ath10k_err("ERROR: qca988x hw1.0 is not supported\n"); 734 return -EOPNOTSUPP; 735 736 case QCA988X_HW_2_0_CHIP_ID_REV: 737 /* known hardware revision, continue normally */ 738 return 0; 739 740 default: 741 ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n", 742 ar->chip_id); 743 return 0; 744 } 745 746 return 0; 747} 748 749int ath10k_core_register(struct ath10k *ar, u32 chip_id) 750{ 751 int status; 752 753 ar->chip_id = chip_id; 754 755 status = ath10k_core_check_chip_id(ar); 756 if (status) { 757 ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id); 758 return status; 759 } 760 761 status = ath10k_core_probe_fw(ar); 762 if (status) { 763 ath10k_err("could not probe fw (%d)\n", status); 764 return status; 765 } 766 767 status = ath10k_mac_register(ar); 768 if (status) { 769 ath10k_err("could not register to mac80211 (%d)\n", status); 770 goto err_release_fw; 771 } 772 773 status = ath10k_debug_create(ar); 774 if (status) { 775 ath10k_err("unable to initialize debugfs\n"); 776 goto err_unregister_mac; 777 } 778 779 return 0; 780 781err_unregister_mac: 782 ath10k_mac_unregister(ar); 783err_release_fw: 784 ath10k_core_free_firmware_files(ar); 785 return status; 786} 787EXPORT_SYMBOL(ath10k_core_register); 788 789void ath10k_core_unregister(struct ath10k *ar) 790{ 791 /* We must unregister from mac80211 before we stop HTC and HIF. 792 * Otherwise we will fail to submit commands to FW and mac80211 will be 793 * unhappy about callback failures. */ 794 ath10k_mac_unregister(ar); 795 796 ath10k_core_free_firmware_files(ar); 797} 798EXPORT_SYMBOL(ath10k_core_unregister); 799 800MODULE_AUTHOR("Qualcomm Atheros"); 801MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); 802MODULE_LICENSE("Dual BSD/GPL"); 803