wmi.c revision 43d2a30fa80166243498fc6b8c841828ce52fcc1
1/* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18#include <linux/skbuff.h> 19#include <linux/ctype.h> 20 21#include "core.h" 22#include "htc.h" 23#include "debug.h" 24#include "wmi.h" 25#include "mac.h" 26#include "testmode.h" 27 28/* MAIN WMI cmd track */ 29static struct wmi_cmd_map wmi_cmd_map = { 30 .init_cmdid = WMI_INIT_CMDID, 31 .start_scan_cmdid = WMI_START_SCAN_CMDID, 32 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID, 33 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID, 34 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID, 35 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID, 36 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID, 37 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID, 38 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID, 39 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID, 40 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID, 41 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID, 42 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID, 43 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 44 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID, 45 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 46 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID, 47 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID, 48 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID, 49 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID, 50 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID, 51 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID, 52 .vdev_up_cmdid = WMI_VDEV_UP_CMDID, 53 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID, 54 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID, 55 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID, 56 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID, 57 .peer_create_cmdid = WMI_PEER_CREATE_CMDID, 58 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID, 59 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID, 60 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID, 61 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID, 62 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID, 63 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 64 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID, 65 .bcn_tx_cmdid = WMI_BCN_TX_CMDID, 66 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID, 67 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID, 68 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID, 69 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID, 70 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID, 71 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID, 72 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID, 73 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID, 74 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID, 75 .delba_send_cmdid = WMI_DELBA_SEND_CMDID, 76 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID, 77 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID, 78 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID, 79 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID, 80 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID, 81 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID, 82 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID, 83 .roam_scan_mode = WMI_ROAM_SCAN_MODE, 84 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD, 85 .roam_scan_period = WMI_ROAM_SCAN_PERIOD, 86 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 87 .roam_ap_profile = WMI_ROAM_AP_PROFILE, 88 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE, 89 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE, 90 .ofl_scan_period = WMI_OFL_SCAN_PERIOD, 91 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO, 92 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY, 93 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE, 94 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE, 95 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 96 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID, 97 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 98 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID, 99 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID, 100 .wlan_profile_set_hist_intvl_cmdid = 101 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 102 .wlan_profile_get_profile_data_cmdid = 103 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 104 .wlan_profile_enable_profile_id_cmdid = 105 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 106 .wlan_profile_list_profile_id_cmdid = 107 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 108 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID, 109 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID, 110 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID, 111 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID, 112 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID, 113 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID, 114 .wow_enable_disable_wake_event_cmdid = 115 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 116 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID, 117 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 118 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID, 119 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID, 120 .vdev_spectral_scan_configure_cmdid = 121 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 122 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 123 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID, 124 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID, 125 .network_list_offload_config_cmdid = 126 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID, 127 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID, 128 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID, 129 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 130 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID, 131 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID, 132 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID, 133 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID, 134 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID, 135 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD, 136 .echo_cmdid = WMI_ECHO_CMDID, 137 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID, 138 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID, 139 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID, 140 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID, 141 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID, 142 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID, 143 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, 144 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, 145 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, 146}; 147 148/* 10.X WMI cmd track */ 149static struct wmi_cmd_map wmi_10x_cmd_map = { 150 .init_cmdid = WMI_10X_INIT_CMDID, 151 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID, 152 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID, 153 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID, 154 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 155 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID, 156 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID, 157 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID, 158 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, 159 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, 160 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, 161 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, 162 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, 163 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, 164 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID, 165 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, 166 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, 167 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, 168 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID, 169 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID, 170 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID, 171 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID, 172 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID, 173 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID, 174 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID, 175 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID, 176 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID, 177 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID, 178 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID, 179 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID, 180 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID, 181 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID, 182 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, 183 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, 184 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID, 185 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID, 186 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID, 187 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 188 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID, 189 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID, 190 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID, 191 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 192 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID, 193 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID, 194 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID, 195 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID, 196 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID, 197 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID, 198 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID, 199 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID, 200 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID, 201 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID, 202 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID, 203 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE, 204 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, 205 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD, 206 .roam_scan_rssi_change_threshold = 207 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 208 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE, 209 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE, 210 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, 211 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD, 212 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO, 213 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY, 214 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE, 215 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE, 216 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 217 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID, 218 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 219 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, 220 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, 221 .wlan_profile_set_hist_intvl_cmdid = 222 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 223 .wlan_profile_get_profile_data_cmdid = 224 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 225 .wlan_profile_enable_profile_id_cmdid = 226 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 227 .wlan_profile_list_profile_id_cmdid = 228 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 229 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID, 230 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID, 231 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID, 232 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID, 233 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, 234 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, 235 .wow_enable_disable_wake_event_cmdid = 236 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 237 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID, 238 .wow_hostwakeup_from_sleep_cmdid = 239 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 240 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID, 241 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID, 242 .vdev_spectral_scan_configure_cmdid = 243 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 244 .vdev_spectral_scan_enable_cmdid = 245 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 246 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID, 247 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 248 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 249 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 250 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 251 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 252 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 253 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 254 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 255 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 256 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 257 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 258 .echo_cmdid = WMI_10X_ECHO_CMDID, 259 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID, 260 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID, 261 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID, 262 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 263 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 264 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 265 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 266 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, 267 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, 268}; 269 270/* MAIN WMI VDEV param map */ 271static struct wmi_vdev_param_map wmi_vdev_param_map = { 272 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD, 273 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 274 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL, 275 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL, 276 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE, 277 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE, 278 .slot_time = WMI_VDEV_PARAM_SLOT_TIME, 279 .preamble = WMI_VDEV_PARAM_PREAMBLE, 280 .swba_time = WMI_VDEV_PARAM_SWBA_TIME, 281 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD, 282 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME, 283 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL, 284 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD, 285 .wmi_vdev_oc_scheduler_air_time_limit = 286 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 287 .wds = WMI_VDEV_PARAM_WDS, 288 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW, 289 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX, 290 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 291 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 292 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM, 293 .chwidth = WMI_VDEV_PARAM_CHWIDTH, 294 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET, 295 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 296 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT, 297 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE, 298 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE, 299 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE, 300 .sgi = WMI_VDEV_PARAM_SGI, 301 .ldpc = WMI_VDEV_PARAM_LDPC, 302 .tx_stbc = WMI_VDEV_PARAM_TX_STBC, 303 .rx_stbc = WMI_VDEV_PARAM_RX_STBC, 304 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD, 305 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID, 306 .nss = WMI_VDEV_PARAM_NSS, 307 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE, 308 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE, 309 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE, 310 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE, 311 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 312 .ap_keepalive_min_idle_inactive_time_secs = 313 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 314 .ap_keepalive_max_idle_inactive_time_secs = 315 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 316 .ap_keepalive_max_unresponsive_time_secs = 317 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 318 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 319 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED, 320 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS, 321 .txbf = WMI_VDEV_PARAM_TXBF, 322 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE, 323 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY, 324 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE, 325 .ap_detect_out_of_sync_sleeping_sta_time_secs = 326 WMI_VDEV_PARAM_UNSUPPORTED, 327}; 328 329/* 10.X WMI VDEV param map */ 330static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { 331 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, 332 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 333 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 334 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 335 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, 336 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 337 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, 338 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, 339 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, 340 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, 341 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 342 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, 343 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, 344 .wmi_vdev_oc_scheduler_air_time_limit = 345 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 346 .wds = WMI_10X_VDEV_PARAM_WDS, 347 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, 348 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 349 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 350 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 351 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, 352 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, 353 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, 354 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 355 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 356 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, 357 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, 358 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, 359 .sgi = WMI_10X_VDEV_PARAM_SGI, 360 .ldpc = WMI_10X_VDEV_PARAM_LDPC, 361 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, 362 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, 363 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 364 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, 365 .nss = WMI_10X_VDEV_PARAM_NSS, 366 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 367 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 368 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, 369 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, 370 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 371 .ap_keepalive_min_idle_inactive_time_secs = 372 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 373 .ap_keepalive_max_idle_inactive_time_secs = 374 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 375 .ap_keepalive_max_unresponsive_time_secs = 376 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 377 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 378 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 379 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 380 .txbf = WMI_VDEV_PARAM_UNSUPPORTED, 381 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, 382 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, 383 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, 384 .ap_detect_out_of_sync_sleeping_sta_time_secs = 385 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 386}; 387 388static struct wmi_pdev_param_map wmi_pdev_param_map = { 389 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, 390 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, 391 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 392 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 393 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE, 394 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE, 395 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE, 396 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 397 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE, 398 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW, 399 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 400 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 401 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH, 402 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 403 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE, 404 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 405 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 406 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 407 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 408 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 409 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 410 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 411 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 412 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE, 413 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE, 414 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 415 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 416 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 417 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 418 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 419 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 420 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 421 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 422 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS, 423 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 424 .dcs = WMI_PDEV_PARAM_DCS, 425 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE, 426 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD, 427 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 428 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 429 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL, 430 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN, 431 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA, 432 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG, 433 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP, 434 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, 435 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, 436 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, 437}; 438 439static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { 440 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, 441 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 442 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 443 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 444 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 445 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 446 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 447 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 448 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, 449 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, 450 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 451 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 452 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 453 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 454 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, 455 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 456 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 457 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 458 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 459 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 460 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 461 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 462 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 463 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, 464 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 465 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, 466 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, 467 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, 468 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, 469 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 470 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 471 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 472 .bcnflt_stats_update_period = 473 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 474 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, 475 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 476 .dcs = WMI_10X_PDEV_PARAM_DCS, 477 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, 478 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 479 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 480 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 481 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 482 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, 483 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, 484 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, 485 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, 486 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 487 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, 488 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, 489}; 490 491/* firmware 10.2 specific mappings */ 492static struct wmi_cmd_map wmi_10_2_cmd_map = { 493 .init_cmdid = WMI_10_2_INIT_CMDID, 494 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, 495 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, 496 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, 497 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 498 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 499 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, 500 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, 501 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 502 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 503 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 504 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 505 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 506 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 507 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 508 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 509 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 510 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, 511 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, 512 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, 513 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 514 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, 515 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, 516 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, 517 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, 518 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, 519 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, 520 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, 521 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, 522 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, 523 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, 524 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 525 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 526 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, 527 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, 528 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, 529 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 530 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, 531 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 532 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, 533 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 534 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 535 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, 536 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, 537 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, 538 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, 539 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, 540 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, 541 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 542 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, 543 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, 544 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, 545 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, 546 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 547 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, 548 .roam_scan_rssi_change_threshold = 549 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 550 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, 551 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 552 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 553 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, 554 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 555 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 556 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, 557 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 558 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 559 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, 560 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 561 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 562 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 563 .wlan_profile_set_hist_intvl_cmdid = 564 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 565 .wlan_profile_get_profile_data_cmdid = 566 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 567 .wlan_profile_enable_profile_id_cmdid = 568 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 569 .wlan_profile_list_profile_id_cmdid = 570 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 571 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, 572 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, 573 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, 574 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, 575 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 576 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 577 .wow_enable_disable_wake_event_cmdid = 578 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 579 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, 580 .wow_hostwakeup_from_sleep_cmdid = 581 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 582 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, 583 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, 584 .vdev_spectral_scan_configure_cmdid = 585 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 586 .vdev_spectral_scan_enable_cmdid = 587 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 588 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, 589 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 590 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 591 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 592 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 593 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 594 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 595 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 596 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 597 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 598 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 599 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 600 .echo_cmdid = WMI_10_2_ECHO_CMDID, 601 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, 602 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, 603 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, 604 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 605 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 606 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 607 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 608 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, 609 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, 610}; 611 612int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) 613{ 614 int ret; 615 ret = wait_for_completion_timeout(&ar->wmi.service_ready, 616 WMI_SERVICE_READY_TIMEOUT_HZ); 617 return ret; 618} 619 620int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) 621{ 622 int ret; 623 ret = wait_for_completion_timeout(&ar->wmi.unified_ready, 624 WMI_UNIFIED_READY_TIMEOUT_HZ); 625 return ret; 626} 627 628struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len) 629{ 630 struct sk_buff *skb; 631 u32 round_len = roundup(len, 4); 632 633 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len); 634 if (!skb) 635 return NULL; 636 637 skb_reserve(skb, WMI_SKB_HEADROOM); 638 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 639 ath10k_warn(ar, "Unaligned WMI skb\n"); 640 641 skb_put(skb, round_len); 642 memset(skb->data, 0, round_len); 643 644 return skb; 645} 646 647static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) 648{ 649 dev_kfree_skb(skb); 650} 651 652static int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, 653 u32 cmd_id) 654{ 655 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); 656 struct wmi_cmd_hdr *cmd_hdr; 657 int ret; 658 u32 cmd = 0; 659 660 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 661 return -ENOMEM; 662 663 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); 664 665 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 666 cmd_hdr->cmd_id = __cpu_to_le32(cmd); 667 668 memset(skb_cb, 0, sizeof(*skb_cb)); 669 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); 670 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret); 671 672 if (ret) 673 goto err_pull; 674 675 return 0; 676 677err_pull: 678 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 679 return ret; 680} 681 682static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) 683{ 684 int ret; 685 686 lockdep_assert_held(&arvif->ar->data_lock); 687 688 if (arvif->beacon == NULL) 689 return; 690 691 if (arvif->beacon_sent) 692 return; 693 694 ret = ath10k_wmi_beacon_send_ref_nowait(arvif); 695 if (ret) 696 return; 697 698 /* We need to retain the arvif->beacon reference for DMA unmapping and 699 * freeing the skbuff later. */ 700 arvif->beacon_sent = true; 701} 702 703static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, 704 struct ieee80211_vif *vif) 705{ 706 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif); 707 708 ath10k_wmi_tx_beacon_nowait(arvif); 709} 710 711static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) 712{ 713 spin_lock_bh(&ar->data_lock); 714 ieee80211_iterate_active_interfaces_atomic(ar->hw, 715 IEEE80211_IFACE_ITER_NORMAL, 716 ath10k_wmi_tx_beacons_iter, 717 NULL); 718 spin_unlock_bh(&ar->data_lock); 719} 720 721static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) 722{ 723 /* try to send pending beacons first. they take priority */ 724 ath10k_wmi_tx_beacons_nowait(ar); 725 726 wake_up(&ar->wmi.tx_credits_wq); 727} 728 729int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) 730{ 731 int ret = -EOPNOTSUPP; 732 733 might_sleep(); 734 735 if (cmd_id == WMI_CMD_UNSUPPORTED) { 736 ath10k_warn(ar, "wmi command %d is not supported by firmware\n", 737 cmd_id); 738 return ret; 739 } 740 741 wait_event_timeout(ar->wmi.tx_credits_wq, ({ 742 /* try to send pending beacons first. they take priority */ 743 ath10k_wmi_tx_beacons_nowait(ar); 744 745 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); 746 (ret != -EAGAIN); 747 }), 3*HZ); 748 749 if (ret) 750 dev_kfree_skb_any(skb); 751 752 return ret; 753} 754 755int ath10k_wmi_mgmt_tx(struct ath10k *ar, struct sk_buff *skb) 756{ 757 int ret = 0; 758 struct wmi_mgmt_tx_cmd *cmd; 759 struct ieee80211_hdr *hdr; 760 struct sk_buff *wmi_skb; 761 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 762 int len; 763 u32 buf_len = skb->len; 764 u16 fc; 765 766 hdr = (struct ieee80211_hdr *)skb->data; 767 fc = le16_to_cpu(hdr->frame_control); 768 769 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) 770 return -EINVAL; 771 772 len = sizeof(cmd->hdr) + skb->len; 773 774 if ((ieee80211_is_action(hdr->frame_control) || 775 ieee80211_is_deauth(hdr->frame_control) || 776 ieee80211_is_disassoc(hdr->frame_control)) && 777 ieee80211_has_protected(hdr->frame_control)) { 778 len += IEEE80211_CCMP_MIC_LEN; 779 buf_len += IEEE80211_CCMP_MIC_LEN; 780 } 781 782 len = round_up(len, 4); 783 784 wmi_skb = ath10k_wmi_alloc_skb(ar, len); 785 if (!wmi_skb) 786 return -ENOMEM; 787 788 cmd = (struct wmi_mgmt_tx_cmd *)wmi_skb->data; 789 790 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(skb)->vdev_id); 791 cmd->hdr.tx_rate = 0; 792 cmd->hdr.tx_power = 0; 793 cmd->hdr.buf_len = __cpu_to_le32(buf_len); 794 795 memcpy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr), ETH_ALEN); 796 memcpy(cmd->buf, skb->data, skb->len); 797 798 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", 799 wmi_skb, wmi_skb->len, fc & IEEE80211_FCTL_FTYPE, 800 fc & IEEE80211_FCTL_STYPE); 801 802 /* Send the management frame buffer to the target */ 803 ret = ath10k_wmi_cmd_send(ar, wmi_skb, ar->wmi.cmd->mgmt_tx_cmdid); 804 if (ret) 805 return ret; 806 807 /* TODO: report tx status to mac80211 - temporary just ACK */ 808 info->flags |= IEEE80211_TX_STAT_ACK; 809 ieee80211_tx_status_irqsafe(ar->hw, skb); 810 811 return ret; 812} 813 814static void ath10k_wmi_event_scan_started(struct ath10k *ar) 815{ 816 lockdep_assert_held(&ar->data_lock); 817 818 switch (ar->scan.state) { 819 case ATH10K_SCAN_IDLE: 820 case ATH10K_SCAN_RUNNING: 821 case ATH10K_SCAN_ABORTING: 822 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n", 823 ath10k_scan_state_str(ar->scan.state), 824 ar->scan.state); 825 break; 826 case ATH10K_SCAN_STARTING: 827 ar->scan.state = ATH10K_SCAN_RUNNING; 828 829 if (ar->scan.is_roc) 830 ieee80211_ready_on_channel(ar->hw); 831 832 complete(&ar->scan.started); 833 break; 834 } 835} 836 837static void ath10k_wmi_event_scan_completed(struct ath10k *ar) 838{ 839 lockdep_assert_held(&ar->data_lock); 840 841 switch (ar->scan.state) { 842 case ATH10K_SCAN_IDLE: 843 case ATH10K_SCAN_STARTING: 844 /* One suspected reason scan can be completed while starting is 845 * if firmware fails to deliver all scan events to the host, 846 * e.g. when transport pipe is full. This has been observed 847 * with spectral scan phyerr events starving wmi transport 848 * pipe. In such case the "scan completed" event should be (and 849 * is) ignored by the host as it may be just firmware's scan 850 * state machine recovering. 851 */ 852 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n", 853 ath10k_scan_state_str(ar->scan.state), 854 ar->scan.state); 855 break; 856 case ATH10K_SCAN_RUNNING: 857 case ATH10K_SCAN_ABORTING: 858 __ath10k_scan_finish(ar); 859 break; 860 } 861} 862 863static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar) 864{ 865 lockdep_assert_held(&ar->data_lock); 866 867 switch (ar->scan.state) { 868 case ATH10K_SCAN_IDLE: 869 case ATH10K_SCAN_STARTING: 870 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n", 871 ath10k_scan_state_str(ar->scan.state), 872 ar->scan.state); 873 break; 874 case ATH10K_SCAN_RUNNING: 875 case ATH10K_SCAN_ABORTING: 876 ar->scan_channel = NULL; 877 break; 878 } 879} 880 881static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq) 882{ 883 lockdep_assert_held(&ar->data_lock); 884 885 switch (ar->scan.state) { 886 case ATH10K_SCAN_IDLE: 887 case ATH10K_SCAN_STARTING: 888 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 889 ath10k_scan_state_str(ar->scan.state), 890 ar->scan.state); 891 break; 892 case ATH10K_SCAN_RUNNING: 893 case ATH10K_SCAN_ABORTING: 894 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); 895 896 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 897 complete(&ar->scan.on_channel); 898 break; 899 } 900} 901 902static const char * 903ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 904 enum wmi_scan_completion_reason reason) 905{ 906 switch (type) { 907 case WMI_SCAN_EVENT_STARTED: 908 return "started"; 909 case WMI_SCAN_EVENT_COMPLETED: 910 switch (reason) { 911 case WMI_SCAN_REASON_COMPLETED: 912 return "completed"; 913 case WMI_SCAN_REASON_CANCELLED: 914 return "completed [cancelled]"; 915 case WMI_SCAN_REASON_PREEMPTED: 916 return "completed [preempted]"; 917 case WMI_SCAN_REASON_TIMEDOUT: 918 return "completed [timedout]"; 919 case WMI_SCAN_REASON_MAX: 920 break; 921 } 922 return "completed [unknown]"; 923 case WMI_SCAN_EVENT_BSS_CHANNEL: 924 return "bss channel"; 925 case WMI_SCAN_EVENT_FOREIGN_CHANNEL: 926 return "foreign channel"; 927 case WMI_SCAN_EVENT_DEQUEUED: 928 return "dequeued"; 929 case WMI_SCAN_EVENT_PREEMPTED: 930 return "preempted"; 931 case WMI_SCAN_EVENT_START_FAILED: 932 return "start failed"; 933 default: 934 return "unknown"; 935 } 936} 937 938static int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) 939{ 940 struct wmi_scan_event *event = (struct wmi_scan_event *)skb->data; 941 enum wmi_scan_event_type event_type; 942 enum wmi_scan_completion_reason reason; 943 u32 freq; 944 u32 req_id; 945 u32 scan_id; 946 u32 vdev_id; 947 948 event_type = __le32_to_cpu(event->event_type); 949 reason = __le32_to_cpu(event->reason); 950 freq = __le32_to_cpu(event->channel_freq); 951 req_id = __le32_to_cpu(event->scan_req_id); 952 scan_id = __le32_to_cpu(event->scan_id); 953 vdev_id = __le32_to_cpu(event->vdev_id); 954 955 spin_lock_bh(&ar->data_lock); 956 957 ath10k_dbg(ar, ATH10K_DBG_WMI, 958 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 959 ath10k_wmi_event_scan_type_str(event_type, reason), 960 event_type, reason, freq, req_id, scan_id, vdev_id, 961 ath10k_scan_state_str(ar->scan.state), ar->scan.state); 962 963 switch (event_type) { 964 case WMI_SCAN_EVENT_STARTED: 965 ath10k_wmi_event_scan_started(ar); 966 break; 967 case WMI_SCAN_EVENT_COMPLETED: 968 ath10k_wmi_event_scan_completed(ar); 969 break; 970 case WMI_SCAN_EVENT_BSS_CHANNEL: 971 ath10k_wmi_event_scan_bss_chan(ar); 972 break; 973 case WMI_SCAN_EVENT_FOREIGN_CHANNEL: 974 ath10k_wmi_event_scan_foreign_chan(ar, freq); 975 break; 976 case WMI_SCAN_EVENT_START_FAILED: 977 ath10k_warn(ar, "received scan start failure event\n"); 978 break; 979 case WMI_SCAN_EVENT_DEQUEUED: 980 case WMI_SCAN_EVENT_PREEMPTED: 981 default: 982 break; 983 } 984 985 spin_unlock_bh(&ar->data_lock); 986 return 0; 987} 988 989static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode) 990{ 991 enum ieee80211_band band; 992 993 switch (phy_mode) { 994 case MODE_11A: 995 case MODE_11NA_HT20: 996 case MODE_11NA_HT40: 997 case MODE_11AC_VHT20: 998 case MODE_11AC_VHT40: 999 case MODE_11AC_VHT80: 1000 band = IEEE80211_BAND_5GHZ; 1001 break; 1002 case MODE_11G: 1003 case MODE_11B: 1004 case MODE_11GONLY: 1005 case MODE_11NG_HT20: 1006 case MODE_11NG_HT40: 1007 case MODE_11AC_VHT20_2G: 1008 case MODE_11AC_VHT40_2G: 1009 case MODE_11AC_VHT80_2G: 1010 default: 1011 band = IEEE80211_BAND_2GHZ; 1012 } 1013 1014 return band; 1015} 1016 1017static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band) 1018{ 1019 u8 rate_idx = 0; 1020 1021 /* rate in Kbps */ 1022 switch (rate) { 1023 case 1000: 1024 rate_idx = 0; 1025 break; 1026 case 2000: 1027 rate_idx = 1; 1028 break; 1029 case 5500: 1030 rate_idx = 2; 1031 break; 1032 case 11000: 1033 rate_idx = 3; 1034 break; 1035 case 6000: 1036 rate_idx = 4; 1037 break; 1038 case 9000: 1039 rate_idx = 5; 1040 break; 1041 case 12000: 1042 rate_idx = 6; 1043 break; 1044 case 18000: 1045 rate_idx = 7; 1046 break; 1047 case 24000: 1048 rate_idx = 8; 1049 break; 1050 case 36000: 1051 rate_idx = 9; 1052 break; 1053 case 48000: 1054 rate_idx = 10; 1055 break; 1056 case 54000: 1057 rate_idx = 11; 1058 break; 1059 default: 1060 break; 1061 } 1062 1063 if (band == IEEE80211_BAND_5GHZ) { 1064 if (rate_idx > 3) 1065 /* Omit CCK rates */ 1066 rate_idx -= 4; 1067 else 1068 rate_idx = 0; 1069 } 1070 1071 return rate_idx; 1072} 1073 1074static int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) 1075{ 1076 struct wmi_mgmt_rx_event_v1 *ev_v1; 1077 struct wmi_mgmt_rx_event_v2 *ev_v2; 1078 struct wmi_mgmt_rx_hdr_v1 *ev_hdr; 1079 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 1080 struct ieee80211_channel *ch; 1081 struct ieee80211_hdr *hdr; 1082 u32 rx_status; 1083 u32 channel; 1084 u32 phy_mode; 1085 u32 snr; 1086 u32 rate; 1087 u32 buf_len; 1088 u16 fc; 1089 int pull_len; 1090 1091 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { 1092 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; 1093 ev_hdr = &ev_v2->hdr.v1; 1094 pull_len = sizeof(*ev_v2); 1095 } else { 1096 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; 1097 ev_hdr = &ev_v1->hdr; 1098 pull_len = sizeof(*ev_v1); 1099 } 1100 1101 channel = __le32_to_cpu(ev_hdr->channel); 1102 buf_len = __le32_to_cpu(ev_hdr->buf_len); 1103 rx_status = __le32_to_cpu(ev_hdr->status); 1104 snr = __le32_to_cpu(ev_hdr->snr); 1105 phy_mode = __le32_to_cpu(ev_hdr->phy_mode); 1106 rate = __le32_to_cpu(ev_hdr->rate); 1107 1108 memset(status, 0, sizeof(*status)); 1109 1110 ath10k_dbg(ar, ATH10K_DBG_MGMT, 1111 "event mgmt rx status %08x\n", rx_status); 1112 1113 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 1114 dev_kfree_skb(skb); 1115 return 0; 1116 } 1117 1118 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) { 1119 dev_kfree_skb(skb); 1120 return 0; 1121 } 1122 1123 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) { 1124 dev_kfree_skb(skb); 1125 return 0; 1126 } 1127 1128 if (rx_status & WMI_RX_STATUS_ERR_CRC) 1129 status->flag |= RX_FLAG_FAILED_FCS_CRC; 1130 if (rx_status & WMI_RX_STATUS_ERR_MIC) 1131 status->flag |= RX_FLAG_MMIC_ERROR; 1132 1133 /* HW can Rx CCK rates on 5GHz. In that case phy_mode is set to 1134 * MODE_11B. This means phy_mode is not a reliable source for the band 1135 * of mgmt rx. */ 1136 1137 ch = ar->scan_channel; 1138 if (!ch) 1139 ch = ar->rx_channel; 1140 1141 if (ch) { 1142 status->band = ch->band; 1143 1144 if (phy_mode == MODE_11B && 1145 status->band == IEEE80211_BAND_5GHZ) 1146 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n"); 1147 } else { 1148 ath10k_warn(ar, "using (unreliable) phy_mode to extract band for mgmt rx\n"); 1149 status->band = phy_mode_to_band(phy_mode); 1150 } 1151 1152 status->freq = ieee80211_channel_to_frequency(channel, status->band); 1153 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; 1154 status->rate_idx = get_rate_idx(rate, status->band); 1155 1156 skb_pull(skb, pull_len); 1157 1158 hdr = (struct ieee80211_hdr *)skb->data; 1159 fc = le16_to_cpu(hdr->frame_control); 1160 1161 /* FW delivers WEP Shared Auth frame with Protected Bit set and 1162 * encrypted payload. However in case of PMF it delivers decrypted 1163 * frames with Protected Bit set. */ 1164 if (ieee80211_has_protected(hdr->frame_control) && 1165 !ieee80211_is_auth(hdr->frame_control)) { 1166 status->flag |= RX_FLAG_DECRYPTED; 1167 1168 if (!ieee80211_is_action(hdr->frame_control) && 1169 !ieee80211_is_deauth(hdr->frame_control) && 1170 !ieee80211_is_disassoc(hdr->frame_control)) { 1171 status->flag |= RX_FLAG_IV_STRIPPED | 1172 RX_FLAG_MMIC_STRIPPED; 1173 hdr->frame_control = __cpu_to_le16(fc & 1174 ~IEEE80211_FCTL_PROTECTED); 1175 } 1176 } 1177 1178 ath10k_dbg(ar, ATH10K_DBG_MGMT, 1179 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 1180 skb, skb->len, 1181 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 1182 1183 ath10k_dbg(ar, ATH10K_DBG_MGMT, 1184 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 1185 status->freq, status->band, status->signal, 1186 status->rate_idx); 1187 1188 /* 1189 * packets from HTC come aligned to 4byte boundaries 1190 * because they can originally come in along with a trailer 1191 */ 1192 skb_trim(skb, buf_len); 1193 1194 ieee80211_rx(ar->hw, skb); 1195 return 0; 1196} 1197 1198static int freq_to_idx(struct ath10k *ar, int freq) 1199{ 1200 struct ieee80211_supported_band *sband; 1201 int band, ch, idx = 0; 1202 1203 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { 1204 sband = ar->hw->wiphy->bands[band]; 1205 if (!sband) 1206 continue; 1207 1208 for (ch = 0; ch < sband->n_channels; ch++, idx++) 1209 if (sband->channels[ch].center_freq == freq) 1210 goto exit; 1211 } 1212 1213exit: 1214 return idx; 1215} 1216 1217static void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) 1218{ 1219 struct wmi_chan_info_event *ev; 1220 struct survey_info *survey; 1221 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; 1222 int idx; 1223 1224 ev = (struct wmi_chan_info_event *)skb->data; 1225 1226 err_code = __le32_to_cpu(ev->err_code); 1227 freq = __le32_to_cpu(ev->freq); 1228 cmd_flags = __le32_to_cpu(ev->cmd_flags); 1229 noise_floor = __le32_to_cpu(ev->noise_floor); 1230 rx_clear_count = __le32_to_cpu(ev->rx_clear_count); 1231 cycle_count = __le32_to_cpu(ev->cycle_count); 1232 1233 ath10k_dbg(ar, ATH10K_DBG_WMI, 1234 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", 1235 err_code, freq, cmd_flags, noise_floor, rx_clear_count, 1236 cycle_count); 1237 1238 spin_lock_bh(&ar->data_lock); 1239 1240 switch (ar->scan.state) { 1241 case ATH10K_SCAN_IDLE: 1242 case ATH10K_SCAN_STARTING: 1243 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n"); 1244 goto exit; 1245 case ATH10K_SCAN_RUNNING: 1246 case ATH10K_SCAN_ABORTING: 1247 break; 1248 } 1249 1250 idx = freq_to_idx(ar, freq); 1251 if (idx >= ARRAY_SIZE(ar->survey)) { 1252 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", 1253 freq, idx); 1254 goto exit; 1255 } 1256 1257 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { 1258 /* During scanning chan info is reported twice for each 1259 * visited channel. The reported cycle count is global 1260 * and per-channel cycle count must be calculated */ 1261 1262 cycle_count -= ar->survey_last_cycle_count; 1263 rx_clear_count -= ar->survey_last_rx_clear_count; 1264 1265 survey = &ar->survey[idx]; 1266 survey->channel_time = WMI_CHAN_INFO_MSEC(cycle_count); 1267 survey->channel_time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count); 1268 survey->noise = noise_floor; 1269 survey->filled = SURVEY_INFO_CHANNEL_TIME | 1270 SURVEY_INFO_CHANNEL_TIME_RX | 1271 SURVEY_INFO_NOISE_DBM; 1272 } 1273 1274 ar->survey_last_rx_clear_count = rx_clear_count; 1275 ar->survey_last_cycle_count = cycle_count; 1276 1277exit: 1278 spin_unlock_bh(&ar->data_lock); 1279} 1280 1281static void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) 1282{ 1283 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); 1284} 1285 1286static int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) 1287{ 1288 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", 1289 skb->len); 1290 1291 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len); 1292 1293 return 0; 1294} 1295 1296static void ath10k_wmi_event_update_stats(struct ath10k *ar, 1297 struct sk_buff *skb) 1298{ 1299 struct wmi_stats_event *ev = (struct wmi_stats_event *)skb->data; 1300 1301 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); 1302 1303 ath10k_debug_read_target_stats(ar, ev); 1304} 1305 1306static void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, 1307 struct sk_buff *skb) 1308{ 1309 struct wmi_vdev_start_response_event *ev; 1310 1311 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); 1312 1313 ev = (struct wmi_vdev_start_response_event *)skb->data; 1314 1315 if (WARN_ON(__le32_to_cpu(ev->status))) 1316 return; 1317 1318 complete(&ar->vdev_setup_done); 1319} 1320 1321static void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, 1322 struct sk_buff *skb) 1323{ 1324 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); 1325 complete(&ar->vdev_setup_done); 1326} 1327 1328static void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, 1329 struct sk_buff *skb) 1330{ 1331 struct wmi_peer_sta_kickout_event *ev; 1332 struct ieee80211_sta *sta; 1333 1334 ev = (struct wmi_peer_sta_kickout_event *)skb->data; 1335 1336 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", 1337 ev->peer_macaddr.addr); 1338 1339 rcu_read_lock(); 1340 1341 sta = ieee80211_find_sta_by_ifaddr(ar->hw, ev->peer_macaddr.addr, NULL); 1342 if (!sta) { 1343 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", 1344 ev->peer_macaddr.addr); 1345 goto exit; 1346 } 1347 1348 ieee80211_report_low_ack(sta, 10); 1349 1350exit: 1351 rcu_read_unlock(); 1352} 1353 1354/* 1355 * FIXME 1356 * 1357 * We don't report to mac80211 sleep state of connected 1358 * stations. Due to this mac80211 can't fill in TIM IE 1359 * correctly. 1360 * 1361 * I know of no way of getting nullfunc frames that contain 1362 * sleep transition from connected stations - these do not 1363 * seem to be sent from the target to the host. There also 1364 * doesn't seem to be a dedicated event for that. So the 1365 * only way left to do this would be to read tim_bitmap 1366 * during SWBA. 1367 * 1368 * We could probably try using tim_bitmap from SWBA to tell 1369 * mac80211 which stations are asleep and which are not. The 1370 * problem here is calling mac80211 functions so many times 1371 * could take too long and make us miss the time to submit 1372 * the beacon to the target. 1373 * 1374 * So as a workaround we try to extend the TIM IE if there 1375 * is unicast buffered for stations with aid > 7 and fill it 1376 * in ourselves. 1377 */ 1378static void ath10k_wmi_update_tim(struct ath10k *ar, 1379 struct ath10k_vif *arvif, 1380 struct sk_buff *bcn, 1381 struct wmi_bcn_info *bcn_info) 1382{ 1383 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; 1384 struct ieee80211_tim_ie *tim; 1385 u8 *ies, *ie; 1386 u8 ie_len, pvm_len; 1387 1388 /* if next SWBA has no tim_changed the tim_bitmap is garbage. 1389 * we must copy the bitmap upon change and reuse it later */ 1390 if (__le32_to_cpu(bcn_info->tim_info.tim_changed)) { 1391 int i; 1392 1393 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) != 1394 sizeof(bcn_info->tim_info.tim_bitmap)); 1395 1396 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) { 1397 __le32 t = bcn_info->tim_info.tim_bitmap[i / 4]; 1398 u32 v = __le32_to_cpu(t); 1399 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; 1400 } 1401 1402 /* FW reports either length 0 or 16 1403 * so we calculate this on our own */ 1404 arvif->u.ap.tim_len = 0; 1405 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) 1406 if (arvif->u.ap.tim_bitmap[i]) 1407 arvif->u.ap.tim_len = i; 1408 1409 arvif->u.ap.tim_len++; 1410 } 1411 1412 ies = bcn->data; 1413 ies += ieee80211_hdrlen(hdr->frame_control); 1414 ies += 12; /* fixed parameters */ 1415 1416 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, 1417 (u8 *)skb_tail_pointer(bcn) - ies); 1418 if (!ie) { 1419 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) 1420 ath10k_warn(ar, "no tim ie found;\n"); 1421 return; 1422 } 1423 1424 tim = (void *)ie + 2; 1425 ie_len = ie[1]; 1426 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ 1427 1428 if (pvm_len < arvif->u.ap.tim_len) { 1429 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len; 1430 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); 1431 void *next_ie = ie + 2 + ie_len; 1432 1433 if (skb_put(bcn, expand_size)) { 1434 memmove(next_ie + expand_size, next_ie, move_size); 1435 1436 ie[1] += expand_size; 1437 ie_len += expand_size; 1438 pvm_len += expand_size; 1439 } else { 1440 ath10k_warn(ar, "tim expansion failed\n"); 1441 } 1442 } 1443 1444 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) { 1445 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len); 1446 return; 1447 } 1448 1449 tim->bitmap_ctrl = !!__le32_to_cpu(bcn_info->tim_info.tim_mcast); 1450 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); 1451 1452 if (tim->dtim_count == 0) { 1453 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true; 1454 1455 if (__le32_to_cpu(bcn_info->tim_info.tim_mcast) == 1) 1456 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true; 1457 } 1458 1459 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", 1460 tim->dtim_count, tim->dtim_period, 1461 tim->bitmap_ctrl, pvm_len); 1462} 1463 1464static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len, 1465 struct wmi_p2p_noa_info *noa) 1466{ 1467 struct ieee80211_p2p_noa_attr *noa_attr; 1468 u8 ctwindow_oppps = noa->ctwindow_oppps; 1469 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET; 1470 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT); 1471 __le16 *noa_attr_len; 1472 u16 attr_len; 1473 u8 noa_descriptors = noa->num_descriptors; 1474 int i; 1475 1476 /* P2P IE */ 1477 data[0] = WLAN_EID_VENDOR_SPECIFIC; 1478 data[1] = len - 2; 1479 data[2] = (WLAN_OUI_WFA >> 16) & 0xff; 1480 data[3] = (WLAN_OUI_WFA >> 8) & 0xff; 1481 data[4] = (WLAN_OUI_WFA >> 0) & 0xff; 1482 data[5] = WLAN_OUI_TYPE_WFA_P2P; 1483 1484 /* NOA ATTR */ 1485 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE; 1486 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */ 1487 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9]; 1488 1489 noa_attr->index = noa->index; 1490 noa_attr->oppps_ctwindow = ctwindow; 1491 if (oppps) 1492 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT; 1493 1494 for (i = 0; i < noa_descriptors; i++) { 1495 noa_attr->desc[i].count = 1496 __le32_to_cpu(noa->descriptors[i].type_count); 1497 noa_attr->desc[i].duration = noa->descriptors[i].duration; 1498 noa_attr->desc[i].interval = noa->descriptors[i].interval; 1499 noa_attr->desc[i].start_time = noa->descriptors[i].start_time; 1500 } 1501 1502 attr_len = 2; /* index + oppps_ctwindow */ 1503 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc); 1504 *noa_attr_len = __cpu_to_le16(attr_len); 1505} 1506 1507static u32 ath10k_p2p_calc_noa_ie_len(struct wmi_p2p_noa_info *noa) 1508{ 1509 u32 len = 0; 1510 u8 noa_descriptors = noa->num_descriptors; 1511 u8 opp_ps_info = noa->ctwindow_oppps; 1512 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT); 1513 1514 1515 if (!noa_descriptors && !opps_enabled) 1516 return len; 1517 1518 len += 1 + 1 + 4; /* EID + len + OUI */ 1519 len += 1 + 2; /* noa attr + attr len */ 1520 len += 1 + 1; /* index + oppps_ctwindow */ 1521 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc); 1522 1523 return len; 1524} 1525 1526static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, 1527 struct sk_buff *bcn, 1528 struct wmi_bcn_info *bcn_info) 1529{ 1530 struct wmi_p2p_noa_info *noa = &bcn_info->p2p_noa_info; 1531 u8 *new_data, *old_data = arvif->u.ap.noa_data; 1532 u32 new_len; 1533 1534 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO) 1535 return; 1536 1537 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); 1538 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) { 1539 new_len = ath10k_p2p_calc_noa_ie_len(noa); 1540 if (!new_len) 1541 goto cleanup; 1542 1543 new_data = kmalloc(new_len, GFP_ATOMIC); 1544 if (!new_data) 1545 goto cleanup; 1546 1547 ath10k_p2p_fill_noa_ie(new_data, new_len, noa); 1548 1549 spin_lock_bh(&ar->data_lock); 1550 arvif->u.ap.noa_data = new_data; 1551 arvif->u.ap.noa_len = new_len; 1552 spin_unlock_bh(&ar->data_lock); 1553 kfree(old_data); 1554 } 1555 1556 if (arvif->u.ap.noa_data) 1557 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) 1558 memcpy(skb_put(bcn, arvif->u.ap.noa_len), 1559 arvif->u.ap.noa_data, 1560 arvif->u.ap.noa_len); 1561 return; 1562 1563cleanup: 1564 spin_lock_bh(&ar->data_lock); 1565 arvif->u.ap.noa_data = NULL; 1566 arvif->u.ap.noa_len = 0; 1567 spin_unlock_bh(&ar->data_lock); 1568 kfree(old_data); 1569} 1570 1571 1572static void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) 1573{ 1574 struct wmi_host_swba_event *ev; 1575 u32 map; 1576 int i = -1; 1577 struct wmi_bcn_info *bcn_info; 1578 struct ath10k_vif *arvif; 1579 struct sk_buff *bcn; 1580 int ret, vdev_id = 0; 1581 1582 ev = (struct wmi_host_swba_event *)skb->data; 1583 map = __le32_to_cpu(ev->vdev_map); 1584 1585 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", 1586 ev->vdev_map); 1587 1588 for (; map; map >>= 1, vdev_id++) { 1589 if (!(map & 0x1)) 1590 continue; 1591 1592 i++; 1593 1594 if (i >= WMI_MAX_AP_VDEV) { 1595 ath10k_warn(ar, "swba has corrupted vdev map\n"); 1596 break; 1597 } 1598 1599 bcn_info = &ev->bcn_info[i]; 1600 1601 ath10k_dbg(ar, ATH10K_DBG_MGMT, 1602 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", 1603 i, 1604 __le32_to_cpu(bcn_info->tim_info.tim_len), 1605 __le32_to_cpu(bcn_info->tim_info.tim_mcast), 1606 __le32_to_cpu(bcn_info->tim_info.tim_changed), 1607 __le32_to_cpu(bcn_info->tim_info.tim_num_ps_pending), 1608 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[3]), 1609 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[2]), 1610 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[1]), 1611 __le32_to_cpu(bcn_info->tim_info.tim_bitmap[0])); 1612 1613 arvif = ath10k_get_arvif(ar, vdev_id); 1614 if (arvif == NULL) { 1615 ath10k_warn(ar, "no vif for vdev_id %d found\n", 1616 vdev_id); 1617 continue; 1618 } 1619 1620 /* There are no completions for beacons so wait for next SWBA 1621 * before telling mac80211 to decrement CSA counter 1622 * 1623 * Once CSA counter is completed stop sending beacons until 1624 * actual channel switch is done */ 1625 if (arvif->vif->csa_active && 1626 ieee80211_csa_is_complete(arvif->vif)) { 1627 ieee80211_csa_finish(arvif->vif); 1628 continue; 1629 } 1630 1631 bcn = ieee80211_beacon_get(ar->hw, arvif->vif); 1632 if (!bcn) { 1633 ath10k_warn(ar, "could not get mac80211 beacon\n"); 1634 continue; 1635 } 1636 1637 ath10k_tx_h_seq_no(arvif->vif, bcn); 1638 ath10k_wmi_update_tim(ar, arvif, bcn, bcn_info); 1639 ath10k_wmi_update_noa(ar, arvif, bcn, bcn_info); 1640 1641 spin_lock_bh(&ar->data_lock); 1642 1643 if (arvif->beacon) { 1644 if (!arvif->beacon_sent) 1645 ath10k_warn(ar, "SWBA overrun on vdev %d\n", 1646 arvif->vdev_id); 1647 1648 dma_unmap_single(arvif->ar->dev, 1649 ATH10K_SKB_CB(arvif->beacon)->paddr, 1650 arvif->beacon->len, DMA_TO_DEVICE); 1651 dev_kfree_skb_any(arvif->beacon); 1652 arvif->beacon = NULL; 1653 } 1654 1655 ATH10K_SKB_CB(bcn)->paddr = dma_map_single(arvif->ar->dev, 1656 bcn->data, bcn->len, 1657 DMA_TO_DEVICE); 1658 ret = dma_mapping_error(arvif->ar->dev, 1659 ATH10K_SKB_CB(bcn)->paddr); 1660 if (ret) { 1661 ath10k_warn(ar, "failed to map beacon: %d\n", ret); 1662 dev_kfree_skb_any(bcn); 1663 goto skip; 1664 } 1665 1666 arvif->beacon = bcn; 1667 arvif->beacon_sent = false; 1668 1669 ath10k_wmi_tx_beacon_nowait(arvif); 1670skip: 1671 spin_unlock_bh(&ar->data_lock); 1672 } 1673} 1674 1675static void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, 1676 struct sk_buff *skb) 1677{ 1678 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); 1679} 1680 1681static void ath10k_dfs_radar_report(struct ath10k *ar, 1682 struct wmi_single_phyerr_rx_event *event, 1683 struct phyerr_radar_report *rr, 1684 u64 tsf) 1685{ 1686 u32 reg0, reg1, tsf32l; 1687 struct pulse_event pe; 1688 u64 tsf64; 1689 u8 rssi, width; 1690 1691 reg0 = __le32_to_cpu(rr->reg0); 1692 reg1 = __le32_to_cpu(rr->reg1); 1693 1694 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1695 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n", 1696 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), 1697 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), 1698 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), 1699 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); 1700 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1701 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n", 1702 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), 1703 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), 1704 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID), 1705 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN), 1706 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK)); 1707 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1708 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n", 1709 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET), 1710 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR)); 1711 1712 if (!ar->dfs_detector) 1713 return; 1714 1715 /* report event to DFS pattern detector */ 1716 tsf32l = __le32_to_cpu(event->hdr.tsf_timestamp); 1717 tsf64 = tsf & (~0xFFFFFFFFULL); 1718 tsf64 |= tsf32l; 1719 1720 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR); 1721 rssi = event->hdr.rssi_combined; 1722 1723 /* hardware store this as 8 bit signed value, 1724 * set to zero if negative number 1725 */ 1726 if (rssi & 0x80) 1727 rssi = 0; 1728 1729 pe.ts = tsf64; 1730 pe.freq = ar->hw->conf.chandef.chan->center_freq; 1731 pe.width = width; 1732 pe.rssi = rssi; 1733 1734 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1735 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n", 1736 pe.freq, pe.width, pe.rssi, pe.ts); 1737 1738 ATH10K_DFS_STAT_INC(ar, pulses_detected); 1739 1740 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) { 1741 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1742 "dfs no pulse pattern detected, yet\n"); 1743 return; 1744 } 1745 1746 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n"); 1747 ATH10K_DFS_STAT_INC(ar, radar_detected); 1748 1749 /* Control radar events reporting in debugfs file 1750 dfs_block_radar_events */ 1751 if (ar->dfs_block_radar_events) { 1752 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n"); 1753 return; 1754 } 1755 1756 ieee80211_radar_detected(ar->hw); 1757} 1758 1759static int ath10k_dfs_fft_report(struct ath10k *ar, 1760 struct wmi_single_phyerr_rx_event *event, 1761 struct phyerr_fft_report *fftr, 1762 u64 tsf) 1763{ 1764 u32 reg0, reg1; 1765 u8 rssi, peak_mag; 1766 1767 reg0 = __le32_to_cpu(fftr->reg0); 1768 reg1 = __le32_to_cpu(fftr->reg1); 1769 rssi = event->hdr.rssi_combined; 1770 1771 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1772 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n", 1773 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), 1774 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), 1775 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), 1776 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); 1777 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1778 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n", 1779 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB), 1780 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB), 1781 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG), 1782 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB)); 1783 1784 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG); 1785 1786 /* false event detection */ 1787 if (rssi == DFS_RSSI_POSSIBLY_FALSE && 1788 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) { 1789 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n"); 1790 ATH10K_DFS_STAT_INC(ar, pulses_discarded); 1791 return -EINVAL; 1792 } 1793 1794 return 0; 1795} 1796 1797static void ath10k_wmi_event_dfs(struct ath10k *ar, 1798 struct wmi_single_phyerr_rx_event *event, 1799 u64 tsf) 1800{ 1801 int buf_len, tlv_len, res, i = 0; 1802 struct phyerr_tlv *tlv; 1803 struct phyerr_radar_report *rr; 1804 struct phyerr_fft_report *fftr; 1805 u8 *tlv_buf; 1806 1807 buf_len = __le32_to_cpu(event->hdr.buf_len); 1808 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1809 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n", 1810 event->hdr.phy_err_code, event->hdr.rssi_combined, 1811 __le32_to_cpu(event->hdr.tsf_timestamp), tsf, buf_len); 1812 1813 /* Skip event if DFS disabled */ 1814 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) 1815 return; 1816 1817 ATH10K_DFS_STAT_INC(ar, pulses_total); 1818 1819 while (i < buf_len) { 1820 if (i + sizeof(*tlv) > buf_len) { 1821 ath10k_warn(ar, "too short buf for tlv header (%d)\n", 1822 i); 1823 return; 1824 } 1825 1826 tlv = (struct phyerr_tlv *)&event->bufp[i]; 1827 tlv_len = __le16_to_cpu(tlv->len); 1828 tlv_buf = &event->bufp[i + sizeof(*tlv)]; 1829 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 1830 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n", 1831 tlv_len, tlv->tag, tlv->sig); 1832 1833 switch (tlv->tag) { 1834 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY: 1835 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) { 1836 ath10k_warn(ar, "too short radar pulse summary (%d)\n", 1837 i); 1838 return; 1839 } 1840 1841 rr = (struct phyerr_radar_report *)tlv_buf; 1842 ath10k_dfs_radar_report(ar, event, rr, tsf); 1843 break; 1844 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: 1845 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) { 1846 ath10k_warn(ar, "too short fft report (%d)\n", 1847 i); 1848 return; 1849 } 1850 1851 fftr = (struct phyerr_fft_report *)tlv_buf; 1852 res = ath10k_dfs_fft_report(ar, event, fftr, tsf); 1853 if (res) 1854 return; 1855 break; 1856 } 1857 1858 i += sizeof(*tlv) + tlv_len; 1859 } 1860} 1861 1862static void ath10k_wmi_event_spectral_scan(struct ath10k *ar, 1863 struct wmi_single_phyerr_rx_event *event, 1864 u64 tsf) 1865{ 1866 int buf_len, tlv_len, res, i = 0; 1867 struct phyerr_tlv *tlv; 1868 u8 *tlv_buf; 1869 struct phyerr_fft_report *fftr; 1870 size_t fftr_len; 1871 1872 buf_len = __le32_to_cpu(event->hdr.buf_len); 1873 1874 while (i < buf_len) { 1875 if (i + sizeof(*tlv) > buf_len) { 1876 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n", 1877 i); 1878 return; 1879 } 1880 1881 tlv = (struct phyerr_tlv *)&event->bufp[i]; 1882 tlv_len = __le16_to_cpu(tlv->len); 1883 tlv_buf = &event->bufp[i + sizeof(*tlv)]; 1884 1885 if (i + sizeof(*tlv) + tlv_len > buf_len) { 1886 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n", 1887 i); 1888 return; 1889 } 1890 1891 switch (tlv->tag) { 1892 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: 1893 if (sizeof(*fftr) > tlv_len) { 1894 ath10k_warn(ar, "failed to parse fft report at byte %d\n", 1895 i); 1896 return; 1897 } 1898 1899 fftr_len = tlv_len - sizeof(*fftr); 1900 fftr = (struct phyerr_fft_report *)tlv_buf; 1901 res = ath10k_spectral_process_fft(ar, event, 1902 fftr, fftr_len, 1903 tsf); 1904 if (res < 0) { 1905 ath10k_warn(ar, "failed to process fft report: %d\n", 1906 res); 1907 return; 1908 } 1909 break; 1910 } 1911 1912 i += sizeof(*tlv) + tlv_len; 1913 } 1914} 1915 1916static void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) 1917{ 1918 struct wmi_comb_phyerr_rx_event *comb_event; 1919 struct wmi_single_phyerr_rx_event *event; 1920 u32 count, i, buf_len, phy_err_code; 1921 u64 tsf; 1922 int left_len = skb->len; 1923 1924 ATH10K_DFS_STAT_INC(ar, phy_errors); 1925 1926 /* Check if combined event available */ 1927 if (left_len < sizeof(*comb_event)) { 1928 ath10k_warn(ar, "wmi phyerr combined event wrong len\n"); 1929 return; 1930 } 1931 1932 left_len -= sizeof(*comb_event); 1933 1934 /* Check number of included events */ 1935 comb_event = (struct wmi_comb_phyerr_rx_event *)skb->data; 1936 count = __le32_to_cpu(comb_event->hdr.num_phyerr_events); 1937 1938 tsf = __le32_to_cpu(comb_event->hdr.tsf_u32); 1939 tsf <<= 32; 1940 tsf |= __le32_to_cpu(comb_event->hdr.tsf_l32); 1941 1942 ath10k_dbg(ar, ATH10K_DBG_WMI, 1943 "wmi event phyerr count %d tsf64 0x%llX\n", 1944 count, tsf); 1945 1946 event = (struct wmi_single_phyerr_rx_event *)comb_event->bufp; 1947 for (i = 0; i < count; i++) { 1948 /* Check if we can read event header */ 1949 if (left_len < sizeof(*event)) { 1950 ath10k_warn(ar, "single event (%d) wrong head len\n", 1951 i); 1952 return; 1953 } 1954 1955 left_len -= sizeof(*event); 1956 1957 buf_len = __le32_to_cpu(event->hdr.buf_len); 1958 phy_err_code = event->hdr.phy_err_code; 1959 1960 if (left_len < buf_len) { 1961 ath10k_warn(ar, "single event (%d) wrong buf len\n", i); 1962 return; 1963 } 1964 1965 left_len -= buf_len; 1966 1967 switch (phy_err_code) { 1968 case PHY_ERROR_RADAR: 1969 ath10k_wmi_event_dfs(ar, event, tsf); 1970 break; 1971 case PHY_ERROR_SPECTRAL_SCAN: 1972 ath10k_wmi_event_spectral_scan(ar, event, tsf); 1973 break; 1974 case PHY_ERROR_FALSE_RADAR_EXT: 1975 ath10k_wmi_event_dfs(ar, event, tsf); 1976 ath10k_wmi_event_spectral_scan(ar, event, tsf); 1977 break; 1978 default: 1979 break; 1980 } 1981 1982 event += sizeof(*event) + buf_len; 1983 } 1984} 1985 1986static void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) 1987{ 1988 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n"); 1989} 1990 1991static void ath10k_wmi_event_profile_match(struct ath10k *ar, 1992 struct sk_buff *skb) 1993{ 1994 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); 1995} 1996 1997static void ath10k_wmi_event_debug_print(struct ath10k *ar, 1998 struct sk_buff *skb) 1999{ 2000 char buf[101], c; 2001 int i; 2002 2003 for (i = 0; i < sizeof(buf) - 1; i++) { 2004 if (i >= skb->len) 2005 break; 2006 2007 c = skb->data[i]; 2008 2009 if (c == '\0') 2010 break; 2011 2012 if (isascii(c) && isprint(c)) 2013 buf[i] = c; 2014 else 2015 buf[i] = '.'; 2016 } 2017 2018 if (i == sizeof(buf) - 1) 2019 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len); 2020 2021 /* for some reason the debug prints end with \n, remove that */ 2022 if (skb->data[i - 1] == '\n') 2023 i--; 2024 2025 /* the last byte is always reserved for the null character */ 2026 buf[i] = '\0'; 2027 2028 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug print '%s'\n", buf); 2029} 2030 2031static void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) 2032{ 2033 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); 2034} 2035 2036static void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, 2037 struct sk_buff *skb) 2038{ 2039 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); 2040} 2041 2042static void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, 2043 struct sk_buff *skb) 2044{ 2045 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); 2046} 2047 2048static void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, 2049 struct sk_buff *skb) 2050{ 2051 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); 2052} 2053 2054static void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, 2055 struct sk_buff *skb) 2056{ 2057 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); 2058} 2059 2060static void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, 2061 struct sk_buff *skb) 2062{ 2063 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n"); 2064} 2065 2066static void ath10k_wmi_event_dcs_interference(struct ath10k *ar, 2067 struct sk_buff *skb) 2068{ 2069 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); 2070} 2071 2072static void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, 2073 struct sk_buff *skb) 2074{ 2075 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n"); 2076} 2077 2078static void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, 2079 struct sk_buff *skb) 2080{ 2081 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); 2082} 2083 2084static void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, 2085 struct sk_buff *skb) 2086{ 2087 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); 2088} 2089 2090static void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, 2091 struct sk_buff *skb) 2092{ 2093 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); 2094} 2095 2096static void ath10k_wmi_event_delba_complete(struct ath10k *ar, 2097 struct sk_buff *skb) 2098{ 2099 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); 2100} 2101 2102static void ath10k_wmi_event_addba_complete(struct ath10k *ar, 2103 struct sk_buff *skb) 2104{ 2105 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); 2106} 2107 2108static void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, 2109 struct sk_buff *skb) 2110{ 2111 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); 2112} 2113 2114static void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, 2115 struct sk_buff *skb) 2116{ 2117 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); 2118} 2119 2120static void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, 2121 struct sk_buff *skb) 2122{ 2123 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); 2124} 2125 2126static void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, 2127 struct sk_buff *skb) 2128{ 2129 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); 2130} 2131 2132static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, 2133 u32 num_units, u32 unit_len) 2134{ 2135 dma_addr_t paddr; 2136 u32 pool_size; 2137 int idx = ar->wmi.num_mem_chunks; 2138 2139 pool_size = num_units * round_up(unit_len, 4); 2140 2141 if (!pool_size) 2142 return -EINVAL; 2143 2144 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev, 2145 pool_size, 2146 &paddr, 2147 GFP_ATOMIC); 2148 if (!ar->wmi.mem_chunks[idx].vaddr) { 2149 ath10k_warn(ar, "failed to allocate memory chunk\n"); 2150 return -ENOMEM; 2151 } 2152 2153 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size); 2154 2155 ar->wmi.mem_chunks[idx].paddr = paddr; 2156 ar->wmi.mem_chunks[idx].len = pool_size; 2157 ar->wmi.mem_chunks[idx].req_id = req_id; 2158 ar->wmi.num_mem_chunks++; 2159 2160 return 0; 2161} 2162 2163static void ath10k_wmi_service_ready_event_rx(struct ath10k *ar, 2164 struct sk_buff *skb) 2165{ 2166 struct wmi_service_ready_event *ev = (void *)skb->data; 2167 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {}; 2168 2169 if (skb->len < sizeof(*ev)) { 2170 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n", 2171 skb->len, sizeof(*ev)); 2172 return; 2173 } 2174 2175 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power); 2176 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power); 2177 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info); 2178 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info); 2179 ar->fw_version_major = 2180 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24; 2181 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff); 2182 ar->fw_version_release = 2183 (__le32_to_cpu(ev->sw_version_1) & 0xffff0000) >> 16; 2184 ar->fw_version_build = (__le32_to_cpu(ev->sw_version_1) & 0x0000ffff); 2185 ar->phy_capability = __le32_to_cpu(ev->phy_capability); 2186 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains); 2187 2188 /* only manually set fw features when not using FW IE format */ 2189 if (ar->fw_api == 1 && ar->fw_version_build > 636) 2190 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features); 2191 2192 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) { 2193 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", 2194 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM); 2195 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM; 2196 } 2197 2198 ar->ath_common.regulatory.current_rd = 2199 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd); 2200 2201 wmi_main_svc_map(ev->wmi_service_bitmap, svc_bmap); 2202 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap)); 2203 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", 2204 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap)); 2205 2206 if (strlen(ar->hw->wiphy->fw_version) == 0) { 2207 snprintf(ar->hw->wiphy->fw_version, 2208 sizeof(ar->hw->wiphy->fw_version), 2209 "%u.%u.%u.%u", 2210 ar->fw_version_major, 2211 ar->fw_version_minor, 2212 ar->fw_version_release, 2213 ar->fw_version_build); 2214 } 2215 2216 /* FIXME: it probably should be better to support this */ 2217 if (__le32_to_cpu(ev->num_mem_reqs) > 0) { 2218 ath10k_warn(ar, "target requested %d memory chunks; ignoring\n", 2219 __le32_to_cpu(ev->num_mem_reqs)); 2220 } 2221 2222 ath10k_dbg(ar, ATH10K_DBG_WMI, 2223 "wmi event service ready sw_ver 0x%08x sw_ver1 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n", 2224 __le32_to_cpu(ev->sw_version), 2225 __le32_to_cpu(ev->sw_version_1), 2226 __le32_to_cpu(ev->abi_version), 2227 __le32_to_cpu(ev->phy_capability), 2228 __le32_to_cpu(ev->ht_cap_info), 2229 __le32_to_cpu(ev->vht_cap_info), 2230 __le32_to_cpu(ev->vht_supp_mcs), 2231 __le32_to_cpu(ev->sys_cap_info), 2232 __le32_to_cpu(ev->num_mem_reqs), 2233 __le32_to_cpu(ev->num_rf_chains)); 2234 2235 complete(&ar->wmi.service_ready); 2236} 2237 2238static void ath10k_wmi_10x_service_ready_event_rx(struct ath10k *ar, 2239 struct sk_buff *skb) 2240{ 2241 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; 2242 int ret; 2243 struct wmi_service_ready_event_10x *ev = (void *)skb->data; 2244 DECLARE_BITMAP(svc_bmap, WMI_SERVICE_MAX) = {}; 2245 2246 if (skb->len < sizeof(*ev)) { 2247 ath10k_warn(ar, "Service ready event was %d B but expected %zu B. Wrong firmware version?\n", 2248 skb->len, sizeof(*ev)); 2249 return; 2250 } 2251 2252 ar->hw_min_tx_power = __le32_to_cpu(ev->hw_min_tx_power); 2253 ar->hw_max_tx_power = __le32_to_cpu(ev->hw_max_tx_power); 2254 ar->ht_cap_info = __le32_to_cpu(ev->ht_cap_info); 2255 ar->vht_cap_info = __le32_to_cpu(ev->vht_cap_info); 2256 ar->fw_version_major = 2257 (__le32_to_cpu(ev->sw_version) & 0xff000000) >> 24; 2258 ar->fw_version_minor = (__le32_to_cpu(ev->sw_version) & 0x00ffffff); 2259 ar->phy_capability = __le32_to_cpu(ev->phy_capability); 2260 ar->num_rf_chains = __le32_to_cpu(ev->num_rf_chains); 2261 2262 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) { 2263 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", 2264 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM); 2265 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM; 2266 } 2267 2268 ar->ath_common.regulatory.current_rd = 2269 __le32_to_cpu(ev->hal_reg_capabilities.eeprom_rd); 2270 2271 wmi_10x_svc_map(ev->wmi_service_bitmap, svc_bmap); 2272 ath10k_debug_read_service_map(ar, svc_bmap, sizeof(svc_bmap)); 2273 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", 2274 ev->wmi_service_bitmap, sizeof(ev->wmi_service_bitmap)); 2275 2276 if (strlen(ar->hw->wiphy->fw_version) == 0) { 2277 snprintf(ar->hw->wiphy->fw_version, 2278 sizeof(ar->hw->wiphy->fw_version), 2279 "%u.%u", 2280 ar->fw_version_major, 2281 ar->fw_version_minor); 2282 } 2283 2284 num_mem_reqs = __le32_to_cpu(ev->num_mem_reqs); 2285 2286 if (num_mem_reqs > ATH10K_MAX_MEM_REQS) { 2287 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n", 2288 num_mem_reqs); 2289 return; 2290 } 2291 2292 if (!num_mem_reqs) 2293 goto exit; 2294 2295 ath10k_dbg(ar, ATH10K_DBG_WMI, "firmware has requested %d memory chunks\n", 2296 num_mem_reqs); 2297 2298 for (i = 0; i < num_mem_reqs; ++i) { 2299 req_id = __le32_to_cpu(ev->mem_reqs[i].req_id); 2300 num_units = __le32_to_cpu(ev->mem_reqs[i].num_units); 2301 unit_size = __le32_to_cpu(ev->mem_reqs[i].unit_size); 2302 num_unit_info = __le32_to_cpu(ev->mem_reqs[i].num_unit_info); 2303 2304 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) 2305 /* number of units to allocate is number of 2306 * peers, 1 extra for self peer on target */ 2307 /* this needs to be tied, host and target 2308 * can get out of sync */ 2309 num_units = TARGET_10X_NUM_PEERS + 1; 2310 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) 2311 num_units = TARGET_10X_NUM_VDEVS + 1; 2312 2313 ath10k_dbg(ar, ATH10K_DBG_WMI, 2314 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n", 2315 req_id, 2316 __le32_to_cpu(ev->mem_reqs[i].num_units), 2317 num_unit_info, 2318 unit_size, 2319 num_units); 2320 2321 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units, 2322 unit_size); 2323 if (ret) 2324 return; 2325 } 2326 2327exit: 2328 ath10k_dbg(ar, ATH10K_DBG_WMI, 2329 "wmi event service ready sw_ver 0x%08x abi_ver %u phy_cap 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_msc 0x%08x sys_cap_info 0x%08x mem_reqs %u num_rf_chains %u\n", 2330 __le32_to_cpu(ev->sw_version), 2331 __le32_to_cpu(ev->abi_version), 2332 __le32_to_cpu(ev->phy_capability), 2333 __le32_to_cpu(ev->ht_cap_info), 2334 __le32_to_cpu(ev->vht_cap_info), 2335 __le32_to_cpu(ev->vht_supp_mcs), 2336 __le32_to_cpu(ev->sys_cap_info), 2337 __le32_to_cpu(ev->num_mem_reqs), 2338 __le32_to_cpu(ev->num_rf_chains)); 2339 2340 complete(&ar->wmi.service_ready); 2341} 2342 2343static int ath10k_wmi_ready_event_rx(struct ath10k *ar, struct sk_buff *skb) 2344{ 2345 struct wmi_ready_event *ev = (struct wmi_ready_event *)skb->data; 2346 2347 if (WARN_ON(skb->len < sizeof(*ev))) 2348 return -EINVAL; 2349 2350 memcpy(ar->mac_addr, ev->mac_addr.addr, ETH_ALEN); 2351 2352 ath10k_dbg(ar, ATH10K_DBG_WMI, 2353 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d skb->len %i ev-sz %zu\n", 2354 __le32_to_cpu(ev->sw_version), 2355 __le32_to_cpu(ev->abi_version), 2356 ev->mac_addr.addr, 2357 __le32_to_cpu(ev->status), skb->len, sizeof(*ev)); 2358 2359 complete(&ar->wmi.unified_ready); 2360 return 0; 2361} 2362 2363static void ath10k_wmi_main_process_rx(struct ath10k *ar, struct sk_buff *skb) 2364{ 2365 struct wmi_cmd_hdr *cmd_hdr; 2366 enum wmi_event_id id; 2367 2368 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 2369 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 2370 2371 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 2372 return; 2373 2374 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 2375 2376 switch (id) { 2377 case WMI_MGMT_RX_EVENTID: 2378 ath10k_wmi_event_mgmt_rx(ar, skb); 2379 /* mgmt_rx() owns the skb now! */ 2380 return; 2381 case WMI_SCAN_EVENTID: 2382 ath10k_wmi_event_scan(ar, skb); 2383 break; 2384 case WMI_CHAN_INFO_EVENTID: 2385 ath10k_wmi_event_chan_info(ar, skb); 2386 break; 2387 case WMI_ECHO_EVENTID: 2388 ath10k_wmi_event_echo(ar, skb); 2389 break; 2390 case WMI_DEBUG_MESG_EVENTID: 2391 ath10k_wmi_event_debug_mesg(ar, skb); 2392 break; 2393 case WMI_UPDATE_STATS_EVENTID: 2394 ath10k_wmi_event_update_stats(ar, skb); 2395 break; 2396 case WMI_VDEV_START_RESP_EVENTID: 2397 ath10k_wmi_event_vdev_start_resp(ar, skb); 2398 break; 2399 case WMI_VDEV_STOPPED_EVENTID: 2400 ath10k_wmi_event_vdev_stopped(ar, skb); 2401 break; 2402 case WMI_PEER_STA_KICKOUT_EVENTID: 2403 ath10k_wmi_event_peer_sta_kickout(ar, skb); 2404 break; 2405 case WMI_HOST_SWBA_EVENTID: 2406 ath10k_wmi_event_host_swba(ar, skb); 2407 break; 2408 case WMI_TBTTOFFSET_UPDATE_EVENTID: 2409 ath10k_wmi_event_tbttoffset_update(ar, skb); 2410 break; 2411 case WMI_PHYERR_EVENTID: 2412 ath10k_wmi_event_phyerr(ar, skb); 2413 break; 2414 case WMI_ROAM_EVENTID: 2415 ath10k_wmi_event_roam(ar, skb); 2416 break; 2417 case WMI_PROFILE_MATCH: 2418 ath10k_wmi_event_profile_match(ar, skb); 2419 break; 2420 case WMI_DEBUG_PRINT_EVENTID: 2421 ath10k_wmi_event_debug_print(ar, skb); 2422 break; 2423 case WMI_PDEV_QVIT_EVENTID: 2424 ath10k_wmi_event_pdev_qvit(ar, skb); 2425 break; 2426 case WMI_WLAN_PROFILE_DATA_EVENTID: 2427 ath10k_wmi_event_wlan_profile_data(ar, skb); 2428 break; 2429 case WMI_RTT_MEASUREMENT_REPORT_EVENTID: 2430 ath10k_wmi_event_rtt_measurement_report(ar, skb); 2431 break; 2432 case WMI_TSF_MEASUREMENT_REPORT_EVENTID: 2433 ath10k_wmi_event_tsf_measurement_report(ar, skb); 2434 break; 2435 case WMI_RTT_ERROR_REPORT_EVENTID: 2436 ath10k_wmi_event_rtt_error_report(ar, skb); 2437 break; 2438 case WMI_WOW_WAKEUP_HOST_EVENTID: 2439 ath10k_wmi_event_wow_wakeup_host(ar, skb); 2440 break; 2441 case WMI_DCS_INTERFERENCE_EVENTID: 2442 ath10k_wmi_event_dcs_interference(ar, skb); 2443 break; 2444 case WMI_PDEV_TPC_CONFIG_EVENTID: 2445 ath10k_wmi_event_pdev_tpc_config(ar, skb); 2446 break; 2447 case WMI_PDEV_FTM_INTG_EVENTID: 2448 ath10k_wmi_event_pdev_ftm_intg(ar, skb); 2449 break; 2450 case WMI_GTK_OFFLOAD_STATUS_EVENTID: 2451 ath10k_wmi_event_gtk_offload_status(ar, skb); 2452 break; 2453 case WMI_GTK_REKEY_FAIL_EVENTID: 2454 ath10k_wmi_event_gtk_rekey_fail(ar, skb); 2455 break; 2456 case WMI_TX_DELBA_COMPLETE_EVENTID: 2457 ath10k_wmi_event_delba_complete(ar, skb); 2458 break; 2459 case WMI_TX_ADDBA_COMPLETE_EVENTID: 2460 ath10k_wmi_event_addba_complete(ar, skb); 2461 break; 2462 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 2463 ath10k_wmi_event_vdev_install_key_complete(ar, skb); 2464 break; 2465 case WMI_SERVICE_READY_EVENTID: 2466 ath10k_wmi_service_ready_event_rx(ar, skb); 2467 break; 2468 case WMI_READY_EVENTID: 2469 ath10k_wmi_ready_event_rx(ar, skb); 2470 break; 2471 default: 2472 ath10k_warn(ar, "Unknown eventid: %d\n", id); 2473 break; 2474 } 2475 2476 dev_kfree_skb(skb); 2477} 2478 2479static void ath10k_wmi_10x_process_rx(struct ath10k *ar, struct sk_buff *skb) 2480{ 2481 struct wmi_cmd_hdr *cmd_hdr; 2482 enum wmi_10x_event_id id; 2483 bool consumed; 2484 2485 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 2486 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 2487 2488 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 2489 return; 2490 2491 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 2492 2493 consumed = ath10k_tm_event_wmi(ar, id, skb); 2494 2495 /* Ready event must be handled normally also in UTF mode so that we 2496 * know the UTF firmware has booted, others we are just bypass WMI 2497 * events to testmode. 2498 */ 2499 if (consumed && id != WMI_10X_READY_EVENTID) { 2500 ath10k_dbg(ar, ATH10K_DBG_WMI, 2501 "wmi testmode consumed 0x%x\n", id); 2502 goto out; 2503 } 2504 2505 switch (id) { 2506 case WMI_10X_MGMT_RX_EVENTID: 2507 ath10k_wmi_event_mgmt_rx(ar, skb); 2508 /* mgmt_rx() owns the skb now! */ 2509 return; 2510 case WMI_10X_SCAN_EVENTID: 2511 ath10k_wmi_event_scan(ar, skb); 2512 break; 2513 case WMI_10X_CHAN_INFO_EVENTID: 2514 ath10k_wmi_event_chan_info(ar, skb); 2515 break; 2516 case WMI_10X_ECHO_EVENTID: 2517 ath10k_wmi_event_echo(ar, skb); 2518 break; 2519 case WMI_10X_DEBUG_MESG_EVENTID: 2520 ath10k_wmi_event_debug_mesg(ar, skb); 2521 break; 2522 case WMI_10X_UPDATE_STATS_EVENTID: 2523 ath10k_wmi_event_update_stats(ar, skb); 2524 break; 2525 case WMI_10X_VDEV_START_RESP_EVENTID: 2526 ath10k_wmi_event_vdev_start_resp(ar, skb); 2527 break; 2528 case WMI_10X_VDEV_STOPPED_EVENTID: 2529 ath10k_wmi_event_vdev_stopped(ar, skb); 2530 break; 2531 case WMI_10X_PEER_STA_KICKOUT_EVENTID: 2532 ath10k_wmi_event_peer_sta_kickout(ar, skb); 2533 break; 2534 case WMI_10X_HOST_SWBA_EVENTID: 2535 ath10k_wmi_event_host_swba(ar, skb); 2536 break; 2537 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID: 2538 ath10k_wmi_event_tbttoffset_update(ar, skb); 2539 break; 2540 case WMI_10X_PHYERR_EVENTID: 2541 ath10k_wmi_event_phyerr(ar, skb); 2542 break; 2543 case WMI_10X_ROAM_EVENTID: 2544 ath10k_wmi_event_roam(ar, skb); 2545 break; 2546 case WMI_10X_PROFILE_MATCH: 2547 ath10k_wmi_event_profile_match(ar, skb); 2548 break; 2549 case WMI_10X_DEBUG_PRINT_EVENTID: 2550 ath10k_wmi_event_debug_print(ar, skb); 2551 break; 2552 case WMI_10X_PDEV_QVIT_EVENTID: 2553 ath10k_wmi_event_pdev_qvit(ar, skb); 2554 break; 2555 case WMI_10X_WLAN_PROFILE_DATA_EVENTID: 2556 ath10k_wmi_event_wlan_profile_data(ar, skb); 2557 break; 2558 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID: 2559 ath10k_wmi_event_rtt_measurement_report(ar, skb); 2560 break; 2561 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID: 2562 ath10k_wmi_event_tsf_measurement_report(ar, skb); 2563 break; 2564 case WMI_10X_RTT_ERROR_REPORT_EVENTID: 2565 ath10k_wmi_event_rtt_error_report(ar, skb); 2566 break; 2567 case WMI_10X_WOW_WAKEUP_HOST_EVENTID: 2568 ath10k_wmi_event_wow_wakeup_host(ar, skb); 2569 break; 2570 case WMI_10X_DCS_INTERFERENCE_EVENTID: 2571 ath10k_wmi_event_dcs_interference(ar, skb); 2572 break; 2573 case WMI_10X_PDEV_TPC_CONFIG_EVENTID: 2574 ath10k_wmi_event_pdev_tpc_config(ar, skb); 2575 break; 2576 case WMI_10X_INST_RSSI_STATS_EVENTID: 2577 ath10k_wmi_event_inst_rssi_stats(ar, skb); 2578 break; 2579 case WMI_10X_VDEV_STANDBY_REQ_EVENTID: 2580 ath10k_wmi_event_vdev_standby_req(ar, skb); 2581 break; 2582 case WMI_10X_VDEV_RESUME_REQ_EVENTID: 2583 ath10k_wmi_event_vdev_resume_req(ar, skb); 2584 break; 2585 case WMI_10X_SERVICE_READY_EVENTID: 2586 ath10k_wmi_10x_service_ready_event_rx(ar, skb); 2587 break; 2588 case WMI_10X_READY_EVENTID: 2589 ath10k_wmi_ready_event_rx(ar, skb); 2590 break; 2591 case WMI_10X_PDEV_UTF_EVENTID: 2592 /* ignore utf events */ 2593 break; 2594 default: 2595 ath10k_warn(ar, "Unknown eventid: %d\n", id); 2596 break; 2597 } 2598 2599out: 2600 dev_kfree_skb(skb); 2601} 2602 2603static void ath10k_wmi_10_2_process_rx(struct ath10k *ar, struct sk_buff *skb) 2604{ 2605 struct wmi_cmd_hdr *cmd_hdr; 2606 enum wmi_10_2_event_id id; 2607 2608 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 2609 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 2610 2611 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 2612 return; 2613 2614 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 2615 2616 switch (id) { 2617 case WMI_10_2_MGMT_RX_EVENTID: 2618 ath10k_wmi_event_mgmt_rx(ar, skb); 2619 /* mgmt_rx() owns the skb now! */ 2620 return; 2621 case WMI_10_2_SCAN_EVENTID: 2622 ath10k_wmi_event_scan(ar, skb); 2623 break; 2624 case WMI_10_2_CHAN_INFO_EVENTID: 2625 ath10k_wmi_event_chan_info(ar, skb); 2626 break; 2627 case WMI_10_2_ECHO_EVENTID: 2628 ath10k_wmi_event_echo(ar, skb); 2629 break; 2630 case WMI_10_2_DEBUG_MESG_EVENTID: 2631 ath10k_wmi_event_debug_mesg(ar, skb); 2632 break; 2633 case WMI_10_2_UPDATE_STATS_EVENTID: 2634 ath10k_wmi_event_update_stats(ar, skb); 2635 break; 2636 case WMI_10_2_VDEV_START_RESP_EVENTID: 2637 ath10k_wmi_event_vdev_start_resp(ar, skb); 2638 break; 2639 case WMI_10_2_VDEV_STOPPED_EVENTID: 2640 ath10k_wmi_event_vdev_stopped(ar, skb); 2641 break; 2642 case WMI_10_2_PEER_STA_KICKOUT_EVENTID: 2643 ath10k_wmi_event_peer_sta_kickout(ar, skb); 2644 break; 2645 case WMI_10_2_HOST_SWBA_EVENTID: 2646 ath10k_wmi_event_host_swba(ar, skb); 2647 break; 2648 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID: 2649 ath10k_wmi_event_tbttoffset_update(ar, skb); 2650 break; 2651 case WMI_10_2_PHYERR_EVENTID: 2652 ath10k_wmi_event_phyerr(ar, skb); 2653 break; 2654 case WMI_10_2_ROAM_EVENTID: 2655 ath10k_wmi_event_roam(ar, skb); 2656 break; 2657 case WMI_10_2_PROFILE_MATCH: 2658 ath10k_wmi_event_profile_match(ar, skb); 2659 break; 2660 case WMI_10_2_DEBUG_PRINT_EVENTID: 2661 ath10k_wmi_event_debug_print(ar, skb); 2662 break; 2663 case WMI_10_2_PDEV_QVIT_EVENTID: 2664 ath10k_wmi_event_pdev_qvit(ar, skb); 2665 break; 2666 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID: 2667 ath10k_wmi_event_wlan_profile_data(ar, skb); 2668 break; 2669 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID: 2670 ath10k_wmi_event_rtt_measurement_report(ar, skb); 2671 break; 2672 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID: 2673 ath10k_wmi_event_tsf_measurement_report(ar, skb); 2674 break; 2675 case WMI_10_2_RTT_ERROR_REPORT_EVENTID: 2676 ath10k_wmi_event_rtt_error_report(ar, skb); 2677 break; 2678 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID: 2679 ath10k_wmi_event_wow_wakeup_host(ar, skb); 2680 break; 2681 case WMI_10_2_DCS_INTERFERENCE_EVENTID: 2682 ath10k_wmi_event_dcs_interference(ar, skb); 2683 break; 2684 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID: 2685 ath10k_wmi_event_pdev_tpc_config(ar, skb); 2686 break; 2687 case WMI_10_2_INST_RSSI_STATS_EVENTID: 2688 ath10k_wmi_event_inst_rssi_stats(ar, skb); 2689 break; 2690 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID: 2691 ath10k_wmi_event_vdev_standby_req(ar, skb); 2692 break; 2693 case WMI_10_2_VDEV_RESUME_REQ_EVENTID: 2694 ath10k_wmi_event_vdev_resume_req(ar, skb); 2695 break; 2696 case WMI_10_2_SERVICE_READY_EVENTID: 2697 ath10k_wmi_10x_service_ready_event_rx(ar, skb); 2698 break; 2699 case WMI_10_2_READY_EVENTID: 2700 ath10k_wmi_ready_event_rx(ar, skb); 2701 break; 2702 case WMI_10_2_RTT_KEEPALIVE_EVENTID: 2703 case WMI_10_2_GPIO_INPUT_EVENTID: 2704 case WMI_10_2_PEER_RATECODE_LIST_EVENTID: 2705 case WMI_10_2_GENERIC_BUFFER_EVENTID: 2706 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID: 2707 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID: 2708 case WMI_10_2_WDS_PEER_EVENTID: 2709 ath10k_dbg(ar, ATH10K_DBG_WMI, 2710 "received event id %d not implemented\n", id); 2711 break; 2712 default: 2713 ath10k_warn(ar, "Unknown eventid: %d\n", id); 2714 break; 2715 } 2716 2717 dev_kfree_skb(skb); 2718} 2719 2720static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) 2721{ 2722 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 2723 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) 2724 ath10k_wmi_10_2_process_rx(ar, skb); 2725 else 2726 ath10k_wmi_10x_process_rx(ar, skb); 2727 } else { 2728 ath10k_wmi_main_process_rx(ar, skb); 2729 } 2730} 2731 2732/* WMI Initialization functions */ 2733int ath10k_wmi_attach(struct ath10k *ar) 2734{ 2735 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 2736 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) 2737 ar->wmi.cmd = &wmi_10_2_cmd_map; 2738 else 2739 ar->wmi.cmd = &wmi_10x_cmd_map; 2740 2741 ar->wmi.vdev_param = &wmi_10x_vdev_param_map; 2742 ar->wmi.pdev_param = &wmi_10x_pdev_param_map; 2743 } else { 2744 ar->wmi.cmd = &wmi_cmd_map; 2745 ar->wmi.vdev_param = &wmi_vdev_param_map; 2746 ar->wmi.pdev_param = &wmi_pdev_param_map; 2747 } 2748 2749 init_completion(&ar->wmi.service_ready); 2750 init_completion(&ar->wmi.unified_ready); 2751 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2752 2753 return 0; 2754} 2755 2756void ath10k_wmi_detach(struct ath10k *ar) 2757{ 2758 int i; 2759 2760 /* free the host memory chunks requested by firmware */ 2761 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 2762 dma_free_coherent(ar->dev, 2763 ar->wmi.mem_chunks[i].len, 2764 ar->wmi.mem_chunks[i].vaddr, 2765 ar->wmi.mem_chunks[i].paddr); 2766 } 2767 2768 ar->wmi.num_mem_chunks = 0; 2769} 2770 2771int ath10k_wmi_connect(struct ath10k *ar) 2772{ 2773 int status; 2774 struct ath10k_htc_svc_conn_req conn_req; 2775 struct ath10k_htc_svc_conn_resp conn_resp; 2776 2777 memset(&conn_req, 0, sizeof(conn_req)); 2778 memset(&conn_resp, 0, sizeof(conn_resp)); 2779 2780 /* these fields are the same for all service endpoints */ 2781 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; 2782 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; 2783 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; 2784 2785 /* connect to control service */ 2786 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; 2787 2788 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); 2789 if (status) { 2790 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n", 2791 status); 2792 return status; 2793 } 2794 2795 ar->wmi.eid = conn_resp.eid; 2796 return 0; 2797} 2798 2799static int ath10k_wmi_main_pdev_set_regdomain(struct ath10k *ar, u16 rd, 2800 u16 rd2g, u16 rd5g, u16 ctl2g, 2801 u16 ctl5g) 2802{ 2803 struct wmi_pdev_set_regdomain_cmd *cmd; 2804 struct sk_buff *skb; 2805 2806 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 2807 if (!skb) 2808 return -ENOMEM; 2809 2810 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 2811 cmd->reg_domain = __cpu_to_le32(rd); 2812 cmd->reg_domain_2G = __cpu_to_le32(rd2g); 2813 cmd->reg_domain_5G = __cpu_to_le32(rd5g); 2814 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); 2815 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); 2816 2817 ath10k_dbg(ar, ATH10K_DBG_WMI, 2818 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", 2819 rd, rd2g, rd5g, ctl2g, ctl5g); 2820 2821 return ath10k_wmi_cmd_send(ar, skb, 2822 ar->wmi.cmd->pdev_set_regdomain_cmdid); 2823} 2824 2825static int ath10k_wmi_10x_pdev_set_regdomain(struct ath10k *ar, u16 rd, 2826 u16 rd2g, u16 rd5g, 2827 u16 ctl2g, u16 ctl5g, 2828 enum wmi_dfs_region dfs_reg) 2829{ 2830 struct wmi_pdev_set_regdomain_cmd_10x *cmd; 2831 struct sk_buff *skb; 2832 2833 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 2834 if (!skb) 2835 return -ENOMEM; 2836 2837 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; 2838 cmd->reg_domain = __cpu_to_le32(rd); 2839 cmd->reg_domain_2G = __cpu_to_le32(rd2g); 2840 cmd->reg_domain_5G = __cpu_to_le32(rd5g); 2841 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); 2842 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); 2843 cmd->dfs_domain = __cpu_to_le32(dfs_reg); 2844 2845 ath10k_dbg(ar, ATH10K_DBG_WMI, 2846 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", 2847 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); 2848 2849 return ath10k_wmi_cmd_send(ar, skb, 2850 ar->wmi.cmd->pdev_set_regdomain_cmdid); 2851} 2852 2853int ath10k_wmi_pdev_set_regdomain(struct ath10k *ar, u16 rd, u16 rd2g, 2854 u16 rd5g, u16 ctl2g, u16 ctl5g, 2855 enum wmi_dfs_region dfs_reg) 2856{ 2857 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) 2858 return ath10k_wmi_10x_pdev_set_regdomain(ar, rd, rd2g, rd5g, 2859 ctl2g, ctl5g, dfs_reg); 2860 else 2861 return ath10k_wmi_main_pdev_set_regdomain(ar, rd, rd2g, rd5g, 2862 ctl2g, ctl5g); 2863} 2864 2865int ath10k_wmi_pdev_set_channel(struct ath10k *ar, 2866 const struct wmi_channel_arg *arg) 2867{ 2868 struct wmi_set_channel_cmd *cmd; 2869 struct sk_buff *skb; 2870 u32 ch_flags = 0; 2871 2872 if (arg->passive) 2873 return -EINVAL; 2874 2875 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 2876 if (!skb) 2877 return -ENOMEM; 2878 2879 if (arg->chan_radar) 2880 ch_flags |= WMI_CHAN_FLAG_DFS; 2881 2882 cmd = (struct wmi_set_channel_cmd *)skb->data; 2883 cmd->chan.mhz = __cpu_to_le32(arg->freq); 2884 cmd->chan.band_center_freq1 = __cpu_to_le32(arg->freq); 2885 cmd->chan.mode = arg->mode; 2886 cmd->chan.flags |= __cpu_to_le32(ch_flags); 2887 cmd->chan.min_power = arg->min_power; 2888 cmd->chan.max_power = arg->max_power; 2889 cmd->chan.reg_power = arg->max_reg_power; 2890 cmd->chan.reg_classid = arg->reg_class_id; 2891 cmd->chan.antenna_max = arg->max_antenna_gain; 2892 2893 ath10k_dbg(ar, ATH10K_DBG_WMI, 2894 "wmi set channel mode %d freq %d\n", 2895 arg->mode, arg->freq); 2896 2897 return ath10k_wmi_cmd_send(ar, skb, 2898 ar->wmi.cmd->pdev_set_channel_cmdid); 2899} 2900 2901int ath10k_wmi_pdev_suspend_target(struct ath10k *ar, u32 suspend_opt) 2902{ 2903 struct wmi_pdev_suspend_cmd *cmd; 2904 struct sk_buff *skb; 2905 2906 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 2907 if (!skb) 2908 return -ENOMEM; 2909 2910 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 2911 cmd->suspend_opt = __cpu_to_le32(suspend_opt); 2912 2913 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_suspend_cmdid); 2914} 2915 2916int ath10k_wmi_pdev_resume_target(struct ath10k *ar) 2917{ 2918 struct sk_buff *skb; 2919 2920 skb = ath10k_wmi_alloc_skb(ar, 0); 2921 if (skb == NULL) 2922 return -ENOMEM; 2923 2924 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_resume_cmdid); 2925} 2926 2927int ath10k_wmi_pdev_set_param(struct ath10k *ar, u32 id, u32 value) 2928{ 2929 struct wmi_pdev_set_param_cmd *cmd; 2930 struct sk_buff *skb; 2931 2932 if (id == WMI_PDEV_PARAM_UNSUPPORTED) { 2933 ath10k_warn(ar, "pdev param %d not supported by firmware\n", 2934 id); 2935 return -EOPNOTSUPP; 2936 } 2937 2938 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 2939 if (!skb) 2940 return -ENOMEM; 2941 2942 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 2943 cmd->param_id = __cpu_to_le32(id); 2944 cmd->param_value = __cpu_to_le32(value); 2945 2946 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", 2947 id, value); 2948 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->pdev_set_param_cmdid); 2949} 2950 2951static int ath10k_wmi_main_cmd_init(struct ath10k *ar) 2952{ 2953 struct wmi_init_cmd *cmd; 2954 struct sk_buff *buf; 2955 struct wmi_resource_config config = {}; 2956 u32 len, val; 2957 int i; 2958 2959 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); 2960 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS + TARGET_NUM_VDEVS); 2961 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); 2962 2963 config.num_offload_reorder_bufs = 2964 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); 2965 2966 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); 2967 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); 2968 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); 2969 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); 2970 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); 2971 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 2972 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 2973 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 2974 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); 2975 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE); 2976 2977 config.scan_max_pending_reqs = 2978 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); 2979 2980 config.bmiss_offload_max_vdev = 2981 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); 2982 2983 config.roam_offload_max_vdev = 2984 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); 2985 2986 config.roam_offload_max_ap_profiles = 2987 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); 2988 2989 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); 2990 config.num_mcast_table_elems = 2991 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); 2992 2993 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); 2994 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); 2995 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); 2996 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); 2997 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); 2998 2999 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 3000 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 3001 3002 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); 3003 3004 config.gtk_offload_max_vdev = 3005 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); 3006 3007 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); 3008 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); 3009 3010 len = sizeof(*cmd) + 3011 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 3012 3013 buf = ath10k_wmi_alloc_skb(ar, len); 3014 if (!buf) 3015 return -ENOMEM; 3016 3017 cmd = (struct wmi_init_cmd *)buf->data; 3018 3019 if (ar->wmi.num_mem_chunks == 0) { 3020 cmd->num_host_mem_chunks = 0; 3021 goto out; 3022 } 3023 3024 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n", 3025 ar->wmi.num_mem_chunks); 3026 3027 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks); 3028 3029 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 3030 cmd->host_mem_chunks[i].ptr = 3031 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); 3032 cmd->host_mem_chunks[i].size = 3033 __cpu_to_le32(ar->wmi.mem_chunks[i].len); 3034 cmd->host_mem_chunks[i].req_id = 3035 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); 3036 3037 ath10k_dbg(ar, ATH10K_DBG_WMI, 3038 "wmi chunk %d len %d requested, addr 0x%llx\n", 3039 i, 3040 ar->wmi.mem_chunks[i].len, 3041 (unsigned long long)ar->wmi.mem_chunks[i].paddr); 3042 } 3043out: 3044 memcpy(&cmd->resource_config, &config, sizeof(config)); 3045 3046 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); 3047 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid); 3048} 3049 3050static int ath10k_wmi_10x_cmd_init(struct ath10k *ar) 3051{ 3052 struct wmi_init_cmd_10x *cmd; 3053 struct sk_buff *buf; 3054 struct wmi_resource_config_10x config = {}; 3055 u32 len, val; 3056 int i; 3057 3058 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); 3059 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); 3060 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); 3061 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); 3062 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); 3063 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); 3064 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); 3065 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3066 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3067 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3068 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); 3069 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE); 3070 3071 config.scan_max_pending_reqs = 3072 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); 3073 3074 config.bmiss_offload_max_vdev = 3075 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); 3076 3077 config.roam_offload_max_vdev = 3078 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); 3079 3080 config.roam_offload_max_ap_profiles = 3081 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); 3082 3083 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); 3084 config.num_mcast_table_elems = 3085 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); 3086 3087 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); 3088 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); 3089 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); 3090 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); 3091 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); 3092 3093 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 3094 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 3095 3096 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); 3097 3098 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); 3099 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); 3100 3101 len = sizeof(*cmd) + 3102 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 3103 3104 buf = ath10k_wmi_alloc_skb(ar, len); 3105 if (!buf) 3106 return -ENOMEM; 3107 3108 cmd = (struct wmi_init_cmd_10x *)buf->data; 3109 3110 if (ar->wmi.num_mem_chunks == 0) { 3111 cmd->num_host_mem_chunks = 0; 3112 goto out; 3113 } 3114 3115 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n", 3116 ar->wmi.num_mem_chunks); 3117 3118 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks); 3119 3120 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 3121 cmd->host_mem_chunks[i].ptr = 3122 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); 3123 cmd->host_mem_chunks[i].size = 3124 __cpu_to_le32(ar->wmi.mem_chunks[i].len); 3125 cmd->host_mem_chunks[i].req_id = 3126 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); 3127 3128 ath10k_dbg(ar, ATH10K_DBG_WMI, 3129 "wmi chunk %d len %d requested, addr 0x%llx\n", 3130 i, 3131 ar->wmi.mem_chunks[i].len, 3132 (unsigned long long)ar->wmi.mem_chunks[i].paddr); 3133 } 3134out: 3135 memcpy(&cmd->resource_config, &config, sizeof(config)); 3136 3137 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); 3138 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid); 3139} 3140 3141static int ath10k_wmi_10_2_cmd_init(struct ath10k *ar) 3142{ 3143 struct wmi_init_cmd_10_2 *cmd; 3144 struct sk_buff *buf; 3145 struct wmi_resource_config_10x config = {}; 3146 u32 len, val; 3147 int i; 3148 3149 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); 3150 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); 3151 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); 3152 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); 3153 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); 3154 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); 3155 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); 3156 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3157 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3158 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3159 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); 3160 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE); 3161 3162 config.scan_max_pending_reqs = 3163 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); 3164 3165 config.bmiss_offload_max_vdev = 3166 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); 3167 3168 config.roam_offload_max_vdev = 3169 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); 3170 3171 config.roam_offload_max_ap_profiles = 3172 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); 3173 3174 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); 3175 config.num_mcast_table_elems = 3176 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); 3177 3178 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); 3179 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); 3180 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); 3181 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); 3182 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); 3183 3184 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 3185 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 3186 3187 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); 3188 3189 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); 3190 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); 3191 3192 len = sizeof(*cmd) + 3193 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 3194 3195 buf = ath10k_wmi_alloc_skb(ar, len); 3196 if (!buf) 3197 return -ENOMEM; 3198 3199 cmd = (struct wmi_init_cmd_10_2 *)buf->data; 3200 3201 if (ar->wmi.num_mem_chunks == 0) { 3202 cmd->num_host_mem_chunks = 0; 3203 goto out; 3204 } 3205 3206 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n", 3207 ar->wmi.num_mem_chunks); 3208 3209 cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks); 3210 3211 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 3212 cmd->host_mem_chunks[i].ptr = 3213 __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); 3214 cmd->host_mem_chunks[i].size = 3215 __cpu_to_le32(ar->wmi.mem_chunks[i].len); 3216 cmd->host_mem_chunks[i].req_id = 3217 __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); 3218 3219 ath10k_dbg(ar, ATH10K_DBG_WMI, 3220 "wmi chunk %d len %d requested, addr 0x%llx\n", 3221 i, 3222 ar->wmi.mem_chunks[i].len, 3223 (unsigned long long)ar->wmi.mem_chunks[i].paddr); 3224 } 3225out: 3226 memcpy(&cmd->resource_config.common, &config, sizeof(config)); 3227 3228 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); 3229 return ath10k_wmi_cmd_send(ar, buf, ar->wmi.cmd->init_cmdid); 3230} 3231 3232int ath10k_wmi_cmd_init(struct ath10k *ar) 3233{ 3234 int ret; 3235 3236 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 3237 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) 3238 ret = ath10k_wmi_10_2_cmd_init(ar); 3239 else 3240 ret = ath10k_wmi_10x_cmd_init(ar); 3241 } else { 3242 ret = ath10k_wmi_main_cmd_init(ar); 3243 } 3244 3245 return ret; 3246} 3247 3248static int ath10k_wmi_start_scan_calc_len(struct ath10k *ar, 3249 const struct wmi_start_scan_arg *arg) 3250{ 3251 int len; 3252 3253 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) 3254 len = sizeof(struct wmi_start_scan_cmd_10x); 3255 else 3256 len = sizeof(struct wmi_start_scan_cmd); 3257 3258 if (arg->ie_len) { 3259 if (!arg->ie) 3260 return -EINVAL; 3261 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) 3262 return -EINVAL; 3263 3264 len += sizeof(struct wmi_ie_data); 3265 len += roundup(arg->ie_len, 4); 3266 } 3267 3268 if (arg->n_channels) { 3269 if (!arg->channels) 3270 return -EINVAL; 3271 if (arg->n_channels > ARRAY_SIZE(arg->channels)) 3272 return -EINVAL; 3273 3274 len += sizeof(struct wmi_chan_list); 3275 len += sizeof(__le32) * arg->n_channels; 3276 } 3277 3278 if (arg->n_ssids) { 3279 if (!arg->ssids) 3280 return -EINVAL; 3281 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) 3282 return -EINVAL; 3283 3284 len += sizeof(struct wmi_ssid_list); 3285 len += sizeof(struct wmi_ssid) * arg->n_ssids; 3286 } 3287 3288 if (arg->n_bssids) { 3289 if (!arg->bssids) 3290 return -EINVAL; 3291 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) 3292 return -EINVAL; 3293 3294 len += sizeof(struct wmi_bssid_list); 3295 len += sizeof(struct wmi_mac_addr) * arg->n_bssids; 3296 } 3297 3298 return len; 3299} 3300 3301int ath10k_wmi_start_scan(struct ath10k *ar, 3302 const struct wmi_start_scan_arg *arg) 3303{ 3304 struct wmi_start_scan_cmd *cmd; 3305 struct sk_buff *skb; 3306 struct wmi_ie_data *ie; 3307 struct wmi_chan_list *channels; 3308 struct wmi_ssid_list *ssids; 3309 struct wmi_bssid_list *bssids; 3310 u32 scan_id; 3311 u32 scan_req_id; 3312 int off; 3313 int len = 0; 3314 int i; 3315 3316 len = ath10k_wmi_start_scan_calc_len(ar, arg); 3317 if (len < 0) 3318 return len; /* len contains error code here */ 3319 3320 skb = ath10k_wmi_alloc_skb(ar, len); 3321 if (!skb) 3322 return -ENOMEM; 3323 3324 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; 3325 scan_id |= arg->scan_id; 3326 3327 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; 3328 scan_req_id |= arg->scan_req_id; 3329 3330 cmd = (struct wmi_start_scan_cmd *)skb->data; 3331 cmd->scan_id = __cpu_to_le32(scan_id); 3332 cmd->scan_req_id = __cpu_to_le32(scan_req_id); 3333 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 3334 cmd->scan_priority = __cpu_to_le32(arg->scan_priority); 3335 cmd->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); 3336 cmd->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); 3337 cmd->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); 3338 cmd->min_rest_time = __cpu_to_le32(arg->min_rest_time); 3339 cmd->max_rest_time = __cpu_to_le32(arg->max_rest_time); 3340 cmd->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); 3341 cmd->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); 3342 cmd->idle_time = __cpu_to_le32(arg->idle_time); 3343 cmd->max_scan_time = __cpu_to_le32(arg->max_scan_time); 3344 cmd->probe_delay = __cpu_to_le32(arg->probe_delay); 3345 cmd->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); 3346 3347 /* TLV list starts after fields included in the struct */ 3348 /* There's just one filed that differes the two start_scan 3349 * structures - burst_duration, which we are not using btw, 3350 no point to make the split here, just shift the buffer to fit with 3351 given FW */ 3352 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) 3353 off = sizeof(struct wmi_start_scan_cmd_10x); 3354 else 3355 off = sizeof(struct wmi_start_scan_cmd); 3356 3357 if (arg->n_channels) { 3358 channels = (void *)skb->data + off; 3359 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); 3360 channels->num_chan = __cpu_to_le32(arg->n_channels); 3361 3362 for (i = 0; i < arg->n_channels; i++) 3363 channels->channel_list[i].freq = 3364 __cpu_to_le16(arg->channels[i]); 3365 3366 off += sizeof(*channels); 3367 off += sizeof(__le32) * arg->n_channels; 3368 } 3369 3370 if (arg->n_ssids) { 3371 ssids = (void *)skb->data + off; 3372 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); 3373 ssids->num_ssids = __cpu_to_le32(arg->n_ssids); 3374 3375 for (i = 0; i < arg->n_ssids; i++) { 3376 ssids->ssids[i].ssid_len = 3377 __cpu_to_le32(arg->ssids[i].len); 3378 memcpy(&ssids->ssids[i].ssid, 3379 arg->ssids[i].ssid, 3380 arg->ssids[i].len); 3381 } 3382 3383 off += sizeof(*ssids); 3384 off += sizeof(struct wmi_ssid) * arg->n_ssids; 3385 } 3386 3387 if (arg->n_bssids) { 3388 bssids = (void *)skb->data + off; 3389 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); 3390 bssids->num_bssid = __cpu_to_le32(arg->n_bssids); 3391 3392 for (i = 0; i < arg->n_bssids; i++) 3393 memcpy(&bssids->bssid_list[i], 3394 arg->bssids[i].bssid, 3395 ETH_ALEN); 3396 3397 off += sizeof(*bssids); 3398 off += sizeof(struct wmi_mac_addr) * arg->n_bssids; 3399 } 3400 3401 if (arg->ie_len) { 3402 ie = (void *)skb->data + off; 3403 ie->tag = __cpu_to_le32(WMI_IE_TAG); 3404 ie->ie_len = __cpu_to_le32(arg->ie_len); 3405 memcpy(ie->ie_data, arg->ie, arg->ie_len); 3406 3407 off += sizeof(*ie); 3408 off += roundup(arg->ie_len, 4); 3409 } 3410 3411 if (off != skb->len) { 3412 dev_kfree_skb(skb); 3413 return -EINVAL; 3414 } 3415 3416 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); 3417 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->start_scan_cmdid); 3418} 3419 3420void ath10k_wmi_start_scan_init(struct ath10k *ar, 3421 struct wmi_start_scan_arg *arg) 3422{ 3423 /* setup commonly used values */ 3424 arg->scan_req_id = 1; 3425 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 3426 arg->dwell_time_active = 50; 3427 arg->dwell_time_passive = 150; 3428 arg->min_rest_time = 50; 3429 arg->max_rest_time = 500; 3430 arg->repeat_probe_time = 0; 3431 arg->probe_spacing_time = 0; 3432 arg->idle_time = 0; 3433 arg->max_scan_time = 20000; 3434 arg->probe_delay = 5; 3435 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED 3436 | WMI_SCAN_EVENT_COMPLETED 3437 | WMI_SCAN_EVENT_BSS_CHANNEL 3438 | WMI_SCAN_EVENT_FOREIGN_CHANNEL 3439 | WMI_SCAN_EVENT_DEQUEUED; 3440 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES; 3441 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; 3442 arg->n_bssids = 1; 3443 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; 3444} 3445 3446int ath10k_wmi_stop_scan(struct ath10k *ar, const struct wmi_stop_scan_arg *arg) 3447{ 3448 struct wmi_stop_scan_cmd *cmd; 3449 struct sk_buff *skb; 3450 u32 scan_id; 3451 u32 req_id; 3452 3453 if (arg->req_id > 0xFFF) 3454 return -EINVAL; 3455 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) 3456 return -EINVAL; 3457 3458 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3459 if (!skb) 3460 return -ENOMEM; 3461 3462 scan_id = arg->u.scan_id; 3463 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; 3464 3465 req_id = arg->req_id; 3466 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; 3467 3468 cmd = (struct wmi_stop_scan_cmd *)skb->data; 3469 cmd->req_type = __cpu_to_le32(arg->req_type); 3470 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); 3471 cmd->scan_id = __cpu_to_le32(scan_id); 3472 cmd->scan_req_id = __cpu_to_le32(req_id); 3473 3474 ath10k_dbg(ar, ATH10K_DBG_WMI, 3475 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", 3476 arg->req_id, arg->req_type, arg->u.scan_id); 3477 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->stop_scan_cmdid); 3478} 3479 3480int ath10k_wmi_vdev_create(struct ath10k *ar, u32 vdev_id, 3481 enum wmi_vdev_type type, 3482 enum wmi_vdev_subtype subtype, 3483 const u8 macaddr[ETH_ALEN]) 3484{ 3485 struct wmi_vdev_create_cmd *cmd; 3486 struct sk_buff *skb; 3487 3488 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3489 if (!skb) 3490 return -ENOMEM; 3491 3492 cmd = (struct wmi_vdev_create_cmd *)skb->data; 3493 cmd->vdev_id = __cpu_to_le32(vdev_id); 3494 cmd->vdev_type = __cpu_to_le32(type); 3495 cmd->vdev_subtype = __cpu_to_le32(subtype); 3496 memcpy(cmd->vdev_macaddr.addr, macaddr, ETH_ALEN); 3497 3498 ath10k_dbg(ar, ATH10K_DBG_WMI, 3499 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", 3500 vdev_id, type, subtype, macaddr); 3501 3502 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_create_cmdid); 3503} 3504 3505int ath10k_wmi_vdev_delete(struct ath10k *ar, u32 vdev_id) 3506{ 3507 struct wmi_vdev_delete_cmd *cmd; 3508 struct sk_buff *skb; 3509 3510 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3511 if (!skb) 3512 return -ENOMEM; 3513 3514 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 3515 cmd->vdev_id = __cpu_to_le32(vdev_id); 3516 3517 ath10k_dbg(ar, ATH10K_DBG_WMI, 3518 "WMI vdev delete id %d\n", vdev_id); 3519 3520 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_delete_cmdid); 3521} 3522 3523static int ath10k_wmi_vdev_start_restart(struct ath10k *ar, 3524 const struct wmi_vdev_start_request_arg *arg, 3525 u32 cmd_id) 3526{ 3527 struct wmi_vdev_start_request_cmd *cmd; 3528 struct sk_buff *skb; 3529 const char *cmdname; 3530 u32 flags = 0; 3531 u32 ch_flags = 0; 3532 3533 if (cmd_id != ar->wmi.cmd->vdev_start_request_cmdid && 3534 cmd_id != ar->wmi.cmd->vdev_restart_request_cmdid) 3535 return -EINVAL; 3536 if (WARN_ON(arg->ssid && arg->ssid_len == 0)) 3537 return -EINVAL; 3538 if (WARN_ON(arg->hidden_ssid && !arg->ssid)) 3539 return -EINVAL; 3540 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 3541 return -EINVAL; 3542 3543 if (cmd_id == ar->wmi.cmd->vdev_start_request_cmdid) 3544 cmdname = "start"; 3545 else if (cmd_id == ar->wmi.cmd->vdev_restart_request_cmdid) 3546 cmdname = "restart"; 3547 else 3548 return -EINVAL; /* should not happen, we already check cmd_id */ 3549 3550 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3551 if (!skb) 3552 return -ENOMEM; 3553 3554 if (arg->hidden_ssid) 3555 flags |= WMI_VDEV_START_HIDDEN_SSID; 3556 if (arg->pmf_enabled) 3557 flags |= WMI_VDEV_START_PMF_ENABLED; 3558 if (arg->channel.chan_radar) 3559 ch_flags |= WMI_CHAN_FLAG_DFS; 3560 3561 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 3562 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 3563 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); 3564 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); 3565 cmd->dtim_period = __cpu_to_le32(arg->dtim_period); 3566 cmd->flags = __cpu_to_le32(flags); 3567 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); 3568 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); 3569 3570 if (arg->ssid) { 3571 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); 3572 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 3573 } 3574 3575 cmd->chan.mhz = __cpu_to_le32(arg->channel.freq); 3576 3577 cmd->chan.band_center_freq1 = 3578 __cpu_to_le32(arg->channel.band_center_freq1); 3579 3580 cmd->chan.mode = arg->channel.mode; 3581 cmd->chan.flags |= __cpu_to_le32(ch_flags); 3582 cmd->chan.min_power = arg->channel.min_power; 3583 cmd->chan.max_power = arg->channel.max_power; 3584 cmd->chan.reg_power = arg->channel.max_reg_power; 3585 cmd->chan.reg_classid = arg->channel.reg_class_id; 3586 cmd->chan.antenna_max = arg->channel.max_antenna_gain; 3587 3588 ath10k_dbg(ar, ATH10K_DBG_WMI, 3589 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, " 3590 "ch_flags: 0x%0X, max_power: %d\n", cmdname, arg->vdev_id, 3591 flags, arg->channel.freq, arg->channel.mode, 3592 cmd->chan.flags, arg->channel.max_power); 3593 3594 return ath10k_wmi_cmd_send(ar, skb, cmd_id); 3595} 3596 3597int ath10k_wmi_vdev_start(struct ath10k *ar, 3598 const struct wmi_vdev_start_request_arg *arg) 3599{ 3600 u32 cmd_id = ar->wmi.cmd->vdev_start_request_cmdid; 3601 3602 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id); 3603} 3604 3605int ath10k_wmi_vdev_restart(struct ath10k *ar, 3606 const struct wmi_vdev_start_request_arg *arg) 3607{ 3608 u32 cmd_id = ar->wmi.cmd->vdev_restart_request_cmdid; 3609 3610 return ath10k_wmi_vdev_start_restart(ar, arg, cmd_id); 3611} 3612 3613int ath10k_wmi_vdev_stop(struct ath10k *ar, u32 vdev_id) 3614{ 3615 struct wmi_vdev_stop_cmd *cmd; 3616 struct sk_buff *skb; 3617 3618 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3619 if (!skb) 3620 return -ENOMEM; 3621 3622 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 3623 cmd->vdev_id = __cpu_to_le32(vdev_id); 3624 3625 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); 3626 3627 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_stop_cmdid); 3628} 3629 3630int ath10k_wmi_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, const u8 *bssid) 3631{ 3632 struct wmi_vdev_up_cmd *cmd; 3633 struct sk_buff *skb; 3634 3635 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3636 if (!skb) 3637 return -ENOMEM; 3638 3639 cmd = (struct wmi_vdev_up_cmd *)skb->data; 3640 cmd->vdev_id = __cpu_to_le32(vdev_id); 3641 cmd->vdev_assoc_id = __cpu_to_le32(aid); 3642 memcpy(&cmd->vdev_bssid.addr, bssid, ETH_ALEN); 3643 3644 ath10k_dbg(ar, ATH10K_DBG_WMI, 3645 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 3646 vdev_id, aid, bssid); 3647 3648 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_up_cmdid); 3649} 3650 3651int ath10k_wmi_vdev_down(struct ath10k *ar, u32 vdev_id) 3652{ 3653 struct wmi_vdev_down_cmd *cmd; 3654 struct sk_buff *skb; 3655 3656 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3657 if (!skb) 3658 return -ENOMEM; 3659 3660 cmd = (struct wmi_vdev_down_cmd *)skb->data; 3661 cmd->vdev_id = __cpu_to_le32(vdev_id); 3662 3663 ath10k_dbg(ar, ATH10K_DBG_WMI, 3664 "wmi mgmt vdev down id 0x%x\n", vdev_id); 3665 3666 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_down_cmdid); 3667} 3668 3669int ath10k_wmi_vdev_set_param(struct ath10k *ar, u32 vdev_id, 3670 u32 param_id, u32 param_value) 3671{ 3672 struct wmi_vdev_set_param_cmd *cmd; 3673 struct sk_buff *skb; 3674 3675 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) { 3676 ath10k_dbg(ar, ATH10K_DBG_WMI, 3677 "vdev param %d not supported by firmware\n", 3678 param_id); 3679 return -EOPNOTSUPP; 3680 } 3681 3682 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3683 if (!skb) 3684 return -ENOMEM; 3685 3686 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 3687 cmd->vdev_id = __cpu_to_le32(vdev_id); 3688 cmd->param_id = __cpu_to_le32(param_id); 3689 cmd->param_value = __cpu_to_le32(param_value); 3690 3691 ath10k_dbg(ar, ATH10K_DBG_WMI, 3692 "wmi vdev id 0x%x set param %d value %d\n", 3693 vdev_id, param_id, param_value); 3694 3695 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->vdev_set_param_cmdid); 3696} 3697 3698int ath10k_wmi_vdev_install_key(struct ath10k *ar, 3699 const struct wmi_vdev_install_key_arg *arg) 3700{ 3701 struct wmi_vdev_install_key_cmd *cmd; 3702 struct sk_buff *skb; 3703 3704 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) 3705 return -EINVAL; 3706 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) 3707 return -EINVAL; 3708 3709 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); 3710 if (!skb) 3711 return -ENOMEM; 3712 3713 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 3714 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 3715 cmd->key_idx = __cpu_to_le32(arg->key_idx); 3716 cmd->key_flags = __cpu_to_le32(arg->key_flags); 3717 cmd->key_cipher = __cpu_to_le32(arg->key_cipher); 3718 cmd->key_len = __cpu_to_le32(arg->key_len); 3719 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); 3720 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); 3721 3722 if (arg->macaddr) 3723 memcpy(cmd->peer_macaddr.addr, arg->macaddr, ETH_ALEN); 3724 if (arg->key_data) 3725 memcpy(cmd->key_data, arg->key_data, arg->key_len); 3726 3727 ath10k_dbg(ar, ATH10K_DBG_WMI, 3728 "wmi vdev install key idx %d cipher %d len %d\n", 3729 arg->key_idx, arg->key_cipher, arg->key_len); 3730 return ath10k_wmi_cmd_send(ar, skb, 3731 ar->wmi.cmd->vdev_install_key_cmdid); 3732} 3733 3734int ath10k_wmi_vdev_spectral_conf(struct ath10k *ar, 3735 const struct wmi_vdev_spectral_conf_arg *arg) 3736{ 3737 struct wmi_vdev_spectral_conf_cmd *cmd; 3738 struct sk_buff *skb; 3739 u32 cmdid; 3740 3741 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3742 if (!skb) 3743 return -ENOMEM; 3744 3745 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; 3746 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 3747 cmd->scan_count = __cpu_to_le32(arg->scan_count); 3748 cmd->scan_period = __cpu_to_le32(arg->scan_period); 3749 cmd->scan_priority = __cpu_to_le32(arg->scan_priority); 3750 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size); 3751 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena); 3752 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena); 3753 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref); 3754 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay); 3755 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr); 3756 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr); 3757 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode); 3758 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode); 3759 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr); 3760 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format); 3761 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode); 3762 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale); 3763 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); 3764 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); 3765 3766 cmdid = ar->wmi.cmd->vdev_spectral_scan_configure_cmdid; 3767 return ath10k_wmi_cmd_send(ar, skb, cmdid); 3768} 3769 3770int ath10k_wmi_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, u32 trigger, 3771 u32 enable) 3772{ 3773 struct wmi_vdev_spectral_enable_cmd *cmd; 3774 struct sk_buff *skb; 3775 u32 cmdid; 3776 3777 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3778 if (!skb) 3779 return -ENOMEM; 3780 3781 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; 3782 cmd->vdev_id = __cpu_to_le32(vdev_id); 3783 cmd->trigger_cmd = __cpu_to_le32(trigger); 3784 cmd->enable_cmd = __cpu_to_le32(enable); 3785 3786 cmdid = ar->wmi.cmd->vdev_spectral_scan_enable_cmdid; 3787 return ath10k_wmi_cmd_send(ar, skb, cmdid); 3788} 3789 3790int ath10k_wmi_peer_create(struct ath10k *ar, u32 vdev_id, 3791 const u8 peer_addr[ETH_ALEN]) 3792{ 3793 struct wmi_peer_create_cmd *cmd; 3794 struct sk_buff *skb; 3795 3796 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3797 if (!skb) 3798 return -ENOMEM; 3799 3800 cmd = (struct wmi_peer_create_cmd *)skb->data; 3801 cmd->vdev_id = __cpu_to_le32(vdev_id); 3802 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN); 3803 3804 ath10k_dbg(ar, ATH10K_DBG_WMI, 3805 "wmi peer create vdev_id %d peer_addr %pM\n", 3806 vdev_id, peer_addr); 3807 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_create_cmdid); 3808} 3809 3810int ath10k_wmi_peer_delete(struct ath10k *ar, u32 vdev_id, 3811 const u8 peer_addr[ETH_ALEN]) 3812{ 3813 struct wmi_peer_delete_cmd *cmd; 3814 struct sk_buff *skb; 3815 3816 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3817 if (!skb) 3818 return -ENOMEM; 3819 3820 cmd = (struct wmi_peer_delete_cmd *)skb->data; 3821 cmd->vdev_id = __cpu_to_le32(vdev_id); 3822 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN); 3823 3824 ath10k_dbg(ar, ATH10K_DBG_WMI, 3825 "wmi peer delete vdev_id %d peer_addr %pM\n", 3826 vdev_id, peer_addr); 3827 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_delete_cmdid); 3828} 3829 3830int ath10k_wmi_peer_flush(struct ath10k *ar, u32 vdev_id, 3831 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) 3832{ 3833 struct wmi_peer_flush_tids_cmd *cmd; 3834 struct sk_buff *skb; 3835 3836 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3837 if (!skb) 3838 return -ENOMEM; 3839 3840 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 3841 cmd->vdev_id = __cpu_to_le32(vdev_id); 3842 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); 3843 memcpy(cmd->peer_macaddr.addr, peer_addr, ETH_ALEN); 3844 3845 ath10k_dbg(ar, ATH10K_DBG_WMI, 3846 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", 3847 vdev_id, peer_addr, tid_bitmap); 3848 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_flush_tids_cmdid); 3849} 3850 3851int ath10k_wmi_peer_set_param(struct ath10k *ar, u32 vdev_id, 3852 const u8 *peer_addr, enum wmi_peer_param param_id, 3853 u32 param_value) 3854{ 3855 struct wmi_peer_set_param_cmd *cmd; 3856 struct sk_buff *skb; 3857 3858 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3859 if (!skb) 3860 return -ENOMEM; 3861 3862 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 3863 cmd->vdev_id = __cpu_to_le32(vdev_id); 3864 cmd->param_id = __cpu_to_le32(param_id); 3865 cmd->param_value = __cpu_to_le32(param_value); 3866 memcpy(&cmd->peer_macaddr.addr, peer_addr, ETH_ALEN); 3867 3868 ath10k_dbg(ar, ATH10K_DBG_WMI, 3869 "wmi vdev %d peer 0x%pM set param %d value %d\n", 3870 vdev_id, peer_addr, param_id, param_value); 3871 3872 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_set_param_cmdid); 3873} 3874 3875int ath10k_wmi_set_psmode(struct ath10k *ar, u32 vdev_id, 3876 enum wmi_sta_ps_mode psmode) 3877{ 3878 struct wmi_sta_powersave_mode_cmd *cmd; 3879 struct sk_buff *skb; 3880 3881 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3882 if (!skb) 3883 return -ENOMEM; 3884 3885 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; 3886 cmd->vdev_id = __cpu_to_le32(vdev_id); 3887 cmd->sta_ps_mode = __cpu_to_le32(psmode); 3888 3889 ath10k_dbg(ar, ATH10K_DBG_WMI, 3890 "wmi set powersave id 0x%x mode %d\n", 3891 vdev_id, psmode); 3892 3893 return ath10k_wmi_cmd_send(ar, skb, 3894 ar->wmi.cmd->sta_powersave_mode_cmdid); 3895} 3896 3897int ath10k_wmi_set_sta_ps_param(struct ath10k *ar, u32 vdev_id, 3898 enum wmi_sta_powersave_param param_id, 3899 u32 value) 3900{ 3901 struct wmi_sta_powersave_param_cmd *cmd; 3902 struct sk_buff *skb; 3903 3904 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3905 if (!skb) 3906 return -ENOMEM; 3907 3908 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 3909 cmd->vdev_id = __cpu_to_le32(vdev_id); 3910 cmd->param_id = __cpu_to_le32(param_id); 3911 cmd->param_value = __cpu_to_le32(value); 3912 3913 ath10k_dbg(ar, ATH10K_DBG_WMI, 3914 "wmi sta ps param vdev_id 0x%x param %d value %d\n", 3915 vdev_id, param_id, value); 3916 return ath10k_wmi_cmd_send(ar, skb, 3917 ar->wmi.cmd->sta_powersave_param_cmdid); 3918} 3919 3920int ath10k_wmi_set_ap_ps_param(struct ath10k *ar, u32 vdev_id, const u8 *mac, 3921 enum wmi_ap_ps_peer_param param_id, u32 value) 3922{ 3923 struct wmi_ap_ps_peer_cmd *cmd; 3924 struct sk_buff *skb; 3925 3926 if (!mac) 3927 return -EINVAL; 3928 3929 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3930 if (!skb) 3931 return -ENOMEM; 3932 3933 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 3934 cmd->vdev_id = __cpu_to_le32(vdev_id); 3935 cmd->param_id = __cpu_to_le32(param_id); 3936 cmd->param_value = __cpu_to_le32(value); 3937 memcpy(&cmd->peer_macaddr, mac, ETH_ALEN); 3938 3939 ath10k_dbg(ar, ATH10K_DBG_WMI, 3940 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", 3941 vdev_id, param_id, value, mac); 3942 3943 return ath10k_wmi_cmd_send(ar, skb, 3944 ar->wmi.cmd->ap_ps_peer_param_cmdid); 3945} 3946 3947int ath10k_wmi_scan_chan_list(struct ath10k *ar, 3948 const struct wmi_scan_chan_list_arg *arg) 3949{ 3950 struct wmi_scan_chan_list_cmd *cmd; 3951 struct sk_buff *skb; 3952 struct wmi_channel_arg *ch; 3953 struct wmi_channel *ci; 3954 int len; 3955 int i; 3956 3957 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); 3958 3959 skb = ath10k_wmi_alloc_skb(ar, len); 3960 if (!skb) 3961 return -EINVAL; 3962 3963 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 3964 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); 3965 3966 for (i = 0; i < arg->n_channels; i++) { 3967 u32 flags = 0; 3968 3969 ch = &arg->channels[i]; 3970 ci = &cmd->chan_info[i]; 3971 3972 if (ch->passive) 3973 flags |= WMI_CHAN_FLAG_PASSIVE; 3974 if (ch->allow_ibss) 3975 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; 3976 if (ch->allow_ht) 3977 flags |= WMI_CHAN_FLAG_ALLOW_HT; 3978 if (ch->allow_vht) 3979 flags |= WMI_CHAN_FLAG_ALLOW_VHT; 3980 if (ch->ht40plus) 3981 flags |= WMI_CHAN_FLAG_HT40_PLUS; 3982 if (ch->chan_radar) 3983 flags |= WMI_CHAN_FLAG_DFS; 3984 3985 ci->mhz = __cpu_to_le32(ch->freq); 3986 ci->band_center_freq1 = __cpu_to_le32(ch->freq); 3987 ci->band_center_freq2 = 0; 3988 ci->min_power = ch->min_power; 3989 ci->max_power = ch->max_power; 3990 ci->reg_power = ch->max_reg_power; 3991 ci->antenna_max = ch->max_antenna_gain; 3992 3993 /* mode & flags share storage */ 3994 ci->mode = ch->mode; 3995 ci->flags |= __cpu_to_le32(flags); 3996 } 3997 3998 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->scan_chan_list_cmdid); 3999} 4000 4001static void 4002ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf, 4003 const struct wmi_peer_assoc_complete_arg *arg) 4004{ 4005 struct wmi_common_peer_assoc_complete_cmd *cmd = buf; 4006 4007 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 4008 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); 4009 cmd->peer_associd = __cpu_to_le32(arg->peer_aid); 4010 cmd->peer_flags = __cpu_to_le32(arg->peer_flags); 4011 cmd->peer_caps = __cpu_to_le32(arg->peer_caps); 4012 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); 4013 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); 4014 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); 4015 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); 4016 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); 4017 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); 4018 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); 4019 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); 4020 4021 memcpy(cmd->peer_macaddr.addr, arg->addr, ETH_ALEN); 4022 4023 cmd->peer_legacy_rates.num_rates = 4024 __cpu_to_le32(arg->peer_legacy_rates.num_rates); 4025 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, 4026 arg->peer_legacy_rates.num_rates); 4027 4028 cmd->peer_ht_rates.num_rates = 4029 __cpu_to_le32(arg->peer_ht_rates.num_rates); 4030 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, 4031 arg->peer_ht_rates.num_rates); 4032 4033 cmd->peer_vht_rates.rx_max_rate = 4034 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); 4035 cmd->peer_vht_rates.rx_mcs_set = 4036 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); 4037 cmd->peer_vht_rates.tx_max_rate = 4038 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); 4039 cmd->peer_vht_rates.tx_mcs_set = 4040 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); 4041} 4042 4043static void 4044ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf, 4045 const struct wmi_peer_assoc_complete_arg *arg) 4046{ 4047 struct wmi_main_peer_assoc_complete_cmd *cmd = buf; 4048 4049 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 4050 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info)); 4051} 4052 4053static void 4054ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf, 4055 const struct wmi_peer_assoc_complete_arg *arg) 4056{ 4057 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 4058} 4059 4060static void 4061ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, 4062 const struct wmi_peer_assoc_complete_arg *arg) 4063{ 4064 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf; 4065 int max_mcs, max_nss; 4066 u32 info0; 4067 4068 /* TODO: Is using max values okay with firmware? */ 4069 max_mcs = 0xf; 4070 max_nss = 0xf; 4071 4072 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) | 4073 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS); 4074 4075 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 4076 cmd->info0 = __cpu_to_le32(info0); 4077} 4078 4079int ath10k_wmi_peer_assoc(struct ath10k *ar, 4080 const struct wmi_peer_assoc_complete_arg *arg) 4081{ 4082 struct sk_buff *skb; 4083 int len; 4084 4085 if (arg->peer_mpdu_density > 16) 4086 return -EINVAL; 4087 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) 4088 return -EINVAL; 4089 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) 4090 return -EINVAL; 4091 4092 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 4093 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) 4094 len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); 4095 else 4096 len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); 4097 } else { 4098 len = sizeof(struct wmi_main_peer_assoc_complete_cmd); 4099 } 4100 4101 skb = ath10k_wmi_alloc_skb(ar, len); 4102 if (!skb) 4103 return -ENOMEM; 4104 4105 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 4106 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features)) 4107 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); 4108 else 4109 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); 4110 } else { 4111 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); 4112 } 4113 4114 ath10k_dbg(ar, ATH10K_DBG_WMI, 4115 "wmi peer assoc vdev %d addr %pM (%s)\n", 4116 arg->vdev_id, arg->addr, 4117 arg->peer_reassoc ? "reassociate" : "new"); 4118 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->peer_assoc_cmdid); 4119} 4120 4121/* This function assumes the beacon is already DMA mapped */ 4122int ath10k_wmi_beacon_send_ref_nowait(struct ath10k_vif *arvif) 4123{ 4124 struct wmi_bcn_tx_ref_cmd *cmd; 4125 struct sk_buff *skb; 4126 struct sk_buff *beacon = arvif->beacon; 4127 struct ath10k *ar = arvif->ar; 4128 struct ieee80211_hdr *hdr; 4129 int ret; 4130 u16 fc; 4131 4132 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4133 if (!skb) 4134 return -ENOMEM; 4135 4136 hdr = (struct ieee80211_hdr *)beacon->data; 4137 fc = le16_to_cpu(hdr->frame_control); 4138 4139 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; 4140 cmd->vdev_id = __cpu_to_le32(arvif->vdev_id); 4141 cmd->data_len = __cpu_to_le32(beacon->len); 4142 cmd->data_ptr = __cpu_to_le32(ATH10K_SKB_CB(beacon)->paddr); 4143 cmd->msdu_id = 0; 4144 cmd->frame_control = __cpu_to_le32(fc); 4145 cmd->flags = 0; 4146 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); 4147 4148 if (ATH10K_SKB_CB(beacon)->bcn.dtim_zero) 4149 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); 4150 4151 if (ATH10K_SKB_CB(beacon)->bcn.deliver_cab) 4152 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); 4153 4154 ret = ath10k_wmi_cmd_send_nowait(ar, skb, 4155 ar->wmi.cmd->pdev_send_bcn_cmdid); 4156 4157 if (ret) 4158 dev_kfree_skb(skb); 4159 4160 return ret; 4161} 4162 4163static void ath10k_wmi_pdev_set_wmm_param(struct wmi_wmm_params *params, 4164 const struct wmi_wmm_params_arg *arg) 4165{ 4166 params->cwmin = __cpu_to_le32(arg->cwmin); 4167 params->cwmax = __cpu_to_le32(arg->cwmax); 4168 params->aifs = __cpu_to_le32(arg->aifs); 4169 params->txop = __cpu_to_le32(arg->txop); 4170 params->acm = __cpu_to_le32(arg->acm); 4171 params->no_ack = __cpu_to_le32(arg->no_ack); 4172} 4173 4174int ath10k_wmi_pdev_set_wmm_params(struct ath10k *ar, 4175 const struct wmi_pdev_set_wmm_params_arg *arg) 4176{ 4177 struct wmi_pdev_set_wmm_params *cmd; 4178 struct sk_buff *skb; 4179 4180 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4181 if (!skb) 4182 return -ENOMEM; 4183 4184 cmd = (struct wmi_pdev_set_wmm_params *)skb->data; 4185 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_be, &arg->ac_be); 4186 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); 4187 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); 4188 ath10k_wmi_pdev_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); 4189 4190 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); 4191 return ath10k_wmi_cmd_send(ar, skb, 4192 ar->wmi.cmd->pdev_set_wmm_params_cmdid); 4193} 4194 4195int ath10k_wmi_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id) 4196{ 4197 struct wmi_request_stats_cmd *cmd; 4198 struct sk_buff *skb; 4199 4200 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4201 if (!skb) 4202 return -ENOMEM; 4203 4204 cmd = (struct wmi_request_stats_cmd *)skb->data; 4205 cmd->stats_id = __cpu_to_le32(stats_id); 4206 4207 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id); 4208 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->request_stats_cmdid); 4209} 4210 4211int ath10k_wmi_force_fw_hang(struct ath10k *ar, 4212 enum wmi_force_fw_hang_type type, u32 delay_ms) 4213{ 4214 struct wmi_force_fw_hang_cmd *cmd; 4215 struct sk_buff *skb; 4216 4217 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4218 if (!skb) 4219 return -ENOMEM; 4220 4221 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 4222 cmd->type = __cpu_to_le32(type); 4223 cmd->delay_ms = __cpu_to_le32(delay_ms); 4224 4225 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", 4226 type, delay_ms); 4227 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->force_fw_hang_cmdid); 4228} 4229 4230int ath10k_wmi_dbglog_cfg(struct ath10k *ar, u32 module_enable) 4231{ 4232 struct wmi_dbglog_cfg_cmd *cmd; 4233 struct sk_buff *skb; 4234 u32 cfg; 4235 4236 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4237 if (!skb) 4238 return -ENOMEM; 4239 4240 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; 4241 4242 if (module_enable) { 4243 cfg = SM(ATH10K_DBGLOG_LEVEL_VERBOSE, 4244 ATH10K_DBGLOG_CFG_LOG_LVL); 4245 } else { 4246 /* set back defaults, all modules with WARN level */ 4247 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, 4248 ATH10K_DBGLOG_CFG_LOG_LVL); 4249 module_enable = ~0; 4250 } 4251 4252 cmd->module_enable = __cpu_to_le32(module_enable); 4253 cmd->module_valid = __cpu_to_le32(~0); 4254 cmd->config_enable = __cpu_to_le32(cfg); 4255 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); 4256 4257 ath10k_dbg(ar, ATH10K_DBG_WMI, 4258 "wmi dbglog cfg modules %08x %08x config %08x %08x\n", 4259 __le32_to_cpu(cmd->module_enable), 4260 __le32_to_cpu(cmd->module_valid), 4261 __le32_to_cpu(cmd->config_enable), 4262 __le32_to_cpu(cmd->config_valid)); 4263 4264 return ath10k_wmi_cmd_send(ar, skb, ar->wmi.cmd->dbglog_cfg_cmdid); 4265} 4266