rsi_main.h revision dad0d04fa7ba41ce603a01e8e64967650303e9a2
1/** 2 * Copyright (c) 2014 Redpine Signals Inc. 3 * 4 * Permission to use, copy, modify, and/or distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#ifndef __RSI_MAIN_H__ 18#define __RSI_MAIN_H__ 19 20#include <linux/string.h> 21#include <linux/skbuff.h> 22#include <net/mac80211.h> 23 24#define ERR_ZONE BIT(0) /* For Error Msgs */ 25#define INFO_ZONE BIT(1) /* For General Status Msgs */ 26#define INIT_ZONE BIT(2) /* For Driver Init Seq Msgs */ 27#define MGMT_TX_ZONE BIT(3) /* For TX Mgmt Path Msgs */ 28#define MGMT_RX_ZONE BIT(4) /* For RX Mgmt Path Msgs */ 29#define DATA_TX_ZONE BIT(5) /* For TX Data Path Msgs */ 30#define DATA_RX_ZONE BIT(6) /* For RX Data Path Msgs */ 31#define FSM_ZONE BIT(7) /* For State Machine Msgs */ 32#define ISR_ZONE BIT(8) /* For Interrupt Msgs */ 33 34#define FSM_CARD_NOT_READY 0 35#define FSM_BOOT_PARAMS_SENT 1 36#define FSM_EEPROM_READ_MAC_ADDR 2 37#define FSM_RESET_MAC_SENT 3 38#define FSM_RADIO_CAPS_SENT 4 39#define FSM_BB_RF_PROG_SENT 5 40#define FSM_MAC_INIT_DONE 6 41 42extern u32 rsi_zone_enabled; 43 44static inline void rsi_dbg(u32 zone, const char *fmt, ...) 45{ 46 struct va_format vaf; 47 va_list args; 48 49 va_start(args, fmt); 50 51 vaf.fmt = fmt; 52 vaf.va = &args; 53 54 if (zone & rsi_zone_enabled) 55 pr_info("%pV", &vaf); 56 va_end(args); 57} 58 59#define RSI_MAX_VIFS 1 60#define NUM_EDCA_QUEUES 4 61#define IEEE80211_ADDR_LEN 6 62#define FRAME_DESC_SZ 16 63#define MIN_802_11_HDR_LEN 24 64 65#define DATA_QUEUE_WATER_MARK 400 66#define MIN_DATA_QUEUE_WATER_MARK 300 67#define MULTICAST_WATER_MARK 200 68#define MAC_80211_HDR_FRAME_CONTROL 0 69#define WME_NUM_AC 4 70#define NUM_SOFT_QUEUES 5 71#define MAX_HW_QUEUES 8 72#define INVALID_QUEUE 0xff 73#define MAX_CONTINUOUS_VO_PKTS 8 74#define MAX_CONTINUOUS_VI_PKTS 4 75 76/* Queue information */ 77#define RSI_WIFI_MGMT_Q 0x4 78#define RSI_WIFI_DATA_Q 0x5 79#define IEEE80211_MGMT_FRAME 0x00 80#define IEEE80211_CTL_FRAME 0x04 81 82#define IEEE80211_QOS_TID 0x0f 83#define IEEE80211_NONQOS_TID 16 84 85#define MAX_DEBUGFS_ENTRIES 4 86 87#define TID_TO_WME_AC(_tid) ( \ 88 ((_tid) == 0 || (_tid) == 3) ? BE_Q : \ 89 ((_tid) < 3) ? BK_Q : \ 90 ((_tid) < 6) ? VI_Q : \ 91 VO_Q) 92 93#define WME_AC(_q) ( \ 94 ((_q) == BK_Q) ? IEEE80211_AC_BK : \ 95 ((_q) == BE_Q) ? IEEE80211_AC_BE : \ 96 ((_q) == VI_Q) ? IEEE80211_AC_VI : \ 97 IEEE80211_AC_VO) 98 99struct version_info { 100 u16 major; 101 u16 minor; 102 u16 release_num; 103 u16 patch_num; 104} __packed; 105 106struct skb_info { 107 s8 rssi; 108 u32 flags; 109 u16 channel; 110 s8 tid; 111 s8 sta_id; 112}; 113 114enum edca_queue { 115 BK_Q, 116 BE_Q, 117 VI_Q, 118 VO_Q, 119 MGMT_SOFT_Q 120}; 121 122struct security_info { 123 bool security_enable; 124 u32 ptk_cipher; 125 u32 gtk_cipher; 126}; 127 128struct wmm_qinfo { 129 s32 weight; 130 s32 wme_params; 131 s32 pkt_contended; 132}; 133 134struct transmit_q_stats { 135 u32 total_tx_pkt_send[NUM_EDCA_QUEUES + 1]; 136 u32 total_tx_pkt_freed[NUM_EDCA_QUEUES + 1]; 137}; 138 139struct vif_priv { 140 bool is_ht; 141 bool sgi; 142 u16 seq_start; 143}; 144 145struct rsi_event { 146 atomic_t event_condition; 147 wait_queue_head_t event_queue; 148}; 149 150struct rsi_thread { 151 void (*thread_function)(void *); 152 struct completion completion; 153 struct task_struct *task; 154 struct rsi_event event; 155 atomic_t thread_done; 156}; 157 158struct rsi_hw; 159 160struct rsi_common { 161 struct rsi_hw *priv; 162 struct vif_priv vif_info[RSI_MAX_VIFS]; 163 164 bool mgmt_q_block; 165 struct version_info driver_ver; 166 struct version_info fw_ver; 167 168 struct rsi_thread tx_thread; 169 struct sk_buff_head tx_queue[NUM_EDCA_QUEUES + 1]; 170 /* Mutex declaration */ 171 struct mutex mutex; 172 /* Mutex used between tx/rx threads */ 173 struct mutex tx_rxlock; 174 u8 endpoint; 175 176 /* Channel/band related */ 177 u8 band; 178 u8 channel_width; 179 180 u16 rts_threshold; 181 u16 bitrate_mask[2]; 182 u32 fixedrate_mask[2]; 183 184 u8 rf_reset; 185 struct transmit_q_stats tx_stats; 186 struct security_info secinfo; 187 struct wmm_qinfo tx_qinfo[NUM_EDCA_QUEUES]; 188 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES]; 189 u8 mac_addr[IEEE80211_ADDR_LEN]; 190 191 /* state related */ 192 u32 fsm_state; 193 bool init_done; 194 u8 bb_rf_prog_count; 195 bool iface_down; 196 197 /* Generic */ 198 u8 channel; 199 u8 *rx_data_pkt; 200 u8 mac_id; 201 u8 radio_id; 202 u16 rate_pwr[20]; 203 u16 min_rate; 204 205 /* WMM algo related */ 206 u8 selected_qnum; 207 u32 pkt_cnt; 208 u8 min_weight; 209}; 210 211struct rsi_hw { 212 struct rsi_common *priv; 213 struct ieee80211_hw *hw; 214 struct ieee80211_vif *vifs[RSI_MAX_VIFS]; 215 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES]; 216 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 217 218 struct device *device; 219 u8 sc_nvifs; 220 221#ifdef CONFIG_RSI_DEBUGFS 222 struct rsi_debugfs *dfsentry; 223 u8 num_debugfs_entries; 224#endif 225 void *rsi_dev; 226 int (*host_intf_read_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len); 227 int (*host_intf_write_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len); 228 int (*check_hw_queue_status)(struct rsi_hw *adapter, u8 q_num); 229 int (*rx_urb_submit)(struct rsi_hw *adapter); 230 int (*determine_event_timeout)(struct rsi_hw *adapter); 231}; 232#endif 233