rt2x00reg.h revision 4e54c711b42c3cc8da8a3fdcde3407b86d67ebcc
1/* 2 Copyright (C) 2004 - 2009 rt2x00 SourceForge Project 3 <http://rt2x00.serialmonkey.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the 17 Free Software Foundation, Inc., 18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 */ 20 21/* 22 Module: rt2x00 23 Abstract: rt2x00 generic register information. 24 */ 25 26#ifndef RT2X00REG_H 27#define RT2X00REG_H 28 29/* 30 * RX crypto status 31 */ 32enum rx_crypto { 33 RX_CRYPTO_SUCCESS = 0, 34 RX_CRYPTO_FAIL_ICV = 1, 35 RX_CRYPTO_FAIL_MIC = 2, 36 RX_CRYPTO_FAIL_KEY = 3, 37}; 38 39/* 40 * Antenna values 41 */ 42enum antenna { 43 ANTENNA_SW_DIVERSITY = 0, 44 ANTENNA_A = 1, 45 ANTENNA_B = 2, 46 ANTENNA_HW_DIVERSITY = 3, 47}; 48 49/* 50 * Led mode values. 51 */ 52enum led_mode { 53 LED_MODE_DEFAULT = 0, 54 LED_MODE_TXRX_ACTIVITY = 1, 55 LED_MODE_SIGNAL_STRENGTH = 2, 56 LED_MODE_ASUS = 3, 57 LED_MODE_ALPHA = 4, 58}; 59 60/* 61 * TSF sync values 62 */ 63enum tsf_sync { 64 TSF_SYNC_NONE = 0, 65 TSF_SYNC_INFRA = 1, 66 TSF_SYNC_BEACON = 2, 67}; 68 69/* 70 * Device states 71 */ 72enum dev_state { 73 STATE_DEEP_SLEEP = 0, 74 STATE_SLEEP = 1, 75 STATE_STANDBY = 2, 76 STATE_AWAKE = 3, 77 78/* 79 * Additional device states, these values are 80 * not strict since they are not directly passed 81 * into the device. 82 */ 83 STATE_RADIO_ON, 84 STATE_RADIO_OFF, 85 STATE_RADIO_RX_ON, 86 STATE_RADIO_RX_OFF, 87 STATE_RADIO_RX_ON_LINK, 88 STATE_RADIO_RX_OFF_LINK, 89 STATE_RADIO_IRQ_ON, 90 STATE_RADIO_IRQ_OFF, 91}; 92 93/* 94 * IFS backoff values 95 */ 96enum ifs { 97 IFS_BACKOFF = 0, 98 IFS_SIFS = 1, 99 IFS_NEW_BACKOFF = 2, 100 IFS_NONE = 3, 101}; 102 103/* 104 * Cipher types for hardware encryption 105 */ 106enum cipher { 107 CIPHER_NONE = 0, 108 CIPHER_WEP64 = 1, 109 CIPHER_WEP128 = 2, 110 CIPHER_TKIP = 3, 111 CIPHER_AES = 4, 112/* 113 * The following fields were added by rt61pci and rt73usb. 114 */ 115 CIPHER_CKIP64 = 5, 116 CIPHER_CKIP128 = 6, 117 CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */ 118 119/* 120 * Max cipher type. 121 * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128 122 * are excluded due to limitations in mac80211. 123 */ 124 CIPHER_MAX = 4, 125}; 126 127/* 128 * Rate modulations 129 */ 130enum rate_modulation { 131 RATE_MODE_CCK = 0, 132 RATE_MODE_OFDM = 1, 133 RATE_MODE_HT_MIX = 2, 134 RATE_MODE_HT_GREENFIELD = 3, 135}; 136 137/* 138 * Register handlers. 139 * We store the position of a register field inside a field structure, 140 * This will simplify the process of setting and reading a certain field 141 * inside the register while making sure the process remains byte order safe. 142 */ 143struct rt2x00_field8 { 144 u8 bit_offset; 145 u8 bit_mask; 146}; 147 148struct rt2x00_field16 { 149 u16 bit_offset; 150 u16 bit_mask; 151}; 152 153struct rt2x00_field32 { 154 u32 bit_offset; 155 u32 bit_mask; 156}; 157 158/* 159 * Power of two check, this will check 160 * if the mask that has been given contains and contiguous set of bits. 161 * Note that we cannot use the is_power_of_2() function since this 162 * check must be done at compile-time. 163 */ 164#define is_power_of_two(x) ( !((x) & ((x)-1)) ) 165#define low_bit_mask(x) ( ((x)-1) & ~(x) ) 166#define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x)) 167 168/* 169 * Macro's to find first set bit in a variable. 170 * These macro's behaves the same as the __ffs() function with 171 * the most important difference that this is done during 172 * compile-time rather then run-time. 173 */ 174#define compile_ffs2(__x) \ 175 __builtin_choose_expr(((__x) & 0x1), 0, 1) 176 177#define compile_ffs4(__x) \ 178 __builtin_choose_expr(((__x) & 0x3), \ 179 (compile_ffs2((__x))), \ 180 (compile_ffs2((__x) >> 2) + 2)) 181 182#define compile_ffs8(__x) \ 183 __builtin_choose_expr(((__x) & 0xf), \ 184 (compile_ffs4((__x))), \ 185 (compile_ffs4((__x) >> 4) + 4)) 186 187#define compile_ffs16(__x) \ 188 __builtin_choose_expr(((__x) & 0xff), \ 189 (compile_ffs8((__x))), \ 190 (compile_ffs8((__x) >> 8) + 8)) 191 192#define compile_ffs32(__x) \ 193 __builtin_choose_expr(((__x) & 0xffff), \ 194 (compile_ffs16((__x))), \ 195 (compile_ffs16((__x) >> 16) + 16)) 196 197/* 198 * This macro will check the requirements for the FIELD{8,16,32} macros 199 * The mask should be a constant non-zero contiguous set of bits which 200 * does not exceed the given typelimit. 201 */ 202#define FIELD_CHECK(__mask, __type) \ 203 BUILD_BUG_ON(!(__mask) || \ 204 !is_valid_mask(__mask) || \ 205 (__mask) != (__type)(__mask)) \ 206 207#define FIELD8(__mask) \ 208({ \ 209 FIELD_CHECK(__mask, u8); \ 210 (struct rt2x00_field8) { \ 211 compile_ffs8(__mask), (__mask) \ 212 }; \ 213}) 214 215#define FIELD16(__mask) \ 216({ \ 217 FIELD_CHECK(__mask, u16); \ 218 (struct rt2x00_field16) { \ 219 compile_ffs16(__mask), (__mask) \ 220 }; \ 221}) 222 223#define FIELD32(__mask) \ 224({ \ 225 FIELD_CHECK(__mask, u32); \ 226 (struct rt2x00_field32) { \ 227 compile_ffs32(__mask), (__mask) \ 228 }; \ 229}) 230 231#define SET_FIELD(__reg, __type, __field, __value)\ 232({ \ 233 typecheck(__type, __field); \ 234 *(__reg) &= ~((__field).bit_mask); \ 235 *(__reg) |= ((__value) << \ 236 ((__field).bit_offset)) & \ 237 ((__field).bit_mask); \ 238}) 239 240#define GET_FIELD(__reg, __type, __field) \ 241({ \ 242 typecheck(__type, __field); \ 243 ((__reg) & ((__field).bit_mask)) >> \ 244 ((__field).bit_offset); \ 245}) 246 247#define rt2x00_set_field32(__reg, __field, __value) \ 248 SET_FIELD(__reg, struct rt2x00_field32, __field, __value) 249#define rt2x00_get_field32(__reg, __field) \ 250 GET_FIELD(__reg, struct rt2x00_field32, __field) 251 252#define rt2x00_set_field16(__reg, __field, __value) \ 253 SET_FIELD(__reg, struct rt2x00_field16, __field, __value) 254#define rt2x00_get_field16(__reg, __field) \ 255 GET_FIELD(__reg, struct rt2x00_field16, __field) 256 257#define rt2x00_set_field8(__reg, __field, __value) \ 258 SET_FIELD(__reg, struct rt2x00_field8, __field, __value) 259#define rt2x00_get_field8(__reg, __field) \ 260 GET_FIELD(__reg, struct rt2x00_field8, __field) 261 262#endif /* RT2X00REG_H */ 263