rt2x00reg.h revision ea175ee26268370ca07aff91cf6ba1e0f1a3bd36
1/* 2 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com> 3 <http://rt2x00.serialmonkey.com> 4 5 This program is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 2 of the License, or 8 (at your option) any later version. 9 10 This program is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with this program; if not, write to the 17 Free Software Foundation, Inc., 18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 19 */ 20 21/* 22 Module: rt2x00 23 Abstract: rt2x00 generic register information. 24 */ 25 26#ifndef RT2X00REG_H 27#define RT2X00REG_H 28 29/* 30 * RX crypto status 31 */ 32enum rx_crypto { 33 RX_CRYPTO_SUCCESS = 0, 34 RX_CRYPTO_FAIL_ICV = 1, 35 RX_CRYPTO_FAIL_MIC = 2, 36 RX_CRYPTO_FAIL_KEY = 3, 37}; 38 39/* 40 * Antenna values 41 */ 42enum antenna { 43 ANTENNA_SW_DIVERSITY = 0, 44 ANTENNA_A = 1, 45 ANTENNA_B = 2, 46 ANTENNA_HW_DIVERSITY = 3, 47}; 48 49/* 50 * Led mode values. 51 */ 52enum led_mode { 53 LED_MODE_DEFAULT = 0, 54 LED_MODE_TXRX_ACTIVITY = 1, 55 LED_MODE_SIGNAL_STRENGTH = 2, 56 LED_MODE_ASUS = 3, 57 LED_MODE_ALPHA = 4, 58}; 59 60/* 61 * TSF sync values 62 */ 63enum tsf_sync { 64 TSF_SYNC_NONE = 0, 65 TSF_SYNC_INFRA = 1, 66 TSF_SYNC_ADHOC = 2, 67 TSF_SYNC_AP_NONE = 3, 68}; 69 70/* 71 * Device states 72 */ 73enum dev_state { 74 STATE_DEEP_SLEEP = 0, 75 STATE_SLEEP = 1, 76 STATE_STANDBY = 2, 77 STATE_AWAKE = 3, 78 79/* 80 * Additional device states, these values are 81 * not strict since they are not directly passed 82 * into the device. 83 */ 84 STATE_RADIO_ON, 85 STATE_RADIO_OFF, 86 STATE_RADIO_RX_ON, 87 STATE_RADIO_RX_OFF, 88 STATE_RADIO_IRQ_ON, 89 STATE_RADIO_IRQ_OFF, 90 STATE_RADIO_IRQ_ON_ISR, 91 STATE_RADIO_IRQ_OFF_ISR, 92}; 93 94/* 95 * IFS backoff values 96 */ 97enum ifs { 98 IFS_BACKOFF = 0, 99 IFS_SIFS = 1, 100 IFS_NEW_BACKOFF = 2, 101 IFS_NONE = 3, 102}; 103 104/* 105 * IFS backoff values for HT devices 106 */ 107enum txop { 108 TXOP_HTTXOP = 0, 109 TXOP_PIFS = 1, 110 TXOP_SIFS = 2, 111 TXOP_BACKOFF = 3, 112}; 113 114/* 115 * Cipher types for hardware encryption 116 */ 117enum cipher { 118 CIPHER_NONE = 0, 119 CIPHER_WEP64 = 1, 120 CIPHER_WEP128 = 2, 121 CIPHER_TKIP = 3, 122 CIPHER_AES = 4, 123/* 124 * The following fields were added by rt61pci and rt73usb. 125 */ 126 CIPHER_CKIP64 = 5, 127 CIPHER_CKIP128 = 6, 128 CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */ 129 130/* 131 * Max cipher type. 132 * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128 133 * are excluded due to limitations in mac80211. 134 */ 135 CIPHER_MAX = 4, 136}; 137 138/* 139 * Rate modulations 140 */ 141enum rate_modulation { 142 RATE_MODE_CCK = 0, 143 RATE_MODE_OFDM = 1, 144 RATE_MODE_HT_MIX = 2, 145 RATE_MODE_HT_GREENFIELD = 3, 146}; 147 148/* 149 * Firmware validation error codes 150 */ 151enum firmware_errors { 152 FW_OK, 153 FW_BAD_CRC, 154 FW_BAD_LENGTH, 155 FW_BAD_VERSION, 156}; 157 158/* 159 * Register handlers. 160 * We store the position of a register field inside a field structure, 161 * This will simplify the process of setting and reading a certain field 162 * inside the register while making sure the process remains byte order safe. 163 */ 164struct rt2x00_field8 { 165 u8 bit_offset; 166 u8 bit_mask; 167}; 168 169struct rt2x00_field16 { 170 u16 bit_offset; 171 u16 bit_mask; 172}; 173 174struct rt2x00_field32 { 175 u32 bit_offset; 176 u32 bit_mask; 177}; 178 179/* 180 * Power of two check, this will check 181 * if the mask that has been given contains and contiguous set of bits. 182 * Note that we cannot use the is_power_of_2() function since this 183 * check must be done at compile-time. 184 */ 185#define is_power_of_two(x) ( !((x) & ((x)-1)) ) 186#define low_bit_mask(x) ( ((x)-1) & ~(x) ) 187#define is_valid_mask(x) is_power_of_two(1LU + (x) + low_bit_mask(x)) 188 189/* 190 * Macros to find first set bit in a variable. 191 * These macros behave the same as the __ffs() functions but 192 * the most important difference that this is done during 193 * compile-time rather then run-time. 194 */ 195#define compile_ffs2(__x) \ 196 __builtin_choose_expr(((__x) & 0x1), 0, 1) 197 198#define compile_ffs4(__x) \ 199 __builtin_choose_expr(((__x) & 0x3), \ 200 (compile_ffs2((__x))), \ 201 (compile_ffs2((__x) >> 2) + 2)) 202 203#define compile_ffs8(__x) \ 204 __builtin_choose_expr(((__x) & 0xf), \ 205 (compile_ffs4((__x))), \ 206 (compile_ffs4((__x) >> 4) + 4)) 207 208#define compile_ffs16(__x) \ 209 __builtin_choose_expr(((__x) & 0xff), \ 210 (compile_ffs8((__x))), \ 211 (compile_ffs8((__x) >> 8) + 8)) 212 213#define compile_ffs32(__x) \ 214 __builtin_choose_expr(((__x) & 0xffff), \ 215 (compile_ffs16((__x))), \ 216 (compile_ffs16((__x) >> 16) + 16)) 217 218/* 219 * This macro will check the requirements for the FIELD{8,16,32} macros 220 * The mask should be a constant non-zero contiguous set of bits which 221 * does not exceed the given typelimit. 222 */ 223#define FIELD_CHECK(__mask, __type) \ 224 BUILD_BUG_ON(!(__mask) || \ 225 !is_valid_mask(__mask) || \ 226 (__mask) != (__type)(__mask)) \ 227 228#define FIELD8(__mask) \ 229({ \ 230 FIELD_CHECK(__mask, u8); \ 231 (struct rt2x00_field8) { \ 232 compile_ffs8(__mask), (__mask) \ 233 }; \ 234}) 235 236#define FIELD16(__mask) \ 237({ \ 238 FIELD_CHECK(__mask, u16); \ 239 (struct rt2x00_field16) { \ 240 compile_ffs16(__mask), (__mask) \ 241 }; \ 242}) 243 244#define FIELD32(__mask) \ 245({ \ 246 FIELD_CHECK(__mask, u32); \ 247 (struct rt2x00_field32) { \ 248 compile_ffs32(__mask), (__mask) \ 249 }; \ 250}) 251 252#define SET_FIELD(__reg, __type, __field, __value)\ 253({ \ 254 typecheck(__type, __field); \ 255 *(__reg) &= ~((__field).bit_mask); \ 256 *(__reg) |= ((__value) << \ 257 ((__field).bit_offset)) & \ 258 ((__field).bit_mask); \ 259}) 260 261#define GET_FIELD(__reg, __type, __field) \ 262({ \ 263 typecheck(__type, __field); \ 264 ((__reg) & ((__field).bit_mask)) >> \ 265 ((__field).bit_offset); \ 266}) 267 268#define rt2x00_set_field32(__reg, __field, __value) \ 269 SET_FIELD(__reg, struct rt2x00_field32, __field, __value) 270#define rt2x00_get_field32(__reg, __field) \ 271 GET_FIELD(__reg, struct rt2x00_field32, __field) 272 273#define rt2x00_set_field16(__reg, __field, __value) \ 274 SET_FIELD(__reg, struct rt2x00_field16, __field, __value) 275#define rt2x00_get_field16(__reg, __field) \ 276 GET_FIELD(__reg, struct rt2x00_field16, __field) 277 278#define rt2x00_set_field8(__reg, __field, __value) \ 279 SET_FIELD(__reg, struct rt2x00_field8, __field, __value) 280#define rt2x00_get_field8(__reg, __field) \ 281 GET_FIELD(__reg, struct rt2x00_field8, __field) 282 283#endif /* RT2X00REG_H */ 284