1f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 2f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu/* 3f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * Radio tuning for RTL8225 on RTL8180 4f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * 5f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * Copyright 2007 Michael Wu <flamingice@sourmilk.net> 693ba2a856f75aead35a043f169a49ce398afe737Andrea Merello * Copyright 2007 Andrea Merello <andrea.merello@gmail.com> 7f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * 8f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * Based on the r8180 driver, which is: 993ba2a856f75aead35a043f169a49ce398afe737Andrea Merello * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al. 10f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * 11f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * Thanks to Realtek for their support! 12f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * 13f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * This program is free software; you can redistribute it and/or modify 14f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * it under the terms of the GNU General Public License version 2 as 15f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu * published by the Free Software Foundation. 16f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu */ 17f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 18f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu#include <linux/pci.h> 19f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu#include <linux/delay.h> 20f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu#include <net/mac80211.h> 21f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 22f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu#include "rtl8180.h" 233cfeb0c33f5cbcc6dde371392877ef3101b8f805John W. Linville#include "rtl8225.h" 24f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 25f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic void rtl8225_write(struct ieee80211_hw *dev, u8 addr, u16 data) 26f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 27f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 28f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u16 reg80, reg84, reg82; 29f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u32 bangdata; 30f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu int i; 31f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 32f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu bangdata = (data << 4) | (addr & 0xf); 33f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 34f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 = rtl818x_ioread16(priv, &priv->map->RFPinsOutput) & 0xfff3; 35f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg82 = rtl818x_ioread16(priv, &priv->map->RFPinsEnable); 36f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 37f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, reg82 | 0x7); 38f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 39f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg84 = rtl818x_ioread16(priv, &priv->map->RFPinsSelect); 40f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84 | 0x7 | 0x400); 41f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 42f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(10); 43f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 44f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2)); 45f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 46f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 47f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80); 48f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 49f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(10); 50f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 51f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 15; i >= 0; i--) { 5228eb3e5acfddf1e1c8892df9901e4f32f7f537ebJohn W. Linville u16 reg = reg80; 5328eb3e5acfddf1e1c8892df9901e4f32f7f537ebJohn W. Linville 5428eb3e5acfddf1e1c8892df9901e4f32f7f537ebJohn W. Linville if (bangdata & (1 << i)) 5528eb3e5acfddf1e1c8892df9901e4f32f7f537ebJohn W. Linville reg |= 1; 56f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 57f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (i & 1) 58f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg); 59f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 60f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg | (1 << 1)); 61f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg | (1 << 1)); 62f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 63f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (!(i & 1)) 64f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg); 65f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 66f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 67f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2)); 68f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 69f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(10); 70f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 71f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2)); 72f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84 | 0x400); 73f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 74f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 75f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 76f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic u16 rtl8225_read(struct ieee80211_hw *dev, u8 addr) 77f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 78f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 79f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u16 reg80, reg82, reg84, out; 80f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu int i; 81f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 82f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 = rtl818x_ioread16(priv, &priv->map->RFPinsOutput); 83f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg82 = rtl818x_ioread16(priv, &priv->map->RFPinsEnable); 84f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg84 = rtl818x_ioread16(priv, &priv->map->RFPinsSelect) | 0x400; 85f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 86f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 &= ~0xF; 87f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 88f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, reg82 | 0x000F); 89f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84 | 0x000F); 90f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 91f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80 | (1 << 2)); 92f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 93f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(4); 94f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg80); 95f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 96f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(5); 97f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 98f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 4; i >= 0; i--) { 99f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u16 reg = reg80 | ((addr >> i) & 1); 100f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 101f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (!(i & 1)) { 102f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg); 103f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 104f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(1); 105f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 106f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 107f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 108f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg | (1 << 1)); 109f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 110f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 111f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 112f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg | (1 << 1)); 113f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 114f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 115f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 116f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (i & 1) { 117f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, reg); 118f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 119f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(1); 120f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 121f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 122f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 123f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x000E); 124f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x040E); 125f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 126f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 127f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3) | (1 << 1)); 128f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 129f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 130f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 131f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3)); 132f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 133f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 134f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 135f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3)); 136f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 137f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 138f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 139f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu out = 0; 140f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 11; i >= 0; i--) { 141f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 142f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3)); 143f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 144f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(1); 145f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 146f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3) | (1 << 1)); 147f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 148f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 149f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 150f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3) | (1 << 1)); 151f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 152f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 153f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 154f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3) | (1 << 1)); 155f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 156f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 157f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 158f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (rtl818x_ioread16(priv, &priv->map->RFPinsInput) & (1 << 1)) 159f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu out |= 1 << i; 160f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 161f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 162f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3)); 163f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 164f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 165f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 166f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 167f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 168f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg80 | (1 << 3) | (1 << 2)); 169f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 170f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu udelay(2); 171f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 172f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, reg82); 173f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, reg84); 174f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x03A0); 175f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 176f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu return out; 177f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 178f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 179f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u16 rtl8225bcd_rxgain[] = { 180f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 181f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 182f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 183f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 184f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 185f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 186f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 187f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 188f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 189f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 190f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 191f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 192f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 193f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 194f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225_agc[] = { 195f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 196f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x9d, 0x9c, 0x9b, 0x9a, 0x99, 0x98, 0x97, 0x96, 197f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 0x8f, 0x8e, 198f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 199f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x85, 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 200f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x3d, 0x3c, 0x3b, 0x3a, 0x39, 0x38, 0x37, 0x36, 201f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 0x2e, 202f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 203f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x25, 0x24, 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 204f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 0x18, 0x17, 0x16, 205f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 206f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 207f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x05, 0x04, 0x03, 0x02, 0x01, 0x01, 0x01, 0x01, 208f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 209f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 210f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 211f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 212f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 213f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225_gain[] = { 214f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 215f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 216f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 217f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 218f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 219f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 220f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 221f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 222f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 223f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225_threshold[] = { 224f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd 225f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 226f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 227f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225_tx_gain_cck_ofdm[] = { 228f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 229f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 230f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 231f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225_tx_power_cck[] = { 232f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 233f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 234f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 235f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 236f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 237f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 238f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 239f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 240f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225_tx_power_cck_ch14[] = { 241f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 242f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 243f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 244f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 245f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 246f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 247f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 248f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 249f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225_tx_power_ofdm[] = { 250f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 251f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 252f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 253f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u32 rtl8225_chan[] = { 254f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x085c, 0x08dc, 0x095c, 0x09dc, 0x0a5c, 0x0adc, 0x0b5c, 255f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0bdc, 0x0c5c, 0x0cdc, 0x0d5c, 0x0ddc, 0x0e5c, 0x0f72 256f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 257f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 258f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic void rtl8225_rf_set_tx_power(struct ieee80211_hw *dev, int channel) 259f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 260f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 261f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u8 cck_power, ofdm_power; 262f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu const u8 *tmp; 263f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u32 reg; 264f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu int i; 265f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 2668318d78a44d49ac1edf2bdec7299de3617c4232eJohannes Berg cck_power = priv->channels[channel - 1].hw_value & 0xFF; 2678318d78a44d49ac1edf2bdec7299de3617c4232eJohannes Berg ofdm_power = priv->channels[channel - 1].hw_value >> 8; 268f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 269f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu cck_power = min(cck_power, (u8)35); 270f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu ofdm_power = min(ofdm_power, (u8)35); 271f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 272f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK, 273f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_tx_gain_cck_ofdm[cck_power / 6] >> 1); 274f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 275f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (channel == 14) 276f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu tmp = &rtl8225_tx_power_cck_ch14[(cck_power % 6) * 8]; 277f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu else 278f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu tmp = &rtl8225_tx_power_cck[(cck_power % 6) * 8]; 279f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 280f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 0; i < 8; i++) 281f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x44 + i, *tmp++); 282f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 283f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); /* FIXME: optional? */ 284f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 285ff3cbc2cb606c8f804b611291efe207d07275a18Andrea Merello /* TODO: use set_anaparam2 dev.c_func*/ 286f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* anaparam2 on */ 287f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 288f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 289f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); 290f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_ON); 291f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); 292f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 293f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 294f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM, 295f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_tx_gain_cck_ofdm[ofdm_power/6] >> 1); 296f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 297f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu tmp = &rtl8225_tx_power_ofdm[ofdm_power % 6]; 298f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 299f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 5, *tmp); 300f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 7, *tmp); 301f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 302f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 303f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 304f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 305f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic void rtl8225_rf_init(struct ieee80211_hw *dev) 306f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 307f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 308f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu int i; 309f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 310f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8180_set_anaparam(priv, RTL8225_ANAPARAM_ON); 311f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 312f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* host_pci_init */ 313f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); 314f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 315f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x0488); 316f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 317f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 318f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(200); /* FIXME: ehh?? */ 319f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0xFF & ~(1 << 6)); 320f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 321f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008); 322f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 323f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* TODO: check if we need really to change BRSR to do RF config */ 324f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread16(priv, &priv->map->BRSR); 325f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); 326f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); 327f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 328f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); 329f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 330f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 331f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0, 0x067); 332f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x1, 0xFE0); 333f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x2, 0x44D); 334f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x3, 0x441); 335f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x4, 0x8BE); 336f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x5, 0xBF0); /* TODO: minipci */ 337f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x6, 0xAE6); 338f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x7, rtl8225_chan[0]); 339f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x8, 0x01F); 340f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x9, 0x334); 341f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xA, 0xFD4); 342f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xB, 0x391); 343f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xC, 0x050); 344f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xD, 0x6DB); 345f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xE, 0x029); 346f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xF, 0x914); msleep(1); 347f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 348f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x2, 0xC4D); msleep(100); 349f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 350f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0, 0x127); 351f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 352f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 0; i < ARRAY_SIZE(rtl8225bcd_rxgain); i++) { 353f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x1, i + 1); 354f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x2, rtl8225bcd_rxgain[i]); 355f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 356f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 357f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0, 0x027); 358f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0, 0x22F); 359f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 360f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 361f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 0; i < ARRAY_SIZE(rtl8225_agc); i++) { 362f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0xB, rtl8225_agc[i]); 363f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 364f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0xA, 0x80 + i); 365f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 366f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 367f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 368f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 369f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 370f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x00, 0x01); msleep(1); 371f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x01, 0x02); msleep(1); 372f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x02, 0x62); msleep(1); 373f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x03, 0x00); msleep(1); 374f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x04, 0x00); msleep(1); 375f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x05, 0x00); msleep(1); 376f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x06, 0x00); msleep(1); 377f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x07, 0x00); msleep(1); 378f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x08, 0x00); msleep(1); 379f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x09, 0xfe); msleep(1); 380f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0a, 0x09); msleep(1); 381f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0b, 0x80); msleep(1); 382f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0c, 0x01); msleep(1); 383f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0e, 0xd3); msleep(1); 384f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0f, 0x38); msleep(1); 385f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x10, 0x84); msleep(1); 386f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x11, 0x03); msleep(1); 387f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x12, 0x20); msleep(1); 388f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x13, 0x20); msleep(1); 389f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x14, 0x00); msleep(1); 390f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x15, 0x40); msleep(1); 391f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x16, 0x00); msleep(1); 392f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x17, 0x40); msleep(1); 393f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x18, 0xef); msleep(1); 394f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x19, 0x19); msleep(1); 395f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1a, 0x20); msleep(1); 396f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1b, 0x76); msleep(1); 397f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1c, 0x04); msleep(1); 398f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1e, 0x95); msleep(1); 399f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1f, 0x75); msleep(1); 400f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x20, 0x1f); msleep(1); 401f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x21, 0x27); msleep(1); 402f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x22, 0x16); msleep(1); 403f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x24, 0x46); msleep(1); 404f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x25, 0x20); msleep(1); 405f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1); 406f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x27, 0x88); msleep(1); 407f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 408f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x00, 0x98); msleep(1); 409f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x03, 0x20); msleep(1); 410f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x04, 0x7e); msleep(1); 411f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x05, 0x12); msleep(1); 412f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x06, 0xfc); msleep(1); 413f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x07, 0x78); msleep(1); 414f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x08, 0x2e); msleep(1); 415f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x10, 0x93); msleep(1); 416f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x11, 0x88); msleep(1); 417f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x12, 0x47); msleep(1); 418f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x13, 0xd0); 419f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x19, 0x00); 420f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x1a, 0xa0); 421f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x1b, 0x08); 422f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x40, 0x86); 423f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x41, 0x8d); msleep(1); 424f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x42, 0x15); msleep(1); 425f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x43, 0x18); msleep(1); 426f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x44, 0x1f); msleep(1); 427f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x45, 0x1e); msleep(1); 428f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x46, 0x1a); msleep(1); 429f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x47, 0x15); msleep(1); 430f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x48, 0x10); msleep(1); 431f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x49, 0x0a); msleep(1); 432f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x4a, 0x05); msleep(1); 433f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x4b, 0x02); msleep(1); 434f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x4c, 0x05); msleep(1); 435f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 436f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->TESTR, 0x0D); msleep(1); 437f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 438f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_rf_set_tx_power(dev, 1); 439f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 440f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* RX antenna default to A */ 441f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x10, 0x9b); msleep(1); /* B: 0xDB */ 442f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1); /* B: 0x10 */ 443f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 444f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03); /* B: 0x00 */ 445f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 446f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, (__le32 __iomem *)((void __iomem *)priv->map + 0x94), 0x15c00002); 447f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 448f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 449f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0c, 0x50); 450f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* set OFDM initial gain */ 451f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0d, rtl8225_gain[4 * 4]); 452f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x23, rtl8225_gain[4 * 4 + 1]); 453f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1b, rtl8225_gain[4 * 4 + 2]); 454f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1d, rtl8225_gain[4 * 4 + 3]); 455f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* set CCK threshold */ 456f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x41, rtl8225_threshold[0]); 457f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 458f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 459f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225z2_tx_power_cck_ch14[] = { 460f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 461f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 462f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 463f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225z2_tx_power_cck_B[] = { 464f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x04 465f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 466f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 467f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225z2_tx_power_cck_A[] = { 468f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04 469f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 470f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 471f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u8 rtl8225z2_tx_power_cck[] = { 472f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 473f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 474f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 475f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic void rtl8225z2_rf_set_tx_power(struct ieee80211_hw *dev, int channel) 476f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 477f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 478f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u8 cck_power, ofdm_power; 479f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu const u8 *tmp; 480f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu int i; 481f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 4828318d78a44d49ac1edf2bdec7299de3617c4232eJohannes Berg cck_power = priv->channels[channel - 1].hw_value & 0xFF; 4838318d78a44d49ac1edf2bdec7299de3617c4232eJohannes Berg ofdm_power = priv->channels[channel - 1].hw_value >> 8; 484f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 485f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (channel == 14) 486f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu tmp = rtl8225z2_tx_power_cck_ch14; 487f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu else if (cck_power == 12) 488f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu tmp = rtl8225z2_tx_power_cck_B; 489f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu else if (cck_power == 13) 490f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu tmp = rtl8225z2_tx_power_cck_A; 491f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu else 492f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu tmp = rtl8225z2_tx_power_cck; 493f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 494f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 0; i < 8; i++) 495f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x44 + i, *tmp++); 496f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 497f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu cck_power = min(cck_power, (u8)35); 498f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (cck_power == 13 || cck_power == 14) 499f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu cck_power = 12; 500f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (cck_power >= 15) 501f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu cck_power -= 2; 502f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 503f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK, cck_power); 504f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->TX_GAIN_CCK); 505f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 506f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 507f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu ofdm_power = min(ofdm_power, (u8)35); 508f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->TX_GAIN_OFDM, ofdm_power); 509f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 510f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 2, 0x62); 511f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 5, 0x00); 512f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 6, 0x40); 513f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 7, 0x00); 514f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 8, 0x40); 515f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 516f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 517f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 518f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 519f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const u16 rtl8225z2_rxgain[] = { 520f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 521f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 522f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 523f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 524f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 525f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 526f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 527f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 528f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 529f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 530f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 531f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 532f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 533f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 534f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic void rtl8225z2_rf_init(struct ieee80211_hw *dev) 535f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 536f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 537f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu int i; 538f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 539f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8180_set_anaparam(priv, RTL8225_ANAPARAM_ON); 540f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 541f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* host_pci_init */ 542f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); 543f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 544f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x0488); 545f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0); 546f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 547f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(200); /* FIXME: ehh?? */ 548f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0xFF & ~(1 << 6)); 549f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 550f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00088008); 551f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 552f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* TODO: check if we need really to change BRSR to do RF config */ 553f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread16(priv, &priv->map->BRSR); 554f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF); 555f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044); 556f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 557f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44); 558f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 559f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 560f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 561f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 562f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0, 0x0B7); msleep(1); 563f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x1, 0xEE0); msleep(1); 564f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x2, 0x44D); msleep(1); 565f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x3, 0x441); msleep(1); 566f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x4, 0x8C3); msleep(1); 567f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x5, 0xC72); msleep(1); 568f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x6, 0x0E6); msleep(1); 569f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x7, 0x82A); msleep(1); 570f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x8, 0x03F); msleep(1); 571f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x9, 0x335); msleep(1); 572f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xa, 0x9D4); msleep(1); 573f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xb, 0x7BB); msleep(1); 574f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xc, 0x850); msleep(1); 575f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xd, 0xCDF); msleep(1); 576f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xe, 0x02B); msleep(1); 577f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xf, 0x114); msleep(100); 578f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 579f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (!(rtl8225_read(dev, 6) & (1 << 7))) { 580f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x02, 0x0C4D); 581f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(200); 582f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x02, 0x044D); 583f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(100); 584f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* TODO: readd calibration failure message when the calibration 585f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu check works */ 586f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 587f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 588f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0, 0x1B7); 589f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x3, 0x002); 590f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x5, 0x004); 591f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 592f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 0; i < ARRAY_SIZE(rtl8225z2_rxgain); i++) { 593f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x1, i + 1); 594f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x2, rtl8225z2_rxgain[i]); 595f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 596f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 597f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x0, 0x0B7); msleep(100); 598f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x2, 0xC4D); 599f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 600f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(200); 601f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x2, 0x44D); 602f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(100); 603f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 604f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x00, 0x2BF); 605f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0xFF, 0xFFFF); 606f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 607f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 608f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 609f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu for (i = 0; i < ARRAY_SIZE(rtl8225_agc); i++) { 610f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0xB, rtl8225_agc[i]); 611f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 612f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0xA, 0x80 + i); 613f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 614f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu } 615f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 616f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 617f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 618f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x00, 0x01); msleep(1); 619f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x01, 0x02); msleep(1); 620f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x02, 0x62); msleep(1); 621f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x03, 0x00); msleep(1); 622f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x04, 0x00); msleep(1); 623f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x05, 0x00); msleep(1); 624f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x06, 0x40); msleep(1); 625f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x07, 0x00); msleep(1); 626f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x08, 0x40); msleep(1); 627f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x09, 0xfe); msleep(1); 628f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0a, 0x09); msleep(1); 629f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x18, 0xef); msleep(1); 630f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0b, 0x80); msleep(1); 631f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0c, 0x01); msleep(1); 632f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0d, 0x43); 633f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0e, 0xd3); msleep(1); 634f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x0f, 0x38); msleep(1); 635f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x10, 0x84); msleep(1); 636f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x11, 0x06); msleep(1); 637f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x12, 0x20); msleep(1); 638f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x13, 0x20); msleep(1); 639f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x14, 0x00); msleep(1); 640f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x15, 0x40); msleep(1); 641f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x16, 0x00); msleep(1); 642f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x17, 0x40); msleep(1); 643f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x18, 0xef); msleep(1); 644f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x19, 0x19); msleep(1); 645f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1a, 0x20); msleep(1); 646f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1b, 0x11); msleep(1); 647f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1c, 0x04); msleep(1); 648f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1d, 0xc5); msleep(1); 649f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1e, 0xb3); msleep(1); 650f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x1f, 0x75); msleep(1); 651f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x20, 0x1f); msleep(1); 652f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x21, 0x27); msleep(1); 653f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x22, 0x16); msleep(1); 654f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x23, 0x80); msleep(1); /* FIXME: not needed? */ 655f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x24, 0x46); msleep(1); 656f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x25, 0x20); msleep(1); 657f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1); 658f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x27, 0x88); msleep(1); 659f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 660f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x00, 0x98); msleep(1); 661f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x03, 0x20); msleep(1); 662f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x04, 0x7e); msleep(1); 663f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x05, 0x12); msleep(1); 664f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x06, 0xfc); msleep(1); 665f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x07, 0x78); msleep(1); 666f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x08, 0x2e); msleep(1); 667f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x10, 0x93); msleep(1); 668f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x11, 0x88); msleep(1); 669f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x12, 0x47); msleep(1); 670f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x13, 0xd0); 671f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x19, 0x00); 672f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x1a, 0xa0); 673f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x1b, 0x08); 674f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x40, 0x86); 675f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x41, 0x8a); msleep(1); 676f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x42, 0x15); msleep(1); 677f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x43, 0x18); msleep(1); 678f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x44, 0x36); msleep(1); 679f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x45, 0x35); msleep(1); 680f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x46, 0x2e); msleep(1); 681f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x47, 0x25); msleep(1); 682f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x48, 0x1c); msleep(1); 683f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x49, 0x12); msleep(1); 684f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x4a, 0x09); msleep(1); 685f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x4b, 0x04); msleep(1); 686f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x4c, 0x05); msleep(1); 687f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 688f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, (u8 __iomem *)((void __iomem *)priv->map + 0x5B), 0x0D); msleep(1); 689f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 690f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225z2_rf_set_tx_power(dev, 1); 691f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 692f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu /* RX antenna default to A */ 693f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_cck(dev, 0x10, 0x9b); msleep(1); /* B: 0xDB */ 694f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write_phy_ofdm(dev, 0x26, 0x90); msleep(1); /* B: 0x10 */ 695f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 696f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->TX_ANTENNA, 0x03); /* B: 0x00 */ 697f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(1); 698f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, (__le32 __iomem *)((void __iomem *)priv->map + 0x94), 0x15c00002); 699f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 700f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 701f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 702f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic void rtl8225_rf_stop(struct ieee80211_hw *dev) 703f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 704f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 705f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u8 reg; 706f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 707f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0x4, 0x1f); msleep(1); 708f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 709f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG); 710f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg = rtl818x_ioread8(priv, &priv->map->CONFIG3); 711f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg | RTL818X_CONFIG3_ANAPARAM_WRITE); 712f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, RTL8225_ANAPARAM2_OFF); 713f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite32(priv, &priv->map->ANAPARAM, RTL8225_ANAPARAM_OFF); 714f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE); 715f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL); 716f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 717f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 718f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic void rtl8225_rf_set_channel(struct ieee80211_hw *dev, 719f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct ieee80211_conf *conf) 720f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 721f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 722675a0b049abf6edf30f8dd84c5610b6edc2296c8Karl Beldan int chan = 723675a0b049abf6edf30f8dd84c5610b6edc2296c8Karl Beldan ieee80211_frequency_to_channel(conf->chandef.chan->center_freq); 724f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 725f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (priv->rf->init == rtl8225_rf_init) 7268318d78a44d49ac1edf2bdec7299de3617c4232eJohannes Berg rtl8225_rf_set_tx_power(dev, chan); 727f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu else 7288318d78a44d49ac1edf2bdec7299de3617c4232eJohannes Berg rtl8225z2_rf_set_tx_power(dev, chan); 729f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 7308318d78a44d49ac1edf2bdec7299de3617c4232eJohannes Berg rtl8225_write(dev, 0x7, rtl8225_chan[chan - 1]); 731f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(10); 732da81dede95cf69b0e51442cb472f1581583381e4John W. Linville} 733da81dede95cf69b0e51442cb472f1581583381e4John W. Linville 734f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const struct rtl818x_rf_ops rtl8225_ops = { 735f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu .name = "rtl8225", 736f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu .init = rtl8225_rf_init, 737f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu .stop = rtl8225_rf_stop, 738da81dede95cf69b0e51442cb472f1581583381e4John W. Linville .set_chan = rtl8225_rf_set_channel, 739f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 740f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 741f653211197f3841f383fa9757ef8ce182c6cf627Michael Wustatic const struct rtl818x_rf_ops rtl8225z2_ops = { 742f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu .name = "rtl8225z2", 743f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu .init = rtl8225z2_rf_init, 744f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu .stop = rtl8225_rf_stop, 745da81dede95cf69b0e51442cb472f1581583381e4John W. Linville .set_chan = rtl8225_rf_set_channel, 746f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu}; 747f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 748f653211197f3841f383fa9757ef8ce182c6cf627Michael Wuconst struct rtl818x_rf_ops * rtl8180_detect_rf(struct ieee80211_hw *dev) 749f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu{ 750f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu struct rtl8180_priv *priv = dev->priv; 751f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu u16 reg8, reg9; 752f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 753f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480); 754f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x0488); 755f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF); 756f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl818x_ioread8(priv, &priv->map->EEPROM_CMD); 757f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu msleep(100); 758f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 759f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0, 0x1B7); 760f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 761f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg8 = rtl8225_read(dev, 8); 762f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu reg9 = rtl8225_read(dev, 9); 763f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 764f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu rtl8225_write(dev, 0, 0x0B7); 765f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 766f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu if (reg8 != 0x588 || reg9 != 0x700) 767f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu return &rtl8225_ops; 768f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu 769f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu return &rtl8225z2_ops; 770f653211197f3841f383fa9757ef8ce182c6cf627Michael Wu} 771