1/******************************************************************************
2 *
3 * Copyright(c) 2009-2012  Realtek Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
22 * wlanfae <wlanfae@realtek.com>
23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
24 * Hsinchu 300, Taiwan.
25 *
26 * Larry Finger <Larry.Finger@lwfinger.net>
27 *
28 *****************************************************************************/
29
30#ifndef __RTL92C_PHY_H__
31#define __RTL92C_PHY_H__
32
33#define MAX_PRECMD_CNT			16
34#define MAX_RFDEPENDCMD_CNT		16
35#define MAX_POSTCMD_CNT			16
36
37#define MAX_DOZE_WAITING_TIMES_9x	64
38
39#define RT_CANNOT_IO(hw)		false
40#define HIGHPOWER_RADIOA_ARRAYLEN	22
41
42#define MAX_TOLERANCE			5
43
44#define	APK_BB_REG_NUM			5
45#define	APK_AFE_REG_NUM			16
46#define	APK_CURVE_REG_NUM		4
47#define	PATH_NUM			2
48
49#define LOOP_LIMIT			5
50#define MAX_STALL_TIME			50
51#define AntennaDiversityValue		0x80
52#define MAX_TXPWR_IDX_NMODE_92S		63
53#define Reset_Cnt_Limit			3
54
55#define IQK_ADDA_REG_NUM		16
56#define IQK_MAC_REG_NUM			4
57
58#define IQK_DELAY_TIME			1
59
60#define RF90_PATH_MAX			2
61
62#define CT_OFFSET_MAC_ADDR		0X16
63
64#define CT_OFFSET_CCK_TX_PWR_IDX	0x5A
65#define CT_OFFSET_HT401S_TX_PWR_IDX	0x60
66#define CT_OFFSET_HT402S_TX_PWR_IDX_DIF	0x66
67#define CT_OFFSET_HT20_TX_PWR_IDX_DIFF	0x69
68#define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF	0x6C
69
70#define CT_OFFSET_HT40_MAX_PWR_OFFSET	0x6F
71#define CT_OFFSET_HT20_MAX_PWR_OFFSET	0x72
72
73#define CT_OFFSET_CHANNEL_PLAH		0x75
74#define CT_OFFSET_THERMAL_METER		0x78
75#define CT_OFFSET_RF_OPTION		0x79
76#define CT_OFFSET_VERSION		0x7E
77#define CT_OFFSET_CUSTOMER_ID		0x7F
78
79#define RTL92C_MAX_PATH_NUM		2
80
81bool rtl92c_phy_bb_config(struct ieee80211_hw *hw);
82u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
83void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
84			   u32 data);
85u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
86			    u32 regaddr, u32 bitmask);
87void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
88			    u32 regaddr, u32 bitmask, u32 data);
89bool rtl92c_phy_mac_config(struct ieee80211_hw *hw);
90bool rtl92ce_phy_bb_config(struct ieee80211_hw *hw);
91bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
92bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
93					  enum radio_path rfpath);
94void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
95void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel);
96void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
97bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw,
98					  long power_indbm);
99void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
100			    enum nl80211_channel_type ch_type);
101void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw);
102u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw);
103void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
104void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, u16 beaconinterval);
105void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
106void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
107void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t);
108void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
109bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
110					  enum radio_path rfpath);
111bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw,
112				       u32 rfpath);
113bool rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
114				    enum rf_pwrstate rfpwr_state);
115void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw);
116bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
117void rtl92c_phy_set_io(struct ieee80211_hw *hw);
118void rtl92c_bb_block_on(struct ieee80211_hw *hw);
119u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, enum radio_path rfpath,
120			       u32 offset);
121u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
122				  enum radio_path rfpath, u32 offset);
123u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
124void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
125				 enum radio_path rfpath, u32 offset, u32 data);
126void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
127				    enum radio_path rfpath, u32 offset,
128				    u32 data);
129void _rtl92c_store_pwrIndex_diffrate_offset(struct ieee80211_hw *hw,
130					    u32 regaddr, u32 bitmask, u32 data);
131bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
132void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
133bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
134void _rtl92c_phy_set_rf_sleep(struct ieee80211_hw *hw);
135bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
136				   enum rf_pwrstate rfpwr_state);
137bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
138					    u8 configtype);
139bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
140					      u8 configtype);
141void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
142
143#endif
144