1/*
2 * This file is part of wl18xx
3 *
4 * Copyright (C) 2011 Texas Instruments Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#ifndef __WL18XX_CONF_H__
23#define __WL18XX_CONF_H__
24
25#define WL18XX_CONF_MAGIC	0x10e100ca
26#define WL18XX_CONF_VERSION	(WLCORE_CONF_VERSION | 0x0006)
27#define WL18XX_CONF_MASK	0x0000ffff
28#define WL18XX_CONF_SIZE	(WLCORE_CONF_SIZE + \
29				 sizeof(struct wl18xx_priv_conf))
30
31#define NUM_OF_CHANNELS_11_ABG 150
32#define NUM_OF_CHANNELS_11_P 7
33#define SRF_TABLE_LEN 16
34#define PIN_MUXING_SIZE 2
35#define WL18XX_TRACE_LOSS_GAPS_TX 10
36#define WL18XX_TRACE_LOSS_GAPS_RX 18
37
38struct wl18xx_mac_and_phy_params {
39	u8 phy_standalone;
40	u8 spare0;
41	u8 enable_clpc;
42	u8 enable_tx_low_pwr_on_siso_rdl;
43	u8 auto_detect;
44	u8 dedicated_fem;
45
46	u8 low_band_component;
47
48	/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
49	u8 low_band_component_type;
50
51	u8 high_band_component;
52
53	/* Bit 0: One Hot, Bit 1: Control Enable, Bit 2: 1.8V, Bit 3: 3V */
54	u8 high_band_component_type;
55	u8 number_of_assembled_ant2_4;
56	u8 number_of_assembled_ant5;
57	u8 pin_muxing_platform_options[PIN_MUXING_SIZE];
58	u8 external_pa_dc2dc;
59	u8 tcxo_ldo_voltage;
60	u8 xtal_itrim_val;
61	u8 srf_state;
62	u8 srf1[SRF_TABLE_LEN];
63	u8 srf2[SRF_TABLE_LEN];
64	u8 srf3[SRF_TABLE_LEN];
65	u8 io_configuration;
66	u8 sdio_configuration;
67	u8 settings;
68	u8 rx_profile;
69	u8 per_chan_pwr_limit_arr_11abg[NUM_OF_CHANNELS_11_ABG];
70	u8 pwr_limit_reference_11_abg;
71	u8 per_chan_pwr_limit_arr_11p[NUM_OF_CHANNELS_11_P];
72	u8 pwr_limit_reference_11p;
73	u8 spare1;
74	u8 per_chan_bo_mode_11_abg[13];
75	u8 per_chan_bo_mode_11_p[4];
76	u8 primary_clock_setting_time;
77	u8 clock_valid_on_wake_up;
78	u8 secondary_clock_setting_time;
79	u8 board_type;
80	/* enable point saturation */
81	u8 psat;
82	/* low/medium/high Tx power in dBm for STA-HP BG */
83	s8 low_power_val;
84	s8 med_power_val;
85	s8 high_power_val;
86	s8 per_sub_band_tx_trace_loss[WL18XX_TRACE_LOSS_GAPS_TX];
87	s8 per_sub_band_rx_trace_loss[WL18XX_TRACE_LOSS_GAPS_RX];
88	u8 tx_rf_margin;
89	/* low/medium/high Tx power in dBm for other role */
90	s8 low_power_val_2nd;
91	s8 med_power_val_2nd;
92	s8 high_power_val_2nd;
93
94	u8 padding[1];
95} __packed;
96
97enum wl18xx_ht_mode {
98	/* Default - use MIMO, fallback to SISO20 */
99	HT_MODE_DEFAULT = 0,
100
101	/* Wide - use SISO40 */
102	HT_MODE_WIDE = 1,
103
104	/* Use SISO20 */
105	HT_MODE_SISO20 = 2,
106};
107
108struct wl18xx_ht_settings {
109	/* DEFAULT / WIDE / SISO20 */
110	u8 mode;
111} __packed;
112
113struct wl18xx_priv_conf {
114	/* Module params structures */
115	struct wl18xx_ht_settings ht;
116
117	/* this structure is copied wholesale to FW */
118	struct wl18xx_mac_and_phy_params phy;
119} __packed;
120
121#endif /* __WL18XX_CONF_H__ */
122