1/* 2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. 3 * 4 * Copyright (C) 2005 James Chapman (ds1337 core) 5 * Copyright (C) 2006 David Brownell 6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support) 7 * Copyright (C) 2012 Bertrand Achard (nvram access fixes) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14#include <linux/module.h> 15#include <linux/init.h> 16#include <linux/slab.h> 17#include <linux/i2c.h> 18#include <linux/string.h> 19#include <linux/rtc.h> 20#include <linux/bcd.h> 21#include <linux/rtc/ds1307.h> 22 23/* 24 * We can't determine type by probing, but if we expect pre-Linux code 25 * to have set the chip up as a clock (turning on the oscillator and 26 * setting the date and time), Linux can ignore the non-clock features. 27 * That's a natural job for a factory or repair bench. 28 */ 29enum ds_type { 30 ds_1307, 31 ds_1337, 32 ds_1338, 33 ds_1339, 34 ds_1340, 35 ds_1388, 36 ds_3231, 37 m41t00, 38 mcp7941x, 39 rx_8025, 40 last_ds_type /* always last */ 41 /* rs5c372 too? different address... */ 42}; 43 44 45/* RTC registers don't differ much, except for the century flag */ 46#define DS1307_REG_SECS 0x00 /* 00-59 */ 47# define DS1307_BIT_CH 0x80 48# define DS1340_BIT_nEOSC 0x80 49# define MCP7941X_BIT_ST 0x80 50#define DS1307_REG_MIN 0x01 /* 00-59 */ 51#define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ 52# define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ 53# define DS1307_BIT_PM 0x20 /* in REG_HOUR */ 54# define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ 55# define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ 56#define DS1307_REG_WDAY 0x03 /* 01-07 */ 57# define MCP7941X_BIT_VBATEN 0x08 58#define DS1307_REG_MDAY 0x04 /* 01-31 */ 59#define DS1307_REG_MONTH 0x05 /* 01-12 */ 60# define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ 61#define DS1307_REG_YEAR 0x06 /* 00-99 */ 62 63/* 64 * Other registers (control, status, alarms, trickle charge, NVRAM, etc) 65 * start at 7, and they differ a LOT. Only control and status matter for 66 * basic RTC date and time functionality; be careful using them. 67 */ 68#define DS1307_REG_CONTROL 0x07 /* or ds1338 */ 69# define DS1307_BIT_OUT 0x80 70# define DS1338_BIT_OSF 0x20 71# define DS1307_BIT_SQWE 0x10 72# define DS1307_BIT_RS1 0x02 73# define DS1307_BIT_RS0 0x01 74#define DS1337_REG_CONTROL 0x0e 75# define DS1337_BIT_nEOSC 0x80 76# define DS1339_BIT_BBSQI 0x20 77# define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */ 78# define DS1337_BIT_RS2 0x10 79# define DS1337_BIT_RS1 0x08 80# define DS1337_BIT_INTCN 0x04 81# define DS1337_BIT_A2IE 0x02 82# define DS1337_BIT_A1IE 0x01 83#define DS1340_REG_CONTROL 0x07 84# define DS1340_BIT_OUT 0x80 85# define DS1340_BIT_FT 0x40 86# define DS1340_BIT_CALIB_SIGN 0x20 87# define DS1340_M_CALIBRATION 0x1f 88#define DS1340_REG_FLAG 0x09 89# define DS1340_BIT_OSF 0x80 90#define DS1337_REG_STATUS 0x0f 91# define DS1337_BIT_OSF 0x80 92# define DS1337_BIT_A2I 0x02 93# define DS1337_BIT_A1I 0x01 94#define DS1339_REG_ALARM1_SECS 0x07 95 96#define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0 97 98#define RX8025_REG_CTRL1 0x0e 99# define RX8025_BIT_2412 0x20 100#define RX8025_REG_CTRL2 0x0f 101# define RX8025_BIT_PON 0x10 102# define RX8025_BIT_VDET 0x40 103# define RX8025_BIT_XST 0x20 104 105 106struct ds1307 { 107 u8 offset; /* register's offset */ 108 u8 regs[11]; 109 u16 nvram_offset; 110 struct bin_attribute *nvram; 111 enum ds_type type; 112 unsigned long flags; 113#define HAS_NVRAM 0 /* bit 0 == sysfs file active */ 114#define HAS_ALARM 1 /* bit 1 == irq claimed */ 115 struct i2c_client *client; 116 struct rtc_device *rtc; 117 struct work_struct work; 118 s32 (*read_block_data)(const struct i2c_client *client, u8 command, 119 u8 length, u8 *values); 120 s32 (*write_block_data)(const struct i2c_client *client, u8 command, 121 u8 length, const u8 *values); 122}; 123 124struct chip_desc { 125 unsigned alarm:1; 126 u16 nvram_offset; 127 u16 nvram_size; 128 u16 trickle_charger_reg; 129 u8 trickle_charger_setup; 130 u8 (*do_trickle_setup)(struct i2c_client *, uint32_t, bool); 131}; 132 133static u8 do_trickle_setup_ds1339(struct i2c_client *, 134 uint32_t ohms, bool diode); 135 136static struct chip_desc chips[last_ds_type] = { 137 [ds_1307] = { 138 .nvram_offset = 8, 139 .nvram_size = 56, 140 }, 141 [ds_1337] = { 142 .alarm = 1, 143 }, 144 [ds_1338] = { 145 .nvram_offset = 8, 146 .nvram_size = 56, 147 }, 148 [ds_1339] = { 149 .alarm = 1, 150 .trickle_charger_reg = 0x10, 151 .do_trickle_setup = &do_trickle_setup_ds1339, 152 }, 153 [ds_1340] = { 154 .trickle_charger_reg = 0x08, 155 }, 156 [ds_1388] = { 157 .trickle_charger_reg = 0x0a, 158 }, 159 [ds_3231] = { 160 .alarm = 1, 161 }, 162 [mcp7941x] = { 163 .alarm = 1, 164 /* this is battery backed SRAM */ 165 .nvram_offset = 0x20, 166 .nvram_size = 0x40, 167 }, 168}; 169 170static const struct i2c_device_id ds1307_id[] = { 171 { "ds1307", ds_1307 }, 172 { "ds1337", ds_1337 }, 173 { "ds1338", ds_1338 }, 174 { "ds1339", ds_1339 }, 175 { "ds1388", ds_1388 }, 176 { "ds1340", ds_1340 }, 177 { "ds3231", ds_3231 }, 178 { "m41t00", m41t00 }, 179 { "mcp7941x", mcp7941x }, 180 { "pt7c4338", ds_1307 }, 181 { "rx8025", rx_8025 }, 182 { } 183}; 184MODULE_DEVICE_TABLE(i2c, ds1307_id); 185 186/*----------------------------------------------------------------------*/ 187 188#define BLOCK_DATA_MAX_TRIES 10 189 190static s32 ds1307_read_block_data_once(const struct i2c_client *client, 191 u8 command, u8 length, u8 *values) 192{ 193 s32 i, data; 194 195 for (i = 0; i < length; i++) { 196 data = i2c_smbus_read_byte_data(client, command + i); 197 if (data < 0) 198 return data; 199 values[i] = data; 200 } 201 return i; 202} 203 204static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command, 205 u8 length, u8 *values) 206{ 207 u8 oldvalues[255]; 208 s32 ret; 209 int tries = 0; 210 211 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length); 212 ret = ds1307_read_block_data_once(client, command, length, values); 213 if (ret < 0) 214 return ret; 215 do { 216 if (++tries > BLOCK_DATA_MAX_TRIES) { 217 dev_err(&client->dev, 218 "ds1307_read_block_data failed\n"); 219 return -EIO; 220 } 221 memcpy(oldvalues, values, length); 222 ret = ds1307_read_block_data_once(client, command, length, 223 values); 224 if (ret < 0) 225 return ret; 226 } while (memcmp(oldvalues, values, length)); 227 return length; 228} 229 230static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command, 231 u8 length, const u8 *values) 232{ 233 u8 currvalues[255]; 234 int tries = 0; 235 236 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length); 237 do { 238 s32 i, ret; 239 240 if (++tries > BLOCK_DATA_MAX_TRIES) { 241 dev_err(&client->dev, 242 "ds1307_write_block_data failed\n"); 243 return -EIO; 244 } 245 for (i = 0; i < length; i++) { 246 ret = i2c_smbus_write_byte_data(client, command + i, 247 values[i]); 248 if (ret < 0) 249 return ret; 250 } 251 ret = ds1307_read_block_data_once(client, command, length, 252 currvalues); 253 if (ret < 0) 254 return ret; 255 } while (memcmp(currvalues, values, length)); 256 return length; 257} 258 259/*----------------------------------------------------------------------*/ 260 261/* These RTC devices are not designed to be connected to a SMbus adapter. 262 SMbus limits block operations length to 32 bytes, whereas it's not 263 limited on I2C buses. As a result, accesses may exceed 32 bytes; 264 in that case, split them into smaller blocks */ 265 266static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client, 267 u8 command, u8 length, const u8 *values) 268{ 269 u8 suboffset = 0; 270 271 if (length <= I2C_SMBUS_BLOCK_MAX) 272 return i2c_smbus_write_i2c_block_data(client, 273 command, length, values); 274 275 while (suboffset < length) { 276 s32 retval = i2c_smbus_write_i2c_block_data(client, 277 command + suboffset, 278 min(I2C_SMBUS_BLOCK_MAX, length - suboffset), 279 values + suboffset); 280 if (retval < 0) 281 return retval; 282 283 suboffset += I2C_SMBUS_BLOCK_MAX; 284 } 285 return length; 286} 287 288static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client, 289 u8 command, u8 length, u8 *values) 290{ 291 u8 suboffset = 0; 292 293 if (length <= I2C_SMBUS_BLOCK_MAX) 294 return i2c_smbus_read_i2c_block_data(client, 295 command, length, values); 296 297 while (suboffset < length) { 298 s32 retval = i2c_smbus_read_i2c_block_data(client, 299 command + suboffset, 300 min(I2C_SMBUS_BLOCK_MAX, length - suboffset), 301 values + suboffset); 302 if (retval < 0) 303 return retval; 304 305 suboffset += I2C_SMBUS_BLOCK_MAX; 306 } 307 return length; 308} 309 310/*----------------------------------------------------------------------*/ 311 312/* 313 * The IRQ logic includes a "real" handler running in IRQ context just 314 * long enough to schedule this workqueue entry. We need a task context 315 * to talk to the RTC, since I2C I/O calls require that; and disable the 316 * IRQ until we clear its status on the chip, so that this handler can 317 * work with any type of triggering (not just falling edge). 318 * 319 * The ds1337 and ds1339 both have two alarms, but we only use the first 320 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm 321 * signal; ds1339 chips have only one alarm signal. 322 */ 323static void ds1307_work(struct work_struct *work) 324{ 325 struct ds1307 *ds1307; 326 struct i2c_client *client; 327 struct mutex *lock; 328 int stat, control; 329 330 ds1307 = container_of(work, struct ds1307, work); 331 client = ds1307->client; 332 lock = &ds1307->rtc->ops_lock; 333 334 mutex_lock(lock); 335 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); 336 if (stat < 0) 337 goto out; 338 339 if (stat & DS1337_BIT_A1I) { 340 stat &= ~DS1337_BIT_A1I; 341 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); 342 343 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 344 if (control < 0) 345 goto out; 346 347 control &= ~DS1337_BIT_A1IE; 348 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); 349 350 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); 351 } 352 353out: 354 if (test_bit(HAS_ALARM, &ds1307->flags)) 355 enable_irq(client->irq); 356 mutex_unlock(lock); 357} 358 359static irqreturn_t ds1307_irq(int irq, void *dev_id) 360{ 361 struct i2c_client *client = dev_id; 362 struct ds1307 *ds1307 = i2c_get_clientdata(client); 363 364 disable_irq_nosync(irq); 365 schedule_work(&ds1307->work); 366 return IRQ_HANDLED; 367} 368 369/*----------------------------------------------------------------------*/ 370 371static int ds1307_get_time(struct device *dev, struct rtc_time *t) 372{ 373 struct ds1307 *ds1307 = dev_get_drvdata(dev); 374 int tmp; 375 376 /* read the RTC date and time registers all at once */ 377 tmp = ds1307->read_block_data(ds1307->client, 378 ds1307->offset, 7, ds1307->regs); 379 if (tmp != 7) { 380 dev_err(dev, "%s error %d\n", "read", tmp); 381 return -EIO; 382 } 383 384 dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs); 385 386 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); 387 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); 388 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; 389 t->tm_hour = bcd2bin(tmp); 390 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; 391 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); 392 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; 393 t->tm_mon = bcd2bin(tmp) - 1; 394 395 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ 396 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; 397 398 dev_dbg(dev, "%s secs=%d, mins=%d, " 399 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 400 "read", t->tm_sec, t->tm_min, 401 t->tm_hour, t->tm_mday, 402 t->tm_mon, t->tm_year, t->tm_wday); 403 404 /* initial clock setting can be undefined */ 405 return rtc_valid_tm(t); 406} 407 408static int ds1307_set_time(struct device *dev, struct rtc_time *t) 409{ 410 struct ds1307 *ds1307 = dev_get_drvdata(dev); 411 int result; 412 int tmp; 413 u8 *buf = ds1307->regs; 414 415 dev_dbg(dev, "%s secs=%d, mins=%d, " 416 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 417 "write", t->tm_sec, t->tm_min, 418 t->tm_hour, t->tm_mday, 419 t->tm_mon, t->tm_year, t->tm_wday); 420 421 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); 422 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); 423 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); 424 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); 425 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); 426 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); 427 428 /* assume 20YY not 19YY */ 429 tmp = t->tm_year - 100; 430 buf[DS1307_REG_YEAR] = bin2bcd(tmp); 431 432 switch (ds1307->type) { 433 case ds_1337: 434 case ds_1339: 435 case ds_3231: 436 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; 437 break; 438 case ds_1340: 439 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN 440 | DS1340_BIT_CENTURY; 441 break; 442 case mcp7941x: 443 /* 444 * these bits were cleared when preparing the date/time 445 * values and need to be set again before writing the 446 * buffer out to the device. 447 */ 448 buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST; 449 buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN; 450 break; 451 default: 452 break; 453 } 454 455 dev_dbg(dev, "%s: %7ph\n", "write", buf); 456 457 result = ds1307->write_block_data(ds1307->client, 458 ds1307->offset, 7, buf); 459 if (result < 0) { 460 dev_err(dev, "%s error %d\n", "write", result); 461 return result; 462 } 463 return 0; 464} 465 466static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) 467{ 468 struct i2c_client *client = to_i2c_client(dev); 469 struct ds1307 *ds1307 = i2c_get_clientdata(client); 470 int ret; 471 472 if (!test_bit(HAS_ALARM, &ds1307->flags)) 473 return -EINVAL; 474 475 /* read all ALARM1, ALARM2, and status registers at once */ 476 ret = ds1307->read_block_data(client, 477 DS1339_REG_ALARM1_SECS, 9, ds1307->regs); 478 if (ret != 9) { 479 dev_err(dev, "%s error %d\n", "alarm read", ret); 480 return -EIO; 481 } 482 483 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 484 "alarm read", 485 ds1307->regs[0], ds1307->regs[1], 486 ds1307->regs[2], ds1307->regs[3], 487 ds1307->regs[4], ds1307->regs[5], 488 ds1307->regs[6], ds1307->regs[7], 489 ds1307->regs[8]); 490 491 /* 492 * report alarm time (ALARM1); assume 24 hour and day-of-month modes, 493 * and that all four fields are checked matches 494 */ 495 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); 496 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); 497 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); 498 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); 499 t->time.tm_mon = -1; 500 t->time.tm_year = -1; 501 t->time.tm_wday = -1; 502 t->time.tm_yday = -1; 503 t->time.tm_isdst = -1; 504 505 /* ... and status */ 506 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); 507 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); 508 509 dev_dbg(dev, "%s secs=%d, mins=%d, " 510 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 511 "alarm read", t->time.tm_sec, t->time.tm_min, 512 t->time.tm_hour, t->time.tm_mday, 513 t->enabled, t->pending); 514 515 return 0; 516} 517 518static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) 519{ 520 struct i2c_client *client = to_i2c_client(dev); 521 struct ds1307 *ds1307 = i2c_get_clientdata(client); 522 unsigned char *buf = ds1307->regs; 523 u8 control, status; 524 int ret; 525 526 if (!test_bit(HAS_ALARM, &ds1307->flags)) 527 return -EINVAL; 528 529 dev_dbg(dev, "%s secs=%d, mins=%d, " 530 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 531 "alarm set", t->time.tm_sec, t->time.tm_min, 532 t->time.tm_hour, t->time.tm_mday, 533 t->enabled, t->pending); 534 535 /* read current status of both alarms and the chip */ 536 ret = ds1307->read_block_data(client, 537 DS1339_REG_ALARM1_SECS, 9, buf); 538 if (ret != 9) { 539 dev_err(dev, "%s error %d\n", "alarm write", ret); 540 return -EIO; 541 } 542 control = ds1307->regs[7]; 543 status = ds1307->regs[8]; 544 545 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 546 "alarm set (old status)", 547 ds1307->regs[0], ds1307->regs[1], 548 ds1307->regs[2], ds1307->regs[3], 549 ds1307->regs[4], ds1307->regs[5], 550 ds1307->regs[6], control, status); 551 552 /* set ALARM1, using 24 hour and day-of-month modes */ 553 buf[0] = bin2bcd(t->time.tm_sec); 554 buf[1] = bin2bcd(t->time.tm_min); 555 buf[2] = bin2bcd(t->time.tm_hour); 556 buf[3] = bin2bcd(t->time.tm_mday); 557 558 /* set ALARM2 to non-garbage */ 559 buf[4] = 0; 560 buf[5] = 0; 561 buf[6] = 0; 562 563 /* optionally enable ALARM1 */ 564 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); 565 if (t->enabled) { 566 dev_dbg(dev, "alarm IRQ armed\n"); 567 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ 568 } 569 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); 570 571 ret = ds1307->write_block_data(client, 572 DS1339_REG_ALARM1_SECS, 9, buf); 573 if (ret < 0) { 574 dev_err(dev, "can't set alarm time\n"); 575 return ret; 576 } 577 578 return 0; 579} 580 581static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) 582{ 583 struct i2c_client *client = to_i2c_client(dev); 584 struct ds1307 *ds1307 = i2c_get_clientdata(client); 585 int ret; 586 587 if (!test_bit(HAS_ALARM, &ds1307->flags)) 588 return -ENOTTY; 589 590 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 591 if (ret < 0) 592 return ret; 593 594 if (enabled) 595 ret |= DS1337_BIT_A1IE; 596 else 597 ret &= ~DS1337_BIT_A1IE; 598 599 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret); 600 if (ret < 0) 601 return ret; 602 603 return 0; 604} 605 606static const struct rtc_class_ops ds13xx_rtc_ops = { 607 .read_time = ds1307_get_time, 608 .set_time = ds1307_set_time, 609 .read_alarm = ds1337_read_alarm, 610 .set_alarm = ds1337_set_alarm, 611 .alarm_irq_enable = ds1307_alarm_irq_enable, 612}; 613 614/*----------------------------------------------------------------------*/ 615 616/* 617 * Alarm support for mcp7941x devices. 618 */ 619 620#define MCP7941X_REG_CONTROL 0x07 621# define MCP7941X_BIT_ALM0_EN 0x10 622# define MCP7941X_BIT_ALM1_EN 0x20 623#define MCP7941X_REG_ALARM0_BASE 0x0a 624#define MCP7941X_REG_ALARM0_CTRL 0x0d 625#define MCP7941X_REG_ALARM1_BASE 0x11 626#define MCP7941X_REG_ALARM1_CTRL 0x14 627# define MCP7941X_BIT_ALMX_IF (1 << 3) 628# define MCP7941X_BIT_ALMX_C0 (1 << 4) 629# define MCP7941X_BIT_ALMX_C1 (1 << 5) 630# define MCP7941X_BIT_ALMX_C2 (1 << 6) 631# define MCP7941X_BIT_ALMX_POL (1 << 7) 632# define MCP7941X_MSK_ALMX_MATCH (MCP7941X_BIT_ALMX_C0 | \ 633 MCP7941X_BIT_ALMX_C1 | \ 634 MCP7941X_BIT_ALMX_C2) 635 636static void mcp7941x_work(struct work_struct *work) 637{ 638 struct ds1307 *ds1307 = container_of(work, struct ds1307, work); 639 struct i2c_client *client = ds1307->client; 640 int reg, ret; 641 642 mutex_lock(&ds1307->rtc->ops_lock); 643 644 /* Check and clear alarm 0 interrupt flag. */ 645 reg = i2c_smbus_read_byte_data(client, MCP7941X_REG_ALARM0_CTRL); 646 if (reg < 0) 647 goto out; 648 if (!(reg & MCP7941X_BIT_ALMX_IF)) 649 goto out; 650 reg &= ~MCP7941X_BIT_ALMX_IF; 651 ret = i2c_smbus_write_byte_data(client, MCP7941X_REG_ALARM0_CTRL, reg); 652 if (ret < 0) 653 goto out; 654 655 /* Disable alarm 0. */ 656 reg = i2c_smbus_read_byte_data(client, MCP7941X_REG_CONTROL); 657 if (reg < 0) 658 goto out; 659 reg &= ~MCP7941X_BIT_ALM0_EN; 660 ret = i2c_smbus_write_byte_data(client, MCP7941X_REG_CONTROL, reg); 661 if (ret < 0) 662 goto out; 663 664 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); 665 666out: 667 if (test_bit(HAS_ALARM, &ds1307->flags)) 668 enable_irq(client->irq); 669 mutex_unlock(&ds1307->rtc->ops_lock); 670} 671 672static int mcp7941x_read_alarm(struct device *dev, struct rtc_wkalrm *t) 673{ 674 struct i2c_client *client = to_i2c_client(dev); 675 struct ds1307 *ds1307 = i2c_get_clientdata(client); 676 u8 *regs = ds1307->regs; 677 int ret; 678 679 if (!test_bit(HAS_ALARM, &ds1307->flags)) 680 return -EINVAL; 681 682 /* Read control and alarm 0 registers. */ 683 ret = ds1307->read_block_data(client, MCP7941X_REG_CONTROL, 10, regs); 684 if (ret < 0) 685 return ret; 686 687 t->enabled = !!(regs[0] & MCP7941X_BIT_ALM0_EN); 688 689 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ 690 t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f); 691 t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f); 692 t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f); 693 t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1; 694 t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f); 695 t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1; 696 t->time.tm_year = -1; 697 t->time.tm_yday = -1; 698 t->time.tm_isdst = -1; 699 700 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " 701 "enabled=%d polarity=%d irq=%d match=%d\n", __func__, 702 t->time.tm_sec, t->time.tm_min, t->time.tm_hour, 703 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled, 704 !!(ds1307->regs[6] & MCP7941X_BIT_ALMX_POL), 705 !!(ds1307->regs[6] & MCP7941X_BIT_ALMX_IF), 706 (ds1307->regs[6] & MCP7941X_MSK_ALMX_MATCH) >> 4); 707 708 return 0; 709} 710 711static int mcp7941x_set_alarm(struct device *dev, struct rtc_wkalrm *t) 712{ 713 struct i2c_client *client = to_i2c_client(dev); 714 struct ds1307 *ds1307 = i2c_get_clientdata(client); 715 unsigned char *regs = ds1307->regs; 716 int ret; 717 718 if (!test_bit(HAS_ALARM, &ds1307->flags)) 719 return -EINVAL; 720 721 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " 722 "enabled=%d pending=%d\n", __func__, 723 t->time.tm_sec, t->time.tm_min, t->time.tm_hour, 724 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, 725 t->enabled, t->pending); 726 727 /* Read control and alarm 0 registers. */ 728 ret = ds1307->read_block_data(client, MCP7941X_REG_CONTROL, 10, regs); 729 if (ret < 0) 730 return ret; 731 732 /* Set alarm 0, using 24-hour and day-of-month modes. */ 733 regs[3] = bin2bcd(t->time.tm_sec); 734 regs[4] = bin2bcd(t->time.tm_min); 735 regs[5] = bin2bcd(t->time.tm_hour); 736 regs[6] = bin2bcd(t->time.tm_wday) + 1; 737 regs[7] = bin2bcd(t->time.tm_mday); 738 regs[8] = bin2bcd(t->time.tm_mon) + 1; 739 740 /* Clear the alarm 0 interrupt flag. */ 741 regs[6] &= ~MCP7941X_BIT_ALMX_IF; 742 /* Set alarm match: second, minute, hour, day, date, month. */ 743 regs[6] |= MCP7941X_MSK_ALMX_MATCH; 744 745 if (t->enabled) 746 regs[0] |= MCP7941X_BIT_ALM0_EN; 747 else 748 regs[0] &= ~MCP7941X_BIT_ALM0_EN; 749 750 ret = ds1307->write_block_data(client, MCP7941X_REG_CONTROL, 10, regs); 751 if (ret < 0) 752 return ret; 753 754 return 0; 755} 756 757static int mcp7941x_alarm_irq_enable(struct device *dev, unsigned int enabled) 758{ 759 struct i2c_client *client = to_i2c_client(dev); 760 struct ds1307 *ds1307 = i2c_get_clientdata(client); 761 int reg; 762 763 if (!test_bit(HAS_ALARM, &ds1307->flags)) 764 return -EINVAL; 765 766 reg = i2c_smbus_read_byte_data(client, MCP7941X_REG_CONTROL); 767 if (reg < 0) 768 return reg; 769 770 if (enabled) 771 reg |= MCP7941X_BIT_ALM0_EN; 772 else 773 reg &= ~MCP7941X_BIT_ALM0_EN; 774 775 return i2c_smbus_write_byte_data(client, MCP7941X_REG_CONTROL, reg); 776} 777 778static const struct rtc_class_ops mcp7941x_rtc_ops = { 779 .read_time = ds1307_get_time, 780 .set_time = ds1307_set_time, 781 .read_alarm = mcp7941x_read_alarm, 782 .set_alarm = mcp7941x_set_alarm, 783 .alarm_irq_enable = mcp7941x_alarm_irq_enable, 784}; 785 786/*----------------------------------------------------------------------*/ 787 788static ssize_t 789ds1307_nvram_read(struct file *filp, struct kobject *kobj, 790 struct bin_attribute *attr, 791 char *buf, loff_t off, size_t count) 792{ 793 struct i2c_client *client; 794 struct ds1307 *ds1307; 795 int result; 796 797 client = kobj_to_i2c_client(kobj); 798 ds1307 = i2c_get_clientdata(client); 799 800 if (unlikely(off >= ds1307->nvram->size)) 801 return 0; 802 if ((off + count) > ds1307->nvram->size) 803 count = ds1307->nvram->size - off; 804 if (unlikely(!count)) 805 return count; 806 807 result = ds1307->read_block_data(client, ds1307->nvram_offset + off, 808 count, buf); 809 if (result < 0) 810 dev_err(&client->dev, "%s error %d\n", "nvram read", result); 811 return result; 812} 813 814static ssize_t 815ds1307_nvram_write(struct file *filp, struct kobject *kobj, 816 struct bin_attribute *attr, 817 char *buf, loff_t off, size_t count) 818{ 819 struct i2c_client *client; 820 struct ds1307 *ds1307; 821 int result; 822 823 client = kobj_to_i2c_client(kobj); 824 ds1307 = i2c_get_clientdata(client); 825 826 if (unlikely(off >= ds1307->nvram->size)) 827 return -EFBIG; 828 if ((off + count) > ds1307->nvram->size) 829 count = ds1307->nvram->size - off; 830 if (unlikely(!count)) 831 return count; 832 833 result = ds1307->write_block_data(client, ds1307->nvram_offset + off, 834 count, buf); 835 if (result < 0) { 836 dev_err(&client->dev, "%s error %d\n", "nvram write", result); 837 return result; 838 } 839 return count; 840} 841 842 843/*----------------------------------------------------------------------*/ 844 845static u8 do_trickle_setup_ds1339(struct i2c_client *client, 846 uint32_t ohms, bool diode) 847{ 848 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE : 849 DS1307_TRICKLE_CHARGER_NO_DIODE; 850 851 switch (ohms) { 852 case 250: 853 setup |= DS1307_TRICKLE_CHARGER_250_OHM; 854 break; 855 case 2000: 856 setup |= DS1307_TRICKLE_CHARGER_2K_OHM; 857 break; 858 case 4000: 859 setup |= DS1307_TRICKLE_CHARGER_4K_OHM; 860 break; 861 default: 862 dev_warn(&client->dev, 863 "Unsupported ohm value %u in dt\n", ohms); 864 return 0; 865 } 866 return setup; 867} 868 869static void ds1307_trickle_of_init(struct i2c_client *client, 870 struct chip_desc *chip) 871{ 872 uint32_t ohms = 0; 873 bool diode = true; 874 875 if (!chip->do_trickle_setup) 876 goto out; 877 if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms)) 878 goto out; 879 if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable")) 880 diode = false; 881 chip->trickle_charger_setup = chip->do_trickle_setup(client, 882 ohms, diode); 883out: 884 return; 885} 886 887static int ds1307_probe(struct i2c_client *client, 888 const struct i2c_device_id *id) 889{ 890 struct ds1307 *ds1307; 891 int err = -ENODEV; 892 int tmp; 893 struct chip_desc *chip = &chips[id->driver_data]; 894 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 895 bool want_irq = false; 896 unsigned char *buf; 897 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev); 898 static const int bbsqi_bitpos[] = { 899 [ds_1337] = 0, 900 [ds_1339] = DS1339_BIT_BBSQI, 901 [ds_3231] = DS3231_BIT_BBSQW, 902 }; 903 const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops; 904 905 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA) 906 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) 907 return -EIO; 908 909 ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL); 910 if (!ds1307) 911 return -ENOMEM; 912 913 i2c_set_clientdata(client, ds1307); 914 915 ds1307->client = client; 916 ds1307->type = id->driver_data; 917 918 if (!pdata && client->dev.of_node) 919 ds1307_trickle_of_init(client, chip); 920 else if (pdata && pdata->trickle_charger_setup) 921 chip->trickle_charger_setup = pdata->trickle_charger_setup; 922 923 if (chip->trickle_charger_setup && chip->trickle_charger_reg) { 924 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n", 925 DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup, 926 chip->trickle_charger_reg); 927 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg, 928 DS13XX_TRICKLE_CHARGER_MAGIC | 929 chip->trickle_charger_setup); 930 } 931 932 buf = ds1307->regs; 933 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { 934 ds1307->read_block_data = ds1307_native_smbus_read_block_data; 935 ds1307->write_block_data = ds1307_native_smbus_write_block_data; 936 } else { 937 ds1307->read_block_data = ds1307_read_block_data; 938 ds1307->write_block_data = ds1307_write_block_data; 939 } 940 941 switch (ds1307->type) { 942 case ds_1337: 943 case ds_1339: 944 case ds_3231: 945 /* get registers that the "rtc" read below won't read... */ 946 tmp = ds1307->read_block_data(ds1307->client, 947 DS1337_REG_CONTROL, 2, buf); 948 if (tmp != 2) { 949 dev_dbg(&client->dev, "read error %d\n", tmp); 950 err = -EIO; 951 goto exit; 952 } 953 954 /* oscillator off? turn it on, so clock can tick. */ 955 if (ds1307->regs[0] & DS1337_BIT_nEOSC) 956 ds1307->regs[0] &= ~DS1337_BIT_nEOSC; 957 958 /* 959 * Using IRQ? Disable the square wave and both alarms. 960 * For some variants, be sure alarms can trigger when we're 961 * running on Vbackup (BBSQI/BBSQW) 962 */ 963 if (ds1307->client->irq > 0 && chip->alarm) { 964 INIT_WORK(&ds1307->work, ds1307_work); 965 966 ds1307->regs[0] |= DS1337_BIT_INTCN 967 | bbsqi_bitpos[ds1307->type]; 968 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); 969 970 want_irq = true; 971 } 972 973 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, 974 ds1307->regs[0]); 975 976 /* oscillator fault? clear flag, and warn */ 977 if (ds1307->regs[1] & DS1337_BIT_OSF) { 978 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, 979 ds1307->regs[1] & ~DS1337_BIT_OSF); 980 dev_warn(&client->dev, "SET TIME!\n"); 981 } 982 break; 983 984 case rx_8025: 985 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 986 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 987 if (tmp != 2) { 988 dev_dbg(&client->dev, "read error %d\n", tmp); 989 err = -EIO; 990 goto exit; 991 } 992 993 /* oscillator off? turn it on, so clock can tick. */ 994 if (!(ds1307->regs[1] & RX8025_BIT_XST)) { 995 ds1307->regs[1] |= RX8025_BIT_XST; 996 i2c_smbus_write_byte_data(client, 997 RX8025_REG_CTRL2 << 4 | 0x08, 998 ds1307->regs[1]); 999 dev_warn(&client->dev, 1000 "oscillator stop detected - SET TIME!\n"); 1001 } 1002 1003 if (ds1307->regs[1] & RX8025_BIT_PON) { 1004 ds1307->regs[1] &= ~RX8025_BIT_PON; 1005 i2c_smbus_write_byte_data(client, 1006 RX8025_REG_CTRL2 << 4 | 0x08, 1007 ds1307->regs[1]); 1008 dev_warn(&client->dev, "power-on detected\n"); 1009 } 1010 1011 if (ds1307->regs[1] & RX8025_BIT_VDET) { 1012 ds1307->regs[1] &= ~RX8025_BIT_VDET; 1013 i2c_smbus_write_byte_data(client, 1014 RX8025_REG_CTRL2 << 4 | 0x08, 1015 ds1307->regs[1]); 1016 dev_warn(&client->dev, "voltage drop detected\n"); 1017 } 1018 1019 /* make sure we are running in 24hour mode */ 1020 if (!(ds1307->regs[0] & RX8025_BIT_2412)) { 1021 u8 hour; 1022 1023 /* switch to 24 hour mode */ 1024 i2c_smbus_write_byte_data(client, 1025 RX8025_REG_CTRL1 << 4 | 0x08, 1026 ds1307->regs[0] | 1027 RX8025_BIT_2412); 1028 1029 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 1030 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 1031 if (tmp != 2) { 1032 dev_dbg(&client->dev, "read error %d\n", tmp); 1033 err = -EIO; 1034 goto exit; 1035 } 1036 1037 /* correct hour */ 1038 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]); 1039 if (hour == 12) 1040 hour = 0; 1041 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 1042 hour += 12; 1043 1044 i2c_smbus_write_byte_data(client, 1045 DS1307_REG_HOUR << 4 | 0x08, 1046 hour); 1047 } 1048 break; 1049 case ds_1388: 1050 ds1307->offset = 1; /* Seconds starts at 1 */ 1051 break; 1052 case mcp7941x: 1053 rtc_ops = &mcp7941x_rtc_ops; 1054 if (ds1307->client->irq > 0 && chip->alarm) { 1055 INIT_WORK(&ds1307->work, mcp7941x_work); 1056 want_irq = true; 1057 } 1058 break; 1059 default: 1060 break; 1061 } 1062 1063read_rtc: 1064 /* read RTC registers */ 1065 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf); 1066 if (tmp != 8) { 1067 dev_dbg(&client->dev, "read error %d\n", tmp); 1068 err = -EIO; 1069 goto exit; 1070 } 1071 1072 /* 1073 * minimal sanity checking; some chips (like DS1340) don't 1074 * specify the extra bits as must-be-zero, but there are 1075 * still a few values that are clearly out-of-range. 1076 */ 1077 tmp = ds1307->regs[DS1307_REG_SECS]; 1078 switch (ds1307->type) { 1079 case ds_1307: 1080 case m41t00: 1081 /* clock halted? turn it on, so clock can tick. */ 1082 if (tmp & DS1307_BIT_CH) { 1083 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 1084 dev_warn(&client->dev, "SET TIME!\n"); 1085 goto read_rtc; 1086 } 1087 break; 1088 case ds_1338: 1089 /* clock halted? turn it on, so clock can tick. */ 1090 if (tmp & DS1307_BIT_CH) 1091 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 1092 1093 /* oscillator fault? clear flag, and warn */ 1094 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { 1095 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, 1096 ds1307->regs[DS1307_REG_CONTROL] 1097 & ~DS1338_BIT_OSF); 1098 dev_warn(&client->dev, "SET TIME!\n"); 1099 goto read_rtc; 1100 } 1101 break; 1102 case ds_1340: 1103 /* clock halted? turn it on, so clock can tick. */ 1104 if (tmp & DS1340_BIT_nEOSC) 1105 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 1106 1107 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); 1108 if (tmp < 0) { 1109 dev_dbg(&client->dev, "read error %d\n", tmp); 1110 err = -EIO; 1111 goto exit; 1112 } 1113 1114 /* oscillator fault? clear flag, and warn */ 1115 if (tmp & DS1340_BIT_OSF) { 1116 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); 1117 dev_warn(&client->dev, "SET TIME!\n"); 1118 } 1119 break; 1120 case mcp7941x: 1121 /* make sure that the backup battery is enabled */ 1122 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) { 1123 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY, 1124 ds1307->regs[DS1307_REG_WDAY] 1125 | MCP7941X_BIT_VBATEN); 1126 } 1127 1128 /* clock halted? turn it on, so clock can tick. */ 1129 if (!(tmp & MCP7941X_BIT_ST)) { 1130 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 1131 MCP7941X_BIT_ST); 1132 dev_warn(&client->dev, "SET TIME!\n"); 1133 goto read_rtc; 1134 } 1135 1136 break; 1137 default: 1138 break; 1139 } 1140 1141 tmp = ds1307->regs[DS1307_REG_HOUR]; 1142 switch (ds1307->type) { 1143 case ds_1340: 1144 case m41t00: 1145 /* 1146 * NOTE: ignores century bits; fix before deploying 1147 * systems that will run through year 2100. 1148 */ 1149 break; 1150 case rx_8025: 1151 break; 1152 default: 1153 if (!(tmp & DS1307_BIT_12HR)) 1154 break; 1155 1156 /* 1157 * Be sure we're in 24 hour mode. Multi-master systems 1158 * take note... 1159 */ 1160 tmp = bcd2bin(tmp & 0x1f); 1161 if (tmp == 12) 1162 tmp = 0; 1163 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 1164 tmp += 12; 1165 i2c_smbus_write_byte_data(client, 1166 ds1307->offset + DS1307_REG_HOUR, 1167 bin2bcd(tmp)); 1168 } 1169 1170 device_set_wakeup_capable(&client->dev, want_irq); 1171 ds1307->rtc = devm_rtc_device_register(&client->dev, client->name, 1172 rtc_ops, THIS_MODULE); 1173 if (IS_ERR(ds1307->rtc)) { 1174 return PTR_ERR(ds1307->rtc); 1175 } 1176 1177 if (want_irq) { 1178 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED, 1179 ds1307->rtc->name, client); 1180 if (err) { 1181 client->irq = 0; 1182 dev_err(&client->dev, "unable to request IRQ!\n"); 1183 } else { 1184 1185 set_bit(HAS_ALARM, &ds1307->flags); 1186 dev_dbg(&client->dev, "got IRQ %d\n", client->irq); 1187 } 1188 } 1189 1190 if (chip->nvram_size) { 1191 1192 ds1307->nvram = devm_kzalloc(&client->dev, 1193 sizeof(struct bin_attribute), 1194 GFP_KERNEL); 1195 if (!ds1307->nvram) { 1196 dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n"); 1197 } else { 1198 1199 ds1307->nvram->attr.name = "nvram"; 1200 ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR; 1201 1202 sysfs_bin_attr_init(ds1307->nvram); 1203 1204 ds1307->nvram->read = ds1307_nvram_read; 1205 ds1307->nvram->write = ds1307_nvram_write; 1206 ds1307->nvram->size = chip->nvram_size; 1207 ds1307->nvram_offset = chip->nvram_offset; 1208 1209 err = sysfs_create_bin_file(&client->dev.kobj, 1210 ds1307->nvram); 1211 if (err) { 1212 dev_err(&client->dev, 1213 "unable to create sysfs file: %s\n", 1214 ds1307->nvram->attr.name); 1215 } else { 1216 set_bit(HAS_NVRAM, &ds1307->flags); 1217 dev_info(&client->dev, "%zu bytes nvram\n", 1218 ds1307->nvram->size); 1219 } 1220 } 1221 } 1222 1223 return 0; 1224 1225exit: 1226 return err; 1227} 1228 1229static int ds1307_remove(struct i2c_client *client) 1230{ 1231 struct ds1307 *ds1307 = i2c_get_clientdata(client); 1232 1233 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { 1234 free_irq(client->irq, client); 1235 cancel_work_sync(&ds1307->work); 1236 } 1237 1238 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) 1239 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram); 1240 1241 return 0; 1242} 1243 1244static struct i2c_driver ds1307_driver = { 1245 .driver = { 1246 .name = "rtc-ds1307", 1247 .owner = THIS_MODULE, 1248 }, 1249 .probe = ds1307_probe, 1250 .remove = ds1307_remove, 1251 .id_table = ds1307_id, 1252}; 1253 1254module_i2c_driver(ds1307_driver); 1255 1256MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); 1257MODULE_LICENSE("GPL"); 1258