aic7xxx_osm.h revision 38c29ce06d24691d6e6dd786175fcc54efd5995b
1/* 2 * Adaptec AIC7xxx device driver for Linux. 3 * 4 * Copyright (c) 1994 John Aycock 5 * The University of Calgary Department of Computer Science. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; see the file COPYING. If not, write to 19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 21 * Copyright (c) 2000-2003 Adaptec Inc. 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions, and the following disclaimer, 29 * without modification. 30 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 31 * substantially similar to the "NO WARRANTY" disclaimer below 32 * ("Disclaimer") and any redistribution must be conditioned upon 33 * including a substantially similar Disclaimer requirement for further 34 * binary redistribution. 35 * 3. Neither the names of the above-listed copyright holders nor the names 36 * of any contributors may be used to endorse or promote products derived 37 * from this software without specific prior written permission. 38 * 39 * Alternatively, this software may be distributed under the terms of the 40 * GNU General Public License ("GPL") version 2 as published by the Free 41 * Software Foundation. 42 * 43 * NO WARRANTY 44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 45 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 46 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 47 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 48 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 52 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 53 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 54 * POSSIBILITY OF SUCH DAMAGES. 55 * 56 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm.h#151 $ 57 * 58 */ 59#ifndef _AIC7XXX_LINUX_H_ 60#define _AIC7XXX_LINUX_H_ 61 62#include <linux/config.h> 63#include <linux/types.h> 64#include <linux/blkdev.h> 65#include <linux/delay.h> 66#include <linux/ioport.h> 67#include <linux/pci.h> 68#include <linux/smp_lock.h> 69#include <linux/version.h> 70#include <linux/interrupt.h> 71#include <linux/module.h> 72#include <linux/slab.h> 73#include <asm/byteorder.h> 74#include <asm/io.h> 75 76#include <scsi/scsi.h> 77#include <scsi/scsi_cmnd.h> 78#include <scsi/scsi_eh.h> 79#include <scsi/scsi_device.h> 80#include <scsi/scsi_host.h> 81#include <scsi/scsi_tcq.h> 82 83/* Core SCSI definitions */ 84#define AIC_LIB_PREFIX ahc 85 86/* Name space conflict with BSD queue macros */ 87#ifdef LIST_HEAD 88#undef LIST_HEAD 89#endif 90 91#include "cam.h" 92#include "queue.h" 93#include "scsi_message.h" 94#include "aiclib.h" 95 96/*********************************** Debugging ********************************/ 97#ifdef CONFIG_AIC7XXX_DEBUG_ENABLE 98#ifdef CONFIG_AIC7XXX_DEBUG_MASK 99#define AHC_DEBUG 1 100#define AHC_DEBUG_OPTS CONFIG_AIC7XXX_DEBUG_MASK 101#else 102/* 103 * Compile in debugging code, but do not enable any printfs. 104 */ 105#define AHC_DEBUG 1 106#endif 107/* No debugging code. */ 108#endif 109 110/************************* Forward Declarations *******************************/ 111struct ahc_softc; 112typedef struct pci_dev *ahc_dev_softc_t; 113typedef struct scsi_cmnd *ahc_io_ctx_t; 114 115/******************************* Byte Order ***********************************/ 116#define ahc_htobe16(x) cpu_to_be16(x) 117#define ahc_htobe32(x) cpu_to_be32(x) 118#define ahc_htobe64(x) cpu_to_be64(x) 119#define ahc_htole16(x) cpu_to_le16(x) 120#define ahc_htole32(x) cpu_to_le32(x) 121#define ahc_htole64(x) cpu_to_le64(x) 122 123#define ahc_be16toh(x) be16_to_cpu(x) 124#define ahc_be32toh(x) be32_to_cpu(x) 125#define ahc_be64toh(x) be64_to_cpu(x) 126#define ahc_le16toh(x) le16_to_cpu(x) 127#define ahc_le32toh(x) le32_to_cpu(x) 128#define ahc_le64toh(x) le64_to_cpu(x) 129 130#ifndef LITTLE_ENDIAN 131#define LITTLE_ENDIAN 1234 132#endif 133 134#ifndef BIG_ENDIAN 135#define BIG_ENDIAN 4321 136#endif 137 138#ifndef BYTE_ORDER 139#if defined(__BIG_ENDIAN) 140#define BYTE_ORDER BIG_ENDIAN 141#endif 142#if defined(__LITTLE_ENDIAN) 143#define BYTE_ORDER LITTLE_ENDIAN 144#endif 145#endif /* BYTE_ORDER */ 146 147/************************* Configuration Data *********************************/ 148extern u_int aic7xxx_no_probe; 149extern u_int aic7xxx_allow_memio; 150extern int aic7xxx_detect_complete; 151extern struct scsi_host_template aic7xxx_driver_template; 152 153/***************************** Bus Space/DMA **********************************/ 154 155typedef uint32_t bus_size_t; 156 157typedef enum { 158 BUS_SPACE_MEMIO, 159 BUS_SPACE_PIO 160} bus_space_tag_t; 161 162typedef union { 163 u_long ioport; 164 volatile uint8_t __iomem *maddr; 165} bus_space_handle_t; 166 167typedef struct bus_dma_segment 168{ 169 dma_addr_t ds_addr; 170 bus_size_t ds_len; 171} bus_dma_segment_t; 172 173struct ahc_linux_dma_tag 174{ 175 bus_size_t alignment; 176 bus_size_t boundary; 177 bus_size_t maxsize; 178}; 179typedef struct ahc_linux_dma_tag* bus_dma_tag_t; 180 181typedef dma_addr_t bus_dmamap_t; 182 183typedef int bus_dma_filter_t(void*, dma_addr_t); 184typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int); 185 186#define BUS_DMA_WAITOK 0x0 187#define BUS_DMA_NOWAIT 0x1 188#define BUS_DMA_ALLOCNOW 0x2 189#define BUS_DMA_LOAD_SEGS 0x4 /* 190 * Argument is an S/G list not 191 * a single buffer. 192 */ 193 194#define BUS_SPACE_MAXADDR 0xFFFFFFFF 195#define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF 196#define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF 197 198int ahc_dma_tag_create(struct ahc_softc *, bus_dma_tag_t /*parent*/, 199 bus_size_t /*alignment*/, bus_size_t /*boundary*/, 200 dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/, 201 bus_dma_filter_t*/*filter*/, void */*filterarg*/, 202 bus_size_t /*maxsize*/, int /*nsegments*/, 203 bus_size_t /*maxsegsz*/, int /*flags*/, 204 bus_dma_tag_t */*dma_tagp*/); 205 206void ahc_dma_tag_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/); 207 208int ahc_dmamem_alloc(struct ahc_softc *, bus_dma_tag_t /*dmat*/, 209 void** /*vaddr*/, int /*flags*/, 210 bus_dmamap_t* /*mapp*/); 211 212void ahc_dmamem_free(struct ahc_softc *, bus_dma_tag_t /*dmat*/, 213 void* /*vaddr*/, bus_dmamap_t /*map*/); 214 215void ahc_dmamap_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/, 216 bus_dmamap_t /*map*/); 217 218int ahc_dmamap_load(struct ahc_softc *ahc, bus_dma_tag_t /*dmat*/, 219 bus_dmamap_t /*map*/, void * /*buf*/, 220 bus_size_t /*buflen*/, bus_dmamap_callback_t *, 221 void */*callback_arg*/, int /*flags*/); 222 223int ahc_dmamap_unload(struct ahc_softc *, bus_dma_tag_t, bus_dmamap_t); 224 225/* 226 * Operations performed by ahc_dmamap_sync(). 227 */ 228#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 229#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 230#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 231#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 232 233/* 234 * XXX 235 * ahc_dmamap_sync is only used on buffers allocated with 236 * the pci_alloc_consistent() API. Although I'm not sure how 237 * this works on architectures with a write buffer, Linux does 238 * not have an API to sync "coherent" memory. Perhaps we need 239 * to do an mb()? 240 */ 241#define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) 242 243/************************** Timer DataStructures ******************************/ 244typedef struct timer_list ahc_timer_t; 245 246/********************************** Includes **********************************/ 247#ifdef CONFIG_AIC7XXX_REG_PRETTY_PRINT 248#define AIC_DEBUG_REGISTERS 1 249#else 250#define AIC_DEBUG_REGISTERS 0 251#endif 252#include "aic7xxx.h" 253 254/***************************** Timer Facilities *******************************/ 255#define ahc_timer_init init_timer 256#define ahc_timer_stop del_timer_sync 257typedef void ahc_linux_callback_t (u_long); 258static __inline void ahc_timer_reset(ahc_timer_t *timer, int usec, 259 ahc_callback_t *func, void *arg); 260static __inline void ahc_scb_timer_reset(struct scb *scb, u_int usec); 261 262static __inline void 263ahc_timer_reset(ahc_timer_t *timer, int usec, ahc_callback_t *func, void *arg) 264{ 265 struct ahc_softc *ahc; 266 267 ahc = (struct ahc_softc *)arg; 268 del_timer(timer); 269 timer->data = (u_long)arg; 270 timer->expires = jiffies + (usec * HZ)/1000000; 271 timer->function = (ahc_linux_callback_t*)func; 272 add_timer(timer); 273} 274 275static __inline void 276ahc_scb_timer_reset(struct scb *scb, u_int usec) 277{ 278 mod_timer(&scb->io_ctx->eh_timeout, jiffies + (usec * HZ)/1000000); 279} 280 281/***************************** SMP support ************************************/ 282#include <linux/spinlock.h> 283 284#define AIC7XXX_DRIVER_VERSION "6.2.36" 285 286/**************************** Front End Queues ********************************/ 287/* 288 * Data structure used to cast the Linux struct scsi_cmnd to something 289 * that allows us to use the queue macros. The linux structure has 290 * plenty of space to hold the links fields as required by the queue 291 * macros, but the queue macors require them to have the correct type. 292 */ 293struct ahc_cmd_internal { 294 /* Area owned by the Linux scsi layer. */ 295 uint8_t private[offsetof(struct scsi_cmnd, SCp.Status)]; 296 union { 297 STAILQ_ENTRY(ahc_cmd) ste; 298 LIST_ENTRY(ahc_cmd) le; 299 TAILQ_ENTRY(ahc_cmd) tqe; 300 } links; 301 uint32_t end; 302}; 303 304struct ahc_cmd { 305 union { 306 struct ahc_cmd_internal icmd; 307 struct scsi_cmnd scsi_cmd; 308 } un; 309}; 310 311#define acmd_icmd(cmd) ((cmd)->un.icmd) 312#define acmd_scsi_cmd(cmd) ((cmd)->un.scsi_cmd) 313#define acmd_links un.icmd.links 314 315/*************************** Device Data Structures ***************************/ 316/* 317 * A per probed device structure used to deal with some error recovery 318 * scenarios that the Linux mid-layer code just doesn't know how to 319 * handle. The structure allocated for a device only becomes persistent 320 * after a successfully completed inquiry command to the target when 321 * that inquiry data indicates a lun is present. 322 */ 323TAILQ_HEAD(ahc_busyq, ahc_cmd); 324typedef enum { 325 AHC_DEV_UNCONFIGURED = 0x01, 326 AHC_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */ 327 AHC_DEV_TIMER_ACTIVE = 0x04, /* Our timer is active */ 328 AHC_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */ 329 AHC_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */ 330 AHC_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */ 331 AHC_DEV_SLAVE_CONFIGURED = 0x80 /* slave_configure() has been called */ 332} ahc_linux_dev_flags; 333 334struct ahc_linux_target; 335struct ahc_linux_device { 336 TAILQ_ENTRY(ahc_linux_device) links; 337 338 /* 339 * The number of transactions currently 340 * queued to the device. 341 */ 342 int active; 343 344 /* 345 * The currently allowed number of 346 * transactions that can be queued to 347 * the device. Must be signed for 348 * conversion from tagged to untagged 349 * mode where the device may have more 350 * than one outstanding active transaction. 351 */ 352 int openings; 353 354 /* 355 * A positive count indicates that this 356 * device's queue is halted. 357 */ 358 u_int qfrozen; 359 360 /* 361 * Cumulative command counter. 362 */ 363 u_long commands_issued; 364 365 /* 366 * The number of tagged transactions when 367 * running at our current opening level 368 * that have been successfully received by 369 * this device since the last QUEUE FULL. 370 */ 371 u_int tag_success_count; 372#define AHC_TAG_SUCCESS_INTERVAL 50 373 374 ahc_linux_dev_flags flags; 375 376 /* 377 * Per device timer. 378 */ 379 struct timer_list timer; 380 381 /* 382 * The high limit for the tags variable. 383 */ 384 u_int maxtags; 385 386 /* 387 * The computed number of tags outstanding 388 * at the time of the last QUEUE FULL event. 389 */ 390 u_int tags_on_last_queuefull; 391 392 /* 393 * How many times we have seen a queue full 394 * with the same number of tags. This is used 395 * to stop our adaptive queue depth algorithm 396 * on devices with a fixed number of tags. 397 */ 398 u_int last_queuefull_same_count; 399#define AHC_LOCK_TAGS_COUNT 50 400 401 /* 402 * How many transactions have been queued 403 * without the device going idle. We use 404 * this statistic to determine when to issue 405 * an ordered tag to prevent transaction 406 * starvation. This statistic is only updated 407 * if the AHC_DEV_PERIODIC_OTAG flag is set 408 * on this device. 409 */ 410 u_int commands_since_idle_or_otag; 411#define AHC_OTAG_THRESH 500 412 413 int lun; 414 struct scsi_device *scsi_device; 415 struct ahc_linux_target *target; 416}; 417 418struct ahc_linux_target { 419 struct ahc_linux_device *devices[AHC_NUM_LUNS]; 420 int channel; 421 int target; 422 int refcount; 423 struct ahc_transinfo last_tinfo; 424 struct ahc_softc *ahc; 425}; 426 427/********************* Definitions Required by the Core ***********************/ 428/* 429 * Number of SG segments we require. So long as the S/G segments for 430 * a particular transaction are allocated in a physically contiguous 431 * manner and are allocated below 4GB, the number of S/G segments is 432 * unrestricted. 433 */ 434#define AHC_NSEG 128 435 436/* 437 * Per-SCB OSM storage. 438 */ 439typedef enum { 440 AHC_UP_EH_SEMAPHORE = 0x1 441} ahc_linux_scb_flags; 442 443struct scb_platform_data { 444 struct ahc_linux_device *dev; 445 dma_addr_t buf_busaddr; 446 uint32_t xfer_len; 447 uint32_t sense_resid; /* Auto-Sense residual */ 448 ahc_linux_scb_flags flags; 449}; 450 451/* 452 * Define a structure used for each host adapter. All members are 453 * aligned on a boundary >= the size of the member to honor the 454 * alignment restrictions of the various platforms supported by 455 * this driver. 456 */ 457typedef enum { 458 AHC_RUN_CMPLT_Q_TIMER = 0x10 459} ahc_linux_softc_flags; 460 461TAILQ_HEAD(ahc_completeq, ahc_cmd); 462 463struct ahc_platform_data { 464 /* 465 * Fields accessed from interrupt context. 466 */ 467 struct ahc_linux_target *targets[AHC_NUM_TARGETS]; 468 struct ahc_completeq completeq; 469 470 spinlock_t spin_lock; 471 u_int qfrozen; 472 struct timer_list completeq_timer; 473 struct timer_list reset_timer; 474 struct semaphore eh_sem; 475 struct Scsi_Host *host; /* pointer to scsi host */ 476#define AHC_LINUX_NOIRQ ((uint32_t)~0) 477 uint32_t irq; /* IRQ for this adapter */ 478 uint32_t bios_address; 479 uint32_t mem_busaddr; /* Mem Base Addr */ 480 ahc_linux_softc_flags flags; 481}; 482 483/************************** OS Utility Wrappers *******************************/ 484#define printf printk 485#define M_NOWAIT GFP_ATOMIC 486#define M_WAITOK 0 487#define malloc(size, type, flags) kmalloc(size, flags) 488#define free(ptr, type) kfree(ptr) 489 490static __inline void ahc_delay(long); 491static __inline void 492ahc_delay(long usec) 493{ 494 /* 495 * udelay on Linux can have problems for 496 * multi-millisecond waits. Wait at most 497 * 1024us per call. 498 */ 499 while (usec > 0) { 500 udelay(usec % 1024); 501 usec -= 1024; 502 } 503} 504 505 506/***************************** Low Level I/O **********************************/ 507static __inline uint8_t ahc_inb(struct ahc_softc * ahc, long port); 508static __inline void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val); 509static __inline void ahc_outsb(struct ahc_softc * ahc, long port, 510 uint8_t *, int count); 511static __inline void ahc_insb(struct ahc_softc * ahc, long port, 512 uint8_t *, int count); 513 514static __inline uint8_t 515ahc_inb(struct ahc_softc * ahc, long port) 516{ 517 uint8_t x; 518 519 if (ahc->tag == BUS_SPACE_MEMIO) { 520 x = readb(ahc->bsh.maddr + port); 521 } else { 522 x = inb(ahc->bsh.ioport + port); 523 } 524 mb(); 525 return (x); 526} 527 528static __inline void 529ahc_outb(struct ahc_softc * ahc, long port, uint8_t val) 530{ 531 if (ahc->tag == BUS_SPACE_MEMIO) { 532 writeb(val, ahc->bsh.maddr + port); 533 } else { 534 outb(val, ahc->bsh.ioport + port); 535 } 536 mb(); 537} 538 539static __inline void 540ahc_outsb(struct ahc_softc * ahc, long port, uint8_t *array, int count) 541{ 542 int i; 543 544 /* 545 * There is probably a more efficient way to do this on Linux 546 * but we don't use this for anything speed critical and this 547 * should work. 548 */ 549 for (i = 0; i < count; i++) 550 ahc_outb(ahc, port, *array++); 551} 552 553static __inline void 554ahc_insb(struct ahc_softc * ahc, long port, uint8_t *array, int count) 555{ 556 int i; 557 558 /* 559 * There is probably a more efficient way to do this on Linux 560 * but we don't use this for anything speed critical and this 561 * should work. 562 */ 563 for (i = 0; i < count; i++) 564 *array++ = ahc_inb(ahc, port); 565} 566 567/**************************** Initialization **********************************/ 568int ahc_linux_register_host(struct ahc_softc *, 569 struct scsi_host_template *); 570 571uint64_t ahc_linux_get_memsize(void); 572 573/*************************** Pretty Printing **********************************/ 574struct info_str { 575 char *buffer; 576 int length; 577 off_t offset; 578 int pos; 579}; 580 581void ahc_format_transinfo(struct info_str *info, 582 struct ahc_transinfo *tinfo); 583 584/******************************** Locking *************************************/ 585/* Lock protecting internal data structures */ 586static __inline void ahc_lockinit(struct ahc_softc *); 587static __inline void ahc_lock(struct ahc_softc *, unsigned long *flags); 588static __inline void ahc_unlock(struct ahc_softc *, unsigned long *flags); 589 590/* Lock held during ahc_list manipulation and ahc softc frees */ 591extern spinlock_t ahc_list_spinlock; 592static __inline void ahc_list_lockinit(void); 593static __inline void ahc_list_lock(unsigned long *flags); 594static __inline void ahc_list_unlock(unsigned long *flags); 595 596static __inline void 597ahc_lockinit(struct ahc_softc *ahc) 598{ 599 spin_lock_init(&ahc->platform_data->spin_lock); 600} 601 602static __inline void 603ahc_lock(struct ahc_softc *ahc, unsigned long *flags) 604{ 605 spin_lock_irqsave(&ahc->platform_data->spin_lock, *flags); 606} 607 608static __inline void 609ahc_unlock(struct ahc_softc *ahc, unsigned long *flags) 610{ 611 spin_unlock_irqrestore(&ahc->platform_data->spin_lock, *flags); 612} 613 614static __inline void 615ahc_list_lockinit(void) 616{ 617 spin_lock_init(&ahc_list_spinlock); 618} 619 620static __inline void 621ahc_list_lock(unsigned long *flags) 622{ 623 spin_lock_irqsave(&ahc_list_spinlock, *flags); 624} 625 626static __inline void 627ahc_list_unlock(unsigned long *flags) 628{ 629 spin_unlock_irqrestore(&ahc_list_spinlock, *flags); 630} 631 632/******************************* PCI Definitions ******************************/ 633/* 634 * PCIM_xxx: mask to locate subfield in register 635 * PCIR_xxx: config register offset 636 * PCIC_xxx: device class 637 * PCIS_xxx: device subclass 638 * PCIP_xxx: device programming interface 639 * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices) 640 * PCID_xxx: device ID 641 */ 642#define PCIR_DEVVENDOR 0x00 643#define PCIR_VENDOR 0x00 644#define PCIR_DEVICE 0x02 645#define PCIR_COMMAND 0x04 646#define PCIM_CMD_PORTEN 0x0001 647#define PCIM_CMD_MEMEN 0x0002 648#define PCIM_CMD_BUSMASTEREN 0x0004 649#define PCIM_CMD_MWRICEN 0x0010 650#define PCIM_CMD_PERRESPEN 0x0040 651#define PCIM_CMD_SERRESPEN 0x0100 652#define PCIR_STATUS 0x06 653#define PCIR_REVID 0x08 654#define PCIR_PROGIF 0x09 655#define PCIR_SUBCLASS 0x0a 656#define PCIR_CLASS 0x0b 657#define PCIR_CACHELNSZ 0x0c 658#define PCIR_LATTIMER 0x0d 659#define PCIR_HEADERTYPE 0x0e 660#define PCIM_MFDEV 0x80 661#define PCIR_BIST 0x0f 662#define PCIR_CAP_PTR 0x34 663 664/* config registers for header type 0 devices */ 665#define PCIR_MAPS 0x10 666#define PCIR_SUBVEND_0 0x2c 667#define PCIR_SUBDEV_0 0x2e 668 669extern struct pci_driver aic7xxx_pci_driver; 670 671typedef enum 672{ 673 AHC_POWER_STATE_D0, 674 AHC_POWER_STATE_D1, 675 AHC_POWER_STATE_D2, 676 AHC_POWER_STATE_D3 677} ahc_power_state; 678 679/**************************** VL/EISA Routines ********************************/ 680#ifdef CONFIG_EISA 681extern uint32_t aic7xxx_probe_eisa_vl; 682int ahc_linux_eisa_init(void); 683void ahc_linux_eisa_exit(void); 684int aic7770_map_registers(struct ahc_softc *ahc, 685 u_int port); 686int aic7770_map_int(struct ahc_softc *ahc, u_int irq); 687#else 688static inline int ahc_linux_eisa_init(void) { 689 return -ENODEV; 690} 691static inline void ahc_linux_eisa_exit(void) { 692} 693#endif 694 695/******************************* PCI Routines *********************************/ 696#ifdef CONFIG_PCI 697int ahc_linux_pci_init(void); 698void ahc_linux_pci_exit(void); 699int ahc_pci_map_registers(struct ahc_softc *ahc); 700int ahc_pci_map_int(struct ahc_softc *ahc); 701 702static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t pci, 703 int reg, int width); 704 705static __inline uint32_t 706ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width) 707{ 708 switch (width) { 709 case 1: 710 { 711 uint8_t retval; 712 713 pci_read_config_byte(pci, reg, &retval); 714 return (retval); 715 } 716 case 2: 717 { 718 uint16_t retval; 719 pci_read_config_word(pci, reg, &retval); 720 return (retval); 721 } 722 case 4: 723 { 724 uint32_t retval; 725 pci_read_config_dword(pci, reg, &retval); 726 return (retval); 727 } 728 default: 729 panic("ahc_pci_read_config: Read size too big"); 730 /* NOTREACHED */ 731 return (0); 732 } 733} 734 735static __inline void ahc_pci_write_config(ahc_dev_softc_t pci, 736 int reg, uint32_t value, 737 int width); 738 739static __inline void 740ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width) 741{ 742 switch (width) { 743 case 1: 744 pci_write_config_byte(pci, reg, value); 745 break; 746 case 2: 747 pci_write_config_word(pci, reg, value); 748 break; 749 case 4: 750 pci_write_config_dword(pci, reg, value); 751 break; 752 default: 753 panic("ahc_pci_write_config: Write size too big"); 754 /* NOTREACHED */ 755 } 756} 757 758static __inline int ahc_get_pci_function(ahc_dev_softc_t); 759static __inline int 760ahc_get_pci_function(ahc_dev_softc_t pci) 761{ 762 return (PCI_FUNC(pci->devfn)); 763} 764 765static __inline int ahc_get_pci_slot(ahc_dev_softc_t); 766static __inline int 767ahc_get_pci_slot(ahc_dev_softc_t pci) 768{ 769 return (PCI_SLOT(pci->devfn)); 770} 771 772static __inline int ahc_get_pci_bus(ahc_dev_softc_t); 773static __inline int 774ahc_get_pci_bus(ahc_dev_softc_t pci) 775{ 776 return (pci->bus->number); 777} 778#else 779static inline int ahc_linux_pci_init(void) { 780 return 0; 781} 782static inline void ahc_linux_pci_exit(void) { 783} 784#endif 785 786static __inline void ahc_flush_device_writes(struct ahc_softc *); 787static __inline void 788ahc_flush_device_writes(struct ahc_softc *ahc) 789{ 790 /* XXX Is this sufficient for all architectures??? */ 791 ahc_inb(ahc, INTSTAT); 792} 793 794/**************************** Proc FS Support *********************************/ 795int ahc_linux_proc_info(struct Scsi_Host *, char *, char **, 796 off_t, int, int); 797 798/*************************** Domain Validation ********************************/ 799/*********************** Transaction Access Wrappers *************************/ 800static __inline void ahc_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t); 801static __inline void ahc_set_transaction_status(struct scb *, uint32_t); 802static __inline void ahc_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t); 803static __inline void ahc_set_scsi_status(struct scb *, uint32_t); 804static __inline uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd); 805static __inline uint32_t ahc_get_transaction_status(struct scb *); 806static __inline uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd); 807static __inline uint32_t ahc_get_scsi_status(struct scb *); 808static __inline void ahc_set_transaction_tag(struct scb *, int, u_int); 809static __inline u_long ahc_get_transfer_length(struct scb *); 810static __inline int ahc_get_transfer_dir(struct scb *); 811static __inline void ahc_set_residual(struct scb *, u_long); 812static __inline void ahc_set_sense_residual(struct scb *scb, u_long resid); 813static __inline u_long ahc_get_residual(struct scb *); 814static __inline u_long ahc_get_sense_residual(struct scb *); 815static __inline int ahc_perform_autosense(struct scb *); 816static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *, 817 struct scb *); 818static __inline void ahc_notify_xfer_settings_change(struct ahc_softc *, 819 struct ahc_devinfo *); 820static __inline void ahc_platform_scb_free(struct ahc_softc *ahc, 821 struct scb *scb); 822static __inline void ahc_freeze_scb(struct scb *scb); 823 824static __inline 825void ahc_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status) 826{ 827 cmd->result &= ~(CAM_STATUS_MASK << 16); 828 cmd->result |= status << 16; 829} 830 831static __inline 832void ahc_set_transaction_status(struct scb *scb, uint32_t status) 833{ 834 ahc_cmd_set_transaction_status(scb->io_ctx,status); 835} 836 837static __inline 838void ahc_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status) 839{ 840 cmd->result &= ~0xFFFF; 841 cmd->result |= status; 842} 843 844static __inline 845void ahc_set_scsi_status(struct scb *scb, uint32_t status) 846{ 847 ahc_cmd_set_scsi_status(scb->io_ctx, status); 848} 849 850static __inline 851uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd) 852{ 853 return ((cmd->result >> 16) & CAM_STATUS_MASK); 854} 855 856static __inline 857uint32_t ahc_get_transaction_status(struct scb *scb) 858{ 859 return (ahc_cmd_get_transaction_status(scb->io_ctx)); 860} 861 862static __inline 863uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd) 864{ 865 return (cmd->result & 0xFFFF); 866} 867 868static __inline 869uint32_t ahc_get_scsi_status(struct scb *scb) 870{ 871 return (ahc_cmd_get_scsi_status(scb->io_ctx)); 872} 873 874static __inline 875void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type) 876{ 877 /* 878 * Nothing to do for linux as the incoming transaction 879 * has no concept of tag/non tagged, etc. 880 */ 881} 882 883static __inline 884u_long ahc_get_transfer_length(struct scb *scb) 885{ 886 return (scb->platform_data->xfer_len); 887} 888 889static __inline 890int ahc_get_transfer_dir(struct scb *scb) 891{ 892 return (scb->io_ctx->sc_data_direction); 893} 894 895static __inline 896void ahc_set_residual(struct scb *scb, u_long resid) 897{ 898 scb->io_ctx->resid = resid; 899} 900 901static __inline 902void ahc_set_sense_residual(struct scb *scb, u_long resid) 903{ 904 scb->platform_data->sense_resid = resid; 905} 906 907static __inline 908u_long ahc_get_residual(struct scb *scb) 909{ 910 return (scb->io_ctx->resid); 911} 912 913static __inline 914u_long ahc_get_sense_residual(struct scb *scb) 915{ 916 return (scb->platform_data->sense_resid); 917} 918 919static __inline 920int ahc_perform_autosense(struct scb *scb) 921{ 922 /* 923 * We always perform autosense in Linux. 924 * On other platforms this is set on a 925 * per-transaction basis. 926 */ 927 return (1); 928} 929 930static __inline uint32_t 931ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb) 932{ 933 return (sizeof(struct scsi_sense_data)); 934} 935 936static __inline void 937ahc_notify_xfer_settings_change(struct ahc_softc *ahc, 938 struct ahc_devinfo *devinfo) 939{ 940 /* Nothing to do here for linux */ 941} 942 943static __inline void 944ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb) 945{ 946 ahc->flags &= ~AHC_RESOURCE_SHORTAGE; 947} 948 949int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg); 950void ahc_platform_free(struct ahc_softc *ahc); 951void ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb); 952 953static __inline void 954ahc_freeze_scb(struct scb *scb) 955{ 956 if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) { 957 scb->io_ctx->result |= CAM_DEV_QFRZN << 16; 958 scb->platform_data->dev->qfrozen++; 959 } 960} 961 962void ahc_platform_set_tags(struct ahc_softc *ahc, 963 struct ahc_devinfo *devinfo, ahc_queue_alg); 964int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target, 965 char channel, int lun, u_int tag, 966 role_t role, uint32_t status); 967irqreturn_t 968 ahc_linux_isr(int irq, void *dev_id, struct pt_regs * regs); 969void ahc_platform_flushwork(struct ahc_softc *ahc); 970int ahc_softc_comp(struct ahc_softc *, struct ahc_softc *); 971void ahc_done(struct ahc_softc*, struct scb*); 972void ahc_send_async(struct ahc_softc *, char channel, 973 u_int target, u_int lun, ac_code, void *); 974void ahc_print_path(struct ahc_softc *, struct scb *); 975void ahc_platform_dump_card_state(struct ahc_softc *ahc); 976 977#ifdef CONFIG_PCI 978#define AHC_PCI_CONFIG 1 979#else 980#define AHC_PCI_CONFIG 0 981#endif 982#define bootverbose aic7xxx_verbose 983extern u_int aic7xxx_verbose; 984#endif /* _AIC7XXX_LINUX_H_ */ 985