mpt2sas_base.c revision 29786e19cda2117e12303df67546839591d2afa7
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2009 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60 61#include "mpt2sas_base.h" 62 63static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 64 65#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 66#define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */ 67 68static int max_queue_depth = -1; 69module_param(max_queue_depth, int, 0); 70MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 71 72static int max_sgl_entries = -1; 73module_param(max_sgl_entries, int, 0); 74MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 75 76static int msix_disable = -1; 77module_param(msix_disable, int, 0); 78MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 79 80/** 81 * _base_fault_reset_work - workq handling ioc fault conditions 82 * @work: input argument, used to derive ioc 83 * Context: sleep. 84 * 85 * Return nothing. 86 */ 87static void 88_base_fault_reset_work(struct work_struct *work) 89{ 90 struct MPT2SAS_ADAPTER *ioc = 91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 92 unsigned long flags; 93 u32 doorbell; 94 int rc; 95 96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 97 if (ioc->shost_recovery) 98 goto rearm_timer; 99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 100 101 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 104 FORCE_BIG_HAMMER); 105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 106 __func__, (rc == 0) ? "success" : "failed"); 107 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 109 mpt2sas_base_fault_info(ioc, doorbell & 110 MPI2_DOORBELL_DATA_MASK); 111 } 112 113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 114 rearm_timer: 115 if (ioc->fault_reset_work_q) 116 queue_delayed_work(ioc->fault_reset_work_q, 117 &ioc->fault_reset_work, 118 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 120} 121 122/** 123 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 124 * @ioc: pointer to scsi command object 125 * Context: sleep. 126 * 127 * Return nothing. 128 */ 129void 130mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 131{ 132 unsigned long flags; 133 134 if (ioc->fault_reset_work_q) 135 return; 136 137 /* initialize fault polling */ 138 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 139 snprintf(ioc->fault_reset_work_q_name, 140 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 141 ioc->fault_reset_work_q = 142 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 143 if (!ioc->fault_reset_work_q) { 144 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 145 ioc->name, __func__, __LINE__); 146 return; 147 } 148 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 149 if (ioc->fault_reset_work_q) 150 queue_delayed_work(ioc->fault_reset_work_q, 151 &ioc->fault_reset_work, 152 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 153 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 154} 155 156/** 157 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 158 * @ioc: pointer to scsi command object 159 * Context: sleep. 160 * 161 * Return nothing. 162 */ 163void 164mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 165{ 166 unsigned long flags; 167 struct workqueue_struct *wq; 168 169 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 170 wq = ioc->fault_reset_work_q; 171 ioc->fault_reset_work_q = NULL; 172 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 173 if (wq) { 174 if (!cancel_delayed_work(&ioc->fault_reset_work)) 175 flush_workqueue(wq); 176 destroy_workqueue(wq); 177 } 178} 179 180#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 181/** 182 * _base_sas_ioc_info - verbose translation of the ioc status 183 * @ioc: pointer to scsi command object 184 * @mpi_reply: reply mf payload returned from firmware 185 * @request_hdr: request mf 186 * 187 * Return nothing. 188 */ 189static void 190_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 191 MPI2RequestHeader_t *request_hdr) 192{ 193 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 194 MPI2_IOCSTATUS_MASK; 195 char *desc = NULL; 196 u16 frame_sz; 197 char *func_str = NULL; 198 199 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 200 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 201 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 202 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 203 return; 204 205 switch (ioc_status) { 206 207/**************************************************************************** 208* Common IOCStatus values for all replies 209****************************************************************************/ 210 211 case MPI2_IOCSTATUS_INVALID_FUNCTION: 212 desc = "invalid function"; 213 break; 214 case MPI2_IOCSTATUS_BUSY: 215 desc = "busy"; 216 break; 217 case MPI2_IOCSTATUS_INVALID_SGL: 218 desc = "invalid sgl"; 219 break; 220 case MPI2_IOCSTATUS_INTERNAL_ERROR: 221 desc = "internal error"; 222 break; 223 case MPI2_IOCSTATUS_INVALID_VPID: 224 desc = "invalid vpid"; 225 break; 226 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 227 desc = "insufficient resources"; 228 break; 229 case MPI2_IOCSTATUS_INVALID_FIELD: 230 desc = "invalid field"; 231 break; 232 case MPI2_IOCSTATUS_INVALID_STATE: 233 desc = "invalid state"; 234 break; 235 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 236 desc = "op state not supported"; 237 break; 238 239/**************************************************************************** 240* Config IOCStatus values 241****************************************************************************/ 242 243 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 244 desc = "config invalid action"; 245 break; 246 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 247 desc = "config invalid type"; 248 break; 249 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 250 desc = "config invalid page"; 251 break; 252 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 253 desc = "config invalid data"; 254 break; 255 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 256 desc = "config no defaults"; 257 break; 258 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 259 desc = "config cant commit"; 260 break; 261 262/**************************************************************************** 263* SCSI IO Reply 264****************************************************************************/ 265 266 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 267 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 268 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 269 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 270 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 271 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 272 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 273 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 274 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 275 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 276 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 277 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 278 break; 279 280/**************************************************************************** 281* For use by SCSI Initiator and SCSI Target end-to-end data protection 282****************************************************************************/ 283 284 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 285 desc = "eedp guard error"; 286 break; 287 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 288 desc = "eedp ref tag error"; 289 break; 290 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 291 desc = "eedp app tag error"; 292 break; 293 294/**************************************************************************** 295* SCSI Target values 296****************************************************************************/ 297 298 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 299 desc = "target invalid io index"; 300 break; 301 case MPI2_IOCSTATUS_TARGET_ABORTED: 302 desc = "target aborted"; 303 break; 304 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 305 desc = "target no conn retryable"; 306 break; 307 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 308 desc = "target no connection"; 309 break; 310 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 311 desc = "target xfer count mismatch"; 312 break; 313 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 314 desc = "target data offset error"; 315 break; 316 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 317 desc = "target too much write data"; 318 break; 319 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 320 desc = "target iu too short"; 321 break; 322 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 323 desc = "target ack nak timeout"; 324 break; 325 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 326 desc = "target nak received"; 327 break; 328 329/**************************************************************************** 330* Serial Attached SCSI values 331****************************************************************************/ 332 333 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 334 desc = "smp request failed"; 335 break; 336 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 337 desc = "smp data overrun"; 338 break; 339 340/**************************************************************************** 341* Diagnostic Buffer Post / Diagnostic Release values 342****************************************************************************/ 343 344 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 345 desc = "diagnostic released"; 346 break; 347 default: 348 break; 349 } 350 351 if (!desc) 352 return; 353 354 switch (request_hdr->Function) { 355 case MPI2_FUNCTION_CONFIG: 356 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 357 func_str = "config_page"; 358 break; 359 case MPI2_FUNCTION_SCSI_TASK_MGMT: 360 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 361 func_str = "task_mgmt"; 362 break; 363 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 364 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 365 func_str = "sas_iounit_ctl"; 366 break; 367 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 368 frame_sz = sizeof(Mpi2SepRequest_t); 369 func_str = "enclosure"; 370 break; 371 case MPI2_FUNCTION_IOC_INIT: 372 frame_sz = sizeof(Mpi2IOCInitRequest_t); 373 func_str = "ioc_init"; 374 break; 375 case MPI2_FUNCTION_PORT_ENABLE: 376 frame_sz = sizeof(Mpi2PortEnableRequest_t); 377 func_str = "port_enable"; 378 break; 379 case MPI2_FUNCTION_SMP_PASSTHROUGH: 380 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 381 func_str = "smp_passthru"; 382 break; 383 default: 384 frame_sz = 32; 385 func_str = "unknown"; 386 break; 387 } 388 389 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 390 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 391 392 _debug_dump_mf(request_hdr, frame_sz/4); 393} 394 395/** 396 * _base_display_event_data - verbose translation of firmware asyn events 397 * @ioc: pointer to scsi command object 398 * @mpi_reply: reply mf payload returned from firmware 399 * 400 * Return nothing. 401 */ 402static void 403_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 404 Mpi2EventNotificationReply_t *mpi_reply) 405{ 406 char *desc = NULL; 407 u16 event; 408 409 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 410 return; 411 412 event = le16_to_cpu(mpi_reply->Event); 413 414 switch (event) { 415 case MPI2_EVENT_LOG_DATA: 416 desc = "Log Data"; 417 break; 418 case MPI2_EVENT_STATE_CHANGE: 419 desc = "Status Change"; 420 break; 421 case MPI2_EVENT_HARD_RESET_RECEIVED: 422 desc = "Hard Reset Received"; 423 break; 424 case MPI2_EVENT_EVENT_CHANGE: 425 desc = "Event Change"; 426 break; 427 case MPI2_EVENT_TASK_SET_FULL: 428 desc = "Task Set Full"; 429 break; 430 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 431 desc = "Device Status Change"; 432 break; 433 case MPI2_EVENT_IR_OPERATION_STATUS: 434 desc = "IR Operation Status"; 435 break; 436 case MPI2_EVENT_SAS_DISCOVERY: 437 desc = "Discovery"; 438 break; 439 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 440 desc = "SAS Broadcast Primitive"; 441 break; 442 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 443 desc = "SAS Init Device Status Change"; 444 break; 445 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 446 desc = "SAS Init Table Overflow"; 447 break; 448 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 449 desc = "SAS Topology Change List"; 450 break; 451 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 452 desc = "SAS Enclosure Device Status Change"; 453 break; 454 case MPI2_EVENT_IR_VOLUME: 455 desc = "IR Volume"; 456 break; 457 case MPI2_EVENT_IR_PHYSICAL_DISK: 458 desc = "IR Physical Disk"; 459 break; 460 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 461 desc = "IR Configuration Change List"; 462 break; 463 case MPI2_EVENT_LOG_ENTRY_ADDED: 464 desc = "Log Entry Added"; 465 break; 466 } 467 468 if (!desc) 469 return; 470 471 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 472} 473#endif 474 475/** 476 * _base_sas_log_info - verbose translation of firmware log info 477 * @ioc: pointer to scsi command object 478 * @log_info: log info 479 * 480 * Return nothing. 481 */ 482static void 483_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 484{ 485 union loginfo_type { 486 u32 loginfo; 487 struct { 488 u32 subcode:16; 489 u32 code:8; 490 u32 originator:4; 491 u32 bus_type:4; 492 } dw; 493 }; 494 union loginfo_type sas_loginfo; 495 char *originator_str = NULL; 496 497 sas_loginfo.loginfo = log_info; 498 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 499 return; 500 501 /* each nexus loss loginfo */ 502 if (log_info == 0x31170000) 503 return; 504 505 /* eat the loginfos associated with task aborts */ 506 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 507 0x31140000 || log_info == 0x31130000)) 508 return; 509 510 switch (sas_loginfo.dw.originator) { 511 case 0: 512 originator_str = "IOP"; 513 break; 514 case 1: 515 originator_str = "PL"; 516 break; 517 case 2: 518 originator_str = "IR"; 519 break; 520 } 521 522 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 523 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 524 originator_str, sas_loginfo.dw.code, 525 sas_loginfo.dw.subcode); 526} 527 528/** 529 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 530 * @ioc: pointer to scsi command object 531 * @fault_code: fault code 532 * 533 * Return nothing. 534 */ 535void 536mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 537{ 538 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 539 ioc->name, fault_code); 540} 541 542/** 543 * _base_display_reply_info - 544 * @ioc: pointer to scsi command object 545 * @smid: system request message index 546 * @msix_index: MSIX table index supplied by the OS 547 * @reply: reply message frame(lower 32bit addr) 548 * 549 * Return nothing. 550 */ 551static void 552_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 553 u32 reply) 554{ 555 MPI2DefaultReply_t *mpi_reply; 556 u16 ioc_status; 557 558 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 559 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 560#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 561 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 562 (ioc->logging_level & MPT_DEBUG_REPLY)) { 563 _base_sas_ioc_info(ioc , mpi_reply, 564 mpt2sas_base_get_msg_frame(ioc, smid)); 565 } 566#endif 567 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 568 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 569} 570 571/** 572 * mpt2sas_base_done - base internal command completion routine 573 * @ioc: pointer to scsi command object 574 * @smid: system request message index 575 * @msix_index: MSIX table index supplied by the OS 576 * @reply: reply message frame(lower 32bit addr) 577 * 578 * Return 1 meaning mf should be freed from _base_interrupt 579 * 0 means the mf is freed from this function. 580 */ 581u8 582mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 583 u32 reply) 584{ 585 MPI2DefaultReply_t *mpi_reply; 586 587 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 588 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 589 return 1; 590 591 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 592 return 1; 593 594 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 595 if (mpi_reply) { 596 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 597 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 598 } 599 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 600 complete(&ioc->base_cmds.done); 601 return 1; 602} 603 604/** 605 * _base_async_event - main callback handler for firmware asyn events 606 * @ioc: pointer to scsi command object 607 * @msix_index: MSIX table index supplied by the OS 608 * @reply: reply message frame(lower 32bit addr) 609 * 610 * Return 1 meaning mf should be freed from _base_interrupt 611 * 0 means the mf is freed from this function. 612 */ 613static u8 614_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply) 615{ 616 Mpi2EventNotificationReply_t *mpi_reply; 617 Mpi2EventAckRequest_t *ack_request; 618 u16 smid; 619 620 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 621 if (!mpi_reply) 622 return 1; 623 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 624 return 1; 625#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 626 _base_display_event_data(ioc, mpi_reply); 627#endif 628 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 629 goto out; 630 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 631 if (!smid) { 632 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 633 ioc->name, __func__); 634 goto out; 635 } 636 637 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 638 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 639 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 640 ack_request->Event = mpi_reply->Event; 641 ack_request->EventContext = mpi_reply->EventContext; 642 ack_request->VF_ID = 0; /* TODO */ 643 ack_request->VP_ID = 0; 644 mpt2sas_base_put_smid_default(ioc, smid); 645 646 out: 647 648 /* scsih callback handler */ 649 mpt2sas_scsih_event_callback(ioc, msix_index, reply); 650 651 /* ctl callback handler */ 652 mpt2sas_ctl_event_callback(ioc, msix_index, reply); 653 654 return 1; 655} 656 657/** 658 * _base_get_cb_idx - obtain the callback index 659 * @ioc: per adapter object 660 * @smid: system request message index 661 * 662 * Return callback index. 663 */ 664static u8 665_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid) 666{ 667 int i; 668 u8 cb_idx = 0xFF; 669 670 if (smid >= ioc->hi_priority_smid) { 671 if (smid < ioc->internal_smid) { 672 i = smid - ioc->hi_priority_smid; 673 cb_idx = ioc->hpr_lookup[i].cb_idx; 674 } else { 675 i = smid - ioc->internal_smid; 676 cb_idx = ioc->internal_lookup[i].cb_idx; 677 } 678 } else { 679 i = smid - 1; 680 cb_idx = ioc->scsi_lookup[i].cb_idx; 681 } 682 return cb_idx; 683} 684 685/** 686 * _base_mask_interrupts - disable interrupts 687 * @ioc: pointer to scsi command object 688 * 689 * Disabling ResetIRQ, Reply and Doorbell Interrupts 690 * 691 * Return nothing. 692 */ 693static void 694_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 695{ 696 u32 him_register; 697 698 ioc->mask_interrupts = 1; 699 him_register = readl(&ioc->chip->HostInterruptMask); 700 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 701 writel(him_register, &ioc->chip->HostInterruptMask); 702 readl(&ioc->chip->HostInterruptMask); 703} 704 705/** 706 * _base_unmask_interrupts - enable interrupts 707 * @ioc: pointer to scsi command object 708 * 709 * Enabling only Reply Interrupts 710 * 711 * Return nothing. 712 */ 713static void 714_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 715{ 716 u32 him_register; 717 718 him_register = readl(&ioc->chip->HostInterruptMask); 719 him_register &= ~MPI2_HIM_RIM; 720 writel(him_register, &ioc->chip->HostInterruptMask); 721 ioc->mask_interrupts = 0; 722} 723 724union reply_descriptor { 725 u64 word; 726 struct { 727 u32 low; 728 u32 high; 729 } u; 730}; 731 732/** 733 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 734 * @irq: irq number (not used) 735 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 736 * @r: pt_regs pointer (not used) 737 * 738 * Return IRQ_HANDLE if processed, else IRQ_NONE. 739 */ 740static irqreturn_t 741_base_interrupt(int irq, void *bus_id) 742{ 743 union reply_descriptor rd; 744 u32 completed_cmds; 745 u8 request_desript_type; 746 u16 smid; 747 u8 cb_idx; 748 u32 reply; 749 u8 msix_index; 750 struct MPT2SAS_ADAPTER *ioc = bus_id; 751 Mpi2ReplyDescriptorsUnion_t *rpf; 752 u8 rc; 753 754 if (ioc->mask_interrupts) 755 return IRQ_NONE; 756 757 rpf = &ioc->reply_post_free[ioc->reply_post_host_index]; 758 request_desript_type = rpf->Default.ReplyFlags 759 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 760 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 761 return IRQ_NONE; 762 763 completed_cmds = 0; 764 do { 765 rd.word = rpf->Words; 766 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 767 goto out; 768 reply = 0; 769 cb_idx = 0xFF; 770 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); 771 msix_index = rpf->Default.MSIxIndex; 772 if (request_desript_type == 773 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 774 reply = le32_to_cpu 775 (rpf->AddressReply.ReplyFrameAddress); 776 } else if (request_desript_type == 777 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 778 goto next; 779 else if (request_desript_type == 780 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 781 goto next; 782 if (smid) 783 cb_idx = _base_get_cb_idx(ioc, smid); 784 if (smid && cb_idx != 0xFF) { 785 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index, 786 reply); 787 if (reply) 788 _base_display_reply_info(ioc, smid, msix_index, 789 reply); 790 if (rc) 791 mpt2sas_base_free_smid(ioc, smid); 792 } 793 if (!smid) 794 _base_async_event(ioc, msix_index, reply); 795 796 /* reply free queue handling */ 797 if (reply) { 798 ioc->reply_free_host_index = 799 (ioc->reply_free_host_index == 800 (ioc->reply_free_queue_depth - 1)) ? 801 0 : ioc->reply_free_host_index + 1; 802 ioc->reply_free[ioc->reply_free_host_index] = 803 cpu_to_le32(reply); 804 wmb(); 805 writel(ioc->reply_free_host_index, 806 &ioc->chip->ReplyFreeHostIndex); 807 } 808 809 next: 810 811 rpf->Words = ULLONG_MAX; 812 ioc->reply_post_host_index = (ioc->reply_post_host_index == 813 (ioc->reply_post_queue_depth - 1)) ? 0 : 814 ioc->reply_post_host_index + 1; 815 request_desript_type = 816 ioc->reply_post_free[ioc->reply_post_host_index].Default. 817 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 818 completed_cmds++; 819 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 820 goto out; 821 if (!ioc->reply_post_host_index) 822 rpf = ioc->reply_post_free; 823 else 824 rpf++; 825 } while (1); 826 827 out: 828 829 if (!completed_cmds) 830 return IRQ_NONE; 831 832 wmb(); 833 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex); 834 return IRQ_HANDLED; 835} 836 837/** 838 * mpt2sas_base_release_callback_handler - clear interupt callback handler 839 * @cb_idx: callback index 840 * 841 * Return nothing. 842 */ 843void 844mpt2sas_base_release_callback_handler(u8 cb_idx) 845{ 846 mpt_callbacks[cb_idx] = NULL; 847} 848 849/** 850 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 851 * @cb_func: callback function 852 * 853 * Returns cb_func. 854 */ 855u8 856mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 857{ 858 u8 cb_idx; 859 860 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 861 if (mpt_callbacks[cb_idx] == NULL) 862 break; 863 864 mpt_callbacks[cb_idx] = cb_func; 865 return cb_idx; 866} 867 868/** 869 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 870 * 871 * Return nothing. 872 */ 873void 874mpt2sas_base_initialize_callback_handler(void) 875{ 876 u8 cb_idx; 877 878 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 879 mpt2sas_base_release_callback_handler(cb_idx); 880} 881 882/** 883 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 884 * @ioc: per adapter object 885 * @paddr: virtual address for SGE 886 * 887 * Create a zero length scatter gather entry to insure the IOCs hardware has 888 * something to use if the target device goes brain dead and tries 889 * to send data even when none is asked for. 890 * 891 * Return nothing. 892 */ 893void 894mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 895{ 896 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 897 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 898 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 899 MPI2_SGE_FLAGS_SHIFT); 900 ioc->base_add_sg_single(paddr, flags_length, -1); 901} 902 903/** 904 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 905 * @paddr: virtual address for SGE 906 * @flags_length: SGE flags and data transfer length 907 * @dma_addr: Physical address 908 * 909 * Return nothing. 910 */ 911static void 912_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 913{ 914 Mpi2SGESimple32_t *sgel = paddr; 915 916 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 917 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 918 sgel->FlagsLength = cpu_to_le32(flags_length); 919 sgel->Address = cpu_to_le32(dma_addr); 920} 921 922 923/** 924 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 925 * @paddr: virtual address for SGE 926 * @flags_length: SGE flags and data transfer length 927 * @dma_addr: Physical address 928 * 929 * Return nothing. 930 */ 931static void 932_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 933{ 934 Mpi2SGESimple64_t *sgel = paddr; 935 936 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 937 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 938 sgel->FlagsLength = cpu_to_le32(flags_length); 939 sgel->Address = cpu_to_le64(dma_addr); 940} 941 942#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 943 944/** 945 * _base_config_dma_addressing - set dma addressing 946 * @ioc: per adapter object 947 * @pdev: PCI device struct 948 * 949 * Returns 0 for success, non-zero for failure. 950 */ 951static int 952_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 953{ 954 struct sysinfo s; 955 char *desc = NULL; 956 957 if (sizeof(dma_addr_t) > 4) { 958 const uint64_t required_mask = 959 dma_get_required_mask(&pdev->dev); 960 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 961 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 962 DMA_BIT_MASK(64))) { 963 ioc->base_add_sg_single = &_base_add_sg_single_64; 964 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 965 desc = "64"; 966 goto out; 967 } 968 } 969 970 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 971 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 972 ioc->base_add_sg_single = &_base_add_sg_single_32; 973 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 974 desc = "32"; 975 } else 976 return -ENODEV; 977 978 out: 979 si_meminfo(&s); 980 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 981 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 982 983 return 0; 984} 985 986/** 987 * _base_save_msix_table - backup msix vector table 988 * @ioc: per adapter object 989 * 990 * This address an errata where diag reset clears out the table 991 */ 992static void 993_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 994{ 995 int i; 996 997 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 998 return; 999 1000 for (i = 0; i < ioc->msix_vector_count; i++) 1001 ioc->msix_table_backup[i] = ioc->msix_table[i]; 1002} 1003 1004/** 1005 * _base_restore_msix_table - this restores the msix vector table 1006 * @ioc: per adapter object 1007 * 1008 */ 1009static void 1010_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 1011{ 1012 int i; 1013 1014 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1015 return; 1016 1017 for (i = 0; i < ioc->msix_vector_count; i++) 1018 ioc->msix_table[i] = ioc->msix_table_backup[i]; 1019} 1020 1021/** 1022 * _base_check_enable_msix - checks MSIX capabable. 1023 * @ioc: per adapter object 1024 * 1025 * Check to see if card is capable of MSIX, and set number 1026 * of avaliable msix vectors 1027 */ 1028static int 1029_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1030{ 1031 int base; 1032 u16 message_control; 1033 u32 msix_table_offset; 1034 1035 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1036 if (!base) { 1037 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1038 "supported\n", ioc->name)); 1039 return -EINVAL; 1040 } 1041 1042 /* get msix vector count */ 1043 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1044 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1045 1046 /* get msix table */ 1047 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 1048 msix_table_offset &= 0xFFFFFFF8; 1049 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 1050 1051 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1052 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 1053 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 1054 return 0; 1055} 1056 1057/** 1058 * _base_disable_msix - disables msix 1059 * @ioc: per adapter object 1060 * 1061 */ 1062static void 1063_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1064{ 1065 if (ioc->msix_enable) { 1066 pci_disable_msix(ioc->pdev); 1067 kfree(ioc->msix_table_backup); 1068 ioc->msix_table_backup = NULL; 1069 ioc->msix_enable = 0; 1070 } 1071} 1072 1073/** 1074 * _base_enable_msix - enables msix, failback to io_apic 1075 * @ioc: per adapter object 1076 * 1077 */ 1078static int 1079_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1080{ 1081 struct msix_entry entries; 1082 int r; 1083 u8 try_msix = 0; 1084 1085 if (msix_disable == -1 || msix_disable == 0) 1086 try_msix = 1; 1087 1088 if (!try_msix) 1089 goto try_ioapic; 1090 1091 if (_base_check_enable_msix(ioc) != 0) 1092 goto try_ioapic; 1093 1094 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1095 sizeof(u32), GFP_KERNEL); 1096 if (!ioc->msix_table_backup) { 1097 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1098 "msix_table_backup failed!!!\n", ioc->name)); 1099 goto try_ioapic; 1100 } 1101 1102 memset(&entries, 0, sizeof(struct msix_entry)); 1103 r = pci_enable_msix(ioc->pdev, &entries, 1); 1104 if (r) { 1105 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1106 "failed (r=%d) !!!\n", ioc->name, r)); 1107 goto try_ioapic; 1108 } 1109 1110 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1111 ioc->name, ioc); 1112 if (r) { 1113 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1114 "interrupt %d !!!\n", ioc->name, entries.vector)); 1115 pci_disable_msix(ioc->pdev); 1116 goto try_ioapic; 1117 } 1118 1119 ioc->pci_irq = entries.vector; 1120 ioc->msix_enable = 1; 1121 return 0; 1122 1123/* failback to io_apic interrupt routing */ 1124 try_ioapic: 1125 1126 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1127 ioc->name, ioc); 1128 if (r) { 1129 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1130 ioc->name, ioc->pdev->irq); 1131 r = -EBUSY; 1132 goto out_fail; 1133 } 1134 1135 ioc->pci_irq = ioc->pdev->irq; 1136 return 0; 1137 1138 out_fail: 1139 return r; 1140} 1141 1142/** 1143 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1144 * @ioc: per adapter object 1145 * 1146 * Returns 0 for success, non-zero for failure. 1147 */ 1148int 1149mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1150{ 1151 struct pci_dev *pdev = ioc->pdev; 1152 u32 memap_sz; 1153 u32 pio_sz; 1154 int i, r = 0; 1155 1156 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1157 ioc->name, __func__)); 1158 1159 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1160 if (pci_enable_device_mem(pdev)) { 1161 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1162 "failed\n", ioc->name); 1163 return -ENODEV; 1164 } 1165 1166 1167 if (pci_request_selected_regions(pdev, ioc->bars, 1168 MPT2SAS_DRIVER_NAME)) { 1169 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1170 "failed\n", ioc->name); 1171 r = -ENODEV; 1172 goto out_fail; 1173 } 1174 1175 pci_set_master(pdev); 1176 1177 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1178 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1179 ioc->name, pci_name(pdev)); 1180 r = -ENODEV; 1181 goto out_fail; 1182 } 1183 1184 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1185 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1186 if (pio_sz) 1187 continue; 1188 ioc->pio_chip = pci_resource_start(pdev, i); 1189 pio_sz = pci_resource_len(pdev, i); 1190 } else { 1191 if (memap_sz) 1192 continue; 1193 ioc->chip_phys = pci_resource_start(pdev, i); 1194 memap_sz = pci_resource_len(pdev, i); 1195 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1196 if (ioc->chip == NULL) { 1197 printk(MPT2SAS_ERR_FMT "unable to map adapter " 1198 "memory!\n", ioc->name); 1199 r = -EINVAL; 1200 goto out_fail; 1201 } 1202 } 1203 } 1204 1205 _base_mask_interrupts(ioc); 1206 r = _base_enable_msix(ioc); 1207 if (r) 1208 goto out_fail; 1209 1210 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1211 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1212 "IO-APIC enabled"), ioc->pci_irq); 1213 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1214 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1215 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1216 ioc->name, ioc->pio_chip, pio_sz); 1217 1218 return 0; 1219 1220 out_fail: 1221 if (ioc->chip_phys) 1222 iounmap(ioc->chip); 1223 ioc->chip_phys = 0; 1224 ioc->pci_irq = -1; 1225 pci_release_selected_regions(ioc->pdev, ioc->bars); 1226 pci_disable_device(pdev); 1227 return r; 1228} 1229 1230/** 1231 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1232 * @ioc: per adapter object 1233 * @smid: system request message index(smid zero is invalid) 1234 * 1235 * Returns virt pointer to message frame. 1236 */ 1237void * 1238mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1239{ 1240 return (void *)(ioc->request + (smid * ioc->request_sz)); 1241} 1242 1243/** 1244 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1245 * @ioc: per adapter object 1246 * @smid: system request message index 1247 * 1248 * Returns virt pointer to sense buffer. 1249 */ 1250void * 1251mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1252{ 1253 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1254} 1255 1256/** 1257 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1258 * @ioc: per adapter object 1259 * @smid: system request message index 1260 * 1261 * Returns phys pointer to sense buffer. 1262 */ 1263dma_addr_t 1264mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1265{ 1266 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE); 1267} 1268 1269/** 1270 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1271 * @ioc: per adapter object 1272 * @phys_addr: lower 32 physical addr of the reply 1273 * 1274 * Converts 32bit lower physical addr into a virt address. 1275 */ 1276void * 1277mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1278{ 1279 if (!phys_addr) 1280 return NULL; 1281 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1282} 1283 1284/** 1285 * mpt2sas_base_get_smid - obtain a free smid from internal queue 1286 * @ioc: per adapter object 1287 * @cb_idx: callback index 1288 * 1289 * Returns smid (zero is invalid) 1290 */ 1291u16 1292mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1293{ 1294 unsigned long flags; 1295 struct request_tracker *request; 1296 u16 smid; 1297 1298 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1299 if (list_empty(&ioc->internal_free_list)) { 1300 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1301 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1302 ioc->name, __func__); 1303 return 0; 1304 } 1305 1306 request = list_entry(ioc->internal_free_list.next, 1307 struct request_tracker, tracker_list); 1308 request->cb_idx = cb_idx; 1309 smid = request->smid; 1310 list_del(&request->tracker_list); 1311 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1312 return smid; 1313} 1314 1315/** 1316 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue 1317 * @ioc: per adapter object 1318 * @cb_idx: callback index 1319 * @scmd: pointer to scsi command object 1320 * 1321 * Returns smid (zero is invalid) 1322 */ 1323u16 1324mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx, 1325 struct scsi_cmnd *scmd) 1326{ 1327 unsigned long flags; 1328 struct request_tracker *request; 1329 u16 smid; 1330 1331 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1332 if (list_empty(&ioc->free_list)) { 1333 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1334 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1335 ioc->name, __func__); 1336 return 0; 1337 } 1338 1339 request = list_entry(ioc->free_list.next, 1340 struct request_tracker, tracker_list); 1341 request->scmd = scmd; 1342 request->cb_idx = cb_idx; 1343 smid = request->smid; 1344 list_del(&request->tracker_list); 1345 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1346 return smid; 1347} 1348 1349/** 1350 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue 1351 * @ioc: per adapter object 1352 * @cb_idx: callback index 1353 * 1354 * Returns smid (zero is invalid) 1355 */ 1356u16 1357mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1358{ 1359 unsigned long flags; 1360 struct request_tracker *request; 1361 u16 smid; 1362 1363 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1364 if (list_empty(&ioc->hpr_free_list)) { 1365 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1366 return 0; 1367 } 1368 1369 request = list_entry(ioc->hpr_free_list.next, 1370 struct request_tracker, tracker_list); 1371 request->cb_idx = cb_idx; 1372 smid = request->smid; 1373 list_del(&request->tracker_list); 1374 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1375 return smid; 1376} 1377 1378 1379/** 1380 * mpt2sas_base_free_smid - put smid back on free_list 1381 * @ioc: per adapter object 1382 * @smid: system request message index 1383 * 1384 * Return nothing. 1385 */ 1386void 1387mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1388{ 1389 unsigned long flags; 1390 int i; 1391 1392 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1393 if (smid >= ioc->hi_priority_smid) { 1394 if (smid < ioc->internal_smid) { 1395 /* hi-priority */ 1396 i = smid - ioc->hi_priority_smid; 1397 ioc->hpr_lookup[i].cb_idx = 0xFF; 1398 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 1399 &ioc->hpr_free_list); 1400 } else { 1401 /* internal queue */ 1402 i = smid - ioc->internal_smid; 1403 ioc->internal_lookup[i].cb_idx = 0xFF; 1404 list_add_tail(&ioc->internal_lookup[i].tracker_list, 1405 &ioc->internal_free_list); 1406 } 1407 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1408 return; 1409 } 1410 1411 /* scsiio queue */ 1412 i = smid - 1; 1413 ioc->scsi_lookup[i].cb_idx = 0xFF; 1414 ioc->scsi_lookup[i].scmd = NULL; 1415 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 1416 &ioc->free_list); 1417 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1418 1419 /* 1420 * See _wait_for_commands_to_complete() call with regards to this code. 1421 */ 1422 if (ioc->shost_recovery && ioc->pending_io_count) { 1423 if (ioc->pending_io_count == 1) 1424 wake_up(&ioc->reset_wq); 1425 ioc->pending_io_count--; 1426 } 1427} 1428 1429/** 1430 * _base_writeq - 64 bit write to MMIO 1431 * @ioc: per adapter object 1432 * @b: data payload 1433 * @addr: address in MMIO space 1434 * @writeq_lock: spin lock 1435 * 1436 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1437 * care of 32 bit environment where its not quarenteed to send the entire word 1438 * in one transfer. 1439 */ 1440#ifndef writeq 1441static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1442 spinlock_t *writeq_lock) 1443{ 1444 unsigned long flags; 1445 __u64 data_out = cpu_to_le64(b); 1446 1447 spin_lock_irqsave(writeq_lock, flags); 1448 writel((u32)(data_out), addr); 1449 writel((u32)(data_out >> 32), (addr + 4)); 1450 spin_unlock_irqrestore(writeq_lock, flags); 1451} 1452#else 1453static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1454 spinlock_t *writeq_lock) 1455{ 1456 writeq(cpu_to_le64(b), addr); 1457} 1458#endif 1459 1460/** 1461 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1462 * @ioc: per adapter object 1463 * @smid: system request message index 1464 * @handle: device handle 1465 * 1466 * Return nothing. 1467 */ 1468void 1469mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle) 1470{ 1471 Mpi2RequestDescriptorUnion_t descriptor; 1472 u64 *request = (u64 *)&descriptor; 1473 1474 1475 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1476 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */ 1477 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1478 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1479 descriptor.SCSIIO.LMID = 0; 1480 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1481 &ioc->scsi_lookup_lock); 1482} 1483 1484 1485/** 1486 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1487 * @ioc: per adapter object 1488 * @smid: system request message index 1489 * 1490 * Return nothing. 1491 */ 1492void 1493mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1494{ 1495 Mpi2RequestDescriptorUnion_t descriptor; 1496 u64 *request = (u64 *)&descriptor; 1497 1498 descriptor.HighPriority.RequestFlags = 1499 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1500 descriptor.HighPriority.MSIxIndex = 0; /* TODO */ 1501 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1502 descriptor.HighPriority.LMID = 0; 1503 descriptor.HighPriority.Reserved1 = 0; 1504 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1505 &ioc->scsi_lookup_lock); 1506} 1507 1508/** 1509 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1510 * @ioc: per adapter object 1511 * @smid: system request message index 1512 * 1513 * Return nothing. 1514 */ 1515void 1516mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1517{ 1518 Mpi2RequestDescriptorUnion_t descriptor; 1519 u64 *request = (u64 *)&descriptor; 1520 1521 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1522 descriptor.Default.MSIxIndex = 0; /* TODO */ 1523 descriptor.Default.SMID = cpu_to_le16(smid); 1524 descriptor.Default.LMID = 0; 1525 descriptor.Default.DescriptorTypeDependent = 0; 1526 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1527 &ioc->scsi_lookup_lock); 1528} 1529 1530/** 1531 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1532 * @ioc: per adapter object 1533 * @smid: system request message index 1534 * @io_index: value used to track the IO 1535 * 1536 * Return nothing. 1537 */ 1538void 1539mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1540 u16 io_index) 1541{ 1542 Mpi2RequestDescriptorUnion_t descriptor; 1543 u64 *request = (u64 *)&descriptor; 1544 1545 descriptor.SCSITarget.RequestFlags = 1546 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1547 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */ 1548 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1549 descriptor.SCSITarget.LMID = 0; 1550 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1551 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1552 &ioc->scsi_lookup_lock); 1553} 1554 1555/** 1556 * _base_display_dell_branding - Disply branding string 1557 * @ioc: per adapter object 1558 * 1559 * Return nothing. 1560 */ 1561static void 1562_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1563{ 1564 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1565 1566 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1567 return; 1568 1569 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1570 switch (ioc->pdev->subsystem_device) { 1571 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1572 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1573 MPT2SAS_DELL_BRANDING_SIZE - 1); 1574 break; 1575 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1576 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1577 MPT2SAS_DELL_BRANDING_SIZE - 1); 1578 break; 1579 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1580 strncpy(dell_branding, 1581 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1582 MPT2SAS_DELL_BRANDING_SIZE - 1); 1583 break; 1584 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1585 strncpy(dell_branding, 1586 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1587 MPT2SAS_DELL_BRANDING_SIZE - 1); 1588 break; 1589 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1590 strncpy(dell_branding, 1591 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1592 MPT2SAS_DELL_BRANDING_SIZE - 1); 1593 break; 1594 case MPT2SAS_DELL_PERC_H200_SSDID: 1595 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1596 MPT2SAS_DELL_BRANDING_SIZE - 1); 1597 break; 1598 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1599 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1600 MPT2SAS_DELL_BRANDING_SIZE - 1); 1601 break; 1602 default: 1603 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1604 break; 1605 } 1606 1607 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1608 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1609 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1610 ioc->pdev->subsystem_device); 1611} 1612 1613/** 1614 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1615 * @ioc: per adapter object 1616 * 1617 * Return nothing. 1618 */ 1619static void 1620_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1621{ 1622 int i = 0; 1623 char desc[16]; 1624 u8 revision; 1625 u32 iounit_pg1_flags; 1626 1627 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1628 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1629 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1630 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1631 ioc->name, desc, 1632 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1633 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1634 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1635 ioc->facts.FWVersion.Word & 0x000000FF, 1636 revision, 1637 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1638 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1639 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1640 ioc->bios_pg3.BiosVersion & 0x000000FF); 1641 1642 _base_display_dell_branding(ioc); 1643 1644 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1645 1646 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1647 printk("Initiator"); 1648 i++; 1649 } 1650 1651 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1652 printk("%sTarget", i ? "," : ""); 1653 i++; 1654 } 1655 1656 i = 0; 1657 printk("), "); 1658 printk("Capabilities=("); 1659 1660 if (ioc->facts.IOCCapabilities & 1661 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1662 printk("Raid"); 1663 i++; 1664 } 1665 1666 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1667 printk("%sTLR", i ? "," : ""); 1668 i++; 1669 } 1670 1671 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1672 printk("%sMulticast", i ? "," : ""); 1673 i++; 1674 } 1675 1676 if (ioc->facts.IOCCapabilities & 1677 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1678 printk("%sBIDI Target", i ? "," : ""); 1679 i++; 1680 } 1681 1682 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1683 printk("%sEEDP", i ? "," : ""); 1684 i++; 1685 } 1686 1687 if (ioc->facts.IOCCapabilities & 1688 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1689 printk("%sSnapshot Buffer", i ? "," : ""); 1690 i++; 1691 } 1692 1693 if (ioc->facts.IOCCapabilities & 1694 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1695 printk("%sDiag Trace Buffer", i ? "," : ""); 1696 i++; 1697 } 1698 1699 if (ioc->facts.IOCCapabilities & 1700 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1701 printk("%sTask Set Full", i ? "," : ""); 1702 i++; 1703 } 1704 1705 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1706 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1707 printk("%sNCQ", i ? "," : ""); 1708 i++; 1709 } 1710 1711 printk(")\n"); 1712} 1713 1714/** 1715 * _base_static_config_pages - static start of day config pages 1716 * @ioc: per adapter object 1717 * 1718 * Return nothing. 1719 */ 1720static void 1721_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1722{ 1723 Mpi2ConfigReply_t mpi_reply; 1724 u32 iounit_pg1_flags; 1725 1726 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1727 if (ioc->ir_firmware) 1728 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, 1729 &ioc->manu_pg10); 1730 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1731 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1732 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1733 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1734 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1735 _base_display_ioc_capabilities(ioc); 1736 1737 /* 1738 * Enable task_set_full handling in iounit_pg1 when the 1739 * facts capabilities indicate that its supported. 1740 */ 1741 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1742 if ((ioc->facts.IOCCapabilities & 1743 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1744 iounit_pg1_flags &= 1745 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1746 else 1747 iounit_pg1_flags |= 1748 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1749 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1750 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1751} 1752 1753/** 1754 * _base_release_memory_pools - release memory 1755 * @ioc: per adapter object 1756 * 1757 * Free memory allocated from _base_allocate_memory_pools. 1758 * 1759 * Return nothing. 1760 */ 1761static void 1762_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1763{ 1764 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1765 __func__)); 1766 1767 if (ioc->request) { 1768 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1769 ioc->request, ioc->request_dma); 1770 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1771 ": free\n", ioc->name, ioc->request)); 1772 ioc->request = NULL; 1773 } 1774 1775 if (ioc->sense) { 1776 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1777 if (ioc->sense_dma_pool) 1778 pci_pool_destroy(ioc->sense_dma_pool); 1779 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1780 ": free\n", ioc->name, ioc->sense)); 1781 ioc->sense = NULL; 1782 } 1783 1784 if (ioc->reply) { 1785 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1786 if (ioc->reply_dma_pool) 1787 pci_pool_destroy(ioc->reply_dma_pool); 1788 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1789 ": free\n", ioc->name, ioc->reply)); 1790 ioc->reply = NULL; 1791 } 1792 1793 if (ioc->reply_free) { 1794 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1795 ioc->reply_free_dma); 1796 if (ioc->reply_free_dma_pool) 1797 pci_pool_destroy(ioc->reply_free_dma_pool); 1798 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1799 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1800 ioc->reply_free = NULL; 1801 } 1802 1803 if (ioc->reply_post_free) { 1804 pci_pool_free(ioc->reply_post_free_dma_pool, 1805 ioc->reply_post_free, ioc->reply_post_free_dma); 1806 if (ioc->reply_post_free_dma_pool) 1807 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1808 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1809 "reply_post_free_pool(0x%p): free\n", ioc->name, 1810 ioc->reply_post_free)); 1811 ioc->reply_post_free = NULL; 1812 } 1813 1814 if (ioc->config_page) { 1815 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1816 "config_page(0x%p): free\n", ioc->name, 1817 ioc->config_page)); 1818 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1819 ioc->config_page, ioc->config_page_dma); 1820 } 1821 1822 kfree(ioc->scsi_lookup); 1823 kfree(ioc->hpr_lookup); 1824 kfree(ioc->internal_lookup); 1825} 1826 1827 1828/** 1829 * _base_allocate_memory_pools - allocate start of day memory pools 1830 * @ioc: per adapter object 1831 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1832 * 1833 * Returns 0 success, anything else error 1834 */ 1835static int 1836_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1837{ 1838 Mpi2IOCFactsReply_t *facts; 1839 u32 queue_size, queue_diff; 1840 u16 max_sge_elements; 1841 u16 num_of_reply_frames; 1842 u16 chains_needed_per_io; 1843 u32 sz, total_sz; 1844 u32 retry_sz; 1845 u16 max_request_credit; 1846 1847 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1848 __func__)); 1849 1850 retry_sz = 0; 1851 facts = &ioc->facts; 1852 1853 /* command line tunables for max sgl entries */ 1854 if (max_sgl_entries != -1) { 1855 ioc->shost->sg_tablesize = (max_sgl_entries < 1856 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1857 MPT2SAS_SG_DEPTH; 1858 } else { 1859 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1860 } 1861 1862 /* command line tunables for max controller queue depth */ 1863 if (max_queue_depth != -1) { 1864 max_request_credit = (max_queue_depth < facts->RequestCredit) 1865 ? max_queue_depth : facts->RequestCredit; 1866 } else { 1867 max_request_credit = (facts->RequestCredit > 1868 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1869 facts->RequestCredit; 1870 } 1871 1872 ioc->hba_queue_depth = max_request_credit; 1873 ioc->hi_priority_depth = facts->HighPriorityCredit; 1874 ioc->internal_depth = ioc->hi_priority_depth + 5; 1875 1876 /* request frame size */ 1877 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1878 1879 /* reply frame size */ 1880 ioc->reply_sz = facts->ReplyFrameSize * 4; 1881 1882 retry_allocation: 1883 total_sz = 0; 1884 /* calculate number of sg elements left over in the 1st frame */ 1885 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1886 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1887 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1888 1889 /* now do the same for a chain buffer */ 1890 max_sge_elements = ioc->request_sz - ioc->sge_size; 1891 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1892 1893 ioc->chain_offset_value_for_main_message = 1894 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1895 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1896 1897 /* 1898 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1899 */ 1900 chains_needed_per_io = ((ioc->shost->sg_tablesize - 1901 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 1902 + 1; 1903 if (chains_needed_per_io > facts->MaxChainDepth) { 1904 chains_needed_per_io = facts->MaxChainDepth; 1905 ioc->shost->sg_tablesize = min_t(u16, 1906 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 1907 * chains_needed_per_io), ioc->shost->sg_tablesize); 1908 } 1909 ioc->chains_needed_per_io = chains_needed_per_io; 1910 1911 /* reply free queue sizing - taking into account for events */ 1912 num_of_reply_frames = ioc->hba_queue_depth + 32; 1913 1914 /* number of replies frames can't be a multiple of 16 */ 1915 /* decrease number of reply frames by 1 */ 1916 if (!(num_of_reply_frames % 16)) 1917 num_of_reply_frames--; 1918 1919 /* calculate number of reply free queue entries 1920 * (must be multiple of 16) 1921 */ 1922 1923 /* (we know reply_free_queue_depth is not a multiple of 16) */ 1924 queue_size = num_of_reply_frames; 1925 queue_size += 16 - (queue_size % 16); 1926 ioc->reply_free_queue_depth = queue_size; 1927 1928 /* reply descriptor post queue sizing */ 1929 /* this size should be the number of request frames + number of reply 1930 * frames 1931 */ 1932 1933 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1; 1934 /* round up to 16 byte boundary */ 1935 if (queue_size % 16) 1936 queue_size += 16 - (queue_size % 16); 1937 1938 /* check against IOC maximum reply post queue depth */ 1939 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 1940 queue_diff = queue_size - 1941 facts->MaxReplyDescriptorPostQueueDepth; 1942 1943 /* round queue_diff up to multiple of 16 */ 1944 if (queue_diff % 16) 1945 queue_diff += 16 - (queue_diff % 16); 1946 1947 /* adjust hba_queue_depth, reply_free_queue_depth, 1948 * and queue_size 1949 */ 1950 ioc->hba_queue_depth -= queue_diff; 1951 ioc->reply_free_queue_depth -= queue_diff; 1952 queue_size -= queue_diff; 1953 } 1954 ioc->reply_post_queue_depth = queue_size; 1955 1956 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 1957 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 1958 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 1959 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 1960 ioc->chains_needed_per_io)); 1961 1962 ioc->scsiio_depth = ioc->hba_queue_depth - 1963 ioc->hi_priority_depth - ioc->internal_depth; 1964 1965 /* set the scsi host can_queue depth 1966 * with some internal commands that could be outstanding 1967 */ 1968 ioc->shost->can_queue = ioc->scsiio_depth - (2); 1969 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: " 1970 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue)); 1971 1972 /* contiguous pool for request and chains, 16 byte align, one extra " 1973 * "frame for smid=0 1974 */ 1975 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; 1976 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz); 1977 1978 /* hi-priority queue */ 1979 sz += (ioc->hi_priority_depth * ioc->request_sz); 1980 1981 /* internal queue */ 1982 sz += (ioc->internal_depth * ioc->request_sz); 1983 1984 ioc->request_dma_sz = sz; 1985 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 1986 if (!ioc->request) { 1987 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1988 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 1989 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth, 1990 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1991 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH) 1992 goto out; 1993 retry_sz += 64; 1994 ioc->hba_queue_depth = max_request_credit - retry_sz; 1995 goto retry_allocation; 1996 } 1997 1998 if (retry_sz) 1999 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2000 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2001 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth, 2002 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2003 2004 2005 /* hi-priority queue */ 2006 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * 2007 ioc->request_sz); 2008 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * 2009 ioc->request_sz); 2010 2011 /* internal queue */ 2012 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * 2013 ioc->request_sz); 2014 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * 2015 ioc->request_sz); 2016 2017 ioc->chain = ioc->internal + (ioc->internal_depth * 2018 ioc->request_sz); 2019 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth * 2020 ioc->request_sz); 2021 2022 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 2023 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2024 ioc->request, ioc->hba_queue_depth, ioc->request_sz, 2025 (ioc->hba_queue_depth * ioc->request_sz)/1024)); 2026 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 2027 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 2028 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 2029 ioc->request_sz))/1024)); 2030 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 2031 ioc->name, (unsigned long long) ioc->request_dma)); 2032 total_sz += sz; 2033 2034 ioc->scsi_lookup = kcalloc(ioc->scsiio_depth, 2035 sizeof(struct request_tracker), GFP_KERNEL); 2036 if (!ioc->scsi_lookup) { 2037 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n", 2038 ioc->name); 2039 goto out; 2040 } 2041 2042 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): " 2043 "depth(%d)\n", ioc->name, ioc->request, 2044 ioc->scsiio_depth)); 2045 2046 /* initialize hi-priority queue smid's */ 2047 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, 2048 sizeof(struct request_tracker), GFP_KERNEL); 2049 if (!ioc->hpr_lookup) { 2050 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n", 2051 ioc->name); 2052 goto out; 2053 } 2054 ioc->hi_priority_smid = ioc->scsiio_depth + 1; 2055 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): " 2056 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority, 2057 ioc->hi_priority_depth, ioc->hi_priority_smid)); 2058 2059 /* initialize internal queue smid's */ 2060 ioc->internal_lookup = kcalloc(ioc->internal_depth, 2061 sizeof(struct request_tracker), GFP_KERNEL); 2062 if (!ioc->internal_lookup) { 2063 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n", 2064 ioc->name); 2065 goto out; 2066 } 2067 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; 2068 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): " 2069 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal, 2070 ioc->internal_depth, ioc->internal_smid)); 2071 2072 /* sense buffers, 4 byte align */ 2073 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; 2074 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 2075 0); 2076 if (!ioc->sense_dma_pool) { 2077 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 2078 ioc->name); 2079 goto out; 2080 } 2081 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 2082 &ioc->sense_dma); 2083 if (!ioc->sense) { 2084 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 2085 ioc->name); 2086 goto out; 2087 } 2088 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2089 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 2090 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth, 2091 SCSI_SENSE_BUFFERSIZE, sz/1024)); 2092 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 2093 ioc->name, (unsigned long long)ioc->sense_dma)); 2094 total_sz += sz; 2095 2096 /* reply pool, 4 byte align */ 2097 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 2098 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 2099 0); 2100 if (!ioc->reply_dma_pool) { 2101 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 2102 ioc->name); 2103 goto out; 2104 } 2105 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 2106 &ioc->reply_dma); 2107 if (!ioc->reply) { 2108 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 2109 ioc->name); 2110 goto out; 2111 } 2112 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 2113 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 2114 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 2115 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 2116 ioc->name, (unsigned long long)ioc->reply_dma)); 2117 total_sz += sz; 2118 2119 /* reply free queue, 16 byte align */ 2120 sz = ioc->reply_free_queue_depth * 4; 2121 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 2122 ioc->pdev, sz, 16, 0); 2123 if (!ioc->reply_free_dma_pool) { 2124 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 2125 "failed\n", ioc->name); 2126 goto out; 2127 } 2128 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 2129 &ioc->reply_free_dma); 2130 if (!ioc->reply_free) { 2131 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 2132 "failed\n", ioc->name); 2133 goto out; 2134 } 2135 memset(ioc->reply_free, 0, sz); 2136 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 2137 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 2138 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 2139 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 2140 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 2141 total_sz += sz; 2142 2143 /* reply post queue, 16 byte align */ 2144 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 2145 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 2146 ioc->pdev, sz, 16, 0); 2147 if (!ioc->reply_post_free_dma_pool) { 2148 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 2149 "failed\n", ioc->name); 2150 goto out; 2151 } 2152 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 2153 GFP_KERNEL, &ioc->reply_post_free_dma); 2154 if (!ioc->reply_post_free) { 2155 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2156 "failed\n", ioc->name); 2157 goto out; 2158 } 2159 memset(ioc->reply_post_free, 0, sz); 2160 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2161 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2162 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2163 sz/1024)); 2164 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2165 "(0x%llx)\n", ioc->name, (unsigned long long) 2166 ioc->reply_post_free_dma)); 2167 total_sz += sz; 2168 2169 ioc->config_page_sz = 512; 2170 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2171 ioc->config_page_sz, &ioc->config_page_dma); 2172 if (!ioc->config_page) { 2173 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2174 "failed\n", ioc->name); 2175 goto out; 2176 } 2177 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2178 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2179 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2180 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2181 total_sz += ioc->config_page_sz; 2182 2183 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2184 ioc->name, total_sz/1024); 2185 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2186 "Max Controller Queue Depth(%d)\n", 2187 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2188 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2189 ioc->name, ioc->shost->sg_tablesize); 2190 return 0; 2191 2192 out: 2193 _base_release_memory_pools(ioc); 2194 return -ENOMEM; 2195} 2196 2197 2198/** 2199 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2200 * @ioc: Pointer to MPT_ADAPTER structure 2201 * @cooked: Request raw or cooked IOC state 2202 * 2203 * Returns all IOC Doorbell register bits if cooked==0, else just the 2204 * Doorbell bits in MPI_IOC_STATE_MASK. 2205 */ 2206u32 2207mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2208{ 2209 u32 s, sc; 2210 2211 s = readl(&ioc->chip->Doorbell); 2212 sc = s & MPI2_IOC_STATE_MASK; 2213 return cooked ? sc : s; 2214} 2215 2216/** 2217 * _base_wait_on_iocstate - waiting on a particular ioc state 2218 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2219 * @timeout: timeout in second 2220 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2221 * 2222 * Returns 0 for success, non-zero for failure. 2223 */ 2224static int 2225_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2226 int sleep_flag) 2227{ 2228 u32 count, cntdn; 2229 u32 current_state; 2230 2231 count = 0; 2232 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2233 do { 2234 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2235 if (current_state == ioc_state) 2236 return 0; 2237 if (count && current_state == MPI2_IOC_STATE_FAULT) 2238 break; 2239 if (sleep_flag == CAN_SLEEP) 2240 msleep(1); 2241 else 2242 udelay(500); 2243 count++; 2244 } while (--cntdn); 2245 2246 return current_state; 2247} 2248 2249/** 2250 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2251 * a write to the doorbell) 2252 * @ioc: per adapter object 2253 * @timeout: timeout in second 2254 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2255 * 2256 * Returns 0 for success, non-zero for failure. 2257 * 2258 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2259 */ 2260static int 2261_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2262 int sleep_flag) 2263{ 2264 u32 cntdn, count; 2265 u32 int_status; 2266 2267 count = 0; 2268 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2269 do { 2270 int_status = readl(&ioc->chip->HostInterruptStatus); 2271 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2272 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2273 "successfull count(%d), timeout(%d)\n", ioc->name, 2274 __func__, count, timeout)); 2275 return 0; 2276 } 2277 if (sleep_flag == CAN_SLEEP) 2278 msleep(1); 2279 else 2280 udelay(500); 2281 count++; 2282 } while (--cntdn); 2283 2284 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2285 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2286 return -EFAULT; 2287} 2288 2289/** 2290 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2291 * @ioc: per adapter object 2292 * @timeout: timeout in second 2293 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2294 * 2295 * Returns 0 for success, non-zero for failure. 2296 * 2297 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2298 * doorbell. 2299 */ 2300static int 2301_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2302 int sleep_flag) 2303{ 2304 u32 cntdn, count; 2305 u32 int_status; 2306 u32 doorbell; 2307 2308 count = 0; 2309 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2310 do { 2311 int_status = readl(&ioc->chip->HostInterruptStatus); 2312 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2313 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2314 "successfull count(%d), timeout(%d)\n", ioc->name, 2315 __func__, count, timeout)); 2316 return 0; 2317 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2318 doorbell = readl(&ioc->chip->Doorbell); 2319 if ((doorbell & MPI2_IOC_STATE_MASK) == 2320 MPI2_IOC_STATE_FAULT) { 2321 mpt2sas_base_fault_info(ioc , doorbell); 2322 return -EFAULT; 2323 } 2324 } else if (int_status == 0xFFFFFFFF) 2325 goto out; 2326 2327 if (sleep_flag == CAN_SLEEP) 2328 msleep(1); 2329 else 2330 udelay(500); 2331 count++; 2332 } while (--cntdn); 2333 2334 out: 2335 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2336 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2337 return -EFAULT; 2338} 2339 2340/** 2341 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2342 * @ioc: per adapter object 2343 * @timeout: timeout in second 2344 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2345 * 2346 * Returns 0 for success, non-zero for failure. 2347 * 2348 */ 2349static int 2350_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2351 int sleep_flag) 2352{ 2353 u32 cntdn, count; 2354 u32 doorbell_reg; 2355 2356 count = 0; 2357 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2358 do { 2359 doorbell_reg = readl(&ioc->chip->Doorbell); 2360 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2361 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2362 "successfull count(%d), timeout(%d)\n", ioc->name, 2363 __func__, count, timeout)); 2364 return 0; 2365 } 2366 if (sleep_flag == CAN_SLEEP) 2367 msleep(1); 2368 else 2369 udelay(500); 2370 count++; 2371 } while (--cntdn); 2372 2373 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2374 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2375 return -EFAULT; 2376} 2377 2378/** 2379 * _base_send_ioc_reset - send doorbell reset 2380 * @ioc: per adapter object 2381 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2382 * @timeout: timeout in second 2383 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2384 * 2385 * Returns 0 for success, non-zero for failure. 2386 */ 2387static int 2388_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2389 int sleep_flag) 2390{ 2391 u32 ioc_state; 2392 int r = 0; 2393 2394 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2395 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2396 ioc->name, __func__); 2397 return -EFAULT; 2398 } 2399 2400 if (!(ioc->facts.IOCCapabilities & 2401 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2402 return -EFAULT; 2403 2404 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2405 2406 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2407 &ioc->chip->Doorbell); 2408 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2409 r = -EFAULT; 2410 goto out; 2411 } 2412 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2413 timeout, sleep_flag); 2414 if (ioc_state) { 2415 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2416 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2417 r = -EFAULT; 2418 goto out; 2419 } 2420 out: 2421 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2422 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2423 return r; 2424} 2425 2426/** 2427 * _base_handshake_req_reply_wait - send request thru doorbell interface 2428 * @ioc: per adapter object 2429 * @request_bytes: request length 2430 * @request: pointer having request payload 2431 * @reply_bytes: reply length 2432 * @reply: pointer to reply payload 2433 * @timeout: timeout in second 2434 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2435 * 2436 * Returns 0 for success, non-zero for failure. 2437 */ 2438static int 2439_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2440 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2441{ 2442 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2443 int i; 2444 u8 failed; 2445 u16 dummy; 2446 u32 *mfp; 2447 2448 /* make sure doorbell is not in use */ 2449 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2450 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2451 " (line=%d)\n", ioc->name, __LINE__); 2452 return -EFAULT; 2453 } 2454 2455 /* clear pending doorbell interrupts from previous state changes */ 2456 if (readl(&ioc->chip->HostInterruptStatus) & 2457 MPI2_HIS_IOC2SYS_DB_STATUS) 2458 writel(0, &ioc->chip->HostInterruptStatus); 2459 2460 /* send message to ioc */ 2461 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2462 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2463 &ioc->chip->Doorbell); 2464 2465 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) { 2466 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2467 "int failed (line=%d)\n", ioc->name, __LINE__); 2468 return -EFAULT; 2469 } 2470 writel(0, &ioc->chip->HostInterruptStatus); 2471 2472 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2473 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2474 "ack failed (line=%d)\n", ioc->name, __LINE__); 2475 return -EFAULT; 2476 } 2477 2478 /* send message 32-bits at a time */ 2479 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2480 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2481 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2482 failed = 1; 2483 } 2484 2485 if (failed) { 2486 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2487 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2488 return -EFAULT; 2489 } 2490 2491 /* now wait for the reply */ 2492 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2493 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2494 "int failed (line=%d)\n", ioc->name, __LINE__); 2495 return -EFAULT; 2496 } 2497 2498 /* read the first two 16-bits, it gives the total length of the reply */ 2499 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2500 & MPI2_DOORBELL_DATA_MASK); 2501 writel(0, &ioc->chip->HostInterruptStatus); 2502 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2503 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2504 "int failed (line=%d)\n", ioc->name, __LINE__); 2505 return -EFAULT; 2506 } 2507 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2508 & MPI2_DOORBELL_DATA_MASK); 2509 writel(0, &ioc->chip->HostInterruptStatus); 2510 2511 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2512 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2513 printk(MPT2SAS_ERR_FMT "doorbell " 2514 "handshake int failed (line=%d)\n", ioc->name, 2515 __LINE__); 2516 return -EFAULT; 2517 } 2518 if (i >= reply_bytes/2) /* overflow case */ 2519 dummy = readl(&ioc->chip->Doorbell); 2520 else 2521 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2522 & MPI2_DOORBELL_DATA_MASK); 2523 writel(0, &ioc->chip->HostInterruptStatus); 2524 } 2525 2526 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2527 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2528 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2529 " (line=%d)\n", ioc->name, __LINE__)); 2530 } 2531 writel(0, &ioc->chip->HostInterruptStatus); 2532 2533 if (ioc->logging_level & MPT_DEBUG_INIT) { 2534 mfp = (u32 *)reply; 2535 printk(KERN_DEBUG "\toffset:data\n"); 2536 for (i = 0; i < reply_bytes/4; i++) 2537 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2538 le32_to_cpu(mfp[i])); 2539 } 2540 return 0; 2541} 2542 2543/** 2544 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2545 * @ioc: per adapter object 2546 * @mpi_reply: the reply payload from FW 2547 * @mpi_request: the request payload sent to FW 2548 * 2549 * The SAS IO Unit Control Request message allows the host to perform low-level 2550 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2551 * to obtain the IOC assigned device handles for a device if it has other 2552 * identifying information about the device, in addition allows the host to 2553 * remove IOC resources associated with the device. 2554 * 2555 * Returns 0 for success, non-zero for failure. 2556 */ 2557int 2558mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2559 Mpi2SasIoUnitControlReply_t *mpi_reply, 2560 Mpi2SasIoUnitControlRequest_t *mpi_request) 2561{ 2562 u16 smid; 2563 u32 ioc_state; 2564 unsigned long timeleft; 2565 u8 issue_reset; 2566 int rc; 2567 void *request; 2568 u16 wait_state_count; 2569 2570 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2571 __func__)); 2572 2573 mutex_lock(&ioc->base_cmds.mutex); 2574 2575 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2576 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2577 ioc->name, __func__); 2578 rc = -EAGAIN; 2579 goto out; 2580 } 2581 2582 wait_state_count = 0; 2583 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2584 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2585 if (wait_state_count++ == 10) { 2586 printk(MPT2SAS_ERR_FMT 2587 "%s: failed due to ioc not operational\n", 2588 ioc->name, __func__); 2589 rc = -EFAULT; 2590 goto out; 2591 } 2592 ssleep(1); 2593 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2594 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2595 "operational state(count=%d)\n", ioc->name, 2596 __func__, wait_state_count); 2597 } 2598 2599 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2600 if (!smid) { 2601 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2602 ioc->name, __func__); 2603 rc = -EAGAIN; 2604 goto out; 2605 } 2606 2607 rc = 0; 2608 ioc->base_cmds.status = MPT2_CMD_PENDING; 2609 request = mpt2sas_base_get_msg_frame(ioc, smid); 2610 ioc->base_cmds.smid = smid; 2611 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2612 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2613 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2614 ioc->ioc_link_reset_in_progress = 1; 2615 mpt2sas_base_put_smid_default(ioc, smid); 2616 init_completion(&ioc->base_cmds.done); 2617 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2618 msecs_to_jiffies(10000)); 2619 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2620 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2621 ioc->ioc_link_reset_in_progress) 2622 ioc->ioc_link_reset_in_progress = 0; 2623 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2624 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2625 ioc->name, __func__); 2626 _debug_dump_mf(mpi_request, 2627 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2628 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2629 issue_reset = 1; 2630 goto issue_host_reset; 2631 } 2632 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2633 memcpy(mpi_reply, ioc->base_cmds.reply, 2634 sizeof(Mpi2SasIoUnitControlReply_t)); 2635 else 2636 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2637 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2638 goto out; 2639 2640 issue_host_reset: 2641 if (issue_reset) 2642 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2643 FORCE_BIG_HAMMER); 2644 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2645 rc = -EFAULT; 2646 out: 2647 mutex_unlock(&ioc->base_cmds.mutex); 2648 return rc; 2649} 2650 2651 2652/** 2653 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2654 * @ioc: per adapter object 2655 * @mpi_reply: the reply payload from FW 2656 * @mpi_request: the request payload sent to FW 2657 * 2658 * The SCSI Enclosure Processor request message causes the IOC to 2659 * communicate with SES devices to control LED status signals. 2660 * 2661 * Returns 0 for success, non-zero for failure. 2662 */ 2663int 2664mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2665 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2666{ 2667 u16 smid; 2668 u32 ioc_state; 2669 unsigned long timeleft; 2670 u8 issue_reset; 2671 int rc; 2672 void *request; 2673 u16 wait_state_count; 2674 2675 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2676 __func__)); 2677 2678 mutex_lock(&ioc->base_cmds.mutex); 2679 2680 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2681 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2682 ioc->name, __func__); 2683 rc = -EAGAIN; 2684 goto out; 2685 } 2686 2687 wait_state_count = 0; 2688 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2689 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2690 if (wait_state_count++ == 10) { 2691 printk(MPT2SAS_ERR_FMT 2692 "%s: failed due to ioc not operational\n", 2693 ioc->name, __func__); 2694 rc = -EFAULT; 2695 goto out; 2696 } 2697 ssleep(1); 2698 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2699 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2700 "operational state(count=%d)\n", ioc->name, 2701 __func__, wait_state_count); 2702 } 2703 2704 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2705 if (!smid) { 2706 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2707 ioc->name, __func__); 2708 rc = -EAGAIN; 2709 goto out; 2710 } 2711 2712 rc = 0; 2713 ioc->base_cmds.status = MPT2_CMD_PENDING; 2714 request = mpt2sas_base_get_msg_frame(ioc, smid); 2715 ioc->base_cmds.smid = smid; 2716 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2717 mpt2sas_base_put_smid_default(ioc, smid); 2718 init_completion(&ioc->base_cmds.done); 2719 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2720 msecs_to_jiffies(10000)); 2721 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2722 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2723 ioc->name, __func__); 2724 _debug_dump_mf(mpi_request, 2725 sizeof(Mpi2SepRequest_t)/4); 2726 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2727 issue_reset = 1; 2728 goto issue_host_reset; 2729 } 2730 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2731 memcpy(mpi_reply, ioc->base_cmds.reply, 2732 sizeof(Mpi2SepReply_t)); 2733 else 2734 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2735 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2736 goto out; 2737 2738 issue_host_reset: 2739 if (issue_reset) 2740 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2741 FORCE_BIG_HAMMER); 2742 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2743 rc = -EFAULT; 2744 out: 2745 mutex_unlock(&ioc->base_cmds.mutex); 2746 return rc; 2747} 2748 2749/** 2750 * _base_get_port_facts - obtain port facts reply and save in ioc 2751 * @ioc: per adapter object 2752 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2753 * 2754 * Returns 0 for success, non-zero for failure. 2755 */ 2756static int 2757_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2758{ 2759 Mpi2PortFactsRequest_t mpi_request; 2760 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2761 int mpi_reply_sz, mpi_request_sz, r; 2762 2763 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2764 __func__)); 2765 2766 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2767 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2768 memset(&mpi_request, 0, mpi_request_sz); 2769 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2770 mpi_request.PortNumber = port; 2771 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2772 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2773 2774 if (r != 0) { 2775 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2776 ioc->name, __func__, r); 2777 return r; 2778 } 2779 2780 pfacts = &ioc->pfacts[port]; 2781 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2782 pfacts->PortNumber = mpi_reply.PortNumber; 2783 pfacts->VP_ID = mpi_reply.VP_ID; 2784 pfacts->VF_ID = mpi_reply.VF_ID; 2785 pfacts->MaxPostedCmdBuffers = 2786 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2787 2788 return 0; 2789} 2790 2791/** 2792 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2793 * @ioc: per adapter object 2794 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2795 * 2796 * Returns 0 for success, non-zero for failure. 2797 */ 2798static int 2799_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2800{ 2801 Mpi2IOCFactsRequest_t mpi_request; 2802 Mpi2IOCFactsReply_t mpi_reply, *facts; 2803 int mpi_reply_sz, mpi_request_sz, r; 2804 2805 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2806 __func__)); 2807 2808 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2809 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2810 memset(&mpi_request, 0, mpi_request_sz); 2811 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2812 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2813 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2814 2815 if (r != 0) { 2816 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2817 ioc->name, __func__, r); 2818 return r; 2819 } 2820 2821 facts = &ioc->facts; 2822 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2823 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2824 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2825 facts->VP_ID = mpi_reply.VP_ID; 2826 facts->VF_ID = mpi_reply.VF_ID; 2827 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2828 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2829 facts->WhoInit = mpi_reply.WhoInit; 2830 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2831 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2832 facts->MaxReplyDescriptorPostQueueDepth = 2833 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2834 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2835 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2836 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2837 ioc->ir_firmware = 1; 2838 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2839 facts->IOCRequestFrameSize = 2840 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2841 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2842 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2843 ioc->shost->max_id = -1; 2844 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2845 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2846 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2847 facts->HighPriorityCredit = 2848 le16_to_cpu(mpi_reply.HighPriorityCredit); 2849 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2850 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2851 2852 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2853 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2854 facts->MaxChainDepth)); 2855 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2856 "reply frame size(%d)\n", ioc->name, 2857 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2858 return 0; 2859} 2860 2861/** 2862 * _base_send_ioc_init - send ioc_init to firmware 2863 * @ioc: per adapter object 2864 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2865 * 2866 * Returns 0 for success, non-zero for failure. 2867 */ 2868static int 2869_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2870{ 2871 Mpi2IOCInitRequest_t mpi_request; 2872 Mpi2IOCInitReply_t mpi_reply; 2873 int r; 2874 2875 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2876 __func__)); 2877 2878 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2879 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2880 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2881 mpi_request.VF_ID = 0; /* TODO */ 2882 mpi_request.VP_ID = 0; 2883 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2884 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2885 2886 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2887 * removed and made reserved. For those with older firmware will need 2888 * this fix. It was decided that the Reply and Request frame sizes are 2889 * the same. 2890 */ 2891 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2892 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2893/* mpi_request.SystemReplyFrameSize = 2894 * cpu_to_le16(ioc->reply_sz); 2895 */ 2896 } 2897 2898 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 2899 mpi_request.ReplyDescriptorPostQueueDepth = 2900 cpu_to_le16(ioc->reply_post_queue_depth); 2901 mpi_request.ReplyFreeQueueDepth = 2902 cpu_to_le16(ioc->reply_free_queue_depth); 2903 2904#if BITS_PER_LONG > 32 2905 mpi_request.SenseBufferAddressHigh = 2906 cpu_to_le32(ioc->sense_dma >> 32); 2907 mpi_request.SystemReplyAddressHigh = 2908 cpu_to_le32(ioc->reply_dma >> 32); 2909 mpi_request.SystemRequestFrameBaseAddress = 2910 cpu_to_le64(ioc->request_dma); 2911 mpi_request.ReplyFreeQueueAddress = 2912 cpu_to_le64(ioc->reply_free_dma); 2913 mpi_request.ReplyDescriptorPostQueueAddress = 2914 cpu_to_le64(ioc->reply_post_free_dma); 2915#else 2916 mpi_request.SystemRequestFrameBaseAddress = 2917 cpu_to_le32(ioc->request_dma); 2918 mpi_request.ReplyFreeQueueAddress = 2919 cpu_to_le32(ioc->reply_free_dma); 2920 mpi_request.ReplyDescriptorPostQueueAddress = 2921 cpu_to_le32(ioc->reply_post_free_dma); 2922#endif 2923 2924 if (ioc->logging_level & MPT_DEBUG_INIT) { 2925 u32 *mfp; 2926 int i; 2927 2928 mfp = (u32 *)&mpi_request; 2929 printk(KERN_DEBUG "\toffset:data\n"); 2930 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 2931 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2932 le32_to_cpu(mfp[i])); 2933 } 2934 2935 r = _base_handshake_req_reply_wait(ioc, 2936 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 2937 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 2938 sleep_flag); 2939 2940 if (r != 0) { 2941 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2942 ioc->name, __func__, r); 2943 return r; 2944 } 2945 2946 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS || 2947 mpi_reply.IOCLogInfo) { 2948 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 2949 r = -EIO; 2950 } 2951 2952 return 0; 2953} 2954 2955/** 2956 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 2957 * @ioc: per adapter object 2958 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2959 * 2960 * Returns 0 for success, non-zero for failure. 2961 */ 2962static int 2963_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2964{ 2965 Mpi2PortEnableRequest_t *mpi_request; 2966 u32 ioc_state; 2967 unsigned long timeleft; 2968 int r = 0; 2969 u16 smid; 2970 2971 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 2972 2973 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2974 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2975 ioc->name, __func__); 2976 return -EAGAIN; 2977 } 2978 2979 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2980 if (!smid) { 2981 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2982 ioc->name, __func__); 2983 return -EAGAIN; 2984 } 2985 2986 ioc->base_cmds.status = MPT2_CMD_PENDING; 2987 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2988 ioc->base_cmds.smid = smid; 2989 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 2990 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 2991 mpi_request->VF_ID = 0; /* TODO */ 2992 mpi_request->VP_ID = 0; 2993 2994 mpt2sas_base_put_smid_default(ioc, smid); 2995 init_completion(&ioc->base_cmds.done); 2996 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2997 300*HZ); 2998 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2999 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3000 ioc->name, __func__); 3001 _debug_dump_mf(mpi_request, 3002 sizeof(Mpi2PortEnableRequest_t)/4); 3003 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3004 r = -EFAULT; 3005 else 3006 r = -ETIME; 3007 goto out; 3008 } else 3009 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3010 ioc->name, __func__)); 3011 3012 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 3013 60, sleep_flag); 3014 if (ioc_state) { 3015 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 3016 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3017 r = -EFAULT; 3018 } 3019 out: 3020 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3021 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 3022 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 3023 return r; 3024} 3025 3026/** 3027 * _base_unmask_events - turn on notification for this event 3028 * @ioc: per adapter object 3029 * @event: firmware event 3030 * 3031 * The mask is stored in ioc->event_masks. 3032 */ 3033static void 3034_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 3035{ 3036 u32 desired_event; 3037 3038 if (event >= 128) 3039 return; 3040 3041 desired_event = (1 << (event % 32)); 3042 3043 if (event < 32) 3044 ioc->event_masks[0] &= ~desired_event; 3045 else if (event < 64) 3046 ioc->event_masks[1] &= ~desired_event; 3047 else if (event < 96) 3048 ioc->event_masks[2] &= ~desired_event; 3049 else if (event < 128) 3050 ioc->event_masks[3] &= ~desired_event; 3051} 3052 3053/** 3054 * _base_event_notification - send event notification 3055 * @ioc: per adapter object 3056 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3057 * 3058 * Returns 0 for success, non-zero for failure. 3059 */ 3060static int 3061_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3062{ 3063 Mpi2EventNotificationRequest_t *mpi_request; 3064 unsigned long timeleft; 3065 u16 smid; 3066 int r = 0; 3067 int i; 3068 3069 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3070 __func__)); 3071 3072 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3073 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3074 ioc->name, __func__); 3075 return -EAGAIN; 3076 } 3077 3078 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3079 if (!smid) { 3080 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3081 ioc->name, __func__); 3082 return -EAGAIN; 3083 } 3084 ioc->base_cmds.status = MPT2_CMD_PENDING; 3085 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3086 ioc->base_cmds.smid = smid; 3087 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 3088 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 3089 mpi_request->VF_ID = 0; /* TODO */ 3090 mpi_request->VP_ID = 0; 3091 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3092 mpi_request->EventMasks[i] = 3093 le32_to_cpu(ioc->event_masks[i]); 3094 mpt2sas_base_put_smid_default(ioc, smid); 3095 init_completion(&ioc->base_cmds.done); 3096 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 3097 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3098 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3099 ioc->name, __func__); 3100 _debug_dump_mf(mpi_request, 3101 sizeof(Mpi2EventNotificationRequest_t)/4); 3102 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3103 r = -EFAULT; 3104 else 3105 r = -ETIME; 3106 } else 3107 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3108 ioc->name, __func__)); 3109 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3110 return r; 3111} 3112 3113/** 3114 * mpt2sas_base_validate_event_type - validating event types 3115 * @ioc: per adapter object 3116 * @event: firmware event 3117 * 3118 * This will turn on firmware event notification when application 3119 * ask for that event. We don't mask events that are already enabled. 3120 */ 3121void 3122mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 3123{ 3124 int i, j; 3125 u32 event_mask, desired_event; 3126 u8 send_update_to_fw; 3127 3128 for (i = 0, send_update_to_fw = 0; i < 3129 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 3130 event_mask = ~event_type[i]; 3131 desired_event = 1; 3132 for (j = 0; j < 32; j++) { 3133 if (!(event_mask & desired_event) && 3134 (ioc->event_masks[i] & desired_event)) { 3135 ioc->event_masks[i] &= ~desired_event; 3136 send_update_to_fw = 1; 3137 } 3138 desired_event = (desired_event << 1); 3139 } 3140 } 3141 3142 if (!send_update_to_fw) 3143 return; 3144 3145 mutex_lock(&ioc->base_cmds.mutex); 3146 _base_event_notification(ioc, CAN_SLEEP); 3147 mutex_unlock(&ioc->base_cmds.mutex); 3148} 3149 3150/** 3151 * _base_diag_reset - the "big hammer" start of day reset 3152 * @ioc: per adapter object 3153 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3154 * 3155 * Returns 0 for success, non-zero for failure. 3156 */ 3157static int 3158_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3159{ 3160 u32 host_diagnostic; 3161 u32 ioc_state; 3162 u32 count; 3163 u32 hcb_size; 3164 3165 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3166 3167 _base_save_msix_table(ioc); 3168 3169 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 3170 ioc->name)); 3171 3172 count = 0; 3173 do { 3174 /* Write magic sequence to WriteSequence register 3175 * Loop until in diagnostic mode 3176 */ 3177 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 3178 "sequence\n", ioc->name)); 3179 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3180 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3181 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3182 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3183 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3184 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3185 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3186 3187 /* wait 100 msec */ 3188 if (sleep_flag == CAN_SLEEP) 3189 msleep(100); 3190 else 3191 mdelay(100); 3192 3193 if (count++ > 20) 3194 goto out; 3195 3196 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3197 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 3198 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3199 ioc->name, count, host_diagnostic)); 3200 3201 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3202 3203 hcb_size = readl(&ioc->chip->HCBSize); 3204 3205 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 3206 ioc->name)); 3207 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3208 &ioc->chip->HostDiagnostic); 3209 3210 /* don't access any registers for 50 milliseconds */ 3211 msleep(50); 3212 3213 /* 300 second max wait */ 3214 for (count = 0; count < 3000000 ; count++) { 3215 3216 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3217 3218 if (host_diagnostic == 0xFFFFFFFF) 3219 goto out; 3220 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3221 break; 3222 3223 /* wait 100 msec */ 3224 if (sleep_flag == CAN_SLEEP) 3225 msleep(1); 3226 else 3227 mdelay(1); 3228 } 3229 3230 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3231 3232 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3233 "assuming the HCB Address points to good F/W\n", 3234 ioc->name)); 3235 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3236 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3237 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3238 3239 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3240 "re-enable the HCDW\n", ioc->name)); 3241 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3242 &ioc->chip->HCBSize); 3243 } 3244 3245 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3246 ioc->name)); 3247 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3248 &ioc->chip->HostDiagnostic); 3249 3250 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3251 "diagnostic register\n", ioc->name)); 3252 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3253 3254 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3255 "READY state\n", ioc->name)); 3256 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3257 sleep_flag); 3258 if (ioc_state) { 3259 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3260 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3261 goto out; 3262 } 3263 3264 _base_restore_msix_table(ioc); 3265 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3266 return 0; 3267 3268 out: 3269 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3270 return -EFAULT; 3271} 3272 3273/** 3274 * _base_make_ioc_ready - put controller in READY state 3275 * @ioc: per adapter object 3276 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3277 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3278 * 3279 * Returns 0 for success, non-zero for failure. 3280 */ 3281static int 3282_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3283 enum reset_type type) 3284{ 3285 u32 ioc_state; 3286 3287 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3288 __func__)); 3289 3290 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3291 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3292 ioc->name, __func__, ioc_state)); 3293 3294 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3295 return 0; 3296 3297 if (ioc_state & MPI2_DOORBELL_USED) { 3298 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3299 "active!\n", ioc->name)); 3300 goto issue_diag_reset; 3301 } 3302 3303 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3304 mpt2sas_base_fault_info(ioc, ioc_state & 3305 MPI2_DOORBELL_DATA_MASK); 3306 goto issue_diag_reset; 3307 } 3308 3309 if (type == FORCE_BIG_HAMMER) 3310 goto issue_diag_reset; 3311 3312 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3313 if (!(_base_send_ioc_reset(ioc, 3314 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3315 return 0; 3316 3317 issue_diag_reset: 3318 return _base_diag_reset(ioc, CAN_SLEEP); 3319} 3320 3321/** 3322 * _base_make_ioc_operational - put controller in OPERATIONAL state 3323 * @ioc: per adapter object 3324 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3325 * 3326 * Returns 0 for success, non-zero for failure. 3327 */ 3328static int 3329_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3330{ 3331 int r, i; 3332 unsigned long flags; 3333 u32 reply_address; 3334 u16 smid; 3335 struct _tr_list *delayed_tr, *delayed_tr_next; 3336 3337 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3338 __func__)); 3339 3340 /* clean the delayed target reset list */ 3341 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 3342 &ioc->delayed_tr_list, list) { 3343 list_del(&delayed_tr->list); 3344 kfree(delayed_tr); 3345 } 3346 3347 /* initialize the scsi lookup free list */ 3348 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3349 INIT_LIST_HEAD(&ioc->free_list); 3350 smid = 1; 3351 for (i = 0; i < ioc->scsiio_depth; i++, smid++) { 3352 ioc->scsi_lookup[i].cb_idx = 0xFF; 3353 ioc->scsi_lookup[i].smid = smid; 3354 ioc->scsi_lookup[i].scmd = NULL; 3355 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3356 &ioc->free_list); 3357 } 3358 3359 /* hi-priority queue */ 3360 INIT_LIST_HEAD(&ioc->hpr_free_list); 3361 smid = ioc->hi_priority_smid; 3362 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { 3363 ioc->hpr_lookup[i].cb_idx = 0xFF; 3364 ioc->hpr_lookup[i].smid = smid; 3365 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 3366 &ioc->hpr_free_list); 3367 } 3368 3369 /* internal queue */ 3370 INIT_LIST_HEAD(&ioc->internal_free_list); 3371 smid = ioc->internal_smid; 3372 for (i = 0; i < ioc->internal_depth; i++, smid++) { 3373 ioc->internal_lookup[i].cb_idx = 0xFF; 3374 ioc->internal_lookup[i].smid = smid; 3375 list_add_tail(&ioc->internal_lookup[i].tracker_list, 3376 &ioc->internal_free_list); 3377 } 3378 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3379 3380 /* initialize Reply Free Queue */ 3381 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3382 i < ioc->reply_free_queue_depth ; i++, reply_address += 3383 ioc->reply_sz) 3384 ioc->reply_free[i] = cpu_to_le32(reply_address); 3385 3386 /* initialize Reply Post Free Queue */ 3387 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3388 ioc->reply_post_free[i].Words = ULLONG_MAX; 3389 3390 r = _base_send_ioc_init(ioc, sleep_flag); 3391 if (r) 3392 return r; 3393 3394 /* initialize the index's */ 3395 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3396 ioc->reply_post_host_index = 0; 3397 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3398 writel(0, &ioc->chip->ReplyPostHostIndex); 3399 3400 _base_unmask_interrupts(ioc); 3401 r = _base_event_notification(ioc, sleep_flag); 3402 if (r) 3403 return r; 3404 3405 if (sleep_flag == CAN_SLEEP) 3406 _base_static_config_pages(ioc); 3407 3408 r = _base_send_port_enable(ioc, sleep_flag); 3409 if (r) 3410 return r; 3411 3412 return r; 3413} 3414 3415/** 3416 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3417 * @ioc: per adapter object 3418 * 3419 * Return nothing. 3420 */ 3421void 3422mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3423{ 3424 struct pci_dev *pdev = ioc->pdev; 3425 3426 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3427 __func__)); 3428 3429 _base_mask_interrupts(ioc); 3430 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3431 if (ioc->pci_irq) { 3432 synchronize_irq(pdev->irq); 3433 free_irq(ioc->pci_irq, ioc); 3434 } 3435 _base_disable_msix(ioc); 3436 if (ioc->chip_phys) 3437 iounmap(ioc->chip); 3438 ioc->pci_irq = -1; 3439 ioc->chip_phys = 0; 3440 pci_release_selected_regions(ioc->pdev, ioc->bars); 3441 pci_disable_device(pdev); 3442 return; 3443} 3444 3445/** 3446 * mpt2sas_base_attach - attach controller instance 3447 * @ioc: per adapter object 3448 * 3449 * Returns 0 for success, non-zero for failure. 3450 */ 3451int 3452mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3453{ 3454 int r, i; 3455 3456 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3457 __func__)); 3458 3459 r = mpt2sas_base_map_resources(ioc); 3460 if (r) 3461 return r; 3462 3463 pci_set_drvdata(ioc->pdev, ioc->shost); 3464 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3465 if (r) 3466 goto out_free_resources; 3467 3468 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3469 if (r) 3470 goto out_free_resources; 3471 3472 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3473 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3474 if (!ioc->pfacts) 3475 goto out_free_resources; 3476 3477 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3478 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3479 if (r) 3480 goto out_free_resources; 3481 } 3482 3483 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3484 if (r) 3485 goto out_free_resources; 3486 3487 init_waitqueue_head(&ioc->reset_wq); 3488 3489 /* base internal command bits */ 3490 mutex_init(&ioc->base_cmds.mutex); 3491 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3492 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3493 3494 /* transport internal command bits */ 3495 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3496 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3497 mutex_init(&ioc->transport_cmds.mutex); 3498 3499 /* task management internal command bits */ 3500 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3501 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3502 mutex_init(&ioc->tm_cmds.mutex); 3503 3504 /* config page internal command bits */ 3505 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3506 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3507 mutex_init(&ioc->config_cmds.mutex); 3508 3509 /* ctl module internal command bits */ 3510 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3511 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3512 mutex_init(&ioc->ctl_cmds.mutex); 3513 3514 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3515 ioc->event_masks[i] = -1; 3516 3517 /* here we enable the events we care about */ 3518 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3519 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3520 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3521 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3522 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3523 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3524 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3525 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3526 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3527 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3528 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3529 r = _base_make_ioc_operational(ioc, CAN_SLEEP); 3530 if (r) 3531 goto out_free_resources; 3532 3533 mpt2sas_base_start_watchdog(ioc); 3534 return 0; 3535 3536 out_free_resources: 3537 3538 ioc->remove_host = 1; 3539 mpt2sas_base_free_resources(ioc); 3540 _base_release_memory_pools(ioc); 3541 pci_set_drvdata(ioc->pdev, NULL); 3542 kfree(ioc->tm_cmds.reply); 3543 kfree(ioc->transport_cmds.reply); 3544 kfree(ioc->config_cmds.reply); 3545 kfree(ioc->base_cmds.reply); 3546 kfree(ioc->ctl_cmds.reply); 3547 kfree(ioc->pfacts); 3548 ioc->ctl_cmds.reply = NULL; 3549 ioc->base_cmds.reply = NULL; 3550 ioc->tm_cmds.reply = NULL; 3551 ioc->transport_cmds.reply = NULL; 3552 ioc->config_cmds.reply = NULL; 3553 ioc->pfacts = NULL; 3554 return r; 3555} 3556 3557 3558/** 3559 * mpt2sas_base_detach - remove controller instance 3560 * @ioc: per adapter object 3561 * 3562 * Return nothing. 3563 */ 3564void 3565mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3566{ 3567 3568 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3569 __func__)); 3570 3571 mpt2sas_base_stop_watchdog(ioc); 3572 mpt2sas_base_free_resources(ioc); 3573 _base_release_memory_pools(ioc); 3574 pci_set_drvdata(ioc->pdev, NULL); 3575 kfree(ioc->pfacts); 3576 kfree(ioc->ctl_cmds.reply); 3577 kfree(ioc->base_cmds.reply); 3578 kfree(ioc->tm_cmds.reply); 3579 kfree(ioc->transport_cmds.reply); 3580 kfree(ioc->config_cmds.reply); 3581} 3582 3583/** 3584 * _base_reset_handler - reset callback handler (for base) 3585 * @ioc: per adapter object 3586 * @reset_phase: phase 3587 * 3588 * The handler for doing any required cleanup or initialization. 3589 * 3590 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3591 * MPT2_IOC_DONE_RESET 3592 * 3593 * Return nothing. 3594 */ 3595static void 3596_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3597{ 3598 switch (reset_phase) { 3599 case MPT2_IOC_PRE_RESET: 3600 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3601 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3602 break; 3603 case MPT2_IOC_AFTER_RESET: 3604 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3605 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3606 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3607 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3608 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3609 complete(&ioc->transport_cmds.done); 3610 } 3611 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3612 ioc->base_cmds.status |= MPT2_CMD_RESET; 3613 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3614 complete(&ioc->base_cmds.done); 3615 } 3616 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3617 ioc->config_cmds.status |= MPT2_CMD_RESET; 3618 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3619 ioc->config_cmds.smid = USHORT_MAX; 3620 complete(&ioc->config_cmds.done); 3621 } 3622 break; 3623 case MPT2_IOC_DONE_RESET: 3624 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3625 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3626 break; 3627 } 3628 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3629 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3630} 3631 3632/** 3633 * _wait_for_commands_to_complete - reset controller 3634 * @ioc: Pointer to MPT_ADAPTER structure 3635 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3636 * 3637 * This function waiting(3s) for all pending commands to complete 3638 * prior to putting controller in reset. 3639 */ 3640static void 3641_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3642{ 3643 u32 ioc_state; 3644 unsigned long flags; 3645 u16 i; 3646 3647 ioc->pending_io_count = 0; 3648 if (sleep_flag != CAN_SLEEP) 3649 return; 3650 3651 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3652 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3653 return; 3654 3655 /* pending command count */ 3656 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3657 for (i = 0; i < ioc->scsiio_depth; i++) 3658 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3659 ioc->pending_io_count++; 3660 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3661 3662 if (!ioc->pending_io_count) 3663 return; 3664 3665 /* wait for pending commands to complete */ 3666 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3667} 3668 3669/** 3670 * mpt2sas_base_hard_reset_handler - reset controller 3671 * @ioc: Pointer to MPT_ADAPTER structure 3672 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3673 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3674 * 3675 * Returns 0 for success, non-zero for failure. 3676 */ 3677int 3678mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3679 enum reset_type type) 3680{ 3681 int r; 3682 unsigned long flags; 3683 3684 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3685 __func__)); 3686 3687 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3688 if (ioc->shost_recovery) { 3689 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3690 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3691 ioc->name, __func__); 3692 return -EBUSY; 3693 } 3694 ioc->shost_recovery = 1; 3695 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3696 3697 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3698 _wait_for_commands_to_complete(ioc, sleep_flag); 3699 _base_mask_interrupts(ioc); 3700 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3701 if (r) 3702 goto out; 3703 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3704 r = _base_make_ioc_operational(ioc, sleep_flag); 3705 if (!r) 3706 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3707 out: 3708 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3709 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3710 3711 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3712 ioc->shost_recovery = 0; 3713 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3714 3715 if (!r) 3716 _base_reset_handler(ioc, MPT2_IOC_RUNNING); 3717 return r; 3718} 3719