mpt2sas_base.c revision 570c67ac443dab5c46e5744e950f0539724cb65d
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2010 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60#include <linux/time.h> 61#include <linux/aer.h> 62 63#include "mpt2sas_base.h" 64 65static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 66 67#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 68#define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */ 69 70static int max_queue_depth = -1; 71module_param(max_queue_depth, int, 0); 72MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 73 74static int max_sgl_entries = -1; 75module_param(max_sgl_entries, int, 0); 76MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 77 78static int msix_disable = -1; 79module_param(msix_disable, int, 0); 80MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 81 82/* diag_buffer_enable is bitwise 83 * bit 0 set = TRACE 84 * bit 1 set = SNAPSHOT 85 * bit 2 set = EXTENDED 86 * 87 * Either bit can be set, or both 88 */ 89static int diag_buffer_enable; 90module_param(diag_buffer_enable, int, 0); 91MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers " 92 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)"); 93 94int mpt2sas_fwfault_debug; 95MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault " 96 "and halt firmware - (default=0)"); 97 98static int disable_discovery = -1; 99module_param(disable_discovery, int, 0); 100MODULE_PARM_DESC(disable_discovery, " disable discovery "); 101 102/** 103 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug. 104 * 105 */ 106static int 107_scsih_set_fwfault_debug(const char *val, struct kernel_param *kp) 108{ 109 int ret = param_set_int(val, kp); 110 struct MPT2SAS_ADAPTER *ioc; 111 112 if (ret) 113 return ret; 114 115 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug); 116 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) 117 ioc->fwfault_debug = mpt2sas_fwfault_debug; 118 return 0; 119} 120module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug, 121 param_get_int, &mpt2sas_fwfault_debug, 0644); 122 123/** 124 * _base_fault_reset_work - workq handling ioc fault conditions 125 * @work: input argument, used to derive ioc 126 * Context: sleep. 127 * 128 * Return nothing. 129 */ 130static void 131_base_fault_reset_work(struct work_struct *work) 132{ 133 struct MPT2SAS_ADAPTER *ioc = 134 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 135 unsigned long flags; 136 u32 doorbell; 137 int rc; 138 139 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 140 if (ioc->shost_recovery) 141 goto rearm_timer; 142 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 143 144 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 145 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 146 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 147 FORCE_BIG_HAMMER); 148 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 149 __func__, (rc == 0) ? "success" : "failed"); 150 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 151 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 152 mpt2sas_base_fault_info(ioc, doorbell & 153 MPI2_DOORBELL_DATA_MASK); 154 } 155 156 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 157 rearm_timer: 158 if (ioc->fault_reset_work_q) 159 queue_delayed_work(ioc->fault_reset_work_q, 160 &ioc->fault_reset_work, 161 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 162 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 163} 164 165/** 166 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 167 * @ioc: per adapter object 168 * Context: sleep. 169 * 170 * Return nothing. 171 */ 172void 173mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 174{ 175 unsigned long flags; 176 177 if (ioc->fault_reset_work_q) 178 return; 179 180 /* initialize fault polling */ 181 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 182 snprintf(ioc->fault_reset_work_q_name, 183 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 184 ioc->fault_reset_work_q = 185 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 186 if (!ioc->fault_reset_work_q) { 187 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 188 ioc->name, __func__, __LINE__); 189 return; 190 } 191 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 192 if (ioc->fault_reset_work_q) 193 queue_delayed_work(ioc->fault_reset_work_q, 194 &ioc->fault_reset_work, 195 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 196 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 197} 198 199/** 200 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 201 * @ioc: per adapter object 202 * Context: sleep. 203 * 204 * Return nothing. 205 */ 206void 207mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 208{ 209 unsigned long flags; 210 struct workqueue_struct *wq; 211 212 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 213 wq = ioc->fault_reset_work_q; 214 ioc->fault_reset_work_q = NULL; 215 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 216 if (wq) { 217 if (!cancel_delayed_work(&ioc->fault_reset_work)) 218 flush_workqueue(wq); 219 destroy_workqueue(wq); 220 } 221} 222 223/** 224 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 225 * @ioc: per adapter object 226 * @fault_code: fault code 227 * 228 * Return nothing. 229 */ 230void 231mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 232{ 233 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 234 ioc->name, fault_code); 235} 236 237/** 238 * mpt2sas_halt_firmware - halt's mpt controller firmware 239 * @ioc: per adapter object 240 * 241 * For debugging timeout related issues. Writing 0xCOFFEE00 242 * to the doorbell register will halt controller firmware. With 243 * the purpose to stop both driver and firmware, the enduser can 244 * obtain a ring buffer from controller UART. 245 */ 246void 247mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc) 248{ 249 u32 doorbell; 250 251 if (!ioc->fwfault_debug) 252 return; 253 254 dump_stack(); 255 256 doorbell = readl(&ioc->chip->Doorbell); 257 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 258 mpt2sas_base_fault_info(ioc , doorbell); 259 else { 260 writel(0xC0FFEE00, &ioc->chip->Doorbell); 261 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command " 262 "timeout\n", ioc->name); 263 } 264 265 panic("panic in %s\n", __func__); 266} 267 268#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 269/** 270 * _base_sas_ioc_info - verbose translation of the ioc status 271 * @ioc: per adapter object 272 * @mpi_reply: reply mf payload returned from firmware 273 * @request_hdr: request mf 274 * 275 * Return nothing. 276 */ 277static void 278_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 279 MPI2RequestHeader_t *request_hdr) 280{ 281 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 282 MPI2_IOCSTATUS_MASK; 283 char *desc = NULL; 284 u16 frame_sz; 285 char *func_str = NULL; 286 287 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 288 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 289 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 290 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 291 return; 292 293 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) 294 return; 295 296 switch (ioc_status) { 297 298/**************************************************************************** 299* Common IOCStatus values for all replies 300****************************************************************************/ 301 302 case MPI2_IOCSTATUS_INVALID_FUNCTION: 303 desc = "invalid function"; 304 break; 305 case MPI2_IOCSTATUS_BUSY: 306 desc = "busy"; 307 break; 308 case MPI2_IOCSTATUS_INVALID_SGL: 309 desc = "invalid sgl"; 310 break; 311 case MPI2_IOCSTATUS_INTERNAL_ERROR: 312 desc = "internal error"; 313 break; 314 case MPI2_IOCSTATUS_INVALID_VPID: 315 desc = "invalid vpid"; 316 break; 317 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 318 desc = "insufficient resources"; 319 break; 320 case MPI2_IOCSTATUS_INVALID_FIELD: 321 desc = "invalid field"; 322 break; 323 case MPI2_IOCSTATUS_INVALID_STATE: 324 desc = "invalid state"; 325 break; 326 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 327 desc = "op state not supported"; 328 break; 329 330/**************************************************************************** 331* Config IOCStatus values 332****************************************************************************/ 333 334 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 335 desc = "config invalid action"; 336 break; 337 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 338 desc = "config invalid type"; 339 break; 340 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 341 desc = "config invalid page"; 342 break; 343 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 344 desc = "config invalid data"; 345 break; 346 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 347 desc = "config no defaults"; 348 break; 349 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 350 desc = "config cant commit"; 351 break; 352 353/**************************************************************************** 354* SCSI IO Reply 355****************************************************************************/ 356 357 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 358 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 359 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 360 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 361 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 362 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 363 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 364 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 365 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 366 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 367 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 368 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 369 break; 370 371/**************************************************************************** 372* For use by SCSI Initiator and SCSI Target end-to-end data protection 373****************************************************************************/ 374 375 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 376 desc = "eedp guard error"; 377 break; 378 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 379 desc = "eedp ref tag error"; 380 break; 381 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 382 desc = "eedp app tag error"; 383 break; 384 385/**************************************************************************** 386* SCSI Target values 387****************************************************************************/ 388 389 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 390 desc = "target invalid io index"; 391 break; 392 case MPI2_IOCSTATUS_TARGET_ABORTED: 393 desc = "target aborted"; 394 break; 395 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 396 desc = "target no conn retryable"; 397 break; 398 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 399 desc = "target no connection"; 400 break; 401 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 402 desc = "target xfer count mismatch"; 403 break; 404 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 405 desc = "target data offset error"; 406 break; 407 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 408 desc = "target too much write data"; 409 break; 410 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 411 desc = "target iu too short"; 412 break; 413 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 414 desc = "target ack nak timeout"; 415 break; 416 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 417 desc = "target nak received"; 418 break; 419 420/**************************************************************************** 421* Serial Attached SCSI values 422****************************************************************************/ 423 424 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 425 desc = "smp request failed"; 426 break; 427 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 428 desc = "smp data overrun"; 429 break; 430 431/**************************************************************************** 432* Diagnostic Buffer Post / Diagnostic Release values 433****************************************************************************/ 434 435 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 436 desc = "diagnostic released"; 437 break; 438 default: 439 break; 440 } 441 442 if (!desc) 443 return; 444 445 switch (request_hdr->Function) { 446 case MPI2_FUNCTION_CONFIG: 447 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 448 func_str = "config_page"; 449 break; 450 case MPI2_FUNCTION_SCSI_TASK_MGMT: 451 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 452 func_str = "task_mgmt"; 453 break; 454 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 455 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 456 func_str = "sas_iounit_ctl"; 457 break; 458 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 459 frame_sz = sizeof(Mpi2SepRequest_t); 460 func_str = "enclosure"; 461 break; 462 case MPI2_FUNCTION_IOC_INIT: 463 frame_sz = sizeof(Mpi2IOCInitRequest_t); 464 func_str = "ioc_init"; 465 break; 466 case MPI2_FUNCTION_PORT_ENABLE: 467 frame_sz = sizeof(Mpi2PortEnableRequest_t); 468 func_str = "port_enable"; 469 break; 470 case MPI2_FUNCTION_SMP_PASSTHROUGH: 471 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 472 func_str = "smp_passthru"; 473 break; 474 default: 475 frame_sz = 32; 476 func_str = "unknown"; 477 break; 478 } 479 480 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 481 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 482 483 _debug_dump_mf(request_hdr, frame_sz/4); 484} 485 486/** 487 * _base_display_event_data - verbose translation of firmware asyn events 488 * @ioc: per adapter object 489 * @mpi_reply: reply mf payload returned from firmware 490 * 491 * Return nothing. 492 */ 493static void 494_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 495 Mpi2EventNotificationReply_t *mpi_reply) 496{ 497 char *desc = NULL; 498 u16 event; 499 500 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 501 return; 502 503 event = le16_to_cpu(mpi_reply->Event); 504 505 switch (event) { 506 case MPI2_EVENT_LOG_DATA: 507 desc = "Log Data"; 508 break; 509 case MPI2_EVENT_STATE_CHANGE: 510 desc = "Status Change"; 511 break; 512 case MPI2_EVENT_HARD_RESET_RECEIVED: 513 desc = "Hard Reset Received"; 514 break; 515 case MPI2_EVENT_EVENT_CHANGE: 516 desc = "Event Change"; 517 break; 518 case MPI2_EVENT_TASK_SET_FULL: 519 desc = "Task Set Full"; 520 break; 521 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 522 desc = "Device Status Change"; 523 break; 524 case MPI2_EVENT_IR_OPERATION_STATUS: 525 desc = "IR Operation Status"; 526 break; 527 case MPI2_EVENT_SAS_DISCOVERY: 528 { 529 Mpi2EventDataSasDiscovery_t *event_data = 530 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData; 531 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name, 532 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ? 533 "start" : "stop"); 534 if (event_data->DiscoveryStatus) 535 printk("discovery_status(0x%08x)", 536 le32_to_cpu(event_data->DiscoveryStatus)); 537 printk("\n"); 538 return; 539 } 540 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 541 desc = "SAS Broadcast Primitive"; 542 break; 543 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 544 desc = "SAS Init Device Status Change"; 545 break; 546 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 547 desc = "SAS Init Table Overflow"; 548 break; 549 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 550 desc = "SAS Topology Change List"; 551 break; 552 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 553 desc = "SAS Enclosure Device Status Change"; 554 break; 555 case MPI2_EVENT_IR_VOLUME: 556 desc = "IR Volume"; 557 break; 558 case MPI2_EVENT_IR_PHYSICAL_DISK: 559 desc = "IR Physical Disk"; 560 break; 561 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 562 desc = "IR Configuration Change List"; 563 break; 564 case MPI2_EVENT_LOG_ENTRY_ADDED: 565 desc = "Log Entry Added"; 566 break; 567 } 568 569 if (!desc) 570 return; 571 572 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 573} 574#endif 575 576/** 577 * _base_sas_log_info - verbose translation of firmware log info 578 * @ioc: per adapter object 579 * @log_info: log info 580 * 581 * Return nothing. 582 */ 583static void 584_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 585{ 586 union loginfo_type { 587 u32 loginfo; 588 struct { 589 u32 subcode:16; 590 u32 code:8; 591 u32 originator:4; 592 u32 bus_type:4; 593 } dw; 594 }; 595 union loginfo_type sas_loginfo; 596 char *originator_str = NULL; 597 598 sas_loginfo.loginfo = log_info; 599 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 600 return; 601 602 /* each nexus loss loginfo */ 603 if (log_info == 0x31170000) 604 return; 605 606 /* eat the loginfos associated with task aborts */ 607 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 608 0x31140000 || log_info == 0x31130000)) 609 return; 610 611 switch (sas_loginfo.dw.originator) { 612 case 0: 613 originator_str = "IOP"; 614 break; 615 case 1: 616 originator_str = "PL"; 617 break; 618 case 2: 619 originator_str = "IR"; 620 break; 621 } 622 623 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 624 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 625 originator_str, sas_loginfo.dw.code, 626 sas_loginfo.dw.subcode); 627} 628 629/** 630 * _base_display_reply_info - 631 * @ioc: per adapter object 632 * @smid: system request message index 633 * @msix_index: MSIX table index supplied by the OS 634 * @reply: reply message frame(lower 32bit addr) 635 * 636 * Return nothing. 637 */ 638static void 639_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 640 u32 reply) 641{ 642 MPI2DefaultReply_t *mpi_reply; 643 u16 ioc_status; 644 645 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 646 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 647#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 648 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 649 (ioc->logging_level & MPT_DEBUG_REPLY)) { 650 _base_sas_ioc_info(ioc , mpi_reply, 651 mpt2sas_base_get_msg_frame(ioc, smid)); 652 } 653#endif 654 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 655 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 656} 657 658/** 659 * mpt2sas_base_done - base internal command completion routine 660 * @ioc: per adapter object 661 * @smid: system request message index 662 * @msix_index: MSIX table index supplied by the OS 663 * @reply: reply message frame(lower 32bit addr) 664 * 665 * Return 1 meaning mf should be freed from _base_interrupt 666 * 0 means the mf is freed from this function. 667 */ 668u8 669mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 670 u32 reply) 671{ 672 MPI2DefaultReply_t *mpi_reply; 673 674 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 675 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 676 return 1; 677 678 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 679 return 1; 680 681 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 682 if (mpi_reply) { 683 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 684 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 685 } 686 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 687 complete(&ioc->base_cmds.done); 688 return 1; 689} 690 691/** 692 * _base_async_event - main callback handler for firmware asyn events 693 * @ioc: per adapter object 694 * @msix_index: MSIX table index supplied by the OS 695 * @reply: reply message frame(lower 32bit addr) 696 * 697 * Return 1 meaning mf should be freed from _base_interrupt 698 * 0 means the mf is freed from this function. 699 */ 700static u8 701_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply) 702{ 703 Mpi2EventNotificationReply_t *mpi_reply; 704 Mpi2EventAckRequest_t *ack_request; 705 u16 smid; 706 707 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 708 if (!mpi_reply) 709 return 1; 710 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 711 return 1; 712#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 713 _base_display_event_data(ioc, mpi_reply); 714#endif 715 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 716 goto out; 717 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 718 if (!smid) { 719 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 720 ioc->name, __func__); 721 goto out; 722 } 723 724 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 725 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 726 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 727 ack_request->Event = mpi_reply->Event; 728 ack_request->EventContext = mpi_reply->EventContext; 729 ack_request->VF_ID = 0; /* TODO */ 730 ack_request->VP_ID = 0; 731 mpt2sas_base_put_smid_default(ioc, smid); 732 733 out: 734 735 /* scsih callback handler */ 736 mpt2sas_scsih_event_callback(ioc, msix_index, reply); 737 738 /* ctl callback handler */ 739 mpt2sas_ctl_event_callback(ioc, msix_index, reply); 740 741 return 1; 742} 743 744/** 745 * _base_get_cb_idx - obtain the callback index 746 * @ioc: per adapter object 747 * @smid: system request message index 748 * 749 * Return callback index. 750 */ 751static u8 752_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid) 753{ 754 int i; 755 u8 cb_idx = 0xFF; 756 757 if (smid >= ioc->hi_priority_smid) { 758 if (smid < ioc->internal_smid) { 759 i = smid - ioc->hi_priority_smid; 760 cb_idx = ioc->hpr_lookup[i].cb_idx; 761 } else { 762 i = smid - ioc->internal_smid; 763 cb_idx = ioc->internal_lookup[i].cb_idx; 764 } 765 } else { 766 i = smid - 1; 767 cb_idx = ioc->scsi_lookup[i].cb_idx; 768 } 769 return cb_idx; 770} 771 772/** 773 * _base_mask_interrupts - disable interrupts 774 * @ioc: per adapter object 775 * 776 * Disabling ResetIRQ, Reply and Doorbell Interrupts 777 * 778 * Return nothing. 779 */ 780static void 781_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 782{ 783 u32 him_register; 784 785 ioc->mask_interrupts = 1; 786 him_register = readl(&ioc->chip->HostInterruptMask); 787 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 788 writel(him_register, &ioc->chip->HostInterruptMask); 789 readl(&ioc->chip->HostInterruptMask); 790} 791 792/** 793 * _base_unmask_interrupts - enable interrupts 794 * @ioc: per adapter object 795 * 796 * Enabling only Reply Interrupts 797 * 798 * Return nothing. 799 */ 800static void 801_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 802{ 803 u32 him_register; 804 805 him_register = readl(&ioc->chip->HostInterruptMask); 806 him_register &= ~MPI2_HIM_RIM; 807 writel(him_register, &ioc->chip->HostInterruptMask); 808 ioc->mask_interrupts = 0; 809} 810 811union reply_descriptor { 812 u64 word; 813 struct { 814 u32 low; 815 u32 high; 816 } u; 817}; 818 819/** 820 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 821 * @irq: irq number (not used) 822 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 823 * @r: pt_regs pointer (not used) 824 * 825 * Return IRQ_HANDLE if processed, else IRQ_NONE. 826 */ 827static irqreturn_t 828_base_interrupt(int irq, void *bus_id) 829{ 830 union reply_descriptor rd; 831 u32 completed_cmds; 832 u8 request_desript_type; 833 u16 smid; 834 u8 cb_idx; 835 u32 reply; 836 u8 msix_index; 837 struct MPT2SAS_ADAPTER *ioc = bus_id; 838 Mpi2ReplyDescriptorsUnion_t *rpf; 839 u8 rc; 840 841 if (ioc->mask_interrupts) 842 return IRQ_NONE; 843 844 rpf = &ioc->reply_post_free[ioc->reply_post_host_index]; 845 request_desript_type = rpf->Default.ReplyFlags 846 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 847 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 848 return IRQ_NONE; 849 850 completed_cmds = 0; 851 do { 852 rd.word = rpf->Words; 853 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 854 goto out; 855 reply = 0; 856 cb_idx = 0xFF; 857 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); 858 msix_index = rpf->Default.MSIxIndex; 859 if (request_desript_type == 860 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 861 reply = le32_to_cpu 862 (rpf->AddressReply.ReplyFrameAddress); 863 } else if (request_desript_type == 864 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 865 goto next; 866 else if (request_desript_type == 867 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 868 goto next; 869 if (smid) 870 cb_idx = _base_get_cb_idx(ioc, smid); 871 if (smid && cb_idx != 0xFF) { 872 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index, 873 reply); 874 if (reply) 875 _base_display_reply_info(ioc, smid, msix_index, 876 reply); 877 if (rc) 878 mpt2sas_base_free_smid(ioc, smid); 879 } 880 if (!smid) 881 _base_async_event(ioc, msix_index, reply); 882 883 /* reply free queue handling */ 884 if (reply) { 885 ioc->reply_free_host_index = 886 (ioc->reply_free_host_index == 887 (ioc->reply_free_queue_depth - 1)) ? 888 0 : ioc->reply_free_host_index + 1; 889 ioc->reply_free[ioc->reply_free_host_index] = 890 cpu_to_le32(reply); 891 wmb(); 892 writel(ioc->reply_free_host_index, 893 &ioc->chip->ReplyFreeHostIndex); 894 } 895 896 next: 897 898 rpf->Words = ULLONG_MAX; 899 ioc->reply_post_host_index = (ioc->reply_post_host_index == 900 (ioc->reply_post_queue_depth - 1)) ? 0 : 901 ioc->reply_post_host_index + 1; 902 request_desript_type = 903 ioc->reply_post_free[ioc->reply_post_host_index].Default. 904 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 905 completed_cmds++; 906 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 907 goto out; 908 if (!ioc->reply_post_host_index) 909 rpf = ioc->reply_post_free; 910 else 911 rpf++; 912 } while (1); 913 914 out: 915 916 if (!completed_cmds) 917 return IRQ_NONE; 918 919 wmb(); 920 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex); 921 return IRQ_HANDLED; 922} 923 924/** 925 * mpt2sas_base_release_callback_handler - clear interupt callback handler 926 * @cb_idx: callback index 927 * 928 * Return nothing. 929 */ 930void 931mpt2sas_base_release_callback_handler(u8 cb_idx) 932{ 933 mpt_callbacks[cb_idx] = NULL; 934} 935 936/** 937 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 938 * @cb_func: callback function 939 * 940 * Returns cb_func. 941 */ 942u8 943mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 944{ 945 u8 cb_idx; 946 947 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 948 if (mpt_callbacks[cb_idx] == NULL) 949 break; 950 951 mpt_callbacks[cb_idx] = cb_func; 952 return cb_idx; 953} 954 955/** 956 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 957 * 958 * Return nothing. 959 */ 960void 961mpt2sas_base_initialize_callback_handler(void) 962{ 963 u8 cb_idx; 964 965 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 966 mpt2sas_base_release_callback_handler(cb_idx); 967} 968 969/** 970 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 971 * @ioc: per adapter object 972 * @paddr: virtual address for SGE 973 * 974 * Create a zero length scatter gather entry to insure the IOCs hardware has 975 * something to use if the target device goes brain dead and tries 976 * to send data even when none is asked for. 977 * 978 * Return nothing. 979 */ 980void 981mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 982{ 983 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 984 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 985 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 986 MPI2_SGE_FLAGS_SHIFT); 987 ioc->base_add_sg_single(paddr, flags_length, -1); 988} 989 990/** 991 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 992 * @paddr: virtual address for SGE 993 * @flags_length: SGE flags and data transfer length 994 * @dma_addr: Physical address 995 * 996 * Return nothing. 997 */ 998static void 999_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1000{ 1001 Mpi2SGESimple32_t *sgel = paddr; 1002 1003 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 1004 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1005 sgel->FlagsLength = cpu_to_le32(flags_length); 1006 sgel->Address = cpu_to_le32(dma_addr); 1007} 1008 1009 1010/** 1011 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 1012 * @paddr: virtual address for SGE 1013 * @flags_length: SGE flags and data transfer length 1014 * @dma_addr: Physical address 1015 * 1016 * Return nothing. 1017 */ 1018static void 1019_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1020{ 1021 Mpi2SGESimple64_t *sgel = paddr; 1022 1023 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 1024 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1025 sgel->FlagsLength = cpu_to_le32(flags_length); 1026 sgel->Address = cpu_to_le64(dma_addr); 1027} 1028 1029#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 1030 1031/** 1032 * _base_config_dma_addressing - set dma addressing 1033 * @ioc: per adapter object 1034 * @pdev: PCI device struct 1035 * 1036 * Returns 0 for success, non-zero for failure. 1037 */ 1038static int 1039_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 1040{ 1041 struct sysinfo s; 1042 char *desc = NULL; 1043 1044 if (sizeof(dma_addr_t) > 4) { 1045 const uint64_t required_mask = 1046 dma_get_required_mask(&pdev->dev); 1047 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 1048 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 1049 DMA_BIT_MASK(64))) { 1050 ioc->base_add_sg_single = &_base_add_sg_single_64; 1051 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 1052 desc = "64"; 1053 goto out; 1054 } 1055 } 1056 1057 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 1058 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 1059 ioc->base_add_sg_single = &_base_add_sg_single_32; 1060 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 1061 desc = "32"; 1062 } else 1063 return -ENODEV; 1064 1065 out: 1066 si_meminfo(&s); 1067 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 1068 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 1069 1070 return 0; 1071} 1072 1073/** 1074 * _base_save_msix_table - backup msix vector table 1075 * @ioc: per adapter object 1076 * 1077 * This address an errata where diag reset clears out the table 1078 */ 1079static void 1080_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 1081{ 1082 int i; 1083 1084 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1085 return; 1086 1087 for (i = 0; i < ioc->msix_vector_count; i++) 1088 ioc->msix_table_backup[i] = ioc->msix_table[i]; 1089} 1090 1091/** 1092 * _base_restore_msix_table - this restores the msix vector table 1093 * @ioc: per adapter object 1094 * 1095 */ 1096static void 1097_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 1098{ 1099 int i; 1100 1101 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1102 return; 1103 1104 for (i = 0; i < ioc->msix_vector_count; i++) 1105 ioc->msix_table[i] = ioc->msix_table_backup[i]; 1106} 1107 1108/** 1109 * _base_check_enable_msix - checks MSIX capabable. 1110 * @ioc: per adapter object 1111 * 1112 * Check to see if card is capable of MSIX, and set number 1113 * of avaliable msix vectors 1114 */ 1115static int 1116_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1117{ 1118 int base; 1119 u16 message_control; 1120 u32 msix_table_offset; 1121 1122 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1123 if (!base) { 1124 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1125 "supported\n", ioc->name)); 1126 return -EINVAL; 1127 } 1128 1129 /* get msix vector count */ 1130 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1131 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1132 1133 /* get msix table */ 1134 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 1135 msix_table_offset &= 0xFFFFFFF8; 1136 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 1137 1138 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1139 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 1140 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 1141 return 0; 1142} 1143 1144/** 1145 * _base_disable_msix - disables msix 1146 * @ioc: per adapter object 1147 * 1148 */ 1149static void 1150_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1151{ 1152 if (ioc->msix_enable) { 1153 pci_disable_msix(ioc->pdev); 1154 kfree(ioc->msix_table_backup); 1155 ioc->msix_table_backup = NULL; 1156 ioc->msix_enable = 0; 1157 } 1158} 1159 1160/** 1161 * _base_enable_msix - enables msix, failback to io_apic 1162 * @ioc: per adapter object 1163 * 1164 */ 1165static int 1166_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1167{ 1168 struct msix_entry entries; 1169 int r; 1170 u8 try_msix = 0; 1171 1172 if (msix_disable == -1 || msix_disable == 0) 1173 try_msix = 1; 1174 1175 if (!try_msix) 1176 goto try_ioapic; 1177 1178 if (_base_check_enable_msix(ioc) != 0) 1179 goto try_ioapic; 1180 1181 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1182 sizeof(u32), GFP_KERNEL); 1183 if (!ioc->msix_table_backup) { 1184 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1185 "msix_table_backup failed!!!\n", ioc->name)); 1186 goto try_ioapic; 1187 } 1188 1189 memset(&entries, 0, sizeof(struct msix_entry)); 1190 r = pci_enable_msix(ioc->pdev, &entries, 1); 1191 if (r) { 1192 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1193 "failed (r=%d) !!!\n", ioc->name, r)); 1194 goto try_ioapic; 1195 } 1196 1197 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1198 ioc->name, ioc); 1199 if (r) { 1200 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1201 "interrupt %d !!!\n", ioc->name, entries.vector)); 1202 pci_disable_msix(ioc->pdev); 1203 goto try_ioapic; 1204 } 1205 1206 ioc->pci_irq = entries.vector; 1207 ioc->msix_enable = 1; 1208 return 0; 1209 1210/* failback to io_apic interrupt routing */ 1211 try_ioapic: 1212 1213 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1214 ioc->name, ioc); 1215 if (r) { 1216 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1217 ioc->name, ioc->pdev->irq); 1218 r = -EBUSY; 1219 goto out_fail; 1220 } 1221 1222 ioc->pci_irq = ioc->pdev->irq; 1223 return 0; 1224 1225 out_fail: 1226 return r; 1227} 1228 1229/** 1230 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1231 * @ioc: per adapter object 1232 * 1233 * Returns 0 for success, non-zero for failure. 1234 */ 1235int 1236mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1237{ 1238 struct pci_dev *pdev = ioc->pdev; 1239 u32 memap_sz; 1240 u32 pio_sz; 1241 int i, r = 0; 1242 u64 pio_chip = 0; 1243 u64 chip_phys = 0; 1244 1245 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1246 ioc->name, __func__)); 1247 1248 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1249 if (pci_enable_device_mem(pdev)) { 1250 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1251 "failed\n", ioc->name); 1252 return -ENODEV; 1253 } 1254 1255 1256 if (pci_request_selected_regions(pdev, ioc->bars, 1257 MPT2SAS_DRIVER_NAME)) { 1258 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1259 "failed\n", ioc->name); 1260 r = -ENODEV; 1261 goto out_fail; 1262 } 1263 1264 /* AER (Advanced Error Reporting) hooks */ 1265 pci_enable_pcie_error_reporting(pdev); 1266 1267 pci_set_master(pdev); 1268 1269 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1270 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1271 ioc->name, pci_name(pdev)); 1272 r = -ENODEV; 1273 goto out_fail; 1274 } 1275 1276 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1277 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { 1278 if (pio_sz) 1279 continue; 1280 pio_chip = (u64)pci_resource_start(pdev, i); 1281 pio_sz = pci_resource_len(pdev, i); 1282 } else { 1283 if (memap_sz) 1284 continue; 1285 /* verify memory resource is valid before using */ 1286 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 1287 ioc->chip_phys = pci_resource_start(pdev, i); 1288 chip_phys = (u64)ioc->chip_phys; 1289 memap_sz = pci_resource_len(pdev, i); 1290 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1291 if (ioc->chip == NULL) { 1292 printk(MPT2SAS_ERR_FMT "unable to map " 1293 "adapter memory!\n", ioc->name); 1294 r = -EINVAL; 1295 goto out_fail; 1296 } 1297 } 1298 } 1299 } 1300 1301 _base_mask_interrupts(ioc); 1302 r = _base_enable_msix(ioc); 1303 if (r) 1304 goto out_fail; 1305 1306 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1307 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1308 "IO-APIC enabled"), ioc->pci_irq); 1309 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n", 1310 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz); 1311 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n", 1312 ioc->name, (unsigned long long)pio_chip, pio_sz); 1313 1314 return 0; 1315 1316 out_fail: 1317 if (ioc->chip_phys) 1318 iounmap(ioc->chip); 1319 ioc->chip_phys = 0; 1320 ioc->pci_irq = -1; 1321 pci_release_selected_regions(ioc->pdev, ioc->bars); 1322 pci_disable_pcie_error_reporting(pdev); 1323 pci_disable_device(pdev); 1324 return r; 1325} 1326 1327/** 1328 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1329 * @ioc: per adapter object 1330 * @smid: system request message index(smid zero is invalid) 1331 * 1332 * Returns virt pointer to message frame. 1333 */ 1334void * 1335mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1336{ 1337 return (void *)(ioc->request + (smid * ioc->request_sz)); 1338} 1339 1340/** 1341 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1342 * @ioc: per adapter object 1343 * @smid: system request message index 1344 * 1345 * Returns virt pointer to sense buffer. 1346 */ 1347void * 1348mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1349{ 1350 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1351} 1352 1353/** 1354 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1355 * @ioc: per adapter object 1356 * @smid: system request message index 1357 * 1358 * Returns phys pointer to the low 32bit address of the sense buffer. 1359 */ 1360__le32 1361mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1362{ 1363 return cpu_to_le32(ioc->sense_dma + 1364 ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1365} 1366 1367/** 1368 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1369 * @ioc: per adapter object 1370 * @phys_addr: lower 32 physical addr of the reply 1371 * 1372 * Converts 32bit lower physical addr into a virt address. 1373 */ 1374void * 1375mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1376{ 1377 if (!phys_addr) 1378 return NULL; 1379 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1380} 1381 1382/** 1383 * mpt2sas_base_get_smid - obtain a free smid from internal queue 1384 * @ioc: per adapter object 1385 * @cb_idx: callback index 1386 * 1387 * Returns smid (zero is invalid) 1388 */ 1389u16 1390mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1391{ 1392 unsigned long flags; 1393 struct request_tracker *request; 1394 u16 smid; 1395 1396 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1397 if (list_empty(&ioc->internal_free_list)) { 1398 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1399 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1400 ioc->name, __func__); 1401 return 0; 1402 } 1403 1404 request = list_entry(ioc->internal_free_list.next, 1405 struct request_tracker, tracker_list); 1406 request->cb_idx = cb_idx; 1407 smid = request->smid; 1408 list_del(&request->tracker_list); 1409 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1410 return smid; 1411} 1412 1413/** 1414 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue 1415 * @ioc: per adapter object 1416 * @cb_idx: callback index 1417 * @scmd: pointer to scsi command object 1418 * 1419 * Returns smid (zero is invalid) 1420 */ 1421u16 1422mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx, 1423 struct scsi_cmnd *scmd) 1424{ 1425 unsigned long flags; 1426 struct request_tracker *request; 1427 u16 smid; 1428 1429 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1430 if (list_empty(&ioc->free_list)) { 1431 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1432 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1433 ioc->name, __func__); 1434 return 0; 1435 } 1436 1437 request = list_entry(ioc->free_list.next, 1438 struct request_tracker, tracker_list); 1439 request->scmd = scmd; 1440 request->cb_idx = cb_idx; 1441 smid = request->smid; 1442 list_del(&request->tracker_list); 1443 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1444 return smid; 1445} 1446 1447/** 1448 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue 1449 * @ioc: per adapter object 1450 * @cb_idx: callback index 1451 * 1452 * Returns smid (zero is invalid) 1453 */ 1454u16 1455mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1456{ 1457 unsigned long flags; 1458 struct request_tracker *request; 1459 u16 smid; 1460 1461 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1462 if (list_empty(&ioc->hpr_free_list)) { 1463 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1464 return 0; 1465 } 1466 1467 request = list_entry(ioc->hpr_free_list.next, 1468 struct request_tracker, tracker_list); 1469 request->cb_idx = cb_idx; 1470 smid = request->smid; 1471 list_del(&request->tracker_list); 1472 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1473 return smid; 1474} 1475 1476 1477/** 1478 * mpt2sas_base_free_smid - put smid back on free_list 1479 * @ioc: per adapter object 1480 * @smid: system request message index 1481 * 1482 * Return nothing. 1483 */ 1484void 1485mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1486{ 1487 unsigned long flags; 1488 int i; 1489 1490 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1491 if (smid >= ioc->hi_priority_smid) { 1492 if (smid < ioc->internal_smid) { 1493 /* hi-priority */ 1494 i = smid - ioc->hi_priority_smid; 1495 ioc->hpr_lookup[i].cb_idx = 0xFF; 1496 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 1497 &ioc->hpr_free_list); 1498 } else { 1499 /* internal queue */ 1500 i = smid - ioc->internal_smid; 1501 ioc->internal_lookup[i].cb_idx = 0xFF; 1502 list_add_tail(&ioc->internal_lookup[i].tracker_list, 1503 &ioc->internal_free_list); 1504 } 1505 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1506 return; 1507 } 1508 1509 /* scsiio queue */ 1510 i = smid - 1; 1511 ioc->scsi_lookup[i].cb_idx = 0xFF; 1512 ioc->scsi_lookup[i].scmd = NULL; 1513 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 1514 &ioc->free_list); 1515 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1516 1517 /* 1518 * See _wait_for_commands_to_complete() call with regards to this code. 1519 */ 1520 if (ioc->shost_recovery && ioc->pending_io_count) { 1521 if (ioc->pending_io_count == 1) 1522 wake_up(&ioc->reset_wq); 1523 ioc->pending_io_count--; 1524 } 1525} 1526 1527/** 1528 * _base_writeq - 64 bit write to MMIO 1529 * @ioc: per adapter object 1530 * @b: data payload 1531 * @addr: address in MMIO space 1532 * @writeq_lock: spin lock 1533 * 1534 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1535 * care of 32 bit environment where its not quarenteed to send the entire word 1536 * in one transfer. 1537 */ 1538#ifndef writeq 1539static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1540 spinlock_t *writeq_lock) 1541{ 1542 unsigned long flags; 1543 __u64 data_out = cpu_to_le64(b); 1544 1545 spin_lock_irqsave(writeq_lock, flags); 1546 writel((u32)(data_out), addr); 1547 writel((u32)(data_out >> 32), (addr + 4)); 1548 spin_unlock_irqrestore(writeq_lock, flags); 1549} 1550#else 1551static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1552 spinlock_t *writeq_lock) 1553{ 1554 writeq(cpu_to_le64(b), addr); 1555} 1556#endif 1557 1558/** 1559 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1560 * @ioc: per adapter object 1561 * @smid: system request message index 1562 * @handle: device handle 1563 * 1564 * Return nothing. 1565 */ 1566void 1567mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle) 1568{ 1569 Mpi2RequestDescriptorUnion_t descriptor; 1570 u64 *request = (u64 *)&descriptor; 1571 1572 1573 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1574 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */ 1575 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1576 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1577 descriptor.SCSIIO.LMID = 0; 1578 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1579 &ioc->scsi_lookup_lock); 1580} 1581 1582 1583/** 1584 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1585 * @ioc: per adapter object 1586 * @smid: system request message index 1587 * 1588 * Return nothing. 1589 */ 1590void 1591mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1592{ 1593 Mpi2RequestDescriptorUnion_t descriptor; 1594 u64 *request = (u64 *)&descriptor; 1595 1596 descriptor.HighPriority.RequestFlags = 1597 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1598 descriptor.HighPriority.MSIxIndex = 0; /* TODO */ 1599 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1600 descriptor.HighPriority.LMID = 0; 1601 descriptor.HighPriority.Reserved1 = 0; 1602 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1603 &ioc->scsi_lookup_lock); 1604} 1605 1606/** 1607 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1608 * @ioc: per adapter object 1609 * @smid: system request message index 1610 * 1611 * Return nothing. 1612 */ 1613void 1614mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1615{ 1616 Mpi2RequestDescriptorUnion_t descriptor; 1617 u64 *request = (u64 *)&descriptor; 1618 1619 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1620 descriptor.Default.MSIxIndex = 0; /* TODO */ 1621 descriptor.Default.SMID = cpu_to_le16(smid); 1622 descriptor.Default.LMID = 0; 1623 descriptor.Default.DescriptorTypeDependent = 0; 1624 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1625 &ioc->scsi_lookup_lock); 1626} 1627 1628/** 1629 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1630 * @ioc: per adapter object 1631 * @smid: system request message index 1632 * @io_index: value used to track the IO 1633 * 1634 * Return nothing. 1635 */ 1636void 1637mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1638 u16 io_index) 1639{ 1640 Mpi2RequestDescriptorUnion_t descriptor; 1641 u64 *request = (u64 *)&descriptor; 1642 1643 descriptor.SCSITarget.RequestFlags = 1644 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1645 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */ 1646 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1647 descriptor.SCSITarget.LMID = 0; 1648 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1649 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1650 &ioc->scsi_lookup_lock); 1651} 1652 1653/** 1654 * _base_display_dell_branding - Disply branding string 1655 * @ioc: per adapter object 1656 * 1657 * Return nothing. 1658 */ 1659static void 1660_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1661{ 1662 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1663 1664 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1665 return; 1666 1667 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1668 switch (ioc->pdev->subsystem_device) { 1669 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1670 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1671 MPT2SAS_DELL_BRANDING_SIZE - 1); 1672 break; 1673 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1674 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1675 MPT2SAS_DELL_BRANDING_SIZE - 1); 1676 break; 1677 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1678 strncpy(dell_branding, 1679 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1680 MPT2SAS_DELL_BRANDING_SIZE - 1); 1681 break; 1682 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1683 strncpy(dell_branding, 1684 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1685 MPT2SAS_DELL_BRANDING_SIZE - 1); 1686 break; 1687 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1688 strncpy(dell_branding, 1689 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1690 MPT2SAS_DELL_BRANDING_SIZE - 1); 1691 break; 1692 case MPT2SAS_DELL_PERC_H200_SSDID: 1693 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1694 MPT2SAS_DELL_BRANDING_SIZE - 1); 1695 break; 1696 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1697 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1698 MPT2SAS_DELL_BRANDING_SIZE - 1); 1699 break; 1700 default: 1701 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1702 break; 1703 } 1704 1705 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1706 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1707 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1708 ioc->pdev->subsystem_device); 1709} 1710 1711/** 1712 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1713 * @ioc: per adapter object 1714 * 1715 * Return nothing. 1716 */ 1717static void 1718_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1719{ 1720 int i = 0; 1721 char desc[16]; 1722 u8 revision; 1723 u32 iounit_pg1_flags; 1724 1725 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1726 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1727 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1728 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1729 ioc->name, desc, 1730 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1731 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1732 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1733 ioc->facts.FWVersion.Word & 0x000000FF, 1734 revision, 1735 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1736 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1737 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1738 ioc->bios_pg3.BiosVersion & 0x000000FF); 1739 1740 _base_display_dell_branding(ioc); 1741 1742 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1743 1744 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1745 printk("Initiator"); 1746 i++; 1747 } 1748 1749 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1750 printk("%sTarget", i ? "," : ""); 1751 i++; 1752 } 1753 1754 i = 0; 1755 printk("), "); 1756 printk("Capabilities=("); 1757 1758 if (ioc->facts.IOCCapabilities & 1759 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1760 printk("Raid"); 1761 i++; 1762 } 1763 1764 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1765 printk("%sTLR", i ? "," : ""); 1766 i++; 1767 } 1768 1769 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1770 printk("%sMulticast", i ? "," : ""); 1771 i++; 1772 } 1773 1774 if (ioc->facts.IOCCapabilities & 1775 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1776 printk("%sBIDI Target", i ? "," : ""); 1777 i++; 1778 } 1779 1780 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1781 printk("%sEEDP", i ? "," : ""); 1782 i++; 1783 } 1784 1785 if (ioc->facts.IOCCapabilities & 1786 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1787 printk("%sSnapshot Buffer", i ? "," : ""); 1788 i++; 1789 } 1790 1791 if (ioc->facts.IOCCapabilities & 1792 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1793 printk("%sDiag Trace Buffer", i ? "," : ""); 1794 i++; 1795 } 1796 1797 if (ioc->facts.IOCCapabilities & 1798 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) { 1799 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : ""); 1800 i++; 1801 } 1802 1803 if (ioc->facts.IOCCapabilities & 1804 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1805 printk("%sTask Set Full", i ? "," : ""); 1806 i++; 1807 } 1808 1809 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1810 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1811 printk("%sNCQ", i ? "," : ""); 1812 i++; 1813 } 1814 1815 printk(")\n"); 1816} 1817 1818/** 1819 * _base_static_config_pages - static start of day config pages 1820 * @ioc: per adapter object 1821 * 1822 * Return nothing. 1823 */ 1824static void 1825_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1826{ 1827 Mpi2ConfigReply_t mpi_reply; 1828 u32 iounit_pg1_flags; 1829 1830 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1831 if (ioc->ir_firmware) 1832 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, 1833 &ioc->manu_pg10); 1834 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1835 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1836 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1837 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1838 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1839 _base_display_ioc_capabilities(ioc); 1840 1841 /* 1842 * Enable task_set_full handling in iounit_pg1 when the 1843 * facts capabilities indicate that its supported. 1844 */ 1845 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1846 if ((ioc->facts.IOCCapabilities & 1847 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1848 iounit_pg1_flags &= 1849 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1850 else 1851 iounit_pg1_flags |= 1852 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1853 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1854 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1855} 1856 1857/** 1858 * _base_release_memory_pools - release memory 1859 * @ioc: per adapter object 1860 * 1861 * Free memory allocated from _base_allocate_memory_pools. 1862 * 1863 * Return nothing. 1864 */ 1865static void 1866_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1867{ 1868 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1869 __func__)); 1870 1871 if (ioc->request) { 1872 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1873 ioc->request, ioc->request_dma); 1874 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1875 ": free\n", ioc->name, ioc->request)); 1876 ioc->request = NULL; 1877 } 1878 1879 if (ioc->sense) { 1880 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1881 if (ioc->sense_dma_pool) 1882 pci_pool_destroy(ioc->sense_dma_pool); 1883 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1884 ": free\n", ioc->name, ioc->sense)); 1885 ioc->sense = NULL; 1886 } 1887 1888 if (ioc->reply) { 1889 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1890 if (ioc->reply_dma_pool) 1891 pci_pool_destroy(ioc->reply_dma_pool); 1892 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1893 ": free\n", ioc->name, ioc->reply)); 1894 ioc->reply = NULL; 1895 } 1896 1897 if (ioc->reply_free) { 1898 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1899 ioc->reply_free_dma); 1900 if (ioc->reply_free_dma_pool) 1901 pci_pool_destroy(ioc->reply_free_dma_pool); 1902 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1903 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1904 ioc->reply_free = NULL; 1905 } 1906 1907 if (ioc->reply_post_free) { 1908 pci_pool_free(ioc->reply_post_free_dma_pool, 1909 ioc->reply_post_free, ioc->reply_post_free_dma); 1910 if (ioc->reply_post_free_dma_pool) 1911 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1912 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1913 "reply_post_free_pool(0x%p): free\n", ioc->name, 1914 ioc->reply_post_free)); 1915 ioc->reply_post_free = NULL; 1916 } 1917 1918 if (ioc->config_page) { 1919 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1920 "config_page(0x%p): free\n", ioc->name, 1921 ioc->config_page)); 1922 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1923 ioc->config_page, ioc->config_page_dma); 1924 } 1925 1926 if (ioc->scsi_lookup) { 1927 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages); 1928 ioc->scsi_lookup = NULL; 1929 } 1930 kfree(ioc->hpr_lookup); 1931 kfree(ioc->internal_lookup); 1932} 1933 1934 1935/** 1936 * _base_allocate_memory_pools - allocate start of day memory pools 1937 * @ioc: per adapter object 1938 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1939 * 1940 * Returns 0 success, anything else error 1941 */ 1942static int 1943_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1944{ 1945 Mpi2IOCFactsReply_t *facts; 1946 u32 queue_size, queue_diff; 1947 u16 max_sge_elements; 1948 u16 num_of_reply_frames; 1949 u16 chains_needed_per_io; 1950 u32 sz, total_sz; 1951 u32 retry_sz; 1952 u16 max_request_credit; 1953 1954 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1955 __func__)); 1956 1957 retry_sz = 0; 1958 facts = &ioc->facts; 1959 1960 /* command line tunables for max sgl entries */ 1961 if (max_sgl_entries != -1) { 1962 ioc->shost->sg_tablesize = (max_sgl_entries < 1963 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1964 MPT2SAS_SG_DEPTH; 1965 } else { 1966 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1967 } 1968 1969 /* command line tunables for max controller queue depth */ 1970 if (max_queue_depth != -1) { 1971 max_request_credit = (max_queue_depth < facts->RequestCredit) 1972 ? max_queue_depth : facts->RequestCredit; 1973 } else { 1974 max_request_credit = (facts->RequestCredit > 1975 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1976 facts->RequestCredit; 1977 } 1978 1979 ioc->hba_queue_depth = max_request_credit; 1980 ioc->hi_priority_depth = facts->HighPriorityCredit; 1981 ioc->internal_depth = ioc->hi_priority_depth + 5; 1982 1983 /* request frame size */ 1984 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1985 1986 /* reply frame size */ 1987 ioc->reply_sz = facts->ReplyFrameSize * 4; 1988 1989 retry_allocation: 1990 total_sz = 0; 1991 /* calculate number of sg elements left over in the 1st frame */ 1992 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1993 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1994 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1995 1996 /* now do the same for a chain buffer */ 1997 max_sge_elements = ioc->request_sz - ioc->sge_size; 1998 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1999 2000 ioc->chain_offset_value_for_main_message = 2001 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 2002 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 2003 2004 /* 2005 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 2006 */ 2007 chains_needed_per_io = ((ioc->shost->sg_tablesize - 2008 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 2009 + 1; 2010 if (chains_needed_per_io > facts->MaxChainDepth) { 2011 chains_needed_per_io = facts->MaxChainDepth; 2012 ioc->shost->sg_tablesize = min_t(u16, 2013 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 2014 * chains_needed_per_io), ioc->shost->sg_tablesize); 2015 } 2016 ioc->chains_needed_per_io = chains_needed_per_io; 2017 2018 /* reply free queue sizing - taking into account for events */ 2019 num_of_reply_frames = ioc->hba_queue_depth + 32; 2020 2021 /* number of replies frames can't be a multiple of 16 */ 2022 /* decrease number of reply frames by 1 */ 2023 if (!(num_of_reply_frames % 16)) 2024 num_of_reply_frames--; 2025 2026 /* calculate number of reply free queue entries 2027 * (must be multiple of 16) 2028 */ 2029 2030 /* (we know reply_free_queue_depth is not a multiple of 16) */ 2031 queue_size = num_of_reply_frames; 2032 queue_size += 16 - (queue_size % 16); 2033 ioc->reply_free_queue_depth = queue_size; 2034 2035 /* reply descriptor post queue sizing */ 2036 /* this size should be the number of request frames + number of reply 2037 * frames 2038 */ 2039 2040 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1; 2041 /* round up to 16 byte boundary */ 2042 if (queue_size % 16) 2043 queue_size += 16 - (queue_size % 16); 2044 2045 /* check against IOC maximum reply post queue depth */ 2046 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 2047 queue_diff = queue_size - 2048 facts->MaxReplyDescriptorPostQueueDepth; 2049 2050 /* round queue_diff up to multiple of 16 */ 2051 if (queue_diff % 16) 2052 queue_diff += 16 - (queue_diff % 16); 2053 2054 /* adjust hba_queue_depth, reply_free_queue_depth, 2055 * and queue_size 2056 */ 2057 ioc->hba_queue_depth -= queue_diff; 2058 ioc->reply_free_queue_depth -= queue_diff; 2059 queue_size -= queue_diff; 2060 } 2061 ioc->reply_post_queue_depth = queue_size; 2062 2063 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 2064 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 2065 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 2066 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 2067 ioc->chains_needed_per_io)); 2068 2069 ioc->scsiio_depth = ioc->hba_queue_depth - 2070 ioc->hi_priority_depth - ioc->internal_depth; 2071 2072 /* set the scsi host can_queue depth 2073 * with some internal commands that could be outstanding 2074 */ 2075 ioc->shost->can_queue = ioc->scsiio_depth - (2); 2076 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: " 2077 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue)); 2078 2079 /* contiguous pool for request and chains, 16 byte align, one extra " 2080 * "frame for smid=0 2081 */ 2082 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; 2083 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz); 2084 2085 /* hi-priority queue */ 2086 sz += (ioc->hi_priority_depth * ioc->request_sz); 2087 2088 /* internal queue */ 2089 sz += (ioc->internal_depth * ioc->request_sz); 2090 2091 ioc->request_dma_sz = sz; 2092 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 2093 if (!ioc->request) { 2094 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2095 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2096 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth, 2097 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2098 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH) 2099 goto out; 2100 retry_sz += 64; 2101 ioc->hba_queue_depth = max_request_credit - retry_sz; 2102 goto retry_allocation; 2103 } 2104 2105 if (retry_sz) 2106 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2107 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2108 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth, 2109 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2110 2111 2112 /* hi-priority queue */ 2113 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * 2114 ioc->request_sz); 2115 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * 2116 ioc->request_sz); 2117 2118 /* internal queue */ 2119 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * 2120 ioc->request_sz); 2121 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * 2122 ioc->request_sz); 2123 2124 ioc->chain = ioc->internal + (ioc->internal_depth * 2125 ioc->request_sz); 2126 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth * 2127 ioc->request_sz); 2128 2129 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 2130 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2131 ioc->request, ioc->hba_queue_depth, ioc->request_sz, 2132 (ioc->hba_queue_depth * ioc->request_sz)/1024)); 2133 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 2134 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 2135 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 2136 ioc->request_sz))/1024)); 2137 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 2138 ioc->name, (unsigned long long) ioc->request_dma)); 2139 total_sz += sz; 2140 2141 sz = ioc->scsiio_depth * sizeof(struct request_tracker); 2142 ioc->scsi_lookup_pages = get_order(sz); 2143 ioc->scsi_lookup = (struct request_tracker *)__get_free_pages( 2144 GFP_KERNEL, ioc->scsi_lookup_pages); 2145 if (!ioc->scsi_lookup) { 2146 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, " 2147 "sz(%d)\n", ioc->name, (int)sz); 2148 goto out; 2149 } 2150 2151 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): " 2152 "depth(%d)\n", ioc->name, ioc->request, 2153 ioc->scsiio_depth)); 2154 2155 /* initialize hi-priority queue smid's */ 2156 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, 2157 sizeof(struct request_tracker), GFP_KERNEL); 2158 if (!ioc->hpr_lookup) { 2159 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n", 2160 ioc->name); 2161 goto out; 2162 } 2163 ioc->hi_priority_smid = ioc->scsiio_depth + 1; 2164 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): " 2165 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority, 2166 ioc->hi_priority_depth, ioc->hi_priority_smid)); 2167 2168 /* initialize internal queue smid's */ 2169 ioc->internal_lookup = kcalloc(ioc->internal_depth, 2170 sizeof(struct request_tracker), GFP_KERNEL); 2171 if (!ioc->internal_lookup) { 2172 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n", 2173 ioc->name); 2174 goto out; 2175 } 2176 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; 2177 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): " 2178 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal, 2179 ioc->internal_depth, ioc->internal_smid)); 2180 2181 /* sense buffers, 4 byte align */ 2182 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; 2183 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 2184 0); 2185 if (!ioc->sense_dma_pool) { 2186 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 2187 ioc->name); 2188 goto out; 2189 } 2190 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 2191 &ioc->sense_dma); 2192 if (!ioc->sense) { 2193 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 2194 ioc->name); 2195 goto out; 2196 } 2197 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2198 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 2199 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth, 2200 SCSI_SENSE_BUFFERSIZE, sz/1024)); 2201 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 2202 ioc->name, (unsigned long long)ioc->sense_dma)); 2203 total_sz += sz; 2204 2205 /* reply pool, 4 byte align */ 2206 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 2207 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 2208 0); 2209 if (!ioc->reply_dma_pool) { 2210 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 2211 ioc->name); 2212 goto out; 2213 } 2214 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 2215 &ioc->reply_dma); 2216 if (!ioc->reply) { 2217 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 2218 ioc->name); 2219 goto out; 2220 } 2221 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 2222 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 2223 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 2224 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 2225 ioc->name, (unsigned long long)ioc->reply_dma)); 2226 total_sz += sz; 2227 2228 /* reply free queue, 16 byte align */ 2229 sz = ioc->reply_free_queue_depth * 4; 2230 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 2231 ioc->pdev, sz, 16, 0); 2232 if (!ioc->reply_free_dma_pool) { 2233 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 2234 "failed\n", ioc->name); 2235 goto out; 2236 } 2237 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 2238 &ioc->reply_free_dma); 2239 if (!ioc->reply_free) { 2240 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 2241 "failed\n", ioc->name); 2242 goto out; 2243 } 2244 memset(ioc->reply_free, 0, sz); 2245 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 2246 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 2247 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 2248 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 2249 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 2250 total_sz += sz; 2251 2252 /* reply post queue, 16 byte align */ 2253 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 2254 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 2255 ioc->pdev, sz, 16, 0); 2256 if (!ioc->reply_post_free_dma_pool) { 2257 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 2258 "failed\n", ioc->name); 2259 goto out; 2260 } 2261 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 2262 GFP_KERNEL, &ioc->reply_post_free_dma); 2263 if (!ioc->reply_post_free) { 2264 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2265 "failed\n", ioc->name); 2266 goto out; 2267 } 2268 memset(ioc->reply_post_free, 0, sz); 2269 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2270 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2271 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2272 sz/1024)); 2273 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2274 "(0x%llx)\n", ioc->name, (unsigned long long) 2275 ioc->reply_post_free_dma)); 2276 total_sz += sz; 2277 2278 ioc->config_page_sz = 512; 2279 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2280 ioc->config_page_sz, &ioc->config_page_dma); 2281 if (!ioc->config_page) { 2282 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2283 "failed\n", ioc->name); 2284 goto out; 2285 } 2286 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2287 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2288 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2289 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2290 total_sz += ioc->config_page_sz; 2291 2292 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2293 ioc->name, total_sz/1024); 2294 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2295 "Max Controller Queue Depth(%d)\n", 2296 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2297 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2298 ioc->name, ioc->shost->sg_tablesize); 2299 return 0; 2300 2301 out: 2302 _base_release_memory_pools(ioc); 2303 return -ENOMEM; 2304} 2305 2306 2307/** 2308 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2309 * @ioc: Pointer to MPT_ADAPTER structure 2310 * @cooked: Request raw or cooked IOC state 2311 * 2312 * Returns all IOC Doorbell register bits if cooked==0, else just the 2313 * Doorbell bits in MPI_IOC_STATE_MASK. 2314 */ 2315u32 2316mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2317{ 2318 u32 s, sc; 2319 2320 s = readl(&ioc->chip->Doorbell); 2321 sc = s & MPI2_IOC_STATE_MASK; 2322 return cooked ? sc : s; 2323} 2324 2325/** 2326 * _base_wait_on_iocstate - waiting on a particular ioc state 2327 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2328 * @timeout: timeout in second 2329 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2330 * 2331 * Returns 0 for success, non-zero for failure. 2332 */ 2333static int 2334_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2335 int sleep_flag) 2336{ 2337 u32 count, cntdn; 2338 u32 current_state; 2339 2340 count = 0; 2341 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2342 do { 2343 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2344 if (current_state == ioc_state) 2345 return 0; 2346 if (count && current_state == MPI2_IOC_STATE_FAULT) 2347 break; 2348 if (sleep_flag == CAN_SLEEP) 2349 msleep(1); 2350 else 2351 udelay(500); 2352 count++; 2353 } while (--cntdn); 2354 2355 return current_state; 2356} 2357 2358/** 2359 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2360 * a write to the doorbell) 2361 * @ioc: per adapter object 2362 * @timeout: timeout in second 2363 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2364 * 2365 * Returns 0 for success, non-zero for failure. 2366 * 2367 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2368 */ 2369static int 2370_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2371 int sleep_flag) 2372{ 2373 u32 cntdn, count; 2374 u32 int_status; 2375 2376 count = 0; 2377 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2378 do { 2379 int_status = readl(&ioc->chip->HostInterruptStatus); 2380 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2381 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2382 "successfull count(%d), timeout(%d)\n", ioc->name, 2383 __func__, count, timeout)); 2384 return 0; 2385 } 2386 if (sleep_flag == CAN_SLEEP) 2387 msleep(1); 2388 else 2389 udelay(500); 2390 count++; 2391 } while (--cntdn); 2392 2393 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2394 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2395 return -EFAULT; 2396} 2397 2398/** 2399 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2400 * @ioc: per adapter object 2401 * @timeout: timeout in second 2402 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2403 * 2404 * Returns 0 for success, non-zero for failure. 2405 * 2406 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2407 * doorbell. 2408 */ 2409static int 2410_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2411 int sleep_flag) 2412{ 2413 u32 cntdn, count; 2414 u32 int_status; 2415 u32 doorbell; 2416 2417 count = 0; 2418 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2419 do { 2420 int_status = readl(&ioc->chip->HostInterruptStatus); 2421 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2422 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2423 "successfull count(%d), timeout(%d)\n", ioc->name, 2424 __func__, count, timeout)); 2425 return 0; 2426 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2427 doorbell = readl(&ioc->chip->Doorbell); 2428 if ((doorbell & MPI2_IOC_STATE_MASK) == 2429 MPI2_IOC_STATE_FAULT) { 2430 mpt2sas_base_fault_info(ioc , doorbell); 2431 return -EFAULT; 2432 } 2433 } else if (int_status == 0xFFFFFFFF) 2434 goto out; 2435 2436 if (sleep_flag == CAN_SLEEP) 2437 msleep(1); 2438 else 2439 udelay(500); 2440 count++; 2441 } while (--cntdn); 2442 2443 out: 2444 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2445 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2446 return -EFAULT; 2447} 2448 2449/** 2450 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2451 * @ioc: per adapter object 2452 * @timeout: timeout in second 2453 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2454 * 2455 * Returns 0 for success, non-zero for failure. 2456 * 2457 */ 2458static int 2459_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2460 int sleep_flag) 2461{ 2462 u32 cntdn, count; 2463 u32 doorbell_reg; 2464 2465 count = 0; 2466 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2467 do { 2468 doorbell_reg = readl(&ioc->chip->Doorbell); 2469 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2470 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2471 "successfull count(%d), timeout(%d)\n", ioc->name, 2472 __func__, count, timeout)); 2473 return 0; 2474 } 2475 if (sleep_flag == CAN_SLEEP) 2476 msleep(1); 2477 else 2478 udelay(500); 2479 count++; 2480 } while (--cntdn); 2481 2482 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2483 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2484 return -EFAULT; 2485} 2486 2487/** 2488 * _base_send_ioc_reset - send doorbell reset 2489 * @ioc: per adapter object 2490 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2491 * @timeout: timeout in second 2492 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2493 * 2494 * Returns 0 for success, non-zero for failure. 2495 */ 2496static int 2497_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2498 int sleep_flag) 2499{ 2500 u32 ioc_state; 2501 int r = 0; 2502 2503 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2504 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2505 ioc->name, __func__); 2506 return -EFAULT; 2507 } 2508 2509 if (!(ioc->facts.IOCCapabilities & 2510 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2511 return -EFAULT; 2512 2513 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2514 2515 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2516 &ioc->chip->Doorbell); 2517 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2518 r = -EFAULT; 2519 goto out; 2520 } 2521 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2522 timeout, sleep_flag); 2523 if (ioc_state) { 2524 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2525 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2526 r = -EFAULT; 2527 goto out; 2528 } 2529 out: 2530 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2531 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2532 return r; 2533} 2534 2535/** 2536 * _base_handshake_req_reply_wait - send request thru doorbell interface 2537 * @ioc: per adapter object 2538 * @request_bytes: request length 2539 * @request: pointer having request payload 2540 * @reply_bytes: reply length 2541 * @reply: pointer to reply payload 2542 * @timeout: timeout in second 2543 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2544 * 2545 * Returns 0 for success, non-zero for failure. 2546 */ 2547static int 2548_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2549 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2550{ 2551 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2552 int i; 2553 u8 failed; 2554 u16 dummy; 2555 u32 *mfp; 2556 2557 /* make sure doorbell is not in use */ 2558 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2559 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2560 " (line=%d)\n", ioc->name, __LINE__); 2561 return -EFAULT; 2562 } 2563 2564 /* clear pending doorbell interrupts from previous state changes */ 2565 if (readl(&ioc->chip->HostInterruptStatus) & 2566 MPI2_HIS_IOC2SYS_DB_STATUS) 2567 writel(0, &ioc->chip->HostInterruptStatus); 2568 2569 /* send message to ioc */ 2570 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2571 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2572 &ioc->chip->Doorbell); 2573 2574 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) { 2575 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2576 "int failed (line=%d)\n", ioc->name, __LINE__); 2577 return -EFAULT; 2578 } 2579 writel(0, &ioc->chip->HostInterruptStatus); 2580 2581 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2582 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2583 "ack failed (line=%d)\n", ioc->name, __LINE__); 2584 return -EFAULT; 2585 } 2586 2587 /* send message 32-bits at a time */ 2588 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2589 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2590 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2591 failed = 1; 2592 } 2593 2594 if (failed) { 2595 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2596 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2597 return -EFAULT; 2598 } 2599 2600 /* now wait for the reply */ 2601 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2602 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2603 "int failed (line=%d)\n", ioc->name, __LINE__); 2604 return -EFAULT; 2605 } 2606 2607 /* read the first two 16-bits, it gives the total length of the reply */ 2608 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2609 & MPI2_DOORBELL_DATA_MASK); 2610 writel(0, &ioc->chip->HostInterruptStatus); 2611 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2612 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2613 "int failed (line=%d)\n", ioc->name, __LINE__); 2614 return -EFAULT; 2615 } 2616 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2617 & MPI2_DOORBELL_DATA_MASK); 2618 writel(0, &ioc->chip->HostInterruptStatus); 2619 2620 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2621 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2622 printk(MPT2SAS_ERR_FMT "doorbell " 2623 "handshake int failed (line=%d)\n", ioc->name, 2624 __LINE__); 2625 return -EFAULT; 2626 } 2627 if (i >= reply_bytes/2) /* overflow case */ 2628 dummy = readl(&ioc->chip->Doorbell); 2629 else 2630 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2631 & MPI2_DOORBELL_DATA_MASK); 2632 writel(0, &ioc->chip->HostInterruptStatus); 2633 } 2634 2635 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2636 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2637 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2638 " (line=%d)\n", ioc->name, __LINE__)); 2639 } 2640 writel(0, &ioc->chip->HostInterruptStatus); 2641 2642 if (ioc->logging_level & MPT_DEBUG_INIT) { 2643 mfp = (u32 *)reply; 2644 printk(KERN_DEBUG "\toffset:data\n"); 2645 for (i = 0; i < reply_bytes/4; i++) 2646 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2647 le32_to_cpu(mfp[i])); 2648 } 2649 return 0; 2650} 2651 2652/** 2653 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2654 * @ioc: per adapter object 2655 * @mpi_reply: the reply payload from FW 2656 * @mpi_request: the request payload sent to FW 2657 * 2658 * The SAS IO Unit Control Request message allows the host to perform low-level 2659 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2660 * to obtain the IOC assigned device handles for a device if it has other 2661 * identifying information about the device, in addition allows the host to 2662 * remove IOC resources associated with the device. 2663 * 2664 * Returns 0 for success, non-zero for failure. 2665 */ 2666int 2667mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2668 Mpi2SasIoUnitControlReply_t *mpi_reply, 2669 Mpi2SasIoUnitControlRequest_t *mpi_request) 2670{ 2671 u16 smid; 2672 u32 ioc_state; 2673 unsigned long timeleft; 2674 u8 issue_reset; 2675 int rc; 2676 void *request; 2677 u16 wait_state_count; 2678 2679 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2680 __func__)); 2681 2682 mutex_lock(&ioc->base_cmds.mutex); 2683 2684 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2685 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2686 ioc->name, __func__); 2687 rc = -EAGAIN; 2688 goto out; 2689 } 2690 2691 wait_state_count = 0; 2692 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2693 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2694 if (wait_state_count++ == 10) { 2695 printk(MPT2SAS_ERR_FMT 2696 "%s: failed due to ioc not operational\n", 2697 ioc->name, __func__); 2698 rc = -EFAULT; 2699 goto out; 2700 } 2701 ssleep(1); 2702 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2703 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2704 "operational state(count=%d)\n", ioc->name, 2705 __func__, wait_state_count); 2706 } 2707 2708 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2709 if (!smid) { 2710 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2711 ioc->name, __func__); 2712 rc = -EAGAIN; 2713 goto out; 2714 } 2715 2716 rc = 0; 2717 ioc->base_cmds.status = MPT2_CMD_PENDING; 2718 request = mpt2sas_base_get_msg_frame(ioc, smid); 2719 ioc->base_cmds.smid = smid; 2720 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2721 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2722 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2723 ioc->ioc_link_reset_in_progress = 1; 2724 mpt2sas_base_put_smid_default(ioc, smid); 2725 init_completion(&ioc->base_cmds.done); 2726 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2727 msecs_to_jiffies(10000)); 2728 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2729 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2730 ioc->ioc_link_reset_in_progress) 2731 ioc->ioc_link_reset_in_progress = 0; 2732 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2733 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2734 ioc->name, __func__); 2735 _debug_dump_mf(mpi_request, 2736 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2737 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2738 issue_reset = 1; 2739 goto issue_host_reset; 2740 } 2741 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2742 memcpy(mpi_reply, ioc->base_cmds.reply, 2743 sizeof(Mpi2SasIoUnitControlReply_t)); 2744 else 2745 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2746 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2747 goto out; 2748 2749 issue_host_reset: 2750 if (issue_reset) 2751 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2752 FORCE_BIG_HAMMER); 2753 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2754 rc = -EFAULT; 2755 out: 2756 mutex_unlock(&ioc->base_cmds.mutex); 2757 return rc; 2758} 2759 2760 2761/** 2762 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2763 * @ioc: per adapter object 2764 * @mpi_reply: the reply payload from FW 2765 * @mpi_request: the request payload sent to FW 2766 * 2767 * The SCSI Enclosure Processor request message causes the IOC to 2768 * communicate with SES devices to control LED status signals. 2769 * 2770 * Returns 0 for success, non-zero for failure. 2771 */ 2772int 2773mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2774 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2775{ 2776 u16 smid; 2777 u32 ioc_state; 2778 unsigned long timeleft; 2779 u8 issue_reset; 2780 int rc; 2781 void *request; 2782 u16 wait_state_count; 2783 2784 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2785 __func__)); 2786 2787 mutex_lock(&ioc->base_cmds.mutex); 2788 2789 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2790 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2791 ioc->name, __func__); 2792 rc = -EAGAIN; 2793 goto out; 2794 } 2795 2796 wait_state_count = 0; 2797 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2798 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2799 if (wait_state_count++ == 10) { 2800 printk(MPT2SAS_ERR_FMT 2801 "%s: failed due to ioc not operational\n", 2802 ioc->name, __func__); 2803 rc = -EFAULT; 2804 goto out; 2805 } 2806 ssleep(1); 2807 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2808 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2809 "operational state(count=%d)\n", ioc->name, 2810 __func__, wait_state_count); 2811 } 2812 2813 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2814 if (!smid) { 2815 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2816 ioc->name, __func__); 2817 rc = -EAGAIN; 2818 goto out; 2819 } 2820 2821 rc = 0; 2822 ioc->base_cmds.status = MPT2_CMD_PENDING; 2823 request = mpt2sas_base_get_msg_frame(ioc, smid); 2824 ioc->base_cmds.smid = smid; 2825 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2826 mpt2sas_base_put_smid_default(ioc, smid); 2827 init_completion(&ioc->base_cmds.done); 2828 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2829 msecs_to_jiffies(10000)); 2830 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2831 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2832 ioc->name, __func__); 2833 _debug_dump_mf(mpi_request, 2834 sizeof(Mpi2SepRequest_t)/4); 2835 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2836 issue_reset = 1; 2837 goto issue_host_reset; 2838 } 2839 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2840 memcpy(mpi_reply, ioc->base_cmds.reply, 2841 sizeof(Mpi2SepReply_t)); 2842 else 2843 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2844 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2845 goto out; 2846 2847 issue_host_reset: 2848 if (issue_reset) 2849 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2850 FORCE_BIG_HAMMER); 2851 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2852 rc = -EFAULT; 2853 out: 2854 mutex_unlock(&ioc->base_cmds.mutex); 2855 return rc; 2856} 2857 2858/** 2859 * _base_get_port_facts - obtain port facts reply and save in ioc 2860 * @ioc: per adapter object 2861 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2862 * 2863 * Returns 0 for success, non-zero for failure. 2864 */ 2865static int 2866_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2867{ 2868 Mpi2PortFactsRequest_t mpi_request; 2869 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2870 int mpi_reply_sz, mpi_request_sz, r; 2871 2872 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2873 __func__)); 2874 2875 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2876 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2877 memset(&mpi_request, 0, mpi_request_sz); 2878 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2879 mpi_request.PortNumber = port; 2880 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2881 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2882 2883 if (r != 0) { 2884 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2885 ioc->name, __func__, r); 2886 return r; 2887 } 2888 2889 pfacts = &ioc->pfacts[port]; 2890 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2891 pfacts->PortNumber = mpi_reply.PortNumber; 2892 pfacts->VP_ID = mpi_reply.VP_ID; 2893 pfacts->VF_ID = mpi_reply.VF_ID; 2894 pfacts->MaxPostedCmdBuffers = 2895 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2896 2897 return 0; 2898} 2899 2900/** 2901 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2902 * @ioc: per adapter object 2903 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2904 * 2905 * Returns 0 for success, non-zero for failure. 2906 */ 2907static int 2908_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2909{ 2910 Mpi2IOCFactsRequest_t mpi_request; 2911 Mpi2IOCFactsReply_t mpi_reply, *facts; 2912 int mpi_reply_sz, mpi_request_sz, r; 2913 2914 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2915 __func__)); 2916 2917 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2918 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2919 memset(&mpi_request, 0, mpi_request_sz); 2920 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2921 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2922 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2923 2924 if (r != 0) { 2925 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2926 ioc->name, __func__, r); 2927 return r; 2928 } 2929 2930 facts = &ioc->facts; 2931 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2932 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2933 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2934 facts->VP_ID = mpi_reply.VP_ID; 2935 facts->VF_ID = mpi_reply.VF_ID; 2936 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2937 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2938 facts->WhoInit = mpi_reply.WhoInit; 2939 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2940 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2941 facts->MaxReplyDescriptorPostQueueDepth = 2942 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2943 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2944 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2945 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2946 ioc->ir_firmware = 1; 2947 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2948 facts->IOCRequestFrameSize = 2949 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2950 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2951 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2952 ioc->shost->max_id = -1; 2953 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2954 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2955 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2956 facts->HighPriorityCredit = 2957 le16_to_cpu(mpi_reply.HighPriorityCredit); 2958 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2959 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2960 2961 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2962 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2963 facts->MaxChainDepth)); 2964 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2965 "reply frame size(%d)\n", ioc->name, 2966 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2967 return 0; 2968} 2969 2970/** 2971 * _base_send_ioc_init - send ioc_init to firmware 2972 * @ioc: per adapter object 2973 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2974 * 2975 * Returns 0 for success, non-zero for failure. 2976 */ 2977static int 2978_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2979{ 2980 Mpi2IOCInitRequest_t mpi_request; 2981 Mpi2IOCInitReply_t mpi_reply; 2982 int r; 2983 struct timeval current_time; 2984 u16 ioc_status; 2985 2986 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2987 __func__)); 2988 2989 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2990 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2991 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2992 mpi_request.VF_ID = 0; /* TODO */ 2993 mpi_request.VP_ID = 0; 2994 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2995 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2996 2997 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2998 * removed and made reserved. For those with older firmware will need 2999 * this fix. It was decided that the Reply and Request frame sizes are 3000 * the same. 3001 */ 3002 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 3003 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 3004/* mpi_request.SystemReplyFrameSize = 3005 * cpu_to_le16(ioc->reply_sz); 3006 */ 3007 } 3008 3009 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 3010 mpi_request.ReplyDescriptorPostQueueDepth = 3011 cpu_to_le16(ioc->reply_post_queue_depth); 3012 mpi_request.ReplyFreeQueueDepth = 3013 cpu_to_le16(ioc->reply_free_queue_depth); 3014 3015#if BITS_PER_LONG > 32 3016 mpi_request.SenseBufferAddressHigh = 3017 cpu_to_le32(ioc->sense_dma >> 32); 3018 mpi_request.SystemReplyAddressHigh = 3019 cpu_to_le32(ioc->reply_dma >> 32); 3020 mpi_request.SystemRequestFrameBaseAddress = 3021 cpu_to_le64(ioc->request_dma); 3022 mpi_request.ReplyFreeQueueAddress = 3023 cpu_to_le64(ioc->reply_free_dma); 3024 mpi_request.ReplyDescriptorPostQueueAddress = 3025 cpu_to_le64(ioc->reply_post_free_dma); 3026#else 3027 mpi_request.SystemRequestFrameBaseAddress = 3028 cpu_to_le32(ioc->request_dma); 3029 mpi_request.ReplyFreeQueueAddress = 3030 cpu_to_le32(ioc->reply_free_dma); 3031 mpi_request.ReplyDescriptorPostQueueAddress = 3032 cpu_to_le32(ioc->reply_post_free_dma); 3033#endif 3034 3035 /* This time stamp specifies number of milliseconds 3036 * since epoch ~ midnight January 1, 1970. 3037 */ 3038 do_gettimeofday(¤t_time); 3039 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 + 3040 (current_time.tv_usec / 1000)); 3041 3042 if (ioc->logging_level & MPT_DEBUG_INIT) { 3043 u32 *mfp; 3044 int i; 3045 3046 mfp = (u32 *)&mpi_request; 3047 printk(KERN_DEBUG "\toffset:data\n"); 3048 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 3049 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 3050 le32_to_cpu(mfp[i])); 3051 } 3052 3053 r = _base_handshake_req_reply_wait(ioc, 3054 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 3055 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 3056 sleep_flag); 3057 3058 if (r != 0) { 3059 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3060 ioc->name, __func__, r); 3061 return r; 3062 } 3063 3064 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK; 3065 if (ioc_status != MPI2_IOCSTATUS_SUCCESS || 3066 mpi_reply.IOCLogInfo) { 3067 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 3068 r = -EIO; 3069 } 3070 3071 return 0; 3072} 3073 3074/** 3075 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 3076 * @ioc: per adapter object 3077 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3078 * 3079 * Returns 0 for success, non-zero for failure. 3080 */ 3081static int 3082_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3083{ 3084 Mpi2PortEnableRequest_t *mpi_request; 3085 u32 ioc_state; 3086 unsigned long timeleft; 3087 int r = 0; 3088 u16 smid; 3089 3090 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 3091 3092 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3093 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3094 ioc->name, __func__); 3095 return -EAGAIN; 3096 } 3097 3098 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3099 if (!smid) { 3100 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3101 ioc->name, __func__); 3102 return -EAGAIN; 3103 } 3104 3105 ioc->base_cmds.status = MPT2_CMD_PENDING; 3106 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3107 ioc->base_cmds.smid = smid; 3108 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 3109 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 3110 mpi_request->VF_ID = 0; /* TODO */ 3111 mpi_request->VP_ID = 0; 3112 3113 mpt2sas_base_put_smid_default(ioc, smid); 3114 init_completion(&ioc->base_cmds.done); 3115 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 3116 300*HZ); 3117 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3118 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3119 ioc->name, __func__); 3120 _debug_dump_mf(mpi_request, 3121 sizeof(Mpi2PortEnableRequest_t)/4); 3122 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3123 r = -EFAULT; 3124 else 3125 r = -ETIME; 3126 goto out; 3127 } else 3128 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3129 ioc->name, __func__)); 3130 3131 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 3132 60, sleep_flag); 3133 if (ioc_state) { 3134 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 3135 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3136 r = -EFAULT; 3137 } 3138 out: 3139 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3140 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 3141 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 3142 return r; 3143} 3144 3145/** 3146 * _base_unmask_events - turn on notification for this event 3147 * @ioc: per adapter object 3148 * @event: firmware event 3149 * 3150 * The mask is stored in ioc->event_masks. 3151 */ 3152static void 3153_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 3154{ 3155 u32 desired_event; 3156 3157 if (event >= 128) 3158 return; 3159 3160 desired_event = (1 << (event % 32)); 3161 3162 if (event < 32) 3163 ioc->event_masks[0] &= ~desired_event; 3164 else if (event < 64) 3165 ioc->event_masks[1] &= ~desired_event; 3166 else if (event < 96) 3167 ioc->event_masks[2] &= ~desired_event; 3168 else if (event < 128) 3169 ioc->event_masks[3] &= ~desired_event; 3170} 3171 3172/** 3173 * _base_event_notification - send event notification 3174 * @ioc: per adapter object 3175 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3176 * 3177 * Returns 0 for success, non-zero for failure. 3178 */ 3179static int 3180_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3181{ 3182 Mpi2EventNotificationRequest_t *mpi_request; 3183 unsigned long timeleft; 3184 u16 smid; 3185 int r = 0; 3186 int i; 3187 3188 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3189 __func__)); 3190 3191 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3192 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3193 ioc->name, __func__); 3194 return -EAGAIN; 3195 } 3196 3197 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3198 if (!smid) { 3199 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3200 ioc->name, __func__); 3201 return -EAGAIN; 3202 } 3203 ioc->base_cmds.status = MPT2_CMD_PENDING; 3204 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3205 ioc->base_cmds.smid = smid; 3206 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 3207 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 3208 mpi_request->VF_ID = 0; /* TODO */ 3209 mpi_request->VP_ID = 0; 3210 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3211 mpi_request->EventMasks[i] = 3212 cpu_to_le32(ioc->event_masks[i]); 3213 mpt2sas_base_put_smid_default(ioc, smid); 3214 init_completion(&ioc->base_cmds.done); 3215 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 3216 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3217 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3218 ioc->name, __func__); 3219 _debug_dump_mf(mpi_request, 3220 sizeof(Mpi2EventNotificationRequest_t)/4); 3221 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3222 r = -EFAULT; 3223 else 3224 r = -ETIME; 3225 } else 3226 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3227 ioc->name, __func__)); 3228 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3229 return r; 3230} 3231 3232/** 3233 * mpt2sas_base_validate_event_type - validating event types 3234 * @ioc: per adapter object 3235 * @event: firmware event 3236 * 3237 * This will turn on firmware event notification when application 3238 * ask for that event. We don't mask events that are already enabled. 3239 */ 3240void 3241mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 3242{ 3243 int i, j; 3244 u32 event_mask, desired_event; 3245 u8 send_update_to_fw; 3246 3247 for (i = 0, send_update_to_fw = 0; i < 3248 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 3249 event_mask = ~event_type[i]; 3250 desired_event = 1; 3251 for (j = 0; j < 32; j++) { 3252 if (!(event_mask & desired_event) && 3253 (ioc->event_masks[i] & desired_event)) { 3254 ioc->event_masks[i] &= ~desired_event; 3255 send_update_to_fw = 1; 3256 } 3257 desired_event = (desired_event << 1); 3258 } 3259 } 3260 3261 if (!send_update_to_fw) 3262 return; 3263 3264 mutex_lock(&ioc->base_cmds.mutex); 3265 _base_event_notification(ioc, CAN_SLEEP); 3266 mutex_unlock(&ioc->base_cmds.mutex); 3267} 3268 3269/** 3270 * _base_diag_reset - the "big hammer" start of day reset 3271 * @ioc: per adapter object 3272 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3273 * 3274 * Returns 0 for success, non-zero for failure. 3275 */ 3276static int 3277_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3278{ 3279 u32 host_diagnostic; 3280 u32 ioc_state; 3281 u32 count; 3282 u32 hcb_size; 3283 3284 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3285 3286 _base_save_msix_table(ioc); 3287 3288 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 3289 ioc->name)); 3290 3291 count = 0; 3292 do { 3293 /* Write magic sequence to WriteSequence register 3294 * Loop until in diagnostic mode 3295 */ 3296 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 3297 "sequence\n", ioc->name)); 3298 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3299 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3300 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3301 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3302 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3303 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3304 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3305 3306 /* wait 100 msec */ 3307 if (sleep_flag == CAN_SLEEP) 3308 msleep(100); 3309 else 3310 mdelay(100); 3311 3312 if (count++ > 20) 3313 goto out; 3314 3315 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3316 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 3317 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3318 ioc->name, count, host_diagnostic)); 3319 3320 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3321 3322 hcb_size = readl(&ioc->chip->HCBSize); 3323 3324 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 3325 ioc->name)); 3326 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3327 &ioc->chip->HostDiagnostic); 3328 3329 /* don't access any registers for 50 milliseconds */ 3330 msleep(50); 3331 3332 /* 300 second max wait */ 3333 for (count = 0; count < 3000000 ; count++) { 3334 3335 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3336 3337 if (host_diagnostic == 0xFFFFFFFF) 3338 goto out; 3339 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3340 break; 3341 3342 /* wait 100 msec */ 3343 if (sleep_flag == CAN_SLEEP) 3344 msleep(1); 3345 else 3346 mdelay(1); 3347 } 3348 3349 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3350 3351 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3352 "assuming the HCB Address points to good F/W\n", 3353 ioc->name)); 3354 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3355 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3356 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3357 3358 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3359 "re-enable the HCDW\n", ioc->name)); 3360 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3361 &ioc->chip->HCBSize); 3362 } 3363 3364 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3365 ioc->name)); 3366 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3367 &ioc->chip->HostDiagnostic); 3368 3369 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3370 "diagnostic register\n", ioc->name)); 3371 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3372 3373 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3374 "READY state\n", ioc->name)); 3375 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3376 sleep_flag); 3377 if (ioc_state) { 3378 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3379 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3380 goto out; 3381 } 3382 3383 _base_restore_msix_table(ioc); 3384 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3385 return 0; 3386 3387 out: 3388 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3389 return -EFAULT; 3390} 3391 3392/** 3393 * _base_make_ioc_ready - put controller in READY state 3394 * @ioc: per adapter object 3395 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3396 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3397 * 3398 * Returns 0 for success, non-zero for failure. 3399 */ 3400static int 3401_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3402 enum reset_type type) 3403{ 3404 u32 ioc_state; 3405 int rc; 3406 3407 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3408 __func__)); 3409 3410 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3411 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3412 ioc->name, __func__, ioc_state)); 3413 3414 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3415 return 0; 3416 3417 if (ioc_state & MPI2_DOORBELL_USED) { 3418 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3419 "active!\n", ioc->name)); 3420 goto issue_diag_reset; 3421 } 3422 3423 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3424 mpt2sas_base_fault_info(ioc, ioc_state & 3425 MPI2_DOORBELL_DATA_MASK); 3426 goto issue_diag_reset; 3427 } 3428 3429 if (type == FORCE_BIG_HAMMER) 3430 goto issue_diag_reset; 3431 3432 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3433 if (!(_base_send_ioc_reset(ioc, 3434 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) { 3435 ioc->ioc_reset_count++; 3436 return 0; 3437 } 3438 3439 issue_diag_reset: 3440 rc = _base_diag_reset(ioc, CAN_SLEEP); 3441 ioc->ioc_reset_count++; 3442 return rc; 3443} 3444 3445/** 3446 * _base_make_ioc_operational - put controller in OPERATIONAL state 3447 * @ioc: per adapter object 3448 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3449 * 3450 * Returns 0 for success, non-zero for failure. 3451 */ 3452static int 3453_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3454{ 3455 int r, i; 3456 unsigned long flags; 3457 u32 reply_address; 3458 u16 smid; 3459 struct _tr_list *delayed_tr, *delayed_tr_next; 3460 3461 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3462 __func__)); 3463 3464 /* clean the delayed target reset list */ 3465 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 3466 &ioc->delayed_tr_list, list) { 3467 list_del(&delayed_tr->list); 3468 kfree(delayed_tr); 3469 } 3470 3471 /* initialize the scsi lookup free list */ 3472 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3473 INIT_LIST_HEAD(&ioc->free_list); 3474 smid = 1; 3475 for (i = 0; i < ioc->scsiio_depth; i++, smid++) { 3476 ioc->scsi_lookup[i].cb_idx = 0xFF; 3477 ioc->scsi_lookup[i].smid = smid; 3478 ioc->scsi_lookup[i].scmd = NULL; 3479 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3480 &ioc->free_list); 3481 } 3482 3483 /* hi-priority queue */ 3484 INIT_LIST_HEAD(&ioc->hpr_free_list); 3485 smid = ioc->hi_priority_smid; 3486 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { 3487 ioc->hpr_lookup[i].cb_idx = 0xFF; 3488 ioc->hpr_lookup[i].smid = smid; 3489 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 3490 &ioc->hpr_free_list); 3491 } 3492 3493 /* internal queue */ 3494 INIT_LIST_HEAD(&ioc->internal_free_list); 3495 smid = ioc->internal_smid; 3496 for (i = 0; i < ioc->internal_depth; i++, smid++) { 3497 ioc->internal_lookup[i].cb_idx = 0xFF; 3498 ioc->internal_lookup[i].smid = smid; 3499 list_add_tail(&ioc->internal_lookup[i].tracker_list, 3500 &ioc->internal_free_list); 3501 } 3502 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3503 3504 /* initialize Reply Free Queue */ 3505 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3506 i < ioc->reply_free_queue_depth ; i++, reply_address += 3507 ioc->reply_sz) 3508 ioc->reply_free[i] = cpu_to_le32(reply_address); 3509 3510 /* initialize Reply Post Free Queue */ 3511 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3512 ioc->reply_post_free[i].Words = ULLONG_MAX; 3513 3514 r = _base_send_ioc_init(ioc, sleep_flag); 3515 if (r) 3516 return r; 3517 3518 /* initialize the index's */ 3519 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3520 ioc->reply_post_host_index = 0; 3521 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3522 writel(0, &ioc->chip->ReplyPostHostIndex); 3523 3524 _base_unmask_interrupts(ioc); 3525 r = _base_event_notification(ioc, sleep_flag); 3526 if (r) 3527 return r; 3528 3529 if (sleep_flag == CAN_SLEEP) 3530 _base_static_config_pages(ioc); 3531 3532 if (ioc->wait_for_port_enable_to_complete) { 3533 if (diag_buffer_enable != 0) 3534 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable); 3535 if (disable_discovery > 0) 3536 return r; 3537 } 3538 3539 r = _base_send_port_enable(ioc, sleep_flag); 3540 if (r) 3541 return r; 3542 3543 return r; 3544} 3545 3546/** 3547 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3548 * @ioc: per adapter object 3549 * 3550 * Return nothing. 3551 */ 3552void 3553mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3554{ 3555 struct pci_dev *pdev = ioc->pdev; 3556 3557 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3558 __func__)); 3559 3560 _base_mask_interrupts(ioc); 3561 ioc->shost_recovery = 1; 3562 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3563 ioc->shost_recovery = 0; 3564 if (ioc->pci_irq) { 3565 synchronize_irq(pdev->irq); 3566 free_irq(ioc->pci_irq, ioc); 3567 } 3568 _base_disable_msix(ioc); 3569 if (ioc->chip_phys) 3570 iounmap(ioc->chip); 3571 ioc->pci_irq = -1; 3572 ioc->chip_phys = 0; 3573 pci_release_selected_regions(ioc->pdev, ioc->bars); 3574 pci_disable_pcie_error_reporting(pdev); 3575 pci_disable_device(pdev); 3576 return; 3577} 3578 3579/** 3580 * mpt2sas_base_attach - attach controller instance 3581 * @ioc: per adapter object 3582 * 3583 * Returns 0 for success, non-zero for failure. 3584 */ 3585int 3586mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3587{ 3588 int r, i; 3589 3590 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3591 __func__)); 3592 3593 r = mpt2sas_base_map_resources(ioc); 3594 if (r) 3595 return r; 3596 3597 pci_set_drvdata(ioc->pdev, ioc->shost); 3598 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3599 if (r) 3600 goto out_free_resources; 3601 3602 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3603 if (r) 3604 goto out_free_resources; 3605 3606 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3607 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3608 if (!ioc->pfacts) { 3609 r = -ENOMEM; 3610 goto out_free_resources; 3611 } 3612 3613 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3614 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3615 if (r) 3616 goto out_free_resources; 3617 } 3618 3619 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3620 if (r) 3621 goto out_free_resources; 3622 3623 init_waitqueue_head(&ioc->reset_wq); 3624 3625 ioc->fwfault_debug = mpt2sas_fwfault_debug; 3626 3627 /* base internal command bits */ 3628 mutex_init(&ioc->base_cmds.mutex); 3629 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3630 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3631 3632 /* transport internal command bits */ 3633 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3634 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3635 mutex_init(&ioc->transport_cmds.mutex); 3636 3637 /* scsih internal command bits */ 3638 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3639 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED; 3640 mutex_init(&ioc->scsih_cmds.mutex); 3641 3642 /* task management internal command bits */ 3643 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3644 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3645 mutex_init(&ioc->tm_cmds.mutex); 3646 3647 /* config page internal command bits */ 3648 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3649 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3650 mutex_init(&ioc->config_cmds.mutex); 3651 3652 /* ctl module internal command bits */ 3653 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3654 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3655 mutex_init(&ioc->ctl_cmds.mutex); 3656 3657 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply || 3658 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply || 3659 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) { 3660 r = -ENOMEM; 3661 goto out_free_resources; 3662 } 3663 3664 init_completion(&ioc->shost_recovery_done); 3665 3666 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3667 ioc->event_masks[i] = -1; 3668 3669 /* here we enable the events we care about */ 3670 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3671 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3672 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3673 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3674 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3675 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3676 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3677 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3678 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3679 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3680 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3681 r = _base_make_ioc_operational(ioc, CAN_SLEEP); 3682 if (r) 3683 goto out_free_resources; 3684 3685 mpt2sas_base_start_watchdog(ioc); 3686 return 0; 3687 3688 out_free_resources: 3689 3690 ioc->remove_host = 1; 3691 mpt2sas_base_free_resources(ioc); 3692 _base_release_memory_pools(ioc); 3693 pci_set_drvdata(ioc->pdev, NULL); 3694 kfree(ioc->tm_cmds.reply); 3695 kfree(ioc->transport_cmds.reply); 3696 kfree(ioc->scsih_cmds.reply); 3697 kfree(ioc->config_cmds.reply); 3698 kfree(ioc->base_cmds.reply); 3699 kfree(ioc->ctl_cmds.reply); 3700 kfree(ioc->pfacts); 3701 ioc->ctl_cmds.reply = NULL; 3702 ioc->base_cmds.reply = NULL; 3703 ioc->tm_cmds.reply = NULL; 3704 ioc->scsih_cmds.reply = NULL; 3705 ioc->transport_cmds.reply = NULL; 3706 ioc->config_cmds.reply = NULL; 3707 ioc->pfacts = NULL; 3708 return r; 3709} 3710 3711 3712/** 3713 * mpt2sas_base_detach - remove controller instance 3714 * @ioc: per adapter object 3715 * 3716 * Return nothing. 3717 */ 3718void 3719mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3720{ 3721 3722 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3723 __func__)); 3724 3725 mpt2sas_base_stop_watchdog(ioc); 3726 mpt2sas_base_free_resources(ioc); 3727 _base_release_memory_pools(ioc); 3728 pci_set_drvdata(ioc->pdev, NULL); 3729 kfree(ioc->pfacts); 3730 kfree(ioc->ctl_cmds.reply); 3731 kfree(ioc->base_cmds.reply); 3732 kfree(ioc->tm_cmds.reply); 3733 kfree(ioc->transport_cmds.reply); 3734 kfree(ioc->scsih_cmds.reply); 3735 kfree(ioc->config_cmds.reply); 3736} 3737 3738/** 3739 * _base_reset_handler - reset callback handler (for base) 3740 * @ioc: per adapter object 3741 * @reset_phase: phase 3742 * 3743 * The handler for doing any required cleanup or initialization. 3744 * 3745 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3746 * MPT2_IOC_DONE_RESET 3747 * 3748 * Return nothing. 3749 */ 3750static void 3751_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3752{ 3753 switch (reset_phase) { 3754 case MPT2_IOC_PRE_RESET: 3755 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3756 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3757 break; 3758 case MPT2_IOC_AFTER_RESET: 3759 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3760 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3761 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3762 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3763 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3764 complete(&ioc->transport_cmds.done); 3765 } 3766 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3767 ioc->base_cmds.status |= MPT2_CMD_RESET; 3768 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3769 complete(&ioc->base_cmds.done); 3770 } 3771 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3772 ioc->config_cmds.status |= MPT2_CMD_RESET; 3773 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3774 ioc->config_cmds.smid = USHRT_MAX; 3775 complete(&ioc->config_cmds.done); 3776 } 3777 break; 3778 case MPT2_IOC_DONE_RESET: 3779 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3780 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3781 break; 3782 } 3783 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3784 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3785} 3786 3787/** 3788 * _wait_for_commands_to_complete - reset controller 3789 * @ioc: Pointer to MPT_ADAPTER structure 3790 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3791 * 3792 * This function waiting(3s) for all pending commands to complete 3793 * prior to putting controller in reset. 3794 */ 3795static void 3796_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3797{ 3798 u32 ioc_state; 3799 unsigned long flags; 3800 u16 i; 3801 3802 ioc->pending_io_count = 0; 3803 if (sleep_flag != CAN_SLEEP) 3804 return; 3805 3806 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3807 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3808 return; 3809 3810 /* pending command count */ 3811 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3812 for (i = 0; i < ioc->scsiio_depth; i++) 3813 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3814 ioc->pending_io_count++; 3815 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3816 3817 if (!ioc->pending_io_count) 3818 return; 3819 3820 /* wait for pending commands to complete */ 3821 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ); 3822} 3823 3824/** 3825 * mpt2sas_base_hard_reset_handler - reset controller 3826 * @ioc: Pointer to MPT_ADAPTER structure 3827 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3828 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3829 * 3830 * Returns 0 for success, non-zero for failure. 3831 */ 3832int 3833mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3834 enum reset_type type) 3835{ 3836 int r; 3837 unsigned long flags; 3838 3839 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3840 __func__)); 3841 3842 if (mpt2sas_fwfault_debug) 3843 mpt2sas_halt_firmware(ioc); 3844 3845 /* TODO - What we really should be doing is pulling 3846 * out all the code associated with NO_SLEEP; its never used. 3847 * That is legacy code from mpt fusion driver, ported over. 3848 * I will leave this BUG_ON here for now till its been resolved. 3849 */ 3850 BUG_ON(sleep_flag == NO_SLEEP); 3851 3852 /* wait for an active reset in progress to complete */ 3853 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) { 3854 do { 3855 ssleep(1); 3856 } while (ioc->shost_recovery == 1); 3857 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: exit\n", ioc->name, 3858 __func__)); 3859 return ioc->ioc_reset_in_progress_status; 3860 } 3861 3862 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3863 ioc->shost_recovery = 1; 3864 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3865 3866 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3867 _wait_for_commands_to_complete(ioc, sleep_flag); 3868 _base_mask_interrupts(ioc); 3869 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3870 if (r) 3871 goto out; 3872 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3873 r = _base_make_ioc_operational(ioc, sleep_flag); 3874 if (!r) 3875 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3876 out: 3877 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3878 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3879 3880 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3881 ioc->ioc_reset_in_progress_status = r; 3882 ioc->shost_recovery = 0; 3883 complete(&ioc->shost_recovery_done); 3884 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3885 mutex_unlock(&ioc->reset_in_progress_mutex); 3886 3887 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: exit\n", ioc->name, 3888 __func__)); 3889 return r; 3890} 3891