mpt2sas_base.c revision 96b681c6ad3f2f5013c0ffc558969ee6ac8c450b
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2009 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60#include <linux/time.h> 61 62#include "mpt2sas_base.h" 63 64static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 65 66#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 67#define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */ 68 69static int max_queue_depth = -1; 70module_param(max_queue_depth, int, 0); 71MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 72 73static int max_sgl_entries = -1; 74module_param(max_sgl_entries, int, 0); 75MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 76 77static int msix_disable = -1; 78module_param(msix_disable, int, 0); 79MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 80 81/* diag_buffer_enable is bitwise 82 * bit 0 set = TRACE 83 * bit 1 set = SNAPSHOT 84 * bit 2 set = EXTENDED 85 * 86 * Either bit can be set, or both 87 */ 88static int diag_buffer_enable; 89module_param(diag_buffer_enable, int, 0); 90MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers " 91 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)"); 92 93int mpt2sas_fwfault_debug; 94MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault " 95 "and halt firmware - (default=0)"); 96 97/** 98 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug. 99 * 100 */ 101static int 102_scsih_set_fwfault_debug(const char *val, struct kernel_param *kp) 103{ 104 int ret = param_set_int(val, kp); 105 struct MPT2SAS_ADAPTER *ioc; 106 107 if (ret) 108 return ret; 109 110 printk(KERN_INFO "setting logging_level(0x%08x)\n", 111 mpt2sas_fwfault_debug); 112 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) 113 ioc->fwfault_debug = mpt2sas_fwfault_debug; 114 return 0; 115} 116module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug, 117 param_get_int, &mpt2sas_fwfault_debug, 0644); 118 119/** 120 * _base_fault_reset_work - workq handling ioc fault conditions 121 * @work: input argument, used to derive ioc 122 * Context: sleep. 123 * 124 * Return nothing. 125 */ 126static void 127_base_fault_reset_work(struct work_struct *work) 128{ 129 struct MPT2SAS_ADAPTER *ioc = 130 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 131 unsigned long flags; 132 u32 doorbell; 133 int rc; 134 135 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 136 if (ioc->shost_recovery) 137 goto rearm_timer; 138 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 139 140 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 141 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 142 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 143 FORCE_BIG_HAMMER); 144 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 145 __func__, (rc == 0) ? "success" : "failed"); 146 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 147 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 148 mpt2sas_base_fault_info(ioc, doorbell & 149 MPI2_DOORBELL_DATA_MASK); 150 } 151 152 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 153 rearm_timer: 154 if (ioc->fault_reset_work_q) 155 queue_delayed_work(ioc->fault_reset_work_q, 156 &ioc->fault_reset_work, 157 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 158 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 159} 160 161/** 162 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 163 * @ioc: per adapter object 164 * Context: sleep. 165 * 166 * Return nothing. 167 */ 168void 169mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 170{ 171 unsigned long flags; 172 173 if (ioc->fault_reset_work_q) 174 return; 175 176 /* initialize fault polling */ 177 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 178 snprintf(ioc->fault_reset_work_q_name, 179 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 180 ioc->fault_reset_work_q = 181 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 182 if (!ioc->fault_reset_work_q) { 183 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 184 ioc->name, __func__, __LINE__); 185 return; 186 } 187 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 188 if (ioc->fault_reset_work_q) 189 queue_delayed_work(ioc->fault_reset_work_q, 190 &ioc->fault_reset_work, 191 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 192 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 193} 194 195/** 196 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 197 * @ioc: per adapter object 198 * Context: sleep. 199 * 200 * Return nothing. 201 */ 202void 203mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 204{ 205 unsigned long flags; 206 struct workqueue_struct *wq; 207 208 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 209 wq = ioc->fault_reset_work_q; 210 ioc->fault_reset_work_q = NULL; 211 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 212 if (wq) { 213 if (!cancel_delayed_work(&ioc->fault_reset_work)) 214 flush_workqueue(wq); 215 destroy_workqueue(wq); 216 } 217} 218 219/** 220 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 221 * @ioc: per adapter object 222 * @fault_code: fault code 223 * 224 * Return nothing. 225 */ 226void 227mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 228{ 229 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 230 ioc->name, fault_code); 231} 232 233/** 234 * mpt2sas_halt_firmware - halt's mpt controller firmware 235 * @ioc: per adapter object 236 * 237 * For debugging timeout related issues. Writing 0xCOFFEE00 238 * to the doorbell register will halt controller firmware. With 239 * the purpose to stop both driver and firmware, the enduser can 240 * obtain a ring buffer from controller UART. 241 */ 242void 243mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc) 244{ 245 u32 doorbell; 246 247 if (!ioc->fwfault_debug) 248 return; 249 250 dump_stack(); 251 252 doorbell = readl(&ioc->chip->Doorbell); 253 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 254 mpt2sas_base_fault_info(ioc , doorbell); 255 else { 256 writel(0xC0FFEE00, &ioc->chip->Doorbell); 257 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command " 258 "timeout\n", ioc->name); 259 } 260 261 panic("panic in %s\n", __func__); 262} 263 264#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 265/** 266 * _base_sas_ioc_info - verbose translation of the ioc status 267 * @ioc: per adapter object 268 * @mpi_reply: reply mf payload returned from firmware 269 * @request_hdr: request mf 270 * 271 * Return nothing. 272 */ 273static void 274_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 275 MPI2RequestHeader_t *request_hdr) 276{ 277 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 278 MPI2_IOCSTATUS_MASK; 279 char *desc = NULL; 280 u16 frame_sz; 281 char *func_str = NULL; 282 283 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 284 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 285 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 286 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 287 return; 288 289 switch (ioc_status) { 290 291/**************************************************************************** 292* Common IOCStatus values for all replies 293****************************************************************************/ 294 295 case MPI2_IOCSTATUS_INVALID_FUNCTION: 296 desc = "invalid function"; 297 break; 298 case MPI2_IOCSTATUS_BUSY: 299 desc = "busy"; 300 break; 301 case MPI2_IOCSTATUS_INVALID_SGL: 302 desc = "invalid sgl"; 303 break; 304 case MPI2_IOCSTATUS_INTERNAL_ERROR: 305 desc = "internal error"; 306 break; 307 case MPI2_IOCSTATUS_INVALID_VPID: 308 desc = "invalid vpid"; 309 break; 310 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 311 desc = "insufficient resources"; 312 break; 313 case MPI2_IOCSTATUS_INVALID_FIELD: 314 desc = "invalid field"; 315 break; 316 case MPI2_IOCSTATUS_INVALID_STATE: 317 desc = "invalid state"; 318 break; 319 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 320 desc = "op state not supported"; 321 break; 322 323/**************************************************************************** 324* Config IOCStatus values 325****************************************************************************/ 326 327 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 328 desc = "config invalid action"; 329 break; 330 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 331 desc = "config invalid type"; 332 break; 333 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 334 desc = "config invalid page"; 335 break; 336 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 337 desc = "config invalid data"; 338 break; 339 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 340 desc = "config no defaults"; 341 break; 342 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 343 desc = "config cant commit"; 344 break; 345 346/**************************************************************************** 347* SCSI IO Reply 348****************************************************************************/ 349 350 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 351 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 352 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 353 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 354 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 355 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 356 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 357 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 358 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 359 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 360 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 361 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 362 break; 363 364/**************************************************************************** 365* For use by SCSI Initiator and SCSI Target end-to-end data protection 366****************************************************************************/ 367 368 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 369 desc = "eedp guard error"; 370 break; 371 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 372 desc = "eedp ref tag error"; 373 break; 374 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 375 desc = "eedp app tag error"; 376 break; 377 378/**************************************************************************** 379* SCSI Target values 380****************************************************************************/ 381 382 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 383 desc = "target invalid io index"; 384 break; 385 case MPI2_IOCSTATUS_TARGET_ABORTED: 386 desc = "target aborted"; 387 break; 388 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 389 desc = "target no conn retryable"; 390 break; 391 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 392 desc = "target no connection"; 393 break; 394 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 395 desc = "target xfer count mismatch"; 396 break; 397 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 398 desc = "target data offset error"; 399 break; 400 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 401 desc = "target too much write data"; 402 break; 403 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 404 desc = "target iu too short"; 405 break; 406 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 407 desc = "target ack nak timeout"; 408 break; 409 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 410 desc = "target nak received"; 411 break; 412 413/**************************************************************************** 414* Serial Attached SCSI values 415****************************************************************************/ 416 417 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 418 desc = "smp request failed"; 419 break; 420 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 421 desc = "smp data overrun"; 422 break; 423 424/**************************************************************************** 425* Diagnostic Buffer Post / Diagnostic Release values 426****************************************************************************/ 427 428 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 429 desc = "diagnostic released"; 430 break; 431 default: 432 break; 433 } 434 435 if (!desc) 436 return; 437 438 switch (request_hdr->Function) { 439 case MPI2_FUNCTION_CONFIG: 440 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 441 func_str = "config_page"; 442 break; 443 case MPI2_FUNCTION_SCSI_TASK_MGMT: 444 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 445 func_str = "task_mgmt"; 446 break; 447 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 448 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 449 func_str = "sas_iounit_ctl"; 450 break; 451 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 452 frame_sz = sizeof(Mpi2SepRequest_t); 453 func_str = "enclosure"; 454 break; 455 case MPI2_FUNCTION_IOC_INIT: 456 frame_sz = sizeof(Mpi2IOCInitRequest_t); 457 func_str = "ioc_init"; 458 break; 459 case MPI2_FUNCTION_PORT_ENABLE: 460 frame_sz = sizeof(Mpi2PortEnableRequest_t); 461 func_str = "port_enable"; 462 break; 463 case MPI2_FUNCTION_SMP_PASSTHROUGH: 464 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 465 func_str = "smp_passthru"; 466 break; 467 default: 468 frame_sz = 32; 469 func_str = "unknown"; 470 break; 471 } 472 473 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 474 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 475 476 _debug_dump_mf(request_hdr, frame_sz/4); 477} 478 479/** 480 * _base_display_event_data - verbose translation of firmware asyn events 481 * @ioc: per adapter object 482 * @mpi_reply: reply mf payload returned from firmware 483 * 484 * Return nothing. 485 */ 486static void 487_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 488 Mpi2EventNotificationReply_t *mpi_reply) 489{ 490 char *desc = NULL; 491 u16 event; 492 493 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 494 return; 495 496 event = le16_to_cpu(mpi_reply->Event); 497 498 switch (event) { 499 case MPI2_EVENT_LOG_DATA: 500 desc = "Log Data"; 501 break; 502 case MPI2_EVENT_STATE_CHANGE: 503 desc = "Status Change"; 504 break; 505 case MPI2_EVENT_HARD_RESET_RECEIVED: 506 desc = "Hard Reset Received"; 507 break; 508 case MPI2_EVENT_EVENT_CHANGE: 509 desc = "Event Change"; 510 break; 511 case MPI2_EVENT_TASK_SET_FULL: 512 desc = "Task Set Full"; 513 break; 514 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 515 desc = "Device Status Change"; 516 break; 517 case MPI2_EVENT_IR_OPERATION_STATUS: 518 desc = "IR Operation Status"; 519 break; 520 case MPI2_EVENT_SAS_DISCOVERY: 521 desc = "Discovery"; 522 break; 523 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 524 desc = "SAS Broadcast Primitive"; 525 break; 526 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 527 desc = "SAS Init Device Status Change"; 528 break; 529 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 530 desc = "SAS Init Table Overflow"; 531 break; 532 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 533 desc = "SAS Topology Change List"; 534 break; 535 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 536 desc = "SAS Enclosure Device Status Change"; 537 break; 538 case MPI2_EVENT_IR_VOLUME: 539 desc = "IR Volume"; 540 break; 541 case MPI2_EVENT_IR_PHYSICAL_DISK: 542 desc = "IR Physical Disk"; 543 break; 544 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 545 desc = "IR Configuration Change List"; 546 break; 547 case MPI2_EVENT_LOG_ENTRY_ADDED: 548 desc = "Log Entry Added"; 549 break; 550 } 551 552 if (!desc) 553 return; 554 555 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 556} 557#endif 558 559/** 560 * _base_sas_log_info - verbose translation of firmware log info 561 * @ioc: per adapter object 562 * @log_info: log info 563 * 564 * Return nothing. 565 */ 566static void 567_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 568{ 569 union loginfo_type { 570 u32 loginfo; 571 struct { 572 u32 subcode:16; 573 u32 code:8; 574 u32 originator:4; 575 u32 bus_type:4; 576 } dw; 577 }; 578 union loginfo_type sas_loginfo; 579 char *originator_str = NULL; 580 581 sas_loginfo.loginfo = log_info; 582 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 583 return; 584 585 /* each nexus loss loginfo */ 586 if (log_info == 0x31170000) 587 return; 588 589 /* eat the loginfos associated with task aborts */ 590 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 591 0x31140000 || log_info == 0x31130000)) 592 return; 593 594 switch (sas_loginfo.dw.originator) { 595 case 0: 596 originator_str = "IOP"; 597 break; 598 case 1: 599 originator_str = "PL"; 600 break; 601 case 2: 602 originator_str = "IR"; 603 break; 604 } 605 606 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 607 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 608 originator_str, sas_loginfo.dw.code, 609 sas_loginfo.dw.subcode); 610} 611 612/** 613 * _base_display_reply_info - 614 * @ioc: per adapter object 615 * @smid: system request message index 616 * @msix_index: MSIX table index supplied by the OS 617 * @reply: reply message frame(lower 32bit addr) 618 * 619 * Return nothing. 620 */ 621static void 622_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 623 u32 reply) 624{ 625 MPI2DefaultReply_t *mpi_reply; 626 u16 ioc_status; 627 628 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 629 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 630#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 631 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 632 (ioc->logging_level & MPT_DEBUG_REPLY)) { 633 _base_sas_ioc_info(ioc , mpi_reply, 634 mpt2sas_base_get_msg_frame(ioc, smid)); 635 } 636#endif 637 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 638 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 639} 640 641/** 642 * mpt2sas_base_done - base internal command completion routine 643 * @ioc: per adapter object 644 * @smid: system request message index 645 * @msix_index: MSIX table index supplied by the OS 646 * @reply: reply message frame(lower 32bit addr) 647 * 648 * Return 1 meaning mf should be freed from _base_interrupt 649 * 0 means the mf is freed from this function. 650 */ 651u8 652mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 653 u32 reply) 654{ 655 MPI2DefaultReply_t *mpi_reply; 656 657 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 658 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 659 return 1; 660 661 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 662 return 1; 663 664 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 665 if (mpi_reply) { 666 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 667 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 668 } 669 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 670 complete(&ioc->base_cmds.done); 671 return 1; 672} 673 674/** 675 * _base_async_event - main callback handler for firmware asyn events 676 * @ioc: per adapter object 677 * @msix_index: MSIX table index supplied by the OS 678 * @reply: reply message frame(lower 32bit addr) 679 * 680 * Return 1 meaning mf should be freed from _base_interrupt 681 * 0 means the mf is freed from this function. 682 */ 683static u8 684_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply) 685{ 686 Mpi2EventNotificationReply_t *mpi_reply; 687 Mpi2EventAckRequest_t *ack_request; 688 u16 smid; 689 690 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 691 if (!mpi_reply) 692 return 1; 693 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 694 return 1; 695#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 696 _base_display_event_data(ioc, mpi_reply); 697#endif 698 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 699 goto out; 700 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 701 if (!smid) { 702 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 703 ioc->name, __func__); 704 goto out; 705 } 706 707 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 708 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 709 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 710 ack_request->Event = mpi_reply->Event; 711 ack_request->EventContext = mpi_reply->EventContext; 712 ack_request->VF_ID = 0; /* TODO */ 713 ack_request->VP_ID = 0; 714 mpt2sas_base_put_smid_default(ioc, smid); 715 716 out: 717 718 /* scsih callback handler */ 719 mpt2sas_scsih_event_callback(ioc, msix_index, reply); 720 721 /* ctl callback handler */ 722 mpt2sas_ctl_event_callback(ioc, msix_index, reply); 723 724 return 1; 725} 726 727/** 728 * _base_get_cb_idx - obtain the callback index 729 * @ioc: per adapter object 730 * @smid: system request message index 731 * 732 * Return callback index. 733 */ 734static u8 735_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid) 736{ 737 int i; 738 u8 cb_idx = 0xFF; 739 740 if (smid >= ioc->hi_priority_smid) { 741 if (smid < ioc->internal_smid) { 742 i = smid - ioc->hi_priority_smid; 743 cb_idx = ioc->hpr_lookup[i].cb_idx; 744 } else { 745 i = smid - ioc->internal_smid; 746 cb_idx = ioc->internal_lookup[i].cb_idx; 747 } 748 } else { 749 i = smid - 1; 750 cb_idx = ioc->scsi_lookup[i].cb_idx; 751 } 752 return cb_idx; 753} 754 755/** 756 * _base_mask_interrupts - disable interrupts 757 * @ioc: per adapter object 758 * 759 * Disabling ResetIRQ, Reply and Doorbell Interrupts 760 * 761 * Return nothing. 762 */ 763static void 764_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 765{ 766 u32 him_register; 767 768 ioc->mask_interrupts = 1; 769 him_register = readl(&ioc->chip->HostInterruptMask); 770 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 771 writel(him_register, &ioc->chip->HostInterruptMask); 772 readl(&ioc->chip->HostInterruptMask); 773} 774 775/** 776 * _base_unmask_interrupts - enable interrupts 777 * @ioc: per adapter object 778 * 779 * Enabling only Reply Interrupts 780 * 781 * Return nothing. 782 */ 783static void 784_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 785{ 786 u32 him_register; 787 788 him_register = readl(&ioc->chip->HostInterruptMask); 789 him_register &= ~MPI2_HIM_RIM; 790 writel(him_register, &ioc->chip->HostInterruptMask); 791 ioc->mask_interrupts = 0; 792} 793 794union reply_descriptor { 795 u64 word; 796 struct { 797 u32 low; 798 u32 high; 799 } u; 800}; 801 802/** 803 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 804 * @irq: irq number (not used) 805 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 806 * @r: pt_regs pointer (not used) 807 * 808 * Return IRQ_HANDLE if processed, else IRQ_NONE. 809 */ 810static irqreturn_t 811_base_interrupt(int irq, void *bus_id) 812{ 813 union reply_descriptor rd; 814 u32 completed_cmds; 815 u8 request_desript_type; 816 u16 smid; 817 u8 cb_idx; 818 u32 reply; 819 u8 msix_index; 820 struct MPT2SAS_ADAPTER *ioc = bus_id; 821 Mpi2ReplyDescriptorsUnion_t *rpf; 822 u8 rc; 823 824 if (ioc->mask_interrupts) 825 return IRQ_NONE; 826 827 rpf = &ioc->reply_post_free[ioc->reply_post_host_index]; 828 request_desript_type = rpf->Default.ReplyFlags 829 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 830 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 831 return IRQ_NONE; 832 833 completed_cmds = 0; 834 do { 835 rd.word = rpf->Words; 836 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 837 goto out; 838 reply = 0; 839 cb_idx = 0xFF; 840 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); 841 msix_index = rpf->Default.MSIxIndex; 842 if (request_desript_type == 843 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 844 reply = le32_to_cpu 845 (rpf->AddressReply.ReplyFrameAddress); 846 } else if (request_desript_type == 847 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 848 goto next; 849 else if (request_desript_type == 850 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 851 goto next; 852 if (smid) 853 cb_idx = _base_get_cb_idx(ioc, smid); 854 if (smid && cb_idx != 0xFF) { 855 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index, 856 reply); 857 if (reply) 858 _base_display_reply_info(ioc, smid, msix_index, 859 reply); 860 if (rc) 861 mpt2sas_base_free_smid(ioc, smid); 862 } 863 if (!smid) 864 _base_async_event(ioc, msix_index, reply); 865 866 /* reply free queue handling */ 867 if (reply) { 868 ioc->reply_free_host_index = 869 (ioc->reply_free_host_index == 870 (ioc->reply_free_queue_depth - 1)) ? 871 0 : ioc->reply_free_host_index + 1; 872 ioc->reply_free[ioc->reply_free_host_index] = 873 cpu_to_le32(reply); 874 wmb(); 875 writel(ioc->reply_free_host_index, 876 &ioc->chip->ReplyFreeHostIndex); 877 } 878 879 next: 880 881 rpf->Words = ULLONG_MAX; 882 ioc->reply_post_host_index = (ioc->reply_post_host_index == 883 (ioc->reply_post_queue_depth - 1)) ? 0 : 884 ioc->reply_post_host_index + 1; 885 request_desript_type = 886 ioc->reply_post_free[ioc->reply_post_host_index].Default. 887 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 888 completed_cmds++; 889 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 890 goto out; 891 if (!ioc->reply_post_host_index) 892 rpf = ioc->reply_post_free; 893 else 894 rpf++; 895 } while (1); 896 897 out: 898 899 if (!completed_cmds) 900 return IRQ_NONE; 901 902 wmb(); 903 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex); 904 return IRQ_HANDLED; 905} 906 907/** 908 * mpt2sas_base_release_callback_handler - clear interupt callback handler 909 * @cb_idx: callback index 910 * 911 * Return nothing. 912 */ 913void 914mpt2sas_base_release_callback_handler(u8 cb_idx) 915{ 916 mpt_callbacks[cb_idx] = NULL; 917} 918 919/** 920 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 921 * @cb_func: callback function 922 * 923 * Returns cb_func. 924 */ 925u8 926mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 927{ 928 u8 cb_idx; 929 930 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 931 if (mpt_callbacks[cb_idx] == NULL) 932 break; 933 934 mpt_callbacks[cb_idx] = cb_func; 935 return cb_idx; 936} 937 938/** 939 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 940 * 941 * Return nothing. 942 */ 943void 944mpt2sas_base_initialize_callback_handler(void) 945{ 946 u8 cb_idx; 947 948 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 949 mpt2sas_base_release_callback_handler(cb_idx); 950} 951 952/** 953 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 954 * @ioc: per adapter object 955 * @paddr: virtual address for SGE 956 * 957 * Create a zero length scatter gather entry to insure the IOCs hardware has 958 * something to use if the target device goes brain dead and tries 959 * to send data even when none is asked for. 960 * 961 * Return nothing. 962 */ 963void 964mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 965{ 966 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 967 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 968 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 969 MPI2_SGE_FLAGS_SHIFT); 970 ioc->base_add_sg_single(paddr, flags_length, -1); 971} 972 973/** 974 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 975 * @paddr: virtual address for SGE 976 * @flags_length: SGE flags and data transfer length 977 * @dma_addr: Physical address 978 * 979 * Return nothing. 980 */ 981static void 982_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 983{ 984 Mpi2SGESimple32_t *sgel = paddr; 985 986 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 987 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 988 sgel->FlagsLength = cpu_to_le32(flags_length); 989 sgel->Address = cpu_to_le32(dma_addr); 990} 991 992 993/** 994 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 995 * @paddr: virtual address for SGE 996 * @flags_length: SGE flags and data transfer length 997 * @dma_addr: Physical address 998 * 999 * Return nothing. 1000 */ 1001static void 1002_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1003{ 1004 Mpi2SGESimple64_t *sgel = paddr; 1005 1006 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 1007 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1008 sgel->FlagsLength = cpu_to_le32(flags_length); 1009 sgel->Address = cpu_to_le64(dma_addr); 1010} 1011 1012#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 1013 1014/** 1015 * _base_config_dma_addressing - set dma addressing 1016 * @ioc: per adapter object 1017 * @pdev: PCI device struct 1018 * 1019 * Returns 0 for success, non-zero for failure. 1020 */ 1021static int 1022_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 1023{ 1024 struct sysinfo s; 1025 char *desc = NULL; 1026 1027 if (sizeof(dma_addr_t) > 4) { 1028 const uint64_t required_mask = 1029 dma_get_required_mask(&pdev->dev); 1030 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 1031 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 1032 DMA_BIT_MASK(64))) { 1033 ioc->base_add_sg_single = &_base_add_sg_single_64; 1034 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 1035 desc = "64"; 1036 goto out; 1037 } 1038 } 1039 1040 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 1041 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 1042 ioc->base_add_sg_single = &_base_add_sg_single_32; 1043 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 1044 desc = "32"; 1045 } else 1046 return -ENODEV; 1047 1048 out: 1049 si_meminfo(&s); 1050 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 1051 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 1052 1053 return 0; 1054} 1055 1056/** 1057 * _base_save_msix_table - backup msix vector table 1058 * @ioc: per adapter object 1059 * 1060 * This address an errata where diag reset clears out the table 1061 */ 1062static void 1063_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 1064{ 1065 int i; 1066 1067 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1068 return; 1069 1070 for (i = 0; i < ioc->msix_vector_count; i++) 1071 ioc->msix_table_backup[i] = ioc->msix_table[i]; 1072} 1073 1074/** 1075 * _base_restore_msix_table - this restores the msix vector table 1076 * @ioc: per adapter object 1077 * 1078 */ 1079static void 1080_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 1081{ 1082 int i; 1083 1084 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1085 return; 1086 1087 for (i = 0; i < ioc->msix_vector_count; i++) 1088 ioc->msix_table[i] = ioc->msix_table_backup[i]; 1089} 1090 1091/** 1092 * _base_check_enable_msix - checks MSIX capabable. 1093 * @ioc: per adapter object 1094 * 1095 * Check to see if card is capable of MSIX, and set number 1096 * of avaliable msix vectors 1097 */ 1098static int 1099_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1100{ 1101 int base; 1102 u16 message_control; 1103 u32 msix_table_offset; 1104 1105 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1106 if (!base) { 1107 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1108 "supported\n", ioc->name)); 1109 return -EINVAL; 1110 } 1111 1112 /* get msix vector count */ 1113 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1114 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1115 1116 /* get msix table */ 1117 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 1118 msix_table_offset &= 0xFFFFFFF8; 1119 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 1120 1121 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1122 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 1123 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 1124 return 0; 1125} 1126 1127/** 1128 * _base_disable_msix - disables msix 1129 * @ioc: per adapter object 1130 * 1131 */ 1132static void 1133_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1134{ 1135 if (ioc->msix_enable) { 1136 pci_disable_msix(ioc->pdev); 1137 kfree(ioc->msix_table_backup); 1138 ioc->msix_table_backup = NULL; 1139 ioc->msix_enable = 0; 1140 } 1141} 1142 1143/** 1144 * _base_enable_msix - enables msix, failback to io_apic 1145 * @ioc: per adapter object 1146 * 1147 */ 1148static int 1149_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1150{ 1151 struct msix_entry entries; 1152 int r; 1153 u8 try_msix = 0; 1154 1155 if (msix_disable == -1 || msix_disable == 0) 1156 try_msix = 1; 1157 1158 if (!try_msix) 1159 goto try_ioapic; 1160 1161 if (_base_check_enable_msix(ioc) != 0) 1162 goto try_ioapic; 1163 1164 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1165 sizeof(u32), GFP_KERNEL); 1166 if (!ioc->msix_table_backup) { 1167 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1168 "msix_table_backup failed!!!\n", ioc->name)); 1169 goto try_ioapic; 1170 } 1171 1172 memset(&entries, 0, sizeof(struct msix_entry)); 1173 r = pci_enable_msix(ioc->pdev, &entries, 1); 1174 if (r) { 1175 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1176 "failed (r=%d) !!!\n", ioc->name, r)); 1177 goto try_ioapic; 1178 } 1179 1180 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1181 ioc->name, ioc); 1182 if (r) { 1183 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1184 "interrupt %d !!!\n", ioc->name, entries.vector)); 1185 pci_disable_msix(ioc->pdev); 1186 goto try_ioapic; 1187 } 1188 1189 ioc->pci_irq = entries.vector; 1190 ioc->msix_enable = 1; 1191 return 0; 1192 1193/* failback to io_apic interrupt routing */ 1194 try_ioapic: 1195 1196 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1197 ioc->name, ioc); 1198 if (r) { 1199 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1200 ioc->name, ioc->pdev->irq); 1201 r = -EBUSY; 1202 goto out_fail; 1203 } 1204 1205 ioc->pci_irq = ioc->pdev->irq; 1206 return 0; 1207 1208 out_fail: 1209 return r; 1210} 1211 1212/** 1213 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1214 * @ioc: per adapter object 1215 * 1216 * Returns 0 for success, non-zero for failure. 1217 */ 1218int 1219mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1220{ 1221 struct pci_dev *pdev = ioc->pdev; 1222 u32 memap_sz; 1223 u32 pio_sz; 1224 int i, r = 0; 1225 1226 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1227 ioc->name, __func__)); 1228 1229 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1230 if (pci_enable_device_mem(pdev)) { 1231 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1232 "failed\n", ioc->name); 1233 return -ENODEV; 1234 } 1235 1236 1237 if (pci_request_selected_regions(pdev, ioc->bars, 1238 MPT2SAS_DRIVER_NAME)) { 1239 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1240 "failed\n", ioc->name); 1241 r = -ENODEV; 1242 goto out_fail; 1243 } 1244 1245 pci_set_master(pdev); 1246 1247 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1248 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1249 ioc->name, pci_name(pdev)); 1250 r = -ENODEV; 1251 goto out_fail; 1252 } 1253 1254 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1255 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1256 if (pio_sz) 1257 continue; 1258 ioc->pio_chip = pci_resource_start(pdev, i); 1259 pio_sz = pci_resource_len(pdev, i); 1260 } else { 1261 if (memap_sz) 1262 continue; 1263 ioc->chip_phys = pci_resource_start(pdev, i); 1264 memap_sz = pci_resource_len(pdev, i); 1265 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1266 if (ioc->chip == NULL) { 1267 printk(MPT2SAS_ERR_FMT "unable to map adapter " 1268 "memory!\n", ioc->name); 1269 r = -EINVAL; 1270 goto out_fail; 1271 } 1272 } 1273 } 1274 1275 _base_mask_interrupts(ioc); 1276 r = _base_enable_msix(ioc); 1277 if (r) 1278 goto out_fail; 1279 1280 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1281 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1282 "IO-APIC enabled"), ioc->pci_irq); 1283 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1284 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1285 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1286 ioc->name, ioc->pio_chip, pio_sz); 1287 1288 return 0; 1289 1290 out_fail: 1291 if (ioc->chip_phys) 1292 iounmap(ioc->chip); 1293 ioc->chip_phys = 0; 1294 ioc->pci_irq = -1; 1295 pci_release_selected_regions(ioc->pdev, ioc->bars); 1296 pci_disable_device(pdev); 1297 return r; 1298} 1299 1300/** 1301 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1302 * @ioc: per adapter object 1303 * @smid: system request message index(smid zero is invalid) 1304 * 1305 * Returns virt pointer to message frame. 1306 */ 1307void * 1308mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1309{ 1310 return (void *)(ioc->request + (smid * ioc->request_sz)); 1311} 1312 1313/** 1314 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1315 * @ioc: per adapter object 1316 * @smid: system request message index 1317 * 1318 * Returns virt pointer to sense buffer. 1319 */ 1320void * 1321mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1322{ 1323 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1324} 1325 1326/** 1327 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1328 * @ioc: per adapter object 1329 * @smid: system request message index 1330 * 1331 * Returns phys pointer to sense buffer. 1332 */ 1333dma_addr_t 1334mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1335{ 1336 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE); 1337} 1338 1339/** 1340 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1341 * @ioc: per adapter object 1342 * @phys_addr: lower 32 physical addr of the reply 1343 * 1344 * Converts 32bit lower physical addr into a virt address. 1345 */ 1346void * 1347mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1348{ 1349 if (!phys_addr) 1350 return NULL; 1351 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1352} 1353 1354/** 1355 * mpt2sas_base_get_smid - obtain a free smid from internal queue 1356 * @ioc: per adapter object 1357 * @cb_idx: callback index 1358 * 1359 * Returns smid (zero is invalid) 1360 */ 1361u16 1362mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1363{ 1364 unsigned long flags; 1365 struct request_tracker *request; 1366 u16 smid; 1367 1368 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1369 if (list_empty(&ioc->internal_free_list)) { 1370 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1371 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1372 ioc->name, __func__); 1373 return 0; 1374 } 1375 1376 request = list_entry(ioc->internal_free_list.next, 1377 struct request_tracker, tracker_list); 1378 request->cb_idx = cb_idx; 1379 smid = request->smid; 1380 list_del(&request->tracker_list); 1381 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1382 return smid; 1383} 1384 1385/** 1386 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue 1387 * @ioc: per adapter object 1388 * @cb_idx: callback index 1389 * @scmd: pointer to scsi command object 1390 * 1391 * Returns smid (zero is invalid) 1392 */ 1393u16 1394mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx, 1395 struct scsi_cmnd *scmd) 1396{ 1397 unsigned long flags; 1398 struct request_tracker *request; 1399 u16 smid; 1400 1401 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1402 if (list_empty(&ioc->free_list)) { 1403 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1404 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1405 ioc->name, __func__); 1406 return 0; 1407 } 1408 1409 request = list_entry(ioc->free_list.next, 1410 struct request_tracker, tracker_list); 1411 request->scmd = scmd; 1412 request->cb_idx = cb_idx; 1413 smid = request->smid; 1414 list_del(&request->tracker_list); 1415 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1416 return smid; 1417} 1418 1419/** 1420 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue 1421 * @ioc: per adapter object 1422 * @cb_idx: callback index 1423 * 1424 * Returns smid (zero is invalid) 1425 */ 1426u16 1427mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1428{ 1429 unsigned long flags; 1430 struct request_tracker *request; 1431 u16 smid; 1432 1433 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1434 if (list_empty(&ioc->hpr_free_list)) { 1435 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1436 return 0; 1437 } 1438 1439 request = list_entry(ioc->hpr_free_list.next, 1440 struct request_tracker, tracker_list); 1441 request->cb_idx = cb_idx; 1442 smid = request->smid; 1443 list_del(&request->tracker_list); 1444 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1445 return smid; 1446} 1447 1448 1449/** 1450 * mpt2sas_base_free_smid - put smid back on free_list 1451 * @ioc: per adapter object 1452 * @smid: system request message index 1453 * 1454 * Return nothing. 1455 */ 1456void 1457mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1458{ 1459 unsigned long flags; 1460 int i; 1461 1462 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1463 if (smid >= ioc->hi_priority_smid) { 1464 if (smid < ioc->internal_smid) { 1465 /* hi-priority */ 1466 i = smid - ioc->hi_priority_smid; 1467 ioc->hpr_lookup[i].cb_idx = 0xFF; 1468 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 1469 &ioc->hpr_free_list); 1470 } else { 1471 /* internal queue */ 1472 i = smid - ioc->internal_smid; 1473 ioc->internal_lookup[i].cb_idx = 0xFF; 1474 list_add_tail(&ioc->internal_lookup[i].tracker_list, 1475 &ioc->internal_free_list); 1476 } 1477 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1478 return; 1479 } 1480 1481 /* scsiio queue */ 1482 i = smid - 1; 1483 ioc->scsi_lookup[i].cb_idx = 0xFF; 1484 ioc->scsi_lookup[i].scmd = NULL; 1485 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 1486 &ioc->free_list); 1487 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1488 1489 /* 1490 * See _wait_for_commands_to_complete() call with regards to this code. 1491 */ 1492 if (ioc->shost_recovery && ioc->pending_io_count) { 1493 if (ioc->pending_io_count == 1) 1494 wake_up(&ioc->reset_wq); 1495 ioc->pending_io_count--; 1496 } 1497} 1498 1499/** 1500 * _base_writeq - 64 bit write to MMIO 1501 * @ioc: per adapter object 1502 * @b: data payload 1503 * @addr: address in MMIO space 1504 * @writeq_lock: spin lock 1505 * 1506 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1507 * care of 32 bit environment where its not quarenteed to send the entire word 1508 * in one transfer. 1509 */ 1510#ifndef writeq 1511static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1512 spinlock_t *writeq_lock) 1513{ 1514 unsigned long flags; 1515 __u64 data_out = cpu_to_le64(b); 1516 1517 spin_lock_irqsave(writeq_lock, flags); 1518 writel((u32)(data_out), addr); 1519 writel((u32)(data_out >> 32), (addr + 4)); 1520 spin_unlock_irqrestore(writeq_lock, flags); 1521} 1522#else 1523static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1524 spinlock_t *writeq_lock) 1525{ 1526 writeq(cpu_to_le64(b), addr); 1527} 1528#endif 1529 1530/** 1531 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1532 * @ioc: per adapter object 1533 * @smid: system request message index 1534 * @handle: device handle 1535 * 1536 * Return nothing. 1537 */ 1538void 1539mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle) 1540{ 1541 Mpi2RequestDescriptorUnion_t descriptor; 1542 u64 *request = (u64 *)&descriptor; 1543 1544 1545 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1546 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */ 1547 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1548 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1549 descriptor.SCSIIO.LMID = 0; 1550 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1551 &ioc->scsi_lookup_lock); 1552} 1553 1554 1555/** 1556 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1557 * @ioc: per adapter object 1558 * @smid: system request message index 1559 * 1560 * Return nothing. 1561 */ 1562void 1563mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1564{ 1565 Mpi2RequestDescriptorUnion_t descriptor; 1566 u64 *request = (u64 *)&descriptor; 1567 1568 descriptor.HighPriority.RequestFlags = 1569 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1570 descriptor.HighPriority.MSIxIndex = 0; /* TODO */ 1571 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1572 descriptor.HighPriority.LMID = 0; 1573 descriptor.HighPriority.Reserved1 = 0; 1574 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1575 &ioc->scsi_lookup_lock); 1576} 1577 1578/** 1579 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1580 * @ioc: per adapter object 1581 * @smid: system request message index 1582 * 1583 * Return nothing. 1584 */ 1585void 1586mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1587{ 1588 Mpi2RequestDescriptorUnion_t descriptor; 1589 u64 *request = (u64 *)&descriptor; 1590 1591 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1592 descriptor.Default.MSIxIndex = 0; /* TODO */ 1593 descriptor.Default.SMID = cpu_to_le16(smid); 1594 descriptor.Default.LMID = 0; 1595 descriptor.Default.DescriptorTypeDependent = 0; 1596 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1597 &ioc->scsi_lookup_lock); 1598} 1599 1600/** 1601 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1602 * @ioc: per adapter object 1603 * @smid: system request message index 1604 * @io_index: value used to track the IO 1605 * 1606 * Return nothing. 1607 */ 1608void 1609mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1610 u16 io_index) 1611{ 1612 Mpi2RequestDescriptorUnion_t descriptor; 1613 u64 *request = (u64 *)&descriptor; 1614 1615 descriptor.SCSITarget.RequestFlags = 1616 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1617 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */ 1618 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1619 descriptor.SCSITarget.LMID = 0; 1620 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1621 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1622 &ioc->scsi_lookup_lock); 1623} 1624 1625/** 1626 * _base_display_dell_branding - Disply branding string 1627 * @ioc: per adapter object 1628 * 1629 * Return nothing. 1630 */ 1631static void 1632_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1633{ 1634 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1635 1636 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1637 return; 1638 1639 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1640 switch (ioc->pdev->subsystem_device) { 1641 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1642 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1643 MPT2SAS_DELL_BRANDING_SIZE - 1); 1644 break; 1645 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1646 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1647 MPT2SAS_DELL_BRANDING_SIZE - 1); 1648 break; 1649 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1650 strncpy(dell_branding, 1651 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1652 MPT2SAS_DELL_BRANDING_SIZE - 1); 1653 break; 1654 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1655 strncpy(dell_branding, 1656 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1657 MPT2SAS_DELL_BRANDING_SIZE - 1); 1658 break; 1659 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1660 strncpy(dell_branding, 1661 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1662 MPT2SAS_DELL_BRANDING_SIZE - 1); 1663 break; 1664 case MPT2SAS_DELL_PERC_H200_SSDID: 1665 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1666 MPT2SAS_DELL_BRANDING_SIZE - 1); 1667 break; 1668 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1669 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1670 MPT2SAS_DELL_BRANDING_SIZE - 1); 1671 break; 1672 default: 1673 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1674 break; 1675 } 1676 1677 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1678 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1679 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1680 ioc->pdev->subsystem_device); 1681} 1682 1683/** 1684 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1685 * @ioc: per adapter object 1686 * 1687 * Return nothing. 1688 */ 1689static void 1690_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1691{ 1692 int i = 0; 1693 char desc[16]; 1694 u8 revision; 1695 u32 iounit_pg1_flags; 1696 1697 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1698 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1699 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1700 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1701 ioc->name, desc, 1702 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1703 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1704 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1705 ioc->facts.FWVersion.Word & 0x000000FF, 1706 revision, 1707 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1708 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1709 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1710 ioc->bios_pg3.BiosVersion & 0x000000FF); 1711 1712 _base_display_dell_branding(ioc); 1713 1714 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1715 1716 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1717 printk("Initiator"); 1718 i++; 1719 } 1720 1721 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1722 printk("%sTarget", i ? "," : ""); 1723 i++; 1724 } 1725 1726 i = 0; 1727 printk("), "); 1728 printk("Capabilities=("); 1729 1730 if (ioc->facts.IOCCapabilities & 1731 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1732 printk("Raid"); 1733 i++; 1734 } 1735 1736 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1737 printk("%sTLR", i ? "," : ""); 1738 i++; 1739 } 1740 1741 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1742 printk("%sMulticast", i ? "," : ""); 1743 i++; 1744 } 1745 1746 if (ioc->facts.IOCCapabilities & 1747 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1748 printk("%sBIDI Target", i ? "," : ""); 1749 i++; 1750 } 1751 1752 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1753 printk("%sEEDP", i ? "," : ""); 1754 i++; 1755 } 1756 1757 if (ioc->facts.IOCCapabilities & 1758 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1759 printk("%sSnapshot Buffer", i ? "," : ""); 1760 i++; 1761 } 1762 1763 if (ioc->facts.IOCCapabilities & 1764 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1765 printk("%sDiag Trace Buffer", i ? "," : ""); 1766 i++; 1767 } 1768 1769 if (ioc->facts.IOCCapabilities & 1770 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) { 1771 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : ""); 1772 i++; 1773 } 1774 1775 if (ioc->facts.IOCCapabilities & 1776 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1777 printk("%sTask Set Full", i ? "," : ""); 1778 i++; 1779 } 1780 1781 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1782 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1783 printk("%sNCQ", i ? "," : ""); 1784 i++; 1785 } 1786 1787 printk(")\n"); 1788} 1789 1790/** 1791 * _base_static_config_pages - static start of day config pages 1792 * @ioc: per adapter object 1793 * 1794 * Return nothing. 1795 */ 1796static void 1797_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1798{ 1799 Mpi2ConfigReply_t mpi_reply; 1800 u32 iounit_pg1_flags; 1801 1802 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1803 if (ioc->ir_firmware) 1804 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, 1805 &ioc->manu_pg10); 1806 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1807 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1808 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1809 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1810 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1811 _base_display_ioc_capabilities(ioc); 1812 1813 /* 1814 * Enable task_set_full handling in iounit_pg1 when the 1815 * facts capabilities indicate that its supported. 1816 */ 1817 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1818 if ((ioc->facts.IOCCapabilities & 1819 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1820 iounit_pg1_flags &= 1821 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1822 else 1823 iounit_pg1_flags |= 1824 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1825 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1826 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1827} 1828 1829/** 1830 * _base_release_memory_pools - release memory 1831 * @ioc: per adapter object 1832 * 1833 * Free memory allocated from _base_allocate_memory_pools. 1834 * 1835 * Return nothing. 1836 */ 1837static void 1838_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1839{ 1840 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1841 __func__)); 1842 1843 if (ioc->request) { 1844 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1845 ioc->request, ioc->request_dma); 1846 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1847 ": free\n", ioc->name, ioc->request)); 1848 ioc->request = NULL; 1849 } 1850 1851 if (ioc->sense) { 1852 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1853 if (ioc->sense_dma_pool) 1854 pci_pool_destroy(ioc->sense_dma_pool); 1855 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1856 ": free\n", ioc->name, ioc->sense)); 1857 ioc->sense = NULL; 1858 } 1859 1860 if (ioc->reply) { 1861 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1862 if (ioc->reply_dma_pool) 1863 pci_pool_destroy(ioc->reply_dma_pool); 1864 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1865 ": free\n", ioc->name, ioc->reply)); 1866 ioc->reply = NULL; 1867 } 1868 1869 if (ioc->reply_free) { 1870 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1871 ioc->reply_free_dma); 1872 if (ioc->reply_free_dma_pool) 1873 pci_pool_destroy(ioc->reply_free_dma_pool); 1874 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1875 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1876 ioc->reply_free = NULL; 1877 } 1878 1879 if (ioc->reply_post_free) { 1880 pci_pool_free(ioc->reply_post_free_dma_pool, 1881 ioc->reply_post_free, ioc->reply_post_free_dma); 1882 if (ioc->reply_post_free_dma_pool) 1883 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1884 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1885 "reply_post_free_pool(0x%p): free\n", ioc->name, 1886 ioc->reply_post_free)); 1887 ioc->reply_post_free = NULL; 1888 } 1889 1890 if (ioc->config_page) { 1891 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1892 "config_page(0x%p): free\n", ioc->name, 1893 ioc->config_page)); 1894 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1895 ioc->config_page, ioc->config_page_dma); 1896 } 1897 1898 kfree(ioc->scsi_lookup); 1899 kfree(ioc->hpr_lookup); 1900 kfree(ioc->internal_lookup); 1901} 1902 1903 1904/** 1905 * _base_allocate_memory_pools - allocate start of day memory pools 1906 * @ioc: per adapter object 1907 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1908 * 1909 * Returns 0 success, anything else error 1910 */ 1911static int 1912_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1913{ 1914 Mpi2IOCFactsReply_t *facts; 1915 u32 queue_size, queue_diff; 1916 u16 max_sge_elements; 1917 u16 num_of_reply_frames; 1918 u16 chains_needed_per_io; 1919 u32 sz, total_sz; 1920 u32 retry_sz; 1921 u16 max_request_credit; 1922 1923 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1924 __func__)); 1925 1926 retry_sz = 0; 1927 facts = &ioc->facts; 1928 1929 /* command line tunables for max sgl entries */ 1930 if (max_sgl_entries != -1) { 1931 ioc->shost->sg_tablesize = (max_sgl_entries < 1932 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1933 MPT2SAS_SG_DEPTH; 1934 } else { 1935 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1936 } 1937 1938 /* command line tunables for max controller queue depth */ 1939 if (max_queue_depth != -1) { 1940 max_request_credit = (max_queue_depth < facts->RequestCredit) 1941 ? max_queue_depth : facts->RequestCredit; 1942 } else { 1943 max_request_credit = (facts->RequestCredit > 1944 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1945 facts->RequestCredit; 1946 } 1947 1948 ioc->hba_queue_depth = max_request_credit; 1949 ioc->hi_priority_depth = facts->HighPriorityCredit; 1950 ioc->internal_depth = ioc->hi_priority_depth + 5; 1951 1952 /* request frame size */ 1953 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1954 1955 /* reply frame size */ 1956 ioc->reply_sz = facts->ReplyFrameSize * 4; 1957 1958 retry_allocation: 1959 total_sz = 0; 1960 /* calculate number of sg elements left over in the 1st frame */ 1961 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1962 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1963 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1964 1965 /* now do the same for a chain buffer */ 1966 max_sge_elements = ioc->request_sz - ioc->sge_size; 1967 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1968 1969 ioc->chain_offset_value_for_main_message = 1970 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1971 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1972 1973 /* 1974 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1975 */ 1976 chains_needed_per_io = ((ioc->shost->sg_tablesize - 1977 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 1978 + 1; 1979 if (chains_needed_per_io > facts->MaxChainDepth) { 1980 chains_needed_per_io = facts->MaxChainDepth; 1981 ioc->shost->sg_tablesize = min_t(u16, 1982 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 1983 * chains_needed_per_io), ioc->shost->sg_tablesize); 1984 } 1985 ioc->chains_needed_per_io = chains_needed_per_io; 1986 1987 /* reply free queue sizing - taking into account for events */ 1988 num_of_reply_frames = ioc->hba_queue_depth + 32; 1989 1990 /* number of replies frames can't be a multiple of 16 */ 1991 /* decrease number of reply frames by 1 */ 1992 if (!(num_of_reply_frames % 16)) 1993 num_of_reply_frames--; 1994 1995 /* calculate number of reply free queue entries 1996 * (must be multiple of 16) 1997 */ 1998 1999 /* (we know reply_free_queue_depth is not a multiple of 16) */ 2000 queue_size = num_of_reply_frames; 2001 queue_size += 16 - (queue_size % 16); 2002 ioc->reply_free_queue_depth = queue_size; 2003 2004 /* reply descriptor post queue sizing */ 2005 /* this size should be the number of request frames + number of reply 2006 * frames 2007 */ 2008 2009 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1; 2010 /* round up to 16 byte boundary */ 2011 if (queue_size % 16) 2012 queue_size += 16 - (queue_size % 16); 2013 2014 /* check against IOC maximum reply post queue depth */ 2015 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 2016 queue_diff = queue_size - 2017 facts->MaxReplyDescriptorPostQueueDepth; 2018 2019 /* round queue_diff up to multiple of 16 */ 2020 if (queue_diff % 16) 2021 queue_diff += 16 - (queue_diff % 16); 2022 2023 /* adjust hba_queue_depth, reply_free_queue_depth, 2024 * and queue_size 2025 */ 2026 ioc->hba_queue_depth -= queue_diff; 2027 ioc->reply_free_queue_depth -= queue_diff; 2028 queue_size -= queue_diff; 2029 } 2030 ioc->reply_post_queue_depth = queue_size; 2031 2032 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 2033 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 2034 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 2035 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 2036 ioc->chains_needed_per_io)); 2037 2038 ioc->scsiio_depth = ioc->hba_queue_depth - 2039 ioc->hi_priority_depth - ioc->internal_depth; 2040 2041 /* set the scsi host can_queue depth 2042 * with some internal commands that could be outstanding 2043 */ 2044 ioc->shost->can_queue = ioc->scsiio_depth - (2); 2045 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: " 2046 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue)); 2047 2048 /* contiguous pool for request and chains, 16 byte align, one extra " 2049 * "frame for smid=0 2050 */ 2051 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; 2052 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz); 2053 2054 /* hi-priority queue */ 2055 sz += (ioc->hi_priority_depth * ioc->request_sz); 2056 2057 /* internal queue */ 2058 sz += (ioc->internal_depth * ioc->request_sz); 2059 2060 ioc->request_dma_sz = sz; 2061 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 2062 if (!ioc->request) { 2063 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2064 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2065 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth, 2066 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2067 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH) 2068 goto out; 2069 retry_sz += 64; 2070 ioc->hba_queue_depth = max_request_credit - retry_sz; 2071 goto retry_allocation; 2072 } 2073 2074 if (retry_sz) 2075 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2076 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2077 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth, 2078 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2079 2080 2081 /* hi-priority queue */ 2082 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * 2083 ioc->request_sz); 2084 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * 2085 ioc->request_sz); 2086 2087 /* internal queue */ 2088 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * 2089 ioc->request_sz); 2090 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * 2091 ioc->request_sz); 2092 2093 ioc->chain = ioc->internal + (ioc->internal_depth * 2094 ioc->request_sz); 2095 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth * 2096 ioc->request_sz); 2097 2098 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 2099 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2100 ioc->request, ioc->hba_queue_depth, ioc->request_sz, 2101 (ioc->hba_queue_depth * ioc->request_sz)/1024)); 2102 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 2103 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 2104 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 2105 ioc->request_sz))/1024)); 2106 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 2107 ioc->name, (unsigned long long) ioc->request_dma)); 2108 total_sz += sz; 2109 2110 ioc->scsi_lookup = kcalloc(ioc->scsiio_depth, 2111 sizeof(struct request_tracker), GFP_KERNEL); 2112 if (!ioc->scsi_lookup) { 2113 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n", 2114 ioc->name); 2115 goto out; 2116 } 2117 2118 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): " 2119 "depth(%d)\n", ioc->name, ioc->request, 2120 ioc->scsiio_depth)); 2121 2122 /* initialize hi-priority queue smid's */ 2123 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, 2124 sizeof(struct request_tracker), GFP_KERNEL); 2125 if (!ioc->hpr_lookup) { 2126 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n", 2127 ioc->name); 2128 goto out; 2129 } 2130 ioc->hi_priority_smid = ioc->scsiio_depth + 1; 2131 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): " 2132 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority, 2133 ioc->hi_priority_depth, ioc->hi_priority_smid)); 2134 2135 /* initialize internal queue smid's */ 2136 ioc->internal_lookup = kcalloc(ioc->internal_depth, 2137 sizeof(struct request_tracker), GFP_KERNEL); 2138 if (!ioc->internal_lookup) { 2139 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n", 2140 ioc->name); 2141 goto out; 2142 } 2143 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; 2144 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): " 2145 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal, 2146 ioc->internal_depth, ioc->internal_smid)); 2147 2148 /* sense buffers, 4 byte align */ 2149 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; 2150 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 2151 0); 2152 if (!ioc->sense_dma_pool) { 2153 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 2154 ioc->name); 2155 goto out; 2156 } 2157 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 2158 &ioc->sense_dma); 2159 if (!ioc->sense) { 2160 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 2161 ioc->name); 2162 goto out; 2163 } 2164 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2165 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 2166 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth, 2167 SCSI_SENSE_BUFFERSIZE, sz/1024)); 2168 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 2169 ioc->name, (unsigned long long)ioc->sense_dma)); 2170 total_sz += sz; 2171 2172 /* reply pool, 4 byte align */ 2173 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 2174 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 2175 0); 2176 if (!ioc->reply_dma_pool) { 2177 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 2178 ioc->name); 2179 goto out; 2180 } 2181 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 2182 &ioc->reply_dma); 2183 if (!ioc->reply) { 2184 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 2185 ioc->name); 2186 goto out; 2187 } 2188 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 2189 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 2190 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 2191 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 2192 ioc->name, (unsigned long long)ioc->reply_dma)); 2193 total_sz += sz; 2194 2195 /* reply free queue, 16 byte align */ 2196 sz = ioc->reply_free_queue_depth * 4; 2197 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 2198 ioc->pdev, sz, 16, 0); 2199 if (!ioc->reply_free_dma_pool) { 2200 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 2201 "failed\n", ioc->name); 2202 goto out; 2203 } 2204 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 2205 &ioc->reply_free_dma); 2206 if (!ioc->reply_free) { 2207 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 2208 "failed\n", ioc->name); 2209 goto out; 2210 } 2211 memset(ioc->reply_free, 0, sz); 2212 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 2213 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 2214 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 2215 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 2216 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 2217 total_sz += sz; 2218 2219 /* reply post queue, 16 byte align */ 2220 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 2221 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 2222 ioc->pdev, sz, 16, 0); 2223 if (!ioc->reply_post_free_dma_pool) { 2224 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 2225 "failed\n", ioc->name); 2226 goto out; 2227 } 2228 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 2229 GFP_KERNEL, &ioc->reply_post_free_dma); 2230 if (!ioc->reply_post_free) { 2231 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2232 "failed\n", ioc->name); 2233 goto out; 2234 } 2235 memset(ioc->reply_post_free, 0, sz); 2236 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2237 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2238 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2239 sz/1024)); 2240 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2241 "(0x%llx)\n", ioc->name, (unsigned long long) 2242 ioc->reply_post_free_dma)); 2243 total_sz += sz; 2244 2245 ioc->config_page_sz = 512; 2246 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2247 ioc->config_page_sz, &ioc->config_page_dma); 2248 if (!ioc->config_page) { 2249 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2250 "failed\n", ioc->name); 2251 goto out; 2252 } 2253 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2254 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2255 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2256 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2257 total_sz += ioc->config_page_sz; 2258 2259 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2260 ioc->name, total_sz/1024); 2261 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2262 "Max Controller Queue Depth(%d)\n", 2263 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2264 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2265 ioc->name, ioc->shost->sg_tablesize); 2266 return 0; 2267 2268 out: 2269 _base_release_memory_pools(ioc); 2270 return -ENOMEM; 2271} 2272 2273 2274/** 2275 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2276 * @ioc: Pointer to MPT_ADAPTER structure 2277 * @cooked: Request raw or cooked IOC state 2278 * 2279 * Returns all IOC Doorbell register bits if cooked==0, else just the 2280 * Doorbell bits in MPI_IOC_STATE_MASK. 2281 */ 2282u32 2283mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2284{ 2285 u32 s, sc; 2286 2287 s = readl(&ioc->chip->Doorbell); 2288 sc = s & MPI2_IOC_STATE_MASK; 2289 return cooked ? sc : s; 2290} 2291 2292/** 2293 * _base_wait_on_iocstate - waiting on a particular ioc state 2294 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2295 * @timeout: timeout in second 2296 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2297 * 2298 * Returns 0 for success, non-zero for failure. 2299 */ 2300static int 2301_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2302 int sleep_flag) 2303{ 2304 u32 count, cntdn; 2305 u32 current_state; 2306 2307 count = 0; 2308 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2309 do { 2310 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2311 if (current_state == ioc_state) 2312 return 0; 2313 if (count && current_state == MPI2_IOC_STATE_FAULT) 2314 break; 2315 if (sleep_flag == CAN_SLEEP) 2316 msleep(1); 2317 else 2318 udelay(500); 2319 count++; 2320 } while (--cntdn); 2321 2322 return current_state; 2323} 2324 2325/** 2326 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2327 * a write to the doorbell) 2328 * @ioc: per adapter object 2329 * @timeout: timeout in second 2330 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2331 * 2332 * Returns 0 for success, non-zero for failure. 2333 * 2334 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2335 */ 2336static int 2337_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2338 int sleep_flag) 2339{ 2340 u32 cntdn, count; 2341 u32 int_status; 2342 2343 count = 0; 2344 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2345 do { 2346 int_status = readl(&ioc->chip->HostInterruptStatus); 2347 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2348 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2349 "successfull count(%d), timeout(%d)\n", ioc->name, 2350 __func__, count, timeout)); 2351 return 0; 2352 } 2353 if (sleep_flag == CAN_SLEEP) 2354 msleep(1); 2355 else 2356 udelay(500); 2357 count++; 2358 } while (--cntdn); 2359 2360 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2361 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2362 return -EFAULT; 2363} 2364 2365/** 2366 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2367 * @ioc: per adapter object 2368 * @timeout: timeout in second 2369 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2370 * 2371 * Returns 0 for success, non-zero for failure. 2372 * 2373 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2374 * doorbell. 2375 */ 2376static int 2377_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2378 int sleep_flag) 2379{ 2380 u32 cntdn, count; 2381 u32 int_status; 2382 u32 doorbell; 2383 2384 count = 0; 2385 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2386 do { 2387 int_status = readl(&ioc->chip->HostInterruptStatus); 2388 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2389 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2390 "successfull count(%d), timeout(%d)\n", ioc->name, 2391 __func__, count, timeout)); 2392 return 0; 2393 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2394 doorbell = readl(&ioc->chip->Doorbell); 2395 if ((doorbell & MPI2_IOC_STATE_MASK) == 2396 MPI2_IOC_STATE_FAULT) { 2397 mpt2sas_base_fault_info(ioc , doorbell); 2398 return -EFAULT; 2399 } 2400 } else if (int_status == 0xFFFFFFFF) 2401 goto out; 2402 2403 if (sleep_flag == CAN_SLEEP) 2404 msleep(1); 2405 else 2406 udelay(500); 2407 count++; 2408 } while (--cntdn); 2409 2410 out: 2411 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2412 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2413 return -EFAULT; 2414} 2415 2416/** 2417 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2418 * @ioc: per adapter object 2419 * @timeout: timeout in second 2420 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2421 * 2422 * Returns 0 for success, non-zero for failure. 2423 * 2424 */ 2425static int 2426_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2427 int sleep_flag) 2428{ 2429 u32 cntdn, count; 2430 u32 doorbell_reg; 2431 2432 count = 0; 2433 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2434 do { 2435 doorbell_reg = readl(&ioc->chip->Doorbell); 2436 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2437 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2438 "successfull count(%d), timeout(%d)\n", ioc->name, 2439 __func__, count, timeout)); 2440 return 0; 2441 } 2442 if (sleep_flag == CAN_SLEEP) 2443 msleep(1); 2444 else 2445 udelay(500); 2446 count++; 2447 } while (--cntdn); 2448 2449 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2450 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2451 return -EFAULT; 2452} 2453 2454/** 2455 * _base_send_ioc_reset - send doorbell reset 2456 * @ioc: per adapter object 2457 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2458 * @timeout: timeout in second 2459 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2460 * 2461 * Returns 0 for success, non-zero for failure. 2462 */ 2463static int 2464_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2465 int sleep_flag) 2466{ 2467 u32 ioc_state; 2468 int r = 0; 2469 2470 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2471 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2472 ioc->name, __func__); 2473 return -EFAULT; 2474 } 2475 2476 if (!(ioc->facts.IOCCapabilities & 2477 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2478 return -EFAULT; 2479 2480 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2481 2482 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2483 &ioc->chip->Doorbell); 2484 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2485 r = -EFAULT; 2486 goto out; 2487 } 2488 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2489 timeout, sleep_flag); 2490 if (ioc_state) { 2491 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2492 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2493 r = -EFAULT; 2494 goto out; 2495 } 2496 out: 2497 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2498 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2499 return r; 2500} 2501 2502/** 2503 * _base_handshake_req_reply_wait - send request thru doorbell interface 2504 * @ioc: per adapter object 2505 * @request_bytes: request length 2506 * @request: pointer having request payload 2507 * @reply_bytes: reply length 2508 * @reply: pointer to reply payload 2509 * @timeout: timeout in second 2510 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2511 * 2512 * Returns 0 for success, non-zero for failure. 2513 */ 2514static int 2515_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2516 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2517{ 2518 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2519 int i; 2520 u8 failed; 2521 u16 dummy; 2522 u32 *mfp; 2523 2524 /* make sure doorbell is not in use */ 2525 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2526 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2527 " (line=%d)\n", ioc->name, __LINE__); 2528 return -EFAULT; 2529 } 2530 2531 /* clear pending doorbell interrupts from previous state changes */ 2532 if (readl(&ioc->chip->HostInterruptStatus) & 2533 MPI2_HIS_IOC2SYS_DB_STATUS) 2534 writel(0, &ioc->chip->HostInterruptStatus); 2535 2536 /* send message to ioc */ 2537 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2538 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2539 &ioc->chip->Doorbell); 2540 2541 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) { 2542 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2543 "int failed (line=%d)\n", ioc->name, __LINE__); 2544 return -EFAULT; 2545 } 2546 writel(0, &ioc->chip->HostInterruptStatus); 2547 2548 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2549 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2550 "ack failed (line=%d)\n", ioc->name, __LINE__); 2551 return -EFAULT; 2552 } 2553 2554 /* send message 32-bits at a time */ 2555 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2556 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2557 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2558 failed = 1; 2559 } 2560 2561 if (failed) { 2562 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2563 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2564 return -EFAULT; 2565 } 2566 2567 /* now wait for the reply */ 2568 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2569 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2570 "int failed (line=%d)\n", ioc->name, __LINE__); 2571 return -EFAULT; 2572 } 2573 2574 /* read the first two 16-bits, it gives the total length of the reply */ 2575 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2576 & MPI2_DOORBELL_DATA_MASK); 2577 writel(0, &ioc->chip->HostInterruptStatus); 2578 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2579 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2580 "int failed (line=%d)\n", ioc->name, __LINE__); 2581 return -EFAULT; 2582 } 2583 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2584 & MPI2_DOORBELL_DATA_MASK); 2585 writel(0, &ioc->chip->HostInterruptStatus); 2586 2587 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2588 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2589 printk(MPT2SAS_ERR_FMT "doorbell " 2590 "handshake int failed (line=%d)\n", ioc->name, 2591 __LINE__); 2592 return -EFAULT; 2593 } 2594 if (i >= reply_bytes/2) /* overflow case */ 2595 dummy = readl(&ioc->chip->Doorbell); 2596 else 2597 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2598 & MPI2_DOORBELL_DATA_MASK); 2599 writel(0, &ioc->chip->HostInterruptStatus); 2600 } 2601 2602 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2603 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2604 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2605 " (line=%d)\n", ioc->name, __LINE__)); 2606 } 2607 writel(0, &ioc->chip->HostInterruptStatus); 2608 2609 if (ioc->logging_level & MPT_DEBUG_INIT) { 2610 mfp = (u32 *)reply; 2611 printk(KERN_DEBUG "\toffset:data\n"); 2612 for (i = 0; i < reply_bytes/4; i++) 2613 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2614 le32_to_cpu(mfp[i])); 2615 } 2616 return 0; 2617} 2618 2619/** 2620 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2621 * @ioc: per adapter object 2622 * @mpi_reply: the reply payload from FW 2623 * @mpi_request: the request payload sent to FW 2624 * 2625 * The SAS IO Unit Control Request message allows the host to perform low-level 2626 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2627 * to obtain the IOC assigned device handles for a device if it has other 2628 * identifying information about the device, in addition allows the host to 2629 * remove IOC resources associated with the device. 2630 * 2631 * Returns 0 for success, non-zero for failure. 2632 */ 2633int 2634mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2635 Mpi2SasIoUnitControlReply_t *mpi_reply, 2636 Mpi2SasIoUnitControlRequest_t *mpi_request) 2637{ 2638 u16 smid; 2639 u32 ioc_state; 2640 unsigned long timeleft; 2641 u8 issue_reset; 2642 int rc; 2643 void *request; 2644 u16 wait_state_count; 2645 2646 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2647 __func__)); 2648 2649 mutex_lock(&ioc->base_cmds.mutex); 2650 2651 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2652 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2653 ioc->name, __func__); 2654 rc = -EAGAIN; 2655 goto out; 2656 } 2657 2658 wait_state_count = 0; 2659 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2660 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2661 if (wait_state_count++ == 10) { 2662 printk(MPT2SAS_ERR_FMT 2663 "%s: failed due to ioc not operational\n", 2664 ioc->name, __func__); 2665 rc = -EFAULT; 2666 goto out; 2667 } 2668 ssleep(1); 2669 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2670 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2671 "operational state(count=%d)\n", ioc->name, 2672 __func__, wait_state_count); 2673 } 2674 2675 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2676 if (!smid) { 2677 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2678 ioc->name, __func__); 2679 rc = -EAGAIN; 2680 goto out; 2681 } 2682 2683 rc = 0; 2684 ioc->base_cmds.status = MPT2_CMD_PENDING; 2685 request = mpt2sas_base_get_msg_frame(ioc, smid); 2686 ioc->base_cmds.smid = smid; 2687 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2688 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2689 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2690 ioc->ioc_link_reset_in_progress = 1; 2691 mpt2sas_base_put_smid_default(ioc, smid); 2692 init_completion(&ioc->base_cmds.done); 2693 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2694 msecs_to_jiffies(10000)); 2695 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2696 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2697 ioc->ioc_link_reset_in_progress) 2698 ioc->ioc_link_reset_in_progress = 0; 2699 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2700 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2701 ioc->name, __func__); 2702 _debug_dump_mf(mpi_request, 2703 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2704 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2705 issue_reset = 1; 2706 goto issue_host_reset; 2707 } 2708 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2709 memcpy(mpi_reply, ioc->base_cmds.reply, 2710 sizeof(Mpi2SasIoUnitControlReply_t)); 2711 else 2712 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2713 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2714 goto out; 2715 2716 issue_host_reset: 2717 if (issue_reset) 2718 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2719 FORCE_BIG_HAMMER); 2720 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2721 rc = -EFAULT; 2722 out: 2723 mutex_unlock(&ioc->base_cmds.mutex); 2724 return rc; 2725} 2726 2727 2728/** 2729 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2730 * @ioc: per adapter object 2731 * @mpi_reply: the reply payload from FW 2732 * @mpi_request: the request payload sent to FW 2733 * 2734 * The SCSI Enclosure Processor request message causes the IOC to 2735 * communicate with SES devices to control LED status signals. 2736 * 2737 * Returns 0 for success, non-zero for failure. 2738 */ 2739int 2740mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2741 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2742{ 2743 u16 smid; 2744 u32 ioc_state; 2745 unsigned long timeleft; 2746 u8 issue_reset; 2747 int rc; 2748 void *request; 2749 u16 wait_state_count; 2750 2751 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2752 __func__)); 2753 2754 mutex_lock(&ioc->base_cmds.mutex); 2755 2756 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2757 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2758 ioc->name, __func__); 2759 rc = -EAGAIN; 2760 goto out; 2761 } 2762 2763 wait_state_count = 0; 2764 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2765 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2766 if (wait_state_count++ == 10) { 2767 printk(MPT2SAS_ERR_FMT 2768 "%s: failed due to ioc not operational\n", 2769 ioc->name, __func__); 2770 rc = -EFAULT; 2771 goto out; 2772 } 2773 ssleep(1); 2774 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2775 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2776 "operational state(count=%d)\n", ioc->name, 2777 __func__, wait_state_count); 2778 } 2779 2780 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2781 if (!smid) { 2782 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2783 ioc->name, __func__); 2784 rc = -EAGAIN; 2785 goto out; 2786 } 2787 2788 rc = 0; 2789 ioc->base_cmds.status = MPT2_CMD_PENDING; 2790 request = mpt2sas_base_get_msg_frame(ioc, smid); 2791 ioc->base_cmds.smid = smid; 2792 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2793 mpt2sas_base_put_smid_default(ioc, smid); 2794 init_completion(&ioc->base_cmds.done); 2795 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2796 msecs_to_jiffies(10000)); 2797 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2798 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2799 ioc->name, __func__); 2800 _debug_dump_mf(mpi_request, 2801 sizeof(Mpi2SepRequest_t)/4); 2802 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2803 issue_reset = 1; 2804 goto issue_host_reset; 2805 } 2806 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2807 memcpy(mpi_reply, ioc->base_cmds.reply, 2808 sizeof(Mpi2SepReply_t)); 2809 else 2810 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2811 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2812 goto out; 2813 2814 issue_host_reset: 2815 if (issue_reset) 2816 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2817 FORCE_BIG_HAMMER); 2818 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2819 rc = -EFAULT; 2820 out: 2821 mutex_unlock(&ioc->base_cmds.mutex); 2822 return rc; 2823} 2824 2825/** 2826 * _base_get_port_facts - obtain port facts reply and save in ioc 2827 * @ioc: per adapter object 2828 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2829 * 2830 * Returns 0 for success, non-zero for failure. 2831 */ 2832static int 2833_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2834{ 2835 Mpi2PortFactsRequest_t mpi_request; 2836 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2837 int mpi_reply_sz, mpi_request_sz, r; 2838 2839 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2840 __func__)); 2841 2842 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2843 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2844 memset(&mpi_request, 0, mpi_request_sz); 2845 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2846 mpi_request.PortNumber = port; 2847 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2848 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2849 2850 if (r != 0) { 2851 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2852 ioc->name, __func__, r); 2853 return r; 2854 } 2855 2856 pfacts = &ioc->pfacts[port]; 2857 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2858 pfacts->PortNumber = mpi_reply.PortNumber; 2859 pfacts->VP_ID = mpi_reply.VP_ID; 2860 pfacts->VF_ID = mpi_reply.VF_ID; 2861 pfacts->MaxPostedCmdBuffers = 2862 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2863 2864 return 0; 2865} 2866 2867/** 2868 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2869 * @ioc: per adapter object 2870 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2871 * 2872 * Returns 0 for success, non-zero for failure. 2873 */ 2874static int 2875_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2876{ 2877 Mpi2IOCFactsRequest_t mpi_request; 2878 Mpi2IOCFactsReply_t mpi_reply, *facts; 2879 int mpi_reply_sz, mpi_request_sz, r; 2880 2881 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2882 __func__)); 2883 2884 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2885 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2886 memset(&mpi_request, 0, mpi_request_sz); 2887 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2888 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2889 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2890 2891 if (r != 0) { 2892 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2893 ioc->name, __func__, r); 2894 return r; 2895 } 2896 2897 facts = &ioc->facts; 2898 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2899 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2900 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2901 facts->VP_ID = mpi_reply.VP_ID; 2902 facts->VF_ID = mpi_reply.VF_ID; 2903 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2904 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2905 facts->WhoInit = mpi_reply.WhoInit; 2906 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2907 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2908 facts->MaxReplyDescriptorPostQueueDepth = 2909 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2910 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2911 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2912 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2913 ioc->ir_firmware = 1; 2914 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2915 facts->IOCRequestFrameSize = 2916 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2917 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2918 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2919 ioc->shost->max_id = -1; 2920 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2921 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2922 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2923 facts->HighPriorityCredit = 2924 le16_to_cpu(mpi_reply.HighPriorityCredit); 2925 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2926 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2927 2928 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2929 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2930 facts->MaxChainDepth)); 2931 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2932 "reply frame size(%d)\n", ioc->name, 2933 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2934 return 0; 2935} 2936 2937/** 2938 * _base_send_ioc_init - send ioc_init to firmware 2939 * @ioc: per adapter object 2940 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2941 * 2942 * Returns 0 for success, non-zero for failure. 2943 */ 2944static int 2945_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2946{ 2947 Mpi2IOCInitRequest_t mpi_request; 2948 Mpi2IOCInitReply_t mpi_reply; 2949 int r; 2950 struct timeval current_time; 2951 2952 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2953 __func__)); 2954 2955 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2956 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2957 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2958 mpi_request.VF_ID = 0; /* TODO */ 2959 mpi_request.VP_ID = 0; 2960 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2961 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2962 2963 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2964 * removed and made reserved. For those with older firmware will need 2965 * this fix. It was decided that the Reply and Request frame sizes are 2966 * the same. 2967 */ 2968 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2969 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2970/* mpi_request.SystemReplyFrameSize = 2971 * cpu_to_le16(ioc->reply_sz); 2972 */ 2973 } 2974 2975 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 2976 mpi_request.ReplyDescriptorPostQueueDepth = 2977 cpu_to_le16(ioc->reply_post_queue_depth); 2978 mpi_request.ReplyFreeQueueDepth = 2979 cpu_to_le16(ioc->reply_free_queue_depth); 2980 2981#if BITS_PER_LONG > 32 2982 mpi_request.SenseBufferAddressHigh = 2983 cpu_to_le32(ioc->sense_dma >> 32); 2984 mpi_request.SystemReplyAddressHigh = 2985 cpu_to_le32(ioc->reply_dma >> 32); 2986 mpi_request.SystemRequestFrameBaseAddress = 2987 cpu_to_le64(ioc->request_dma); 2988 mpi_request.ReplyFreeQueueAddress = 2989 cpu_to_le64(ioc->reply_free_dma); 2990 mpi_request.ReplyDescriptorPostQueueAddress = 2991 cpu_to_le64(ioc->reply_post_free_dma); 2992#else 2993 mpi_request.SystemRequestFrameBaseAddress = 2994 cpu_to_le32(ioc->request_dma); 2995 mpi_request.ReplyFreeQueueAddress = 2996 cpu_to_le32(ioc->reply_free_dma); 2997 mpi_request.ReplyDescriptorPostQueueAddress = 2998 cpu_to_le32(ioc->reply_post_free_dma); 2999#endif 3000 3001 /* This time stamp specifies number of milliseconds 3002 * since epoch ~ midnight January 1, 1970. 3003 */ 3004 do_gettimeofday(¤t_time); 3005 mpi_request.TimeStamp = (current_time.tv_sec * 1000) + 3006 (current_time.tv_usec >> 3); 3007 3008 if (ioc->logging_level & MPT_DEBUG_INIT) { 3009 u32 *mfp; 3010 int i; 3011 3012 mfp = (u32 *)&mpi_request; 3013 printk(KERN_DEBUG "\toffset:data\n"); 3014 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 3015 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 3016 le32_to_cpu(mfp[i])); 3017 } 3018 3019 r = _base_handshake_req_reply_wait(ioc, 3020 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 3021 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 3022 sleep_flag); 3023 3024 if (r != 0) { 3025 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3026 ioc->name, __func__, r); 3027 return r; 3028 } 3029 3030 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS || 3031 mpi_reply.IOCLogInfo) { 3032 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 3033 r = -EIO; 3034 } 3035 3036 return 0; 3037} 3038 3039/** 3040 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 3041 * @ioc: per adapter object 3042 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3043 * 3044 * Returns 0 for success, non-zero for failure. 3045 */ 3046static int 3047_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3048{ 3049 Mpi2PortEnableRequest_t *mpi_request; 3050 u32 ioc_state; 3051 unsigned long timeleft; 3052 int r = 0; 3053 u16 smid; 3054 3055 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 3056 3057 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3058 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3059 ioc->name, __func__); 3060 return -EAGAIN; 3061 } 3062 3063 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3064 if (!smid) { 3065 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3066 ioc->name, __func__); 3067 return -EAGAIN; 3068 } 3069 3070 ioc->base_cmds.status = MPT2_CMD_PENDING; 3071 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3072 ioc->base_cmds.smid = smid; 3073 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 3074 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 3075 mpi_request->VF_ID = 0; /* TODO */ 3076 mpi_request->VP_ID = 0; 3077 3078 mpt2sas_base_put_smid_default(ioc, smid); 3079 init_completion(&ioc->base_cmds.done); 3080 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 3081 300*HZ); 3082 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3083 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3084 ioc->name, __func__); 3085 _debug_dump_mf(mpi_request, 3086 sizeof(Mpi2PortEnableRequest_t)/4); 3087 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3088 r = -EFAULT; 3089 else 3090 r = -ETIME; 3091 goto out; 3092 } else 3093 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3094 ioc->name, __func__)); 3095 3096 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 3097 60, sleep_flag); 3098 if (ioc_state) { 3099 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 3100 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3101 r = -EFAULT; 3102 } 3103 out: 3104 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3105 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 3106 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 3107 return r; 3108} 3109 3110/** 3111 * _base_unmask_events - turn on notification for this event 3112 * @ioc: per adapter object 3113 * @event: firmware event 3114 * 3115 * The mask is stored in ioc->event_masks. 3116 */ 3117static void 3118_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 3119{ 3120 u32 desired_event; 3121 3122 if (event >= 128) 3123 return; 3124 3125 desired_event = (1 << (event % 32)); 3126 3127 if (event < 32) 3128 ioc->event_masks[0] &= ~desired_event; 3129 else if (event < 64) 3130 ioc->event_masks[1] &= ~desired_event; 3131 else if (event < 96) 3132 ioc->event_masks[2] &= ~desired_event; 3133 else if (event < 128) 3134 ioc->event_masks[3] &= ~desired_event; 3135} 3136 3137/** 3138 * _base_event_notification - send event notification 3139 * @ioc: per adapter object 3140 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3141 * 3142 * Returns 0 for success, non-zero for failure. 3143 */ 3144static int 3145_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3146{ 3147 Mpi2EventNotificationRequest_t *mpi_request; 3148 unsigned long timeleft; 3149 u16 smid; 3150 int r = 0; 3151 int i; 3152 3153 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3154 __func__)); 3155 3156 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3157 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3158 ioc->name, __func__); 3159 return -EAGAIN; 3160 } 3161 3162 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3163 if (!smid) { 3164 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3165 ioc->name, __func__); 3166 return -EAGAIN; 3167 } 3168 ioc->base_cmds.status = MPT2_CMD_PENDING; 3169 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3170 ioc->base_cmds.smid = smid; 3171 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 3172 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 3173 mpi_request->VF_ID = 0; /* TODO */ 3174 mpi_request->VP_ID = 0; 3175 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3176 mpi_request->EventMasks[i] = 3177 le32_to_cpu(ioc->event_masks[i]); 3178 mpt2sas_base_put_smid_default(ioc, smid); 3179 init_completion(&ioc->base_cmds.done); 3180 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 3181 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3182 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3183 ioc->name, __func__); 3184 _debug_dump_mf(mpi_request, 3185 sizeof(Mpi2EventNotificationRequest_t)/4); 3186 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3187 r = -EFAULT; 3188 else 3189 r = -ETIME; 3190 } else 3191 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3192 ioc->name, __func__)); 3193 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3194 return r; 3195} 3196 3197/** 3198 * mpt2sas_base_validate_event_type - validating event types 3199 * @ioc: per adapter object 3200 * @event: firmware event 3201 * 3202 * This will turn on firmware event notification when application 3203 * ask for that event. We don't mask events that are already enabled. 3204 */ 3205void 3206mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 3207{ 3208 int i, j; 3209 u32 event_mask, desired_event; 3210 u8 send_update_to_fw; 3211 3212 for (i = 0, send_update_to_fw = 0; i < 3213 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 3214 event_mask = ~event_type[i]; 3215 desired_event = 1; 3216 for (j = 0; j < 32; j++) { 3217 if (!(event_mask & desired_event) && 3218 (ioc->event_masks[i] & desired_event)) { 3219 ioc->event_masks[i] &= ~desired_event; 3220 send_update_to_fw = 1; 3221 } 3222 desired_event = (desired_event << 1); 3223 } 3224 } 3225 3226 if (!send_update_to_fw) 3227 return; 3228 3229 mutex_lock(&ioc->base_cmds.mutex); 3230 _base_event_notification(ioc, CAN_SLEEP); 3231 mutex_unlock(&ioc->base_cmds.mutex); 3232} 3233 3234/** 3235 * _base_diag_reset - the "big hammer" start of day reset 3236 * @ioc: per adapter object 3237 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3238 * 3239 * Returns 0 for success, non-zero for failure. 3240 */ 3241static int 3242_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3243{ 3244 u32 host_diagnostic; 3245 u32 ioc_state; 3246 u32 count; 3247 u32 hcb_size; 3248 3249 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3250 3251 _base_save_msix_table(ioc); 3252 3253 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 3254 ioc->name)); 3255 3256 count = 0; 3257 do { 3258 /* Write magic sequence to WriteSequence register 3259 * Loop until in diagnostic mode 3260 */ 3261 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 3262 "sequence\n", ioc->name)); 3263 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3264 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3265 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3266 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3267 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3268 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3269 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3270 3271 /* wait 100 msec */ 3272 if (sleep_flag == CAN_SLEEP) 3273 msleep(100); 3274 else 3275 mdelay(100); 3276 3277 if (count++ > 20) 3278 goto out; 3279 3280 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3281 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 3282 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3283 ioc->name, count, host_diagnostic)); 3284 3285 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3286 3287 hcb_size = readl(&ioc->chip->HCBSize); 3288 3289 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 3290 ioc->name)); 3291 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3292 &ioc->chip->HostDiagnostic); 3293 3294 /* don't access any registers for 50 milliseconds */ 3295 msleep(50); 3296 3297 /* 300 second max wait */ 3298 for (count = 0; count < 3000000 ; count++) { 3299 3300 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3301 3302 if (host_diagnostic == 0xFFFFFFFF) 3303 goto out; 3304 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3305 break; 3306 3307 /* wait 100 msec */ 3308 if (sleep_flag == CAN_SLEEP) 3309 msleep(1); 3310 else 3311 mdelay(1); 3312 } 3313 3314 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3315 3316 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3317 "assuming the HCB Address points to good F/W\n", 3318 ioc->name)); 3319 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3320 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3321 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3322 3323 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3324 "re-enable the HCDW\n", ioc->name)); 3325 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3326 &ioc->chip->HCBSize); 3327 } 3328 3329 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3330 ioc->name)); 3331 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3332 &ioc->chip->HostDiagnostic); 3333 3334 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3335 "diagnostic register\n", ioc->name)); 3336 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3337 3338 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3339 "READY state\n", ioc->name)); 3340 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3341 sleep_flag); 3342 if (ioc_state) { 3343 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3344 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3345 goto out; 3346 } 3347 3348 _base_restore_msix_table(ioc); 3349 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3350 return 0; 3351 3352 out: 3353 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3354 return -EFAULT; 3355} 3356 3357/** 3358 * _base_make_ioc_ready - put controller in READY state 3359 * @ioc: per adapter object 3360 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3361 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3362 * 3363 * Returns 0 for success, non-zero for failure. 3364 */ 3365static int 3366_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3367 enum reset_type type) 3368{ 3369 u32 ioc_state; 3370 3371 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3372 __func__)); 3373 3374 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3375 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3376 ioc->name, __func__, ioc_state)); 3377 3378 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3379 return 0; 3380 3381 if (ioc_state & MPI2_DOORBELL_USED) { 3382 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3383 "active!\n", ioc->name)); 3384 goto issue_diag_reset; 3385 } 3386 3387 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3388 mpt2sas_base_fault_info(ioc, ioc_state & 3389 MPI2_DOORBELL_DATA_MASK); 3390 goto issue_diag_reset; 3391 } 3392 3393 if (type == FORCE_BIG_HAMMER) 3394 goto issue_diag_reset; 3395 3396 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3397 if (!(_base_send_ioc_reset(ioc, 3398 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3399 return 0; 3400 3401 issue_diag_reset: 3402 return _base_diag_reset(ioc, CAN_SLEEP); 3403} 3404 3405/** 3406 * _base_make_ioc_operational - put controller in OPERATIONAL state 3407 * @ioc: per adapter object 3408 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3409 * 3410 * Returns 0 for success, non-zero for failure. 3411 */ 3412static int 3413_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3414{ 3415 int r, i; 3416 unsigned long flags; 3417 u32 reply_address; 3418 u16 smid; 3419 struct _tr_list *delayed_tr, *delayed_tr_next; 3420 3421 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3422 __func__)); 3423 3424 /* clean the delayed target reset list */ 3425 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 3426 &ioc->delayed_tr_list, list) { 3427 list_del(&delayed_tr->list); 3428 kfree(delayed_tr); 3429 } 3430 3431 /* initialize the scsi lookup free list */ 3432 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3433 INIT_LIST_HEAD(&ioc->free_list); 3434 smid = 1; 3435 for (i = 0; i < ioc->scsiio_depth; i++, smid++) { 3436 ioc->scsi_lookup[i].cb_idx = 0xFF; 3437 ioc->scsi_lookup[i].smid = smid; 3438 ioc->scsi_lookup[i].scmd = NULL; 3439 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3440 &ioc->free_list); 3441 } 3442 3443 /* hi-priority queue */ 3444 INIT_LIST_HEAD(&ioc->hpr_free_list); 3445 smid = ioc->hi_priority_smid; 3446 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { 3447 ioc->hpr_lookup[i].cb_idx = 0xFF; 3448 ioc->hpr_lookup[i].smid = smid; 3449 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 3450 &ioc->hpr_free_list); 3451 } 3452 3453 /* internal queue */ 3454 INIT_LIST_HEAD(&ioc->internal_free_list); 3455 smid = ioc->internal_smid; 3456 for (i = 0; i < ioc->internal_depth; i++, smid++) { 3457 ioc->internal_lookup[i].cb_idx = 0xFF; 3458 ioc->internal_lookup[i].smid = smid; 3459 list_add_tail(&ioc->internal_lookup[i].tracker_list, 3460 &ioc->internal_free_list); 3461 } 3462 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3463 3464 /* initialize Reply Free Queue */ 3465 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3466 i < ioc->reply_free_queue_depth ; i++, reply_address += 3467 ioc->reply_sz) 3468 ioc->reply_free[i] = cpu_to_le32(reply_address); 3469 3470 /* initialize Reply Post Free Queue */ 3471 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3472 ioc->reply_post_free[i].Words = ULLONG_MAX; 3473 3474 r = _base_send_ioc_init(ioc, sleep_flag); 3475 if (r) 3476 return r; 3477 3478 /* initialize the index's */ 3479 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3480 ioc->reply_post_host_index = 0; 3481 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3482 writel(0, &ioc->chip->ReplyPostHostIndex); 3483 3484 _base_unmask_interrupts(ioc); 3485 r = _base_event_notification(ioc, sleep_flag); 3486 if (r) 3487 return r; 3488 3489 if (sleep_flag == CAN_SLEEP) 3490 _base_static_config_pages(ioc); 3491 3492 r = _base_send_port_enable(ioc, sleep_flag); 3493 if (r) 3494 return r; 3495 3496 return r; 3497} 3498 3499/** 3500 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3501 * @ioc: per adapter object 3502 * 3503 * Return nothing. 3504 */ 3505void 3506mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3507{ 3508 struct pci_dev *pdev = ioc->pdev; 3509 3510 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3511 __func__)); 3512 3513 _base_mask_interrupts(ioc); 3514 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3515 if (ioc->pci_irq) { 3516 synchronize_irq(pdev->irq); 3517 free_irq(ioc->pci_irq, ioc); 3518 } 3519 _base_disable_msix(ioc); 3520 if (ioc->chip_phys) 3521 iounmap(ioc->chip); 3522 ioc->pci_irq = -1; 3523 ioc->chip_phys = 0; 3524 pci_release_selected_regions(ioc->pdev, ioc->bars); 3525 pci_disable_device(pdev); 3526 return; 3527} 3528 3529/** 3530 * mpt2sas_base_attach - attach controller instance 3531 * @ioc: per adapter object 3532 * 3533 * Returns 0 for success, non-zero for failure. 3534 */ 3535int 3536mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3537{ 3538 int r, i; 3539 3540 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3541 __func__)); 3542 3543 r = mpt2sas_base_map_resources(ioc); 3544 if (r) 3545 return r; 3546 3547 pci_set_drvdata(ioc->pdev, ioc->shost); 3548 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3549 if (r) 3550 goto out_free_resources; 3551 3552 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3553 if (r) 3554 goto out_free_resources; 3555 3556 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3557 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3558 if (!ioc->pfacts) 3559 goto out_free_resources; 3560 3561 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3562 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3563 if (r) 3564 goto out_free_resources; 3565 } 3566 3567 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3568 if (r) 3569 goto out_free_resources; 3570 3571 init_waitqueue_head(&ioc->reset_wq); 3572 3573 /* base internal command bits */ 3574 mutex_init(&ioc->base_cmds.mutex); 3575 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3576 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3577 3578 /* transport internal command bits */ 3579 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3580 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3581 mutex_init(&ioc->transport_cmds.mutex); 3582 3583 /* task management internal command bits */ 3584 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3585 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3586 mutex_init(&ioc->tm_cmds.mutex); 3587 3588 /* config page internal command bits */ 3589 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3590 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3591 mutex_init(&ioc->config_cmds.mutex); 3592 3593 /* ctl module internal command bits */ 3594 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3595 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3596 mutex_init(&ioc->ctl_cmds.mutex); 3597 3598 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3599 ioc->event_masks[i] = -1; 3600 3601 /* here we enable the events we care about */ 3602 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3603 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3604 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3605 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3606 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3607 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3608 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3609 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3610 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3611 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3612 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3613 r = _base_make_ioc_operational(ioc, CAN_SLEEP); 3614 if (r) 3615 goto out_free_resources; 3616 3617 mpt2sas_base_start_watchdog(ioc); 3618 if (diag_buffer_enable != 0) 3619 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable); 3620 return 0; 3621 3622 out_free_resources: 3623 3624 ioc->remove_host = 1; 3625 mpt2sas_base_free_resources(ioc); 3626 _base_release_memory_pools(ioc); 3627 pci_set_drvdata(ioc->pdev, NULL); 3628 kfree(ioc->tm_cmds.reply); 3629 kfree(ioc->transport_cmds.reply); 3630 kfree(ioc->config_cmds.reply); 3631 kfree(ioc->base_cmds.reply); 3632 kfree(ioc->ctl_cmds.reply); 3633 kfree(ioc->pfacts); 3634 ioc->ctl_cmds.reply = NULL; 3635 ioc->base_cmds.reply = NULL; 3636 ioc->tm_cmds.reply = NULL; 3637 ioc->transport_cmds.reply = NULL; 3638 ioc->config_cmds.reply = NULL; 3639 ioc->pfacts = NULL; 3640 return r; 3641} 3642 3643 3644/** 3645 * mpt2sas_base_detach - remove controller instance 3646 * @ioc: per adapter object 3647 * 3648 * Return nothing. 3649 */ 3650void 3651mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3652{ 3653 3654 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3655 __func__)); 3656 3657 mpt2sas_base_stop_watchdog(ioc); 3658 mpt2sas_base_free_resources(ioc); 3659 _base_release_memory_pools(ioc); 3660 pci_set_drvdata(ioc->pdev, NULL); 3661 kfree(ioc->pfacts); 3662 kfree(ioc->ctl_cmds.reply); 3663 kfree(ioc->base_cmds.reply); 3664 kfree(ioc->tm_cmds.reply); 3665 kfree(ioc->transport_cmds.reply); 3666 kfree(ioc->config_cmds.reply); 3667} 3668 3669/** 3670 * _base_reset_handler - reset callback handler (for base) 3671 * @ioc: per adapter object 3672 * @reset_phase: phase 3673 * 3674 * The handler for doing any required cleanup or initialization. 3675 * 3676 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3677 * MPT2_IOC_DONE_RESET 3678 * 3679 * Return nothing. 3680 */ 3681static void 3682_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3683{ 3684 switch (reset_phase) { 3685 case MPT2_IOC_PRE_RESET: 3686 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3687 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3688 break; 3689 case MPT2_IOC_AFTER_RESET: 3690 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3691 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3692 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3693 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3694 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3695 complete(&ioc->transport_cmds.done); 3696 } 3697 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3698 ioc->base_cmds.status |= MPT2_CMD_RESET; 3699 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3700 complete(&ioc->base_cmds.done); 3701 } 3702 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3703 ioc->config_cmds.status |= MPT2_CMD_RESET; 3704 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3705 ioc->config_cmds.smid = USHORT_MAX; 3706 complete(&ioc->config_cmds.done); 3707 } 3708 break; 3709 case MPT2_IOC_DONE_RESET: 3710 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3711 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3712 break; 3713 } 3714 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3715 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3716} 3717 3718/** 3719 * _wait_for_commands_to_complete - reset controller 3720 * @ioc: Pointer to MPT_ADAPTER structure 3721 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3722 * 3723 * This function waiting(3s) for all pending commands to complete 3724 * prior to putting controller in reset. 3725 */ 3726static void 3727_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3728{ 3729 u32 ioc_state; 3730 unsigned long flags; 3731 u16 i; 3732 3733 ioc->pending_io_count = 0; 3734 if (sleep_flag != CAN_SLEEP) 3735 return; 3736 3737 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3738 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3739 return; 3740 3741 /* pending command count */ 3742 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3743 for (i = 0; i < ioc->scsiio_depth; i++) 3744 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3745 ioc->pending_io_count++; 3746 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3747 3748 if (!ioc->pending_io_count) 3749 return; 3750 3751 /* wait for pending commands to complete */ 3752 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3753} 3754 3755/** 3756 * mpt2sas_base_hard_reset_handler - reset controller 3757 * @ioc: Pointer to MPT_ADAPTER structure 3758 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3759 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3760 * 3761 * Returns 0 for success, non-zero for failure. 3762 */ 3763int 3764mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3765 enum reset_type type) 3766{ 3767 int r; 3768 unsigned long flags; 3769 3770 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3771 __func__)); 3772 3773 if (mpt2sas_fwfault_debug) 3774 mpt2sas_halt_firmware(ioc); 3775 3776 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3777 if (ioc->shost_recovery) { 3778 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3779 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3780 ioc->name, __func__); 3781 return -EBUSY; 3782 } 3783 ioc->shost_recovery = 1; 3784 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3785 3786 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3787 _wait_for_commands_to_complete(ioc, sleep_flag); 3788 _base_mask_interrupts(ioc); 3789 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3790 if (r) 3791 goto out; 3792 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3793 r = _base_make_ioc_operational(ioc, sleep_flag); 3794 if (!r) 3795 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3796 out: 3797 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3798 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3799 3800 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3801 ioc->shost_recovery = 0; 3802 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3803 3804 if (!r) 3805 _base_reset_handler(ioc, MPT2_IOC_RUNNING); 3806 return r; 3807} 3808