mpt2sas_base.c revision bcfb6e6ea46d84bfb541069545e5b0d7f6cc3233
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2009 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60 61#include "mpt2sas_base.h" 62 63static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 64 65#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 66#define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */ 67 68static int max_queue_depth = -1; 69module_param(max_queue_depth, int, 0); 70MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 71 72static int max_sgl_entries = -1; 73module_param(max_sgl_entries, int, 0); 74MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 75 76static int msix_disable = -1; 77module_param(msix_disable, int, 0); 78MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 79 80/** 81 * _base_fault_reset_work - workq handling ioc fault conditions 82 * @work: input argument, used to derive ioc 83 * Context: sleep. 84 * 85 * Return nothing. 86 */ 87static void 88_base_fault_reset_work(struct work_struct *work) 89{ 90 struct MPT2SAS_ADAPTER *ioc = 91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 92 unsigned long flags; 93 u32 doorbell; 94 int rc; 95 96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 97 if (ioc->shost_recovery) 98 goto rearm_timer; 99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 100 101 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 104 FORCE_BIG_HAMMER); 105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 106 __func__, (rc == 0) ? "success" : "failed"); 107 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 109 mpt2sas_base_fault_info(ioc, doorbell & 110 MPI2_DOORBELL_DATA_MASK); 111 } 112 113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 114 rearm_timer: 115 if (ioc->fault_reset_work_q) 116 queue_delayed_work(ioc->fault_reset_work_q, 117 &ioc->fault_reset_work, 118 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 120} 121 122/** 123 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 124 * @ioc: pointer to scsi command object 125 * Context: sleep. 126 * 127 * Return nothing. 128 */ 129void 130mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 131{ 132 unsigned long flags; 133 134 if (ioc->fault_reset_work_q) 135 return; 136 137 /* initialize fault polling */ 138 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 139 snprintf(ioc->fault_reset_work_q_name, 140 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 141 ioc->fault_reset_work_q = 142 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 143 if (!ioc->fault_reset_work_q) { 144 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 145 ioc->name, __func__, __LINE__); 146 return; 147 } 148 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 149 if (ioc->fault_reset_work_q) 150 queue_delayed_work(ioc->fault_reset_work_q, 151 &ioc->fault_reset_work, 152 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 153 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 154} 155 156/** 157 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 158 * @ioc: pointer to scsi command object 159 * Context: sleep. 160 * 161 * Return nothing. 162 */ 163void 164mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 165{ 166 unsigned long flags; 167 struct workqueue_struct *wq; 168 169 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 170 wq = ioc->fault_reset_work_q; 171 ioc->fault_reset_work_q = NULL; 172 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 173 if (wq) { 174 if (!cancel_delayed_work(&ioc->fault_reset_work)) 175 flush_workqueue(wq); 176 destroy_workqueue(wq); 177 } 178} 179 180#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 181/** 182 * _base_sas_ioc_info - verbose translation of the ioc status 183 * @ioc: pointer to scsi command object 184 * @mpi_reply: reply mf payload returned from firmware 185 * @request_hdr: request mf 186 * 187 * Return nothing. 188 */ 189static void 190_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 191 MPI2RequestHeader_t *request_hdr) 192{ 193 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 194 MPI2_IOCSTATUS_MASK; 195 char *desc = NULL; 196 u16 frame_sz; 197 char *func_str = NULL; 198 199 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 200 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 201 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 202 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 203 return; 204 205 switch (ioc_status) { 206 207/**************************************************************************** 208* Common IOCStatus values for all replies 209****************************************************************************/ 210 211 case MPI2_IOCSTATUS_INVALID_FUNCTION: 212 desc = "invalid function"; 213 break; 214 case MPI2_IOCSTATUS_BUSY: 215 desc = "busy"; 216 break; 217 case MPI2_IOCSTATUS_INVALID_SGL: 218 desc = "invalid sgl"; 219 break; 220 case MPI2_IOCSTATUS_INTERNAL_ERROR: 221 desc = "internal error"; 222 break; 223 case MPI2_IOCSTATUS_INVALID_VPID: 224 desc = "invalid vpid"; 225 break; 226 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 227 desc = "insufficient resources"; 228 break; 229 case MPI2_IOCSTATUS_INVALID_FIELD: 230 desc = "invalid field"; 231 break; 232 case MPI2_IOCSTATUS_INVALID_STATE: 233 desc = "invalid state"; 234 break; 235 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 236 desc = "op state not supported"; 237 break; 238 239/**************************************************************************** 240* Config IOCStatus values 241****************************************************************************/ 242 243 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 244 desc = "config invalid action"; 245 break; 246 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 247 desc = "config invalid type"; 248 break; 249 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 250 desc = "config invalid page"; 251 break; 252 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 253 desc = "config invalid data"; 254 break; 255 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 256 desc = "config no defaults"; 257 break; 258 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 259 desc = "config cant commit"; 260 break; 261 262/**************************************************************************** 263* SCSI IO Reply 264****************************************************************************/ 265 266 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 267 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 268 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 269 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 270 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 271 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 272 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 273 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 274 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 275 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 276 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 277 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 278 break; 279 280/**************************************************************************** 281* For use by SCSI Initiator and SCSI Target end-to-end data protection 282****************************************************************************/ 283 284 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 285 desc = "eedp guard error"; 286 break; 287 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 288 desc = "eedp ref tag error"; 289 break; 290 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 291 desc = "eedp app tag error"; 292 break; 293 294/**************************************************************************** 295* SCSI Target values 296****************************************************************************/ 297 298 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 299 desc = "target invalid io index"; 300 break; 301 case MPI2_IOCSTATUS_TARGET_ABORTED: 302 desc = "target aborted"; 303 break; 304 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 305 desc = "target no conn retryable"; 306 break; 307 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 308 desc = "target no connection"; 309 break; 310 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 311 desc = "target xfer count mismatch"; 312 break; 313 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 314 desc = "target data offset error"; 315 break; 316 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 317 desc = "target too much write data"; 318 break; 319 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 320 desc = "target iu too short"; 321 break; 322 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 323 desc = "target ack nak timeout"; 324 break; 325 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 326 desc = "target nak received"; 327 break; 328 329/**************************************************************************** 330* Serial Attached SCSI values 331****************************************************************************/ 332 333 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 334 desc = "smp request failed"; 335 break; 336 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 337 desc = "smp data overrun"; 338 break; 339 340/**************************************************************************** 341* Diagnostic Buffer Post / Diagnostic Release values 342****************************************************************************/ 343 344 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 345 desc = "diagnostic released"; 346 break; 347 default: 348 break; 349 } 350 351 if (!desc) 352 return; 353 354 switch (request_hdr->Function) { 355 case MPI2_FUNCTION_CONFIG: 356 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 357 func_str = "config_page"; 358 break; 359 case MPI2_FUNCTION_SCSI_TASK_MGMT: 360 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 361 func_str = "task_mgmt"; 362 break; 363 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 364 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 365 func_str = "sas_iounit_ctl"; 366 break; 367 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 368 frame_sz = sizeof(Mpi2SepRequest_t); 369 func_str = "enclosure"; 370 break; 371 case MPI2_FUNCTION_IOC_INIT: 372 frame_sz = sizeof(Mpi2IOCInitRequest_t); 373 func_str = "ioc_init"; 374 break; 375 case MPI2_FUNCTION_PORT_ENABLE: 376 frame_sz = sizeof(Mpi2PortEnableRequest_t); 377 func_str = "port_enable"; 378 break; 379 case MPI2_FUNCTION_SMP_PASSTHROUGH: 380 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 381 func_str = "smp_passthru"; 382 break; 383 default: 384 frame_sz = 32; 385 func_str = "unknown"; 386 break; 387 } 388 389 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 390 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 391 392 _debug_dump_mf(request_hdr, frame_sz/4); 393} 394 395/** 396 * _base_display_event_data - verbose translation of firmware asyn events 397 * @ioc: pointer to scsi command object 398 * @mpi_reply: reply mf payload returned from firmware 399 * 400 * Return nothing. 401 */ 402static void 403_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 404 Mpi2EventNotificationReply_t *mpi_reply) 405{ 406 char *desc = NULL; 407 u16 event; 408 409 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 410 return; 411 412 event = le16_to_cpu(mpi_reply->Event); 413 414 switch (event) { 415 case MPI2_EVENT_LOG_DATA: 416 desc = "Log Data"; 417 break; 418 case MPI2_EVENT_STATE_CHANGE: 419 desc = "Status Change"; 420 break; 421 case MPI2_EVENT_HARD_RESET_RECEIVED: 422 desc = "Hard Reset Received"; 423 break; 424 case MPI2_EVENT_EVENT_CHANGE: 425 desc = "Event Change"; 426 break; 427 case MPI2_EVENT_TASK_SET_FULL: 428 desc = "Task Set Full"; 429 break; 430 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 431 desc = "Device Status Change"; 432 break; 433 case MPI2_EVENT_IR_OPERATION_STATUS: 434 desc = "IR Operation Status"; 435 break; 436 case MPI2_EVENT_SAS_DISCOVERY: 437 desc = "Discovery"; 438 break; 439 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 440 desc = "SAS Broadcast Primitive"; 441 break; 442 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 443 desc = "SAS Init Device Status Change"; 444 break; 445 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 446 desc = "SAS Init Table Overflow"; 447 break; 448 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 449 desc = "SAS Topology Change List"; 450 break; 451 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 452 desc = "SAS Enclosure Device Status Change"; 453 break; 454 case MPI2_EVENT_IR_VOLUME: 455 desc = "IR Volume"; 456 break; 457 case MPI2_EVENT_IR_PHYSICAL_DISK: 458 desc = "IR Physical Disk"; 459 break; 460 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 461 desc = "IR Configuration Change List"; 462 break; 463 case MPI2_EVENT_LOG_ENTRY_ADDED: 464 desc = "Log Entry Added"; 465 break; 466 } 467 468 if (!desc) 469 return; 470 471 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 472} 473#endif 474 475/** 476 * _base_sas_log_info - verbose translation of firmware log info 477 * @ioc: pointer to scsi command object 478 * @log_info: log info 479 * 480 * Return nothing. 481 */ 482static void 483_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 484{ 485 union loginfo_type { 486 u32 loginfo; 487 struct { 488 u32 subcode:16; 489 u32 code:8; 490 u32 originator:4; 491 u32 bus_type:4; 492 } dw; 493 }; 494 union loginfo_type sas_loginfo; 495 char *originator_str = NULL; 496 497 sas_loginfo.loginfo = log_info; 498 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 499 return; 500 501 /* each nexus loss loginfo */ 502 if (log_info == 0x31170000) 503 return; 504 505 /* eat the loginfos associated with task aborts */ 506 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 507 0x31140000 || log_info == 0x31130000)) 508 return; 509 510 switch (sas_loginfo.dw.originator) { 511 case 0: 512 originator_str = "IOP"; 513 break; 514 case 1: 515 originator_str = "PL"; 516 break; 517 case 2: 518 originator_str = "IR"; 519 break; 520 } 521 522 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 523 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 524 originator_str, sas_loginfo.dw.code, 525 sas_loginfo.dw.subcode); 526} 527 528/** 529 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 530 * @ioc: pointer to scsi command object 531 * @fault_code: fault code 532 * 533 * Return nothing. 534 */ 535void 536mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 537{ 538 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 539 ioc->name, fault_code); 540} 541 542/** 543 * _base_display_reply_info - 544 * @ioc: pointer to scsi command object 545 * @smid: system request message index 546 * @msix_index: MSIX table index supplied by the OS 547 * @reply: reply message frame(lower 32bit addr) 548 * 549 * Return nothing. 550 */ 551static void 552_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 553 u32 reply) 554{ 555 MPI2DefaultReply_t *mpi_reply; 556 u16 ioc_status; 557 558 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 559 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 560#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 561 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 562 (ioc->logging_level & MPT_DEBUG_REPLY)) { 563 _base_sas_ioc_info(ioc , mpi_reply, 564 mpt2sas_base_get_msg_frame(ioc, smid)); 565 } 566#endif 567 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 568 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 569} 570 571/** 572 * mpt2sas_base_done - base internal command completion routine 573 * @ioc: pointer to scsi command object 574 * @smid: system request message index 575 * @msix_index: MSIX table index supplied by the OS 576 * @reply: reply message frame(lower 32bit addr) 577 * 578 * Return 1 meaning mf should be freed from _base_interrupt 579 * 0 means the mf is freed from this function. 580 */ 581u8 582mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 583 u32 reply) 584{ 585 MPI2DefaultReply_t *mpi_reply; 586 587 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 588 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 589 return 1; 590 591 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 592 return 1; 593 594 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 595 if (mpi_reply) { 596 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 597 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 598 } 599 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 600 complete(&ioc->base_cmds.done); 601 return 1; 602} 603 604/** 605 * _base_async_event - main callback handler for firmware asyn events 606 * @ioc: pointer to scsi command object 607 * @msix_index: MSIX table index supplied by the OS 608 * @reply: reply message frame(lower 32bit addr) 609 * 610 * Return 1 meaning mf should be freed from _base_interrupt 611 * 0 means the mf is freed from this function. 612 */ 613static u8 614_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply) 615{ 616 Mpi2EventNotificationReply_t *mpi_reply; 617 Mpi2EventAckRequest_t *ack_request; 618 u16 smid; 619 620 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 621 if (!mpi_reply) 622 return 1; 623 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 624 return 1; 625#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 626 _base_display_event_data(ioc, mpi_reply); 627#endif 628 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 629 goto out; 630 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 631 if (!smid) { 632 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 633 ioc->name, __func__); 634 goto out; 635 } 636 637 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 638 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 639 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 640 ack_request->Event = mpi_reply->Event; 641 ack_request->EventContext = mpi_reply->EventContext; 642 ack_request->VF_ID = 0; /* TODO */ 643 ack_request->VP_ID = 0; 644 mpt2sas_base_put_smid_default(ioc, smid); 645 646 out: 647 648 /* scsih callback handler */ 649 mpt2sas_scsih_event_callback(ioc, msix_index, reply); 650 651 /* ctl callback handler */ 652 mpt2sas_ctl_event_callback(ioc, msix_index, reply); 653 654 return 1; 655} 656 657/** 658 * _base_get_cb_idx - obtain the callback index 659 * @ioc: per adapter object 660 * @smid: system request message index 661 * 662 * Return callback index. 663 */ 664static u8 665_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid) 666{ 667 int i; 668 u8 cb_idx = 0xFF; 669 670 if (smid >= ioc->hi_priority_smid) { 671 if (smid < ioc->internal_smid) { 672 i = smid - ioc->hi_priority_smid; 673 cb_idx = ioc->hpr_lookup[i].cb_idx; 674 } else { 675 i = smid - ioc->internal_smid; 676 cb_idx = ioc->internal_lookup[i].cb_idx; 677 } 678 } else { 679 i = smid - 1; 680 cb_idx = ioc->scsi_lookup[i].cb_idx; 681 } 682 return cb_idx; 683} 684 685/** 686 * _base_mask_interrupts - disable interrupts 687 * @ioc: pointer to scsi command object 688 * 689 * Disabling ResetIRQ, Reply and Doorbell Interrupts 690 * 691 * Return nothing. 692 */ 693static void 694_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 695{ 696 u32 him_register; 697 698 ioc->mask_interrupts = 1; 699 him_register = readl(&ioc->chip->HostInterruptMask); 700 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 701 writel(him_register, &ioc->chip->HostInterruptMask); 702 readl(&ioc->chip->HostInterruptMask); 703} 704 705/** 706 * _base_unmask_interrupts - enable interrupts 707 * @ioc: pointer to scsi command object 708 * 709 * Enabling only Reply Interrupts 710 * 711 * Return nothing. 712 */ 713static void 714_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 715{ 716 u32 him_register; 717 718 writel(0, &ioc->chip->HostInterruptStatus); 719 him_register = readl(&ioc->chip->HostInterruptMask); 720 him_register &= ~MPI2_HIM_RIM; 721 writel(him_register, &ioc->chip->HostInterruptMask); 722 ioc->mask_interrupts = 0; 723} 724 725union reply_descriptor { 726 u64 word; 727 struct { 728 u32 low; 729 u32 high; 730 } u; 731}; 732 733/** 734 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 735 * @irq: irq number (not used) 736 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 737 * @r: pt_regs pointer (not used) 738 * 739 * Return IRQ_HANDLE if processed, else IRQ_NONE. 740 */ 741static irqreturn_t 742_base_interrupt(int irq, void *bus_id) 743{ 744 union reply_descriptor rd; 745 u32 completed_cmds; 746 u8 request_desript_type; 747 u16 smid; 748 u8 cb_idx; 749 u32 reply; 750 u8 msix_index; 751 struct MPT2SAS_ADAPTER *ioc = bus_id; 752 Mpi2ReplyDescriptorsUnion_t *rpf; 753 u8 rc; 754 755 if (ioc->mask_interrupts) 756 return IRQ_NONE; 757 758 rpf = &ioc->reply_post_free[ioc->reply_post_host_index]; 759 request_desript_type = rpf->Default.ReplyFlags 760 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 761 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 762 return IRQ_NONE; 763 764 completed_cmds = 0; 765 do { 766 rd.word = rpf->Words; 767 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 768 goto out; 769 reply = 0; 770 cb_idx = 0xFF; 771 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); 772 msix_index = rpf->Default.MSIxIndex; 773 if (request_desript_type == 774 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 775 reply = le32_to_cpu 776 (rpf->AddressReply.ReplyFrameAddress); 777 } else if (request_desript_type == 778 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 779 goto next; 780 else if (request_desript_type == 781 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 782 goto next; 783 if (smid) 784 cb_idx = _base_get_cb_idx(ioc, smid); 785 if (smid && cb_idx != 0xFF) { 786 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index, 787 reply); 788 if (reply) 789 _base_display_reply_info(ioc, smid, msix_index, 790 reply); 791 if (rc) 792 mpt2sas_base_free_smid(ioc, smid); 793 } 794 if (!smid) 795 _base_async_event(ioc, msix_index, reply); 796 797 /* reply free queue handling */ 798 if (reply) { 799 ioc->reply_free_host_index = 800 (ioc->reply_free_host_index == 801 (ioc->reply_free_queue_depth - 1)) ? 802 0 : ioc->reply_free_host_index + 1; 803 ioc->reply_free[ioc->reply_free_host_index] = 804 cpu_to_le32(reply); 805 wmb(); 806 writel(ioc->reply_free_host_index, 807 &ioc->chip->ReplyFreeHostIndex); 808 } 809 810 next: 811 812 rpf->Words = ULLONG_MAX; 813 ioc->reply_post_host_index = (ioc->reply_post_host_index == 814 (ioc->reply_post_queue_depth - 1)) ? 0 : 815 ioc->reply_post_host_index + 1; 816 request_desript_type = 817 ioc->reply_post_free[ioc->reply_post_host_index].Default. 818 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 819 completed_cmds++; 820 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 821 goto out; 822 if (!ioc->reply_post_host_index) 823 rpf = ioc->reply_post_free; 824 else 825 rpf++; 826 } while (1); 827 828 out: 829 830 if (!completed_cmds) 831 return IRQ_NONE; 832 833 wmb(); 834 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex); 835 return IRQ_HANDLED; 836} 837 838/** 839 * mpt2sas_base_release_callback_handler - clear interupt callback handler 840 * @cb_idx: callback index 841 * 842 * Return nothing. 843 */ 844void 845mpt2sas_base_release_callback_handler(u8 cb_idx) 846{ 847 mpt_callbacks[cb_idx] = NULL; 848} 849 850/** 851 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 852 * @cb_func: callback function 853 * 854 * Returns cb_func. 855 */ 856u8 857mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 858{ 859 u8 cb_idx; 860 861 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 862 if (mpt_callbacks[cb_idx] == NULL) 863 break; 864 865 mpt_callbacks[cb_idx] = cb_func; 866 return cb_idx; 867} 868 869/** 870 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 871 * 872 * Return nothing. 873 */ 874void 875mpt2sas_base_initialize_callback_handler(void) 876{ 877 u8 cb_idx; 878 879 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 880 mpt2sas_base_release_callback_handler(cb_idx); 881} 882 883/** 884 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 885 * @ioc: per adapter object 886 * @paddr: virtual address for SGE 887 * 888 * Create a zero length scatter gather entry to insure the IOCs hardware has 889 * something to use if the target device goes brain dead and tries 890 * to send data even when none is asked for. 891 * 892 * Return nothing. 893 */ 894void 895mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 896{ 897 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 898 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 899 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 900 MPI2_SGE_FLAGS_SHIFT); 901 ioc->base_add_sg_single(paddr, flags_length, -1); 902} 903 904/** 905 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 906 * @paddr: virtual address for SGE 907 * @flags_length: SGE flags and data transfer length 908 * @dma_addr: Physical address 909 * 910 * Return nothing. 911 */ 912static void 913_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 914{ 915 Mpi2SGESimple32_t *sgel = paddr; 916 917 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 918 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 919 sgel->FlagsLength = cpu_to_le32(flags_length); 920 sgel->Address = cpu_to_le32(dma_addr); 921} 922 923 924/** 925 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 926 * @paddr: virtual address for SGE 927 * @flags_length: SGE flags and data transfer length 928 * @dma_addr: Physical address 929 * 930 * Return nothing. 931 */ 932static void 933_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 934{ 935 Mpi2SGESimple64_t *sgel = paddr; 936 937 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 938 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 939 sgel->FlagsLength = cpu_to_le32(flags_length); 940 sgel->Address = cpu_to_le64(dma_addr); 941} 942 943#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 944 945/** 946 * _base_config_dma_addressing - set dma addressing 947 * @ioc: per adapter object 948 * @pdev: PCI device struct 949 * 950 * Returns 0 for success, non-zero for failure. 951 */ 952static int 953_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 954{ 955 struct sysinfo s; 956 char *desc = NULL; 957 958 if (sizeof(dma_addr_t) > 4) { 959 const uint64_t required_mask = 960 dma_get_required_mask(&pdev->dev); 961 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 962 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 963 DMA_BIT_MASK(64))) { 964 ioc->base_add_sg_single = &_base_add_sg_single_64; 965 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 966 desc = "64"; 967 goto out; 968 } 969 } 970 971 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 972 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 973 ioc->base_add_sg_single = &_base_add_sg_single_32; 974 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 975 desc = "32"; 976 } else 977 return -ENODEV; 978 979 out: 980 si_meminfo(&s); 981 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 982 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 983 984 return 0; 985} 986 987/** 988 * _base_save_msix_table - backup msix vector table 989 * @ioc: per adapter object 990 * 991 * This address an errata where diag reset clears out the table 992 */ 993static void 994_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 995{ 996 int i; 997 998 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 999 return; 1000 1001 for (i = 0; i < ioc->msix_vector_count; i++) 1002 ioc->msix_table_backup[i] = ioc->msix_table[i]; 1003} 1004 1005/** 1006 * _base_restore_msix_table - this restores the msix vector table 1007 * @ioc: per adapter object 1008 * 1009 */ 1010static void 1011_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 1012{ 1013 int i; 1014 1015 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1016 return; 1017 1018 for (i = 0; i < ioc->msix_vector_count; i++) 1019 ioc->msix_table[i] = ioc->msix_table_backup[i]; 1020} 1021 1022/** 1023 * _base_check_enable_msix - checks MSIX capabable. 1024 * @ioc: per adapter object 1025 * 1026 * Check to see if card is capable of MSIX, and set number 1027 * of avaliable msix vectors 1028 */ 1029static int 1030_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1031{ 1032 int base; 1033 u16 message_control; 1034 u32 msix_table_offset; 1035 1036 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1037 if (!base) { 1038 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1039 "supported\n", ioc->name)); 1040 return -EINVAL; 1041 } 1042 1043 /* get msix vector count */ 1044 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1045 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1046 1047 /* get msix table */ 1048 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 1049 msix_table_offset &= 0xFFFFFFF8; 1050 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 1051 1052 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1053 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 1054 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 1055 return 0; 1056} 1057 1058/** 1059 * _base_disable_msix - disables msix 1060 * @ioc: per adapter object 1061 * 1062 */ 1063static void 1064_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1065{ 1066 if (ioc->msix_enable) { 1067 pci_disable_msix(ioc->pdev); 1068 kfree(ioc->msix_table_backup); 1069 ioc->msix_table_backup = NULL; 1070 ioc->msix_enable = 0; 1071 } 1072} 1073 1074/** 1075 * _base_enable_msix - enables msix, failback to io_apic 1076 * @ioc: per adapter object 1077 * 1078 */ 1079static int 1080_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1081{ 1082 struct msix_entry entries; 1083 int r; 1084 u8 try_msix = 0; 1085 1086 if (msix_disable == -1 || msix_disable == 0) 1087 try_msix = 1; 1088 1089 if (!try_msix) 1090 goto try_ioapic; 1091 1092 if (_base_check_enable_msix(ioc) != 0) 1093 goto try_ioapic; 1094 1095 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1096 sizeof(u32), GFP_KERNEL); 1097 if (!ioc->msix_table_backup) { 1098 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1099 "msix_table_backup failed!!!\n", ioc->name)); 1100 goto try_ioapic; 1101 } 1102 1103 memset(&entries, 0, sizeof(struct msix_entry)); 1104 r = pci_enable_msix(ioc->pdev, &entries, 1); 1105 if (r) { 1106 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1107 "failed (r=%d) !!!\n", ioc->name, r)); 1108 goto try_ioapic; 1109 } 1110 1111 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1112 ioc->name, ioc); 1113 if (r) { 1114 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1115 "interrupt %d !!!\n", ioc->name, entries.vector)); 1116 pci_disable_msix(ioc->pdev); 1117 goto try_ioapic; 1118 } 1119 1120 ioc->pci_irq = entries.vector; 1121 ioc->msix_enable = 1; 1122 return 0; 1123 1124/* failback to io_apic interrupt routing */ 1125 try_ioapic: 1126 1127 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1128 ioc->name, ioc); 1129 if (r) { 1130 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1131 ioc->name, ioc->pdev->irq); 1132 r = -EBUSY; 1133 goto out_fail; 1134 } 1135 1136 ioc->pci_irq = ioc->pdev->irq; 1137 return 0; 1138 1139 out_fail: 1140 return r; 1141} 1142 1143/** 1144 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1145 * @ioc: per adapter object 1146 * 1147 * Returns 0 for success, non-zero for failure. 1148 */ 1149int 1150mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1151{ 1152 struct pci_dev *pdev = ioc->pdev; 1153 u32 memap_sz; 1154 u32 pio_sz; 1155 int i, r = 0; 1156 1157 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1158 ioc->name, __func__)); 1159 1160 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1161 if (pci_enable_device_mem(pdev)) { 1162 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1163 "failed\n", ioc->name); 1164 return -ENODEV; 1165 } 1166 1167 1168 if (pci_request_selected_regions(pdev, ioc->bars, 1169 MPT2SAS_DRIVER_NAME)) { 1170 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1171 "failed\n", ioc->name); 1172 r = -ENODEV; 1173 goto out_fail; 1174 } 1175 1176 pci_set_master(pdev); 1177 1178 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1179 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1180 ioc->name, pci_name(pdev)); 1181 r = -ENODEV; 1182 goto out_fail; 1183 } 1184 1185 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1186 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1187 if (pio_sz) 1188 continue; 1189 ioc->pio_chip = pci_resource_start(pdev, i); 1190 pio_sz = pci_resource_len(pdev, i); 1191 } else { 1192 if (memap_sz) 1193 continue; 1194 ioc->chip_phys = pci_resource_start(pdev, i); 1195 memap_sz = pci_resource_len(pdev, i); 1196 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1197 if (ioc->chip == NULL) { 1198 printk(MPT2SAS_ERR_FMT "unable to map adapter " 1199 "memory!\n", ioc->name); 1200 r = -EINVAL; 1201 goto out_fail; 1202 } 1203 } 1204 } 1205 1206 _base_mask_interrupts(ioc); 1207 r = _base_enable_msix(ioc); 1208 if (r) 1209 goto out_fail; 1210 1211 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1212 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1213 "IO-APIC enabled"), ioc->pci_irq); 1214 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1215 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1216 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1217 ioc->name, ioc->pio_chip, pio_sz); 1218 1219 return 0; 1220 1221 out_fail: 1222 if (ioc->chip_phys) 1223 iounmap(ioc->chip); 1224 ioc->chip_phys = 0; 1225 ioc->pci_irq = -1; 1226 pci_release_selected_regions(ioc->pdev, ioc->bars); 1227 pci_disable_device(pdev); 1228 return r; 1229} 1230 1231/** 1232 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1233 * @ioc: per adapter object 1234 * @smid: system request message index(smid zero is invalid) 1235 * 1236 * Returns virt pointer to message frame. 1237 */ 1238void * 1239mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1240{ 1241 return (void *)(ioc->request + (smid * ioc->request_sz)); 1242} 1243 1244/** 1245 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1246 * @ioc: per adapter object 1247 * @smid: system request message index 1248 * 1249 * Returns virt pointer to sense buffer. 1250 */ 1251void * 1252mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1253{ 1254 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1255} 1256 1257/** 1258 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1259 * @ioc: per adapter object 1260 * @smid: system request message index 1261 * 1262 * Returns phys pointer to sense buffer. 1263 */ 1264dma_addr_t 1265mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1266{ 1267 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE); 1268} 1269 1270/** 1271 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1272 * @ioc: per adapter object 1273 * @phys_addr: lower 32 physical addr of the reply 1274 * 1275 * Converts 32bit lower physical addr into a virt address. 1276 */ 1277void * 1278mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1279{ 1280 if (!phys_addr) 1281 return NULL; 1282 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1283} 1284 1285/** 1286 * mpt2sas_base_get_smid - obtain a free smid from internal queue 1287 * @ioc: per adapter object 1288 * @cb_idx: callback index 1289 * 1290 * Returns smid (zero is invalid) 1291 */ 1292u16 1293mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1294{ 1295 unsigned long flags; 1296 struct request_tracker *request; 1297 u16 smid; 1298 1299 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1300 if (list_empty(&ioc->internal_free_list)) { 1301 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1302 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1303 ioc->name, __func__); 1304 return 0; 1305 } 1306 1307 request = list_entry(ioc->internal_free_list.next, 1308 struct request_tracker, tracker_list); 1309 request->cb_idx = cb_idx; 1310 smid = request->smid; 1311 list_del(&request->tracker_list); 1312 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1313 return smid; 1314} 1315 1316/** 1317 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue 1318 * @ioc: per adapter object 1319 * @cb_idx: callback index 1320 * @scmd: pointer to scsi command object 1321 * 1322 * Returns smid (zero is invalid) 1323 */ 1324u16 1325mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx, 1326 struct scsi_cmnd *scmd) 1327{ 1328 unsigned long flags; 1329 struct request_tracker *request; 1330 u16 smid; 1331 1332 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1333 if (list_empty(&ioc->free_list)) { 1334 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1335 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1336 ioc->name, __func__); 1337 return 0; 1338 } 1339 1340 request = list_entry(ioc->free_list.next, 1341 struct request_tracker, tracker_list); 1342 request->scmd = scmd; 1343 request->cb_idx = cb_idx; 1344 smid = request->smid; 1345 list_del(&request->tracker_list); 1346 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1347 return smid; 1348} 1349 1350/** 1351 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue 1352 * @ioc: per adapter object 1353 * @cb_idx: callback index 1354 * 1355 * Returns smid (zero is invalid) 1356 */ 1357u16 1358mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1359{ 1360 unsigned long flags; 1361 struct request_tracker *request; 1362 u16 smid; 1363 1364 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1365 if (list_empty(&ioc->hpr_free_list)) { 1366 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1367 return 0; 1368 } 1369 1370 request = list_entry(ioc->hpr_free_list.next, 1371 struct request_tracker, tracker_list); 1372 request->cb_idx = cb_idx; 1373 smid = request->smid; 1374 list_del(&request->tracker_list); 1375 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1376 return smid; 1377} 1378 1379 1380/** 1381 * mpt2sas_base_free_smid - put smid back on free_list 1382 * @ioc: per adapter object 1383 * @smid: system request message index 1384 * 1385 * Return nothing. 1386 */ 1387void 1388mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1389{ 1390 unsigned long flags; 1391 int i; 1392 1393 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1394 if (smid >= ioc->hi_priority_smid) { 1395 if (smid < ioc->internal_smid) { 1396 /* hi-priority */ 1397 i = smid - ioc->hi_priority_smid; 1398 ioc->hpr_lookup[i].cb_idx = 0xFF; 1399 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 1400 &ioc->hpr_free_list); 1401 } else { 1402 /* internal queue */ 1403 i = smid - ioc->internal_smid; 1404 ioc->internal_lookup[i].cb_idx = 0xFF; 1405 list_add_tail(&ioc->internal_lookup[i].tracker_list, 1406 &ioc->internal_free_list); 1407 } 1408 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1409 return; 1410 } 1411 1412 /* scsiio queue */ 1413 i = smid - 1; 1414 ioc->scsi_lookup[i].cb_idx = 0xFF; 1415 ioc->scsi_lookup[i].scmd = NULL; 1416 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 1417 &ioc->free_list); 1418 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1419 1420 /* 1421 * See _wait_for_commands_to_complete() call with regards to this code. 1422 */ 1423 if (ioc->shost_recovery && ioc->pending_io_count) { 1424 if (ioc->pending_io_count == 1) 1425 wake_up(&ioc->reset_wq); 1426 ioc->pending_io_count--; 1427 } 1428} 1429 1430/** 1431 * _base_writeq - 64 bit write to MMIO 1432 * @ioc: per adapter object 1433 * @b: data payload 1434 * @addr: address in MMIO space 1435 * @writeq_lock: spin lock 1436 * 1437 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1438 * care of 32 bit environment where its not quarenteed to send the entire word 1439 * in one transfer. 1440 */ 1441#ifndef writeq 1442static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1443 spinlock_t *writeq_lock) 1444{ 1445 unsigned long flags; 1446 __u64 data_out = cpu_to_le64(b); 1447 1448 spin_lock_irqsave(writeq_lock, flags); 1449 writel((u32)(data_out), addr); 1450 writel((u32)(data_out >> 32), (addr + 4)); 1451 spin_unlock_irqrestore(writeq_lock, flags); 1452} 1453#else 1454static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1455 spinlock_t *writeq_lock) 1456{ 1457 writeq(cpu_to_le64(b), addr); 1458} 1459#endif 1460 1461/** 1462 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1463 * @ioc: per adapter object 1464 * @smid: system request message index 1465 * @handle: device handle 1466 * 1467 * Return nothing. 1468 */ 1469void 1470mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle) 1471{ 1472 Mpi2RequestDescriptorUnion_t descriptor; 1473 u64 *request = (u64 *)&descriptor; 1474 1475 1476 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1477 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */ 1478 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1479 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1480 descriptor.SCSIIO.LMID = 0; 1481 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1482 &ioc->scsi_lookup_lock); 1483} 1484 1485 1486/** 1487 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1488 * @ioc: per adapter object 1489 * @smid: system request message index 1490 * 1491 * Return nothing. 1492 */ 1493void 1494mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1495{ 1496 Mpi2RequestDescriptorUnion_t descriptor; 1497 u64 *request = (u64 *)&descriptor; 1498 1499 descriptor.HighPriority.RequestFlags = 1500 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1501 descriptor.HighPriority.MSIxIndex = 0; /* TODO */ 1502 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1503 descriptor.HighPriority.LMID = 0; 1504 descriptor.HighPriority.Reserved1 = 0; 1505 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1506 &ioc->scsi_lookup_lock); 1507} 1508 1509/** 1510 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1511 * @ioc: per adapter object 1512 * @smid: system request message index 1513 * 1514 * Return nothing. 1515 */ 1516void 1517mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1518{ 1519 Mpi2RequestDescriptorUnion_t descriptor; 1520 u64 *request = (u64 *)&descriptor; 1521 1522 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1523 descriptor.Default.MSIxIndex = 0; /* TODO */ 1524 descriptor.Default.SMID = cpu_to_le16(smid); 1525 descriptor.Default.LMID = 0; 1526 descriptor.Default.DescriptorTypeDependent = 0; 1527 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1528 &ioc->scsi_lookup_lock); 1529} 1530 1531/** 1532 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1533 * @ioc: per adapter object 1534 * @smid: system request message index 1535 * @io_index: value used to track the IO 1536 * 1537 * Return nothing. 1538 */ 1539void 1540mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1541 u16 io_index) 1542{ 1543 Mpi2RequestDescriptorUnion_t descriptor; 1544 u64 *request = (u64 *)&descriptor; 1545 1546 descriptor.SCSITarget.RequestFlags = 1547 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1548 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */ 1549 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1550 descriptor.SCSITarget.LMID = 0; 1551 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1552 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1553 &ioc->scsi_lookup_lock); 1554} 1555 1556/** 1557 * _base_display_dell_branding - Disply branding string 1558 * @ioc: per adapter object 1559 * 1560 * Return nothing. 1561 */ 1562static void 1563_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1564{ 1565 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1566 1567 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1568 return; 1569 1570 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1571 switch (ioc->pdev->subsystem_device) { 1572 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1573 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1574 MPT2SAS_DELL_BRANDING_SIZE - 1); 1575 break; 1576 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1577 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1578 MPT2SAS_DELL_BRANDING_SIZE - 1); 1579 break; 1580 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1581 strncpy(dell_branding, 1582 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1583 MPT2SAS_DELL_BRANDING_SIZE - 1); 1584 break; 1585 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1586 strncpy(dell_branding, 1587 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1588 MPT2SAS_DELL_BRANDING_SIZE - 1); 1589 break; 1590 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1591 strncpy(dell_branding, 1592 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1593 MPT2SAS_DELL_BRANDING_SIZE - 1); 1594 break; 1595 case MPT2SAS_DELL_PERC_H200_SSDID: 1596 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1597 MPT2SAS_DELL_BRANDING_SIZE - 1); 1598 break; 1599 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1600 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1601 MPT2SAS_DELL_BRANDING_SIZE - 1); 1602 break; 1603 default: 1604 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1605 break; 1606 } 1607 1608 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1609 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1610 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1611 ioc->pdev->subsystem_device); 1612} 1613 1614/** 1615 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1616 * @ioc: per adapter object 1617 * 1618 * Return nothing. 1619 */ 1620static void 1621_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1622{ 1623 int i = 0; 1624 char desc[16]; 1625 u8 revision; 1626 u32 iounit_pg1_flags; 1627 1628 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1629 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1630 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1631 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1632 ioc->name, desc, 1633 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1634 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1635 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1636 ioc->facts.FWVersion.Word & 0x000000FF, 1637 revision, 1638 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1639 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1640 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1641 ioc->bios_pg3.BiosVersion & 0x000000FF); 1642 1643 _base_display_dell_branding(ioc); 1644 1645 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1646 1647 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1648 printk("Initiator"); 1649 i++; 1650 } 1651 1652 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1653 printk("%sTarget", i ? "," : ""); 1654 i++; 1655 } 1656 1657 i = 0; 1658 printk("), "); 1659 printk("Capabilities=("); 1660 1661 if (ioc->facts.IOCCapabilities & 1662 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1663 printk("Raid"); 1664 i++; 1665 } 1666 1667 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1668 printk("%sTLR", i ? "," : ""); 1669 i++; 1670 } 1671 1672 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1673 printk("%sMulticast", i ? "," : ""); 1674 i++; 1675 } 1676 1677 if (ioc->facts.IOCCapabilities & 1678 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1679 printk("%sBIDI Target", i ? "," : ""); 1680 i++; 1681 } 1682 1683 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1684 printk("%sEEDP", i ? "," : ""); 1685 i++; 1686 } 1687 1688 if (ioc->facts.IOCCapabilities & 1689 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1690 printk("%sSnapshot Buffer", i ? "," : ""); 1691 i++; 1692 } 1693 1694 if (ioc->facts.IOCCapabilities & 1695 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1696 printk("%sDiag Trace Buffer", i ? "," : ""); 1697 i++; 1698 } 1699 1700 if (ioc->facts.IOCCapabilities & 1701 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1702 printk("%sTask Set Full", i ? "," : ""); 1703 i++; 1704 } 1705 1706 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1707 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1708 printk("%sNCQ", i ? "," : ""); 1709 i++; 1710 } 1711 1712 printk(")\n"); 1713} 1714 1715/** 1716 * _base_static_config_pages - static start of day config pages 1717 * @ioc: per adapter object 1718 * 1719 * Return nothing. 1720 */ 1721static void 1722_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1723{ 1724 Mpi2ConfigReply_t mpi_reply; 1725 u32 iounit_pg1_flags; 1726 1727 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1728 if (ioc->ir_firmware) 1729 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, 1730 &ioc->manu_pg10); 1731 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1732 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1733 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1734 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1735 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1736 _base_display_ioc_capabilities(ioc); 1737 1738 /* 1739 * Enable task_set_full handling in iounit_pg1 when the 1740 * facts capabilities indicate that its supported. 1741 */ 1742 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1743 if ((ioc->facts.IOCCapabilities & 1744 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1745 iounit_pg1_flags &= 1746 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1747 else 1748 iounit_pg1_flags |= 1749 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1750 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1751 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1752} 1753 1754/** 1755 * _base_release_memory_pools - release memory 1756 * @ioc: per adapter object 1757 * 1758 * Free memory allocated from _base_allocate_memory_pools. 1759 * 1760 * Return nothing. 1761 */ 1762static void 1763_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1764{ 1765 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1766 __func__)); 1767 1768 if (ioc->request) { 1769 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1770 ioc->request, ioc->request_dma); 1771 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1772 ": free\n", ioc->name, ioc->request)); 1773 ioc->request = NULL; 1774 } 1775 1776 if (ioc->sense) { 1777 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1778 if (ioc->sense_dma_pool) 1779 pci_pool_destroy(ioc->sense_dma_pool); 1780 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1781 ": free\n", ioc->name, ioc->sense)); 1782 ioc->sense = NULL; 1783 } 1784 1785 if (ioc->reply) { 1786 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1787 if (ioc->reply_dma_pool) 1788 pci_pool_destroy(ioc->reply_dma_pool); 1789 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1790 ": free\n", ioc->name, ioc->reply)); 1791 ioc->reply = NULL; 1792 } 1793 1794 if (ioc->reply_free) { 1795 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1796 ioc->reply_free_dma); 1797 if (ioc->reply_free_dma_pool) 1798 pci_pool_destroy(ioc->reply_free_dma_pool); 1799 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1800 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1801 ioc->reply_free = NULL; 1802 } 1803 1804 if (ioc->reply_post_free) { 1805 pci_pool_free(ioc->reply_post_free_dma_pool, 1806 ioc->reply_post_free, ioc->reply_post_free_dma); 1807 if (ioc->reply_post_free_dma_pool) 1808 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1809 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1810 "reply_post_free_pool(0x%p): free\n", ioc->name, 1811 ioc->reply_post_free)); 1812 ioc->reply_post_free = NULL; 1813 } 1814 1815 if (ioc->config_page) { 1816 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1817 "config_page(0x%p): free\n", ioc->name, 1818 ioc->config_page)); 1819 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1820 ioc->config_page, ioc->config_page_dma); 1821 } 1822 1823 kfree(ioc->scsi_lookup); 1824 kfree(ioc->hpr_lookup); 1825 kfree(ioc->internal_lookup); 1826} 1827 1828 1829/** 1830 * _base_allocate_memory_pools - allocate start of day memory pools 1831 * @ioc: per adapter object 1832 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1833 * 1834 * Returns 0 success, anything else error 1835 */ 1836static int 1837_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1838{ 1839 Mpi2IOCFactsReply_t *facts; 1840 u32 queue_size, queue_diff; 1841 u16 max_sge_elements; 1842 u16 num_of_reply_frames; 1843 u16 chains_needed_per_io; 1844 u32 sz, total_sz; 1845 u32 retry_sz; 1846 u16 max_request_credit; 1847 1848 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1849 __func__)); 1850 1851 retry_sz = 0; 1852 facts = &ioc->facts; 1853 1854 /* command line tunables for max sgl entries */ 1855 if (max_sgl_entries != -1) { 1856 ioc->shost->sg_tablesize = (max_sgl_entries < 1857 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1858 MPT2SAS_SG_DEPTH; 1859 } else { 1860 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1861 } 1862 1863 /* command line tunables for max controller queue depth */ 1864 if (max_queue_depth != -1) { 1865 max_request_credit = (max_queue_depth < facts->RequestCredit) 1866 ? max_queue_depth : facts->RequestCredit; 1867 } else { 1868 max_request_credit = (facts->RequestCredit > 1869 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1870 facts->RequestCredit; 1871 } 1872 1873 ioc->hba_queue_depth = max_request_credit; 1874 ioc->hi_priority_depth = facts->HighPriorityCredit; 1875 ioc->internal_depth = ioc->hi_priority_depth + 5; 1876 1877 /* request frame size */ 1878 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1879 1880 /* reply frame size */ 1881 ioc->reply_sz = facts->ReplyFrameSize * 4; 1882 1883 retry_allocation: 1884 total_sz = 0; 1885 /* calculate number of sg elements left over in the 1st frame */ 1886 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1887 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1888 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1889 1890 /* now do the same for a chain buffer */ 1891 max_sge_elements = ioc->request_sz - ioc->sge_size; 1892 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1893 1894 ioc->chain_offset_value_for_main_message = 1895 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1896 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1897 1898 /* 1899 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1900 */ 1901 chains_needed_per_io = ((ioc->shost->sg_tablesize - 1902 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 1903 + 1; 1904 if (chains_needed_per_io > facts->MaxChainDepth) { 1905 chains_needed_per_io = facts->MaxChainDepth; 1906 ioc->shost->sg_tablesize = min_t(u16, 1907 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 1908 * chains_needed_per_io), ioc->shost->sg_tablesize); 1909 } 1910 ioc->chains_needed_per_io = chains_needed_per_io; 1911 1912 /* reply free queue sizing - taking into account for events */ 1913 num_of_reply_frames = ioc->hba_queue_depth + 32; 1914 1915 /* number of replies frames can't be a multiple of 16 */ 1916 /* decrease number of reply frames by 1 */ 1917 if (!(num_of_reply_frames % 16)) 1918 num_of_reply_frames--; 1919 1920 /* calculate number of reply free queue entries 1921 * (must be multiple of 16) 1922 */ 1923 1924 /* (we know reply_free_queue_depth is not a multiple of 16) */ 1925 queue_size = num_of_reply_frames; 1926 queue_size += 16 - (queue_size % 16); 1927 ioc->reply_free_queue_depth = queue_size; 1928 1929 /* reply descriptor post queue sizing */ 1930 /* this size should be the number of request frames + number of reply 1931 * frames 1932 */ 1933 1934 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1; 1935 /* round up to 16 byte boundary */ 1936 if (queue_size % 16) 1937 queue_size += 16 - (queue_size % 16); 1938 1939 /* check against IOC maximum reply post queue depth */ 1940 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 1941 queue_diff = queue_size - 1942 facts->MaxReplyDescriptorPostQueueDepth; 1943 1944 /* round queue_diff up to multiple of 16 */ 1945 if (queue_diff % 16) 1946 queue_diff += 16 - (queue_diff % 16); 1947 1948 /* adjust hba_queue_depth, reply_free_queue_depth, 1949 * and queue_size 1950 */ 1951 ioc->hba_queue_depth -= queue_diff; 1952 ioc->reply_free_queue_depth -= queue_diff; 1953 queue_size -= queue_diff; 1954 } 1955 ioc->reply_post_queue_depth = queue_size; 1956 1957 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 1958 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 1959 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 1960 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 1961 ioc->chains_needed_per_io)); 1962 1963 ioc->scsiio_depth = ioc->hba_queue_depth - 1964 ioc->hi_priority_depth - ioc->internal_depth; 1965 1966 /* set the scsi host can_queue depth 1967 * with some internal commands that could be outstanding 1968 */ 1969 ioc->shost->can_queue = ioc->scsiio_depth - (2); 1970 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: " 1971 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue)); 1972 1973 /* contiguous pool for request and chains, 16 byte align, one extra " 1974 * "frame for smid=0 1975 */ 1976 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; 1977 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz); 1978 1979 /* hi-priority queue */ 1980 sz += (ioc->hi_priority_depth * ioc->request_sz); 1981 1982 /* internal queue */ 1983 sz += (ioc->internal_depth * ioc->request_sz); 1984 1985 ioc->request_dma_sz = sz; 1986 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 1987 if (!ioc->request) { 1988 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1989 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 1990 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth, 1991 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1992 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH) 1993 goto out; 1994 retry_sz += 64; 1995 ioc->hba_queue_depth = max_request_credit - retry_sz; 1996 goto retry_allocation; 1997 } 1998 1999 if (retry_sz) 2000 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2001 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2002 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth, 2003 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2004 2005 2006 /* hi-priority queue */ 2007 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * 2008 ioc->request_sz); 2009 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * 2010 ioc->request_sz); 2011 2012 /* internal queue */ 2013 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * 2014 ioc->request_sz); 2015 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * 2016 ioc->request_sz); 2017 2018 ioc->chain = ioc->internal + (ioc->internal_depth * 2019 ioc->request_sz); 2020 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth * 2021 ioc->request_sz); 2022 2023 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 2024 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2025 ioc->request, ioc->hba_queue_depth, ioc->request_sz, 2026 (ioc->hba_queue_depth * ioc->request_sz)/1024)); 2027 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 2028 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 2029 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 2030 ioc->request_sz))/1024)); 2031 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 2032 ioc->name, (unsigned long long) ioc->request_dma)); 2033 total_sz += sz; 2034 2035 ioc->scsi_lookup = kcalloc(ioc->scsiio_depth, 2036 sizeof(struct request_tracker), GFP_KERNEL); 2037 if (!ioc->scsi_lookup) { 2038 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n", 2039 ioc->name); 2040 goto out; 2041 } 2042 2043 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): " 2044 "depth(%d)\n", ioc->name, ioc->request, 2045 ioc->scsiio_depth)); 2046 2047 /* initialize hi-priority queue smid's */ 2048 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, 2049 sizeof(struct request_tracker), GFP_KERNEL); 2050 if (!ioc->hpr_lookup) { 2051 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n", 2052 ioc->name); 2053 goto out; 2054 } 2055 ioc->hi_priority_smid = ioc->scsiio_depth + 1; 2056 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): " 2057 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority, 2058 ioc->hi_priority_depth, ioc->hi_priority_smid)); 2059 2060 /* initialize internal queue smid's */ 2061 ioc->internal_lookup = kcalloc(ioc->internal_depth, 2062 sizeof(struct request_tracker), GFP_KERNEL); 2063 if (!ioc->internal_lookup) { 2064 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n", 2065 ioc->name); 2066 goto out; 2067 } 2068 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; 2069 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): " 2070 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal, 2071 ioc->internal_depth, ioc->internal_smid)); 2072 2073 /* sense buffers, 4 byte align */ 2074 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; 2075 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 2076 0); 2077 if (!ioc->sense_dma_pool) { 2078 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 2079 ioc->name); 2080 goto out; 2081 } 2082 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 2083 &ioc->sense_dma); 2084 if (!ioc->sense) { 2085 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 2086 ioc->name); 2087 goto out; 2088 } 2089 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2090 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 2091 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth, 2092 SCSI_SENSE_BUFFERSIZE, sz/1024)); 2093 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 2094 ioc->name, (unsigned long long)ioc->sense_dma)); 2095 total_sz += sz; 2096 2097 /* reply pool, 4 byte align */ 2098 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 2099 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 2100 0); 2101 if (!ioc->reply_dma_pool) { 2102 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 2103 ioc->name); 2104 goto out; 2105 } 2106 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 2107 &ioc->reply_dma); 2108 if (!ioc->reply) { 2109 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 2110 ioc->name); 2111 goto out; 2112 } 2113 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 2114 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 2115 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 2116 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 2117 ioc->name, (unsigned long long)ioc->reply_dma)); 2118 total_sz += sz; 2119 2120 /* reply free queue, 16 byte align */ 2121 sz = ioc->reply_free_queue_depth * 4; 2122 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 2123 ioc->pdev, sz, 16, 0); 2124 if (!ioc->reply_free_dma_pool) { 2125 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 2126 "failed\n", ioc->name); 2127 goto out; 2128 } 2129 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 2130 &ioc->reply_free_dma); 2131 if (!ioc->reply_free) { 2132 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 2133 "failed\n", ioc->name); 2134 goto out; 2135 } 2136 memset(ioc->reply_free, 0, sz); 2137 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 2138 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 2139 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 2140 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 2141 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 2142 total_sz += sz; 2143 2144 /* reply post queue, 16 byte align */ 2145 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 2146 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 2147 ioc->pdev, sz, 16, 0); 2148 if (!ioc->reply_post_free_dma_pool) { 2149 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 2150 "failed\n", ioc->name); 2151 goto out; 2152 } 2153 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 2154 GFP_KERNEL, &ioc->reply_post_free_dma); 2155 if (!ioc->reply_post_free) { 2156 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2157 "failed\n", ioc->name); 2158 goto out; 2159 } 2160 memset(ioc->reply_post_free, 0, sz); 2161 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2162 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2163 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2164 sz/1024)); 2165 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2166 "(0x%llx)\n", ioc->name, (unsigned long long) 2167 ioc->reply_post_free_dma)); 2168 total_sz += sz; 2169 2170 ioc->config_page_sz = 512; 2171 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2172 ioc->config_page_sz, &ioc->config_page_dma); 2173 if (!ioc->config_page) { 2174 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2175 "failed\n", ioc->name); 2176 goto out; 2177 } 2178 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2179 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2180 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2181 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2182 total_sz += ioc->config_page_sz; 2183 2184 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2185 ioc->name, total_sz/1024); 2186 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2187 "Max Controller Queue Depth(%d)\n", 2188 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2189 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2190 ioc->name, ioc->shost->sg_tablesize); 2191 return 0; 2192 2193 out: 2194 _base_release_memory_pools(ioc); 2195 return -ENOMEM; 2196} 2197 2198 2199/** 2200 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2201 * @ioc: Pointer to MPT_ADAPTER structure 2202 * @cooked: Request raw or cooked IOC state 2203 * 2204 * Returns all IOC Doorbell register bits if cooked==0, else just the 2205 * Doorbell bits in MPI_IOC_STATE_MASK. 2206 */ 2207u32 2208mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2209{ 2210 u32 s, sc; 2211 2212 s = readl(&ioc->chip->Doorbell); 2213 sc = s & MPI2_IOC_STATE_MASK; 2214 return cooked ? sc : s; 2215} 2216 2217/** 2218 * _base_wait_on_iocstate - waiting on a particular ioc state 2219 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2220 * @timeout: timeout in second 2221 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2222 * 2223 * Returns 0 for success, non-zero for failure. 2224 */ 2225static int 2226_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2227 int sleep_flag) 2228{ 2229 u32 count, cntdn; 2230 u32 current_state; 2231 2232 count = 0; 2233 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2234 do { 2235 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2236 if (current_state == ioc_state) 2237 return 0; 2238 if (count && current_state == MPI2_IOC_STATE_FAULT) 2239 break; 2240 if (sleep_flag == CAN_SLEEP) 2241 msleep(1); 2242 else 2243 udelay(500); 2244 count++; 2245 } while (--cntdn); 2246 2247 return current_state; 2248} 2249 2250/** 2251 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2252 * a write to the doorbell) 2253 * @ioc: per adapter object 2254 * @timeout: timeout in second 2255 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2256 * 2257 * Returns 0 for success, non-zero for failure. 2258 * 2259 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2260 */ 2261static int 2262_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2263 int sleep_flag) 2264{ 2265 u32 cntdn, count; 2266 u32 int_status; 2267 2268 count = 0; 2269 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2270 do { 2271 int_status = readl(&ioc->chip->HostInterruptStatus); 2272 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2273 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2274 "successfull count(%d), timeout(%d)\n", ioc->name, 2275 __func__, count, timeout)); 2276 return 0; 2277 } 2278 if (sleep_flag == CAN_SLEEP) 2279 msleep(1); 2280 else 2281 udelay(500); 2282 count++; 2283 } while (--cntdn); 2284 2285 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2286 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2287 return -EFAULT; 2288} 2289 2290/** 2291 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2292 * @ioc: per adapter object 2293 * @timeout: timeout in second 2294 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2295 * 2296 * Returns 0 for success, non-zero for failure. 2297 * 2298 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2299 * doorbell. 2300 */ 2301static int 2302_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2303 int sleep_flag) 2304{ 2305 u32 cntdn, count; 2306 u32 int_status; 2307 u32 doorbell; 2308 2309 count = 0; 2310 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2311 do { 2312 int_status = readl(&ioc->chip->HostInterruptStatus); 2313 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2314 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2315 "successfull count(%d), timeout(%d)\n", ioc->name, 2316 __func__, count, timeout)); 2317 return 0; 2318 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2319 doorbell = readl(&ioc->chip->Doorbell); 2320 if ((doorbell & MPI2_IOC_STATE_MASK) == 2321 MPI2_IOC_STATE_FAULT) { 2322 mpt2sas_base_fault_info(ioc , doorbell); 2323 return -EFAULT; 2324 } 2325 } else if (int_status == 0xFFFFFFFF) 2326 goto out; 2327 2328 if (sleep_flag == CAN_SLEEP) 2329 msleep(1); 2330 else 2331 udelay(500); 2332 count++; 2333 } while (--cntdn); 2334 2335 out: 2336 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2337 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2338 return -EFAULT; 2339} 2340 2341/** 2342 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2343 * @ioc: per adapter object 2344 * @timeout: timeout in second 2345 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2346 * 2347 * Returns 0 for success, non-zero for failure. 2348 * 2349 */ 2350static int 2351_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2352 int sleep_flag) 2353{ 2354 u32 cntdn, count; 2355 u32 doorbell_reg; 2356 2357 count = 0; 2358 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2359 do { 2360 doorbell_reg = readl(&ioc->chip->Doorbell); 2361 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2362 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2363 "successfull count(%d), timeout(%d)\n", ioc->name, 2364 __func__, count, timeout)); 2365 return 0; 2366 } 2367 if (sleep_flag == CAN_SLEEP) 2368 msleep(1); 2369 else 2370 udelay(500); 2371 count++; 2372 } while (--cntdn); 2373 2374 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2375 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2376 return -EFAULT; 2377} 2378 2379/** 2380 * _base_send_ioc_reset - send doorbell reset 2381 * @ioc: per adapter object 2382 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2383 * @timeout: timeout in second 2384 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2385 * 2386 * Returns 0 for success, non-zero for failure. 2387 */ 2388static int 2389_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2390 int sleep_flag) 2391{ 2392 u32 ioc_state; 2393 int r = 0; 2394 2395 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2396 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2397 ioc->name, __func__); 2398 return -EFAULT; 2399 } 2400 2401 if (!(ioc->facts.IOCCapabilities & 2402 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2403 return -EFAULT; 2404 2405 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2406 2407 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2408 &ioc->chip->Doorbell); 2409 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2410 r = -EFAULT; 2411 goto out; 2412 } 2413 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2414 timeout, sleep_flag); 2415 if (ioc_state) { 2416 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2417 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2418 r = -EFAULT; 2419 goto out; 2420 } 2421 out: 2422 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2423 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2424 return r; 2425} 2426 2427/** 2428 * _base_handshake_req_reply_wait - send request thru doorbell interface 2429 * @ioc: per adapter object 2430 * @request_bytes: request length 2431 * @request: pointer having request payload 2432 * @reply_bytes: reply length 2433 * @reply: pointer to reply payload 2434 * @timeout: timeout in second 2435 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2436 * 2437 * Returns 0 for success, non-zero for failure. 2438 */ 2439static int 2440_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2441 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2442{ 2443 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2444 int i; 2445 u8 failed; 2446 u16 dummy; 2447 u32 *mfp; 2448 2449 /* make sure doorbell is not in use */ 2450 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2451 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2452 " (line=%d)\n", ioc->name, __LINE__); 2453 return -EFAULT; 2454 } 2455 2456 /* clear pending doorbell interrupts from previous state changes */ 2457 if (readl(&ioc->chip->HostInterruptStatus) & 2458 MPI2_HIS_IOC2SYS_DB_STATUS) 2459 writel(0, &ioc->chip->HostInterruptStatus); 2460 2461 /* send message to ioc */ 2462 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2463 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2464 &ioc->chip->Doorbell); 2465 2466 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2467 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2468 "int failed (line=%d)\n", ioc->name, __LINE__); 2469 return -EFAULT; 2470 } 2471 writel(0, &ioc->chip->HostInterruptStatus); 2472 2473 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2474 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2475 "ack failed (line=%d)\n", ioc->name, __LINE__); 2476 return -EFAULT; 2477 } 2478 2479 /* send message 32-bits at a time */ 2480 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2481 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2482 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2483 failed = 1; 2484 } 2485 2486 if (failed) { 2487 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2488 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2489 return -EFAULT; 2490 } 2491 2492 /* now wait for the reply */ 2493 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2494 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2495 "int failed (line=%d)\n", ioc->name, __LINE__); 2496 return -EFAULT; 2497 } 2498 2499 /* read the first two 16-bits, it gives the total length of the reply */ 2500 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2501 & MPI2_DOORBELL_DATA_MASK); 2502 writel(0, &ioc->chip->HostInterruptStatus); 2503 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2504 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2505 "int failed (line=%d)\n", ioc->name, __LINE__); 2506 return -EFAULT; 2507 } 2508 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2509 & MPI2_DOORBELL_DATA_MASK); 2510 writel(0, &ioc->chip->HostInterruptStatus); 2511 2512 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2513 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2514 printk(MPT2SAS_ERR_FMT "doorbell " 2515 "handshake int failed (line=%d)\n", ioc->name, 2516 __LINE__); 2517 return -EFAULT; 2518 } 2519 if (i >= reply_bytes/2) /* overflow case */ 2520 dummy = readl(&ioc->chip->Doorbell); 2521 else 2522 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2523 & MPI2_DOORBELL_DATA_MASK); 2524 writel(0, &ioc->chip->HostInterruptStatus); 2525 } 2526 2527 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2528 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2529 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2530 " (line=%d)\n", ioc->name, __LINE__)); 2531 } 2532 writel(0, &ioc->chip->HostInterruptStatus); 2533 2534 if (ioc->logging_level & MPT_DEBUG_INIT) { 2535 mfp = (u32 *)reply; 2536 printk(KERN_DEBUG "\toffset:data\n"); 2537 for (i = 0; i < reply_bytes/4; i++) 2538 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2539 le32_to_cpu(mfp[i])); 2540 } 2541 return 0; 2542} 2543 2544/** 2545 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2546 * @ioc: per adapter object 2547 * @mpi_reply: the reply payload from FW 2548 * @mpi_request: the request payload sent to FW 2549 * 2550 * The SAS IO Unit Control Request message allows the host to perform low-level 2551 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2552 * to obtain the IOC assigned device handles for a device if it has other 2553 * identifying information about the device, in addition allows the host to 2554 * remove IOC resources associated with the device. 2555 * 2556 * Returns 0 for success, non-zero for failure. 2557 */ 2558int 2559mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2560 Mpi2SasIoUnitControlReply_t *mpi_reply, 2561 Mpi2SasIoUnitControlRequest_t *mpi_request) 2562{ 2563 u16 smid; 2564 u32 ioc_state; 2565 unsigned long timeleft; 2566 u8 issue_reset; 2567 int rc; 2568 void *request; 2569 u16 wait_state_count; 2570 2571 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2572 __func__)); 2573 2574 mutex_lock(&ioc->base_cmds.mutex); 2575 2576 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2577 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2578 ioc->name, __func__); 2579 rc = -EAGAIN; 2580 goto out; 2581 } 2582 2583 wait_state_count = 0; 2584 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2585 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2586 if (wait_state_count++ == 10) { 2587 printk(MPT2SAS_ERR_FMT 2588 "%s: failed due to ioc not operational\n", 2589 ioc->name, __func__); 2590 rc = -EFAULT; 2591 goto out; 2592 } 2593 ssleep(1); 2594 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2595 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2596 "operational state(count=%d)\n", ioc->name, 2597 __func__, wait_state_count); 2598 } 2599 2600 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2601 if (!smid) { 2602 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2603 ioc->name, __func__); 2604 rc = -EAGAIN; 2605 goto out; 2606 } 2607 2608 rc = 0; 2609 ioc->base_cmds.status = MPT2_CMD_PENDING; 2610 request = mpt2sas_base_get_msg_frame(ioc, smid); 2611 ioc->base_cmds.smid = smid; 2612 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2613 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2614 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2615 ioc->ioc_link_reset_in_progress = 1; 2616 mpt2sas_base_put_smid_default(ioc, smid); 2617 init_completion(&ioc->base_cmds.done); 2618 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2619 msecs_to_jiffies(10000)); 2620 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2621 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2622 ioc->ioc_link_reset_in_progress) 2623 ioc->ioc_link_reset_in_progress = 0; 2624 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2625 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2626 ioc->name, __func__); 2627 _debug_dump_mf(mpi_request, 2628 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2629 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2630 issue_reset = 1; 2631 goto issue_host_reset; 2632 } 2633 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2634 memcpy(mpi_reply, ioc->base_cmds.reply, 2635 sizeof(Mpi2SasIoUnitControlReply_t)); 2636 else 2637 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2638 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2639 goto out; 2640 2641 issue_host_reset: 2642 if (issue_reset) 2643 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2644 FORCE_BIG_HAMMER); 2645 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2646 rc = -EFAULT; 2647 out: 2648 mutex_unlock(&ioc->base_cmds.mutex); 2649 return rc; 2650} 2651 2652 2653/** 2654 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2655 * @ioc: per adapter object 2656 * @mpi_reply: the reply payload from FW 2657 * @mpi_request: the request payload sent to FW 2658 * 2659 * The SCSI Enclosure Processor request message causes the IOC to 2660 * communicate with SES devices to control LED status signals. 2661 * 2662 * Returns 0 for success, non-zero for failure. 2663 */ 2664int 2665mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2666 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2667{ 2668 u16 smid; 2669 u32 ioc_state; 2670 unsigned long timeleft; 2671 u8 issue_reset; 2672 int rc; 2673 void *request; 2674 u16 wait_state_count; 2675 2676 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2677 __func__)); 2678 2679 mutex_lock(&ioc->base_cmds.mutex); 2680 2681 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2682 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2683 ioc->name, __func__); 2684 rc = -EAGAIN; 2685 goto out; 2686 } 2687 2688 wait_state_count = 0; 2689 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2690 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2691 if (wait_state_count++ == 10) { 2692 printk(MPT2SAS_ERR_FMT 2693 "%s: failed due to ioc not operational\n", 2694 ioc->name, __func__); 2695 rc = -EFAULT; 2696 goto out; 2697 } 2698 ssleep(1); 2699 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2700 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2701 "operational state(count=%d)\n", ioc->name, 2702 __func__, wait_state_count); 2703 } 2704 2705 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2706 if (!smid) { 2707 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2708 ioc->name, __func__); 2709 rc = -EAGAIN; 2710 goto out; 2711 } 2712 2713 rc = 0; 2714 ioc->base_cmds.status = MPT2_CMD_PENDING; 2715 request = mpt2sas_base_get_msg_frame(ioc, smid); 2716 ioc->base_cmds.smid = smid; 2717 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2718 mpt2sas_base_put_smid_default(ioc, smid); 2719 init_completion(&ioc->base_cmds.done); 2720 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2721 msecs_to_jiffies(10000)); 2722 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2723 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2724 ioc->name, __func__); 2725 _debug_dump_mf(mpi_request, 2726 sizeof(Mpi2SepRequest_t)/4); 2727 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2728 issue_reset = 1; 2729 goto issue_host_reset; 2730 } 2731 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2732 memcpy(mpi_reply, ioc->base_cmds.reply, 2733 sizeof(Mpi2SepReply_t)); 2734 else 2735 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2736 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2737 goto out; 2738 2739 issue_host_reset: 2740 if (issue_reset) 2741 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2742 FORCE_BIG_HAMMER); 2743 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2744 rc = -EFAULT; 2745 out: 2746 mutex_unlock(&ioc->base_cmds.mutex); 2747 return rc; 2748} 2749 2750/** 2751 * _base_get_port_facts - obtain port facts reply and save in ioc 2752 * @ioc: per adapter object 2753 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2754 * 2755 * Returns 0 for success, non-zero for failure. 2756 */ 2757static int 2758_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2759{ 2760 Mpi2PortFactsRequest_t mpi_request; 2761 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2762 int mpi_reply_sz, mpi_request_sz, r; 2763 2764 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2765 __func__)); 2766 2767 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2768 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2769 memset(&mpi_request, 0, mpi_request_sz); 2770 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2771 mpi_request.PortNumber = port; 2772 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2773 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2774 2775 if (r != 0) { 2776 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2777 ioc->name, __func__, r); 2778 return r; 2779 } 2780 2781 pfacts = &ioc->pfacts[port]; 2782 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2783 pfacts->PortNumber = mpi_reply.PortNumber; 2784 pfacts->VP_ID = mpi_reply.VP_ID; 2785 pfacts->VF_ID = mpi_reply.VF_ID; 2786 pfacts->MaxPostedCmdBuffers = 2787 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2788 2789 return 0; 2790} 2791 2792/** 2793 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2794 * @ioc: per adapter object 2795 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2796 * 2797 * Returns 0 for success, non-zero for failure. 2798 */ 2799static int 2800_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2801{ 2802 Mpi2IOCFactsRequest_t mpi_request; 2803 Mpi2IOCFactsReply_t mpi_reply, *facts; 2804 int mpi_reply_sz, mpi_request_sz, r; 2805 2806 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2807 __func__)); 2808 2809 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2810 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2811 memset(&mpi_request, 0, mpi_request_sz); 2812 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2813 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2814 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2815 2816 if (r != 0) { 2817 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2818 ioc->name, __func__, r); 2819 return r; 2820 } 2821 2822 facts = &ioc->facts; 2823 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2824 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2825 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2826 facts->VP_ID = mpi_reply.VP_ID; 2827 facts->VF_ID = mpi_reply.VF_ID; 2828 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2829 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2830 facts->WhoInit = mpi_reply.WhoInit; 2831 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2832 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2833 facts->MaxReplyDescriptorPostQueueDepth = 2834 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2835 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2836 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2837 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2838 ioc->ir_firmware = 1; 2839 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2840 facts->IOCRequestFrameSize = 2841 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2842 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2843 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2844 ioc->shost->max_id = -1; 2845 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2846 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2847 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2848 facts->HighPriorityCredit = 2849 le16_to_cpu(mpi_reply.HighPriorityCredit); 2850 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2851 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2852 2853 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2854 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2855 facts->MaxChainDepth)); 2856 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2857 "reply frame size(%d)\n", ioc->name, 2858 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2859 return 0; 2860} 2861 2862/** 2863 * _base_send_ioc_init - send ioc_init to firmware 2864 * @ioc: per adapter object 2865 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2866 * 2867 * Returns 0 for success, non-zero for failure. 2868 */ 2869static int 2870_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2871{ 2872 Mpi2IOCInitRequest_t mpi_request; 2873 Mpi2IOCInitReply_t mpi_reply; 2874 int r; 2875 2876 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2877 __func__)); 2878 2879 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2880 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2881 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2882 mpi_request.VF_ID = 0; /* TODO */ 2883 mpi_request.VP_ID = 0; 2884 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2885 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2886 2887 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2888 * removed and made reserved. For those with older firmware will need 2889 * this fix. It was decided that the Reply and Request frame sizes are 2890 * the same. 2891 */ 2892 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2893 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2894/* mpi_request.SystemReplyFrameSize = 2895 * cpu_to_le16(ioc->reply_sz); 2896 */ 2897 } 2898 2899 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 2900 mpi_request.ReplyDescriptorPostQueueDepth = 2901 cpu_to_le16(ioc->reply_post_queue_depth); 2902 mpi_request.ReplyFreeQueueDepth = 2903 cpu_to_le16(ioc->reply_free_queue_depth); 2904 2905#if BITS_PER_LONG > 32 2906 mpi_request.SenseBufferAddressHigh = 2907 cpu_to_le32(ioc->sense_dma >> 32); 2908 mpi_request.SystemReplyAddressHigh = 2909 cpu_to_le32(ioc->reply_dma >> 32); 2910 mpi_request.SystemRequestFrameBaseAddress = 2911 cpu_to_le64(ioc->request_dma); 2912 mpi_request.ReplyFreeQueueAddress = 2913 cpu_to_le64(ioc->reply_free_dma); 2914 mpi_request.ReplyDescriptorPostQueueAddress = 2915 cpu_to_le64(ioc->reply_post_free_dma); 2916#else 2917 mpi_request.SystemRequestFrameBaseAddress = 2918 cpu_to_le32(ioc->request_dma); 2919 mpi_request.ReplyFreeQueueAddress = 2920 cpu_to_le32(ioc->reply_free_dma); 2921 mpi_request.ReplyDescriptorPostQueueAddress = 2922 cpu_to_le32(ioc->reply_post_free_dma); 2923#endif 2924 2925 if (ioc->logging_level & MPT_DEBUG_INIT) { 2926 u32 *mfp; 2927 int i; 2928 2929 mfp = (u32 *)&mpi_request; 2930 printk(KERN_DEBUG "\toffset:data\n"); 2931 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 2932 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2933 le32_to_cpu(mfp[i])); 2934 } 2935 2936 r = _base_handshake_req_reply_wait(ioc, 2937 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 2938 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 2939 sleep_flag); 2940 2941 if (r != 0) { 2942 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2943 ioc->name, __func__, r); 2944 return r; 2945 } 2946 2947 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS || 2948 mpi_reply.IOCLogInfo) { 2949 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 2950 r = -EIO; 2951 } 2952 2953 return 0; 2954} 2955 2956/** 2957 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 2958 * @ioc: per adapter object 2959 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2960 * 2961 * Returns 0 for success, non-zero for failure. 2962 */ 2963static int 2964_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2965{ 2966 Mpi2PortEnableRequest_t *mpi_request; 2967 u32 ioc_state; 2968 unsigned long timeleft; 2969 int r = 0; 2970 u16 smid; 2971 2972 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 2973 2974 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2975 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2976 ioc->name, __func__); 2977 return -EAGAIN; 2978 } 2979 2980 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2981 if (!smid) { 2982 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2983 ioc->name, __func__); 2984 return -EAGAIN; 2985 } 2986 2987 ioc->base_cmds.status = MPT2_CMD_PENDING; 2988 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2989 ioc->base_cmds.smid = smid; 2990 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 2991 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 2992 mpi_request->VF_ID = 0; /* TODO */ 2993 mpi_request->VP_ID = 0; 2994 2995 mpt2sas_base_put_smid_default(ioc, smid); 2996 init_completion(&ioc->base_cmds.done); 2997 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2998 300*HZ); 2999 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3000 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3001 ioc->name, __func__); 3002 _debug_dump_mf(mpi_request, 3003 sizeof(Mpi2PortEnableRequest_t)/4); 3004 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3005 r = -EFAULT; 3006 else 3007 r = -ETIME; 3008 goto out; 3009 } else 3010 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3011 ioc->name, __func__)); 3012 3013 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 3014 60, sleep_flag); 3015 if (ioc_state) { 3016 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 3017 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3018 r = -EFAULT; 3019 } 3020 out: 3021 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3022 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 3023 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 3024 return r; 3025} 3026 3027/** 3028 * _base_unmask_events - turn on notification for this event 3029 * @ioc: per adapter object 3030 * @event: firmware event 3031 * 3032 * The mask is stored in ioc->event_masks. 3033 */ 3034static void 3035_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 3036{ 3037 u32 desired_event; 3038 3039 if (event >= 128) 3040 return; 3041 3042 desired_event = (1 << (event % 32)); 3043 3044 if (event < 32) 3045 ioc->event_masks[0] &= ~desired_event; 3046 else if (event < 64) 3047 ioc->event_masks[1] &= ~desired_event; 3048 else if (event < 96) 3049 ioc->event_masks[2] &= ~desired_event; 3050 else if (event < 128) 3051 ioc->event_masks[3] &= ~desired_event; 3052} 3053 3054/** 3055 * _base_event_notification - send event notification 3056 * @ioc: per adapter object 3057 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3058 * 3059 * Returns 0 for success, non-zero for failure. 3060 */ 3061static int 3062_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3063{ 3064 Mpi2EventNotificationRequest_t *mpi_request; 3065 unsigned long timeleft; 3066 u16 smid; 3067 int r = 0; 3068 int i; 3069 3070 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3071 __func__)); 3072 3073 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3074 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3075 ioc->name, __func__); 3076 return -EAGAIN; 3077 } 3078 3079 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3080 if (!smid) { 3081 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3082 ioc->name, __func__); 3083 return -EAGAIN; 3084 } 3085 ioc->base_cmds.status = MPT2_CMD_PENDING; 3086 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3087 ioc->base_cmds.smid = smid; 3088 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 3089 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 3090 mpi_request->VF_ID = 0; /* TODO */ 3091 mpi_request->VP_ID = 0; 3092 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3093 mpi_request->EventMasks[i] = 3094 le32_to_cpu(ioc->event_masks[i]); 3095 mpt2sas_base_put_smid_default(ioc, smid); 3096 init_completion(&ioc->base_cmds.done); 3097 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 3098 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3099 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3100 ioc->name, __func__); 3101 _debug_dump_mf(mpi_request, 3102 sizeof(Mpi2EventNotificationRequest_t)/4); 3103 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3104 r = -EFAULT; 3105 else 3106 r = -ETIME; 3107 } else 3108 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3109 ioc->name, __func__)); 3110 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3111 return r; 3112} 3113 3114/** 3115 * mpt2sas_base_validate_event_type - validating event types 3116 * @ioc: per adapter object 3117 * @event: firmware event 3118 * 3119 * This will turn on firmware event notification when application 3120 * ask for that event. We don't mask events that are already enabled. 3121 */ 3122void 3123mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 3124{ 3125 int i, j; 3126 u32 event_mask, desired_event; 3127 u8 send_update_to_fw; 3128 3129 for (i = 0, send_update_to_fw = 0; i < 3130 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 3131 event_mask = ~event_type[i]; 3132 desired_event = 1; 3133 for (j = 0; j < 32; j++) { 3134 if (!(event_mask & desired_event) && 3135 (ioc->event_masks[i] & desired_event)) { 3136 ioc->event_masks[i] &= ~desired_event; 3137 send_update_to_fw = 1; 3138 } 3139 desired_event = (desired_event << 1); 3140 } 3141 } 3142 3143 if (!send_update_to_fw) 3144 return; 3145 3146 mutex_lock(&ioc->base_cmds.mutex); 3147 _base_event_notification(ioc, CAN_SLEEP); 3148 mutex_unlock(&ioc->base_cmds.mutex); 3149} 3150 3151/** 3152 * _base_diag_reset - the "big hammer" start of day reset 3153 * @ioc: per adapter object 3154 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3155 * 3156 * Returns 0 for success, non-zero for failure. 3157 */ 3158static int 3159_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3160{ 3161 u32 host_diagnostic; 3162 u32 ioc_state; 3163 u32 count; 3164 u32 hcb_size; 3165 3166 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3167 3168 _base_save_msix_table(ioc); 3169 3170 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 3171 ioc->name)); 3172 writel(0, &ioc->chip->HostInterruptStatus); 3173 3174 count = 0; 3175 do { 3176 /* Write magic sequence to WriteSequence register 3177 * Loop until in diagnostic mode 3178 */ 3179 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 3180 "sequence\n", ioc->name)); 3181 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3182 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3183 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3184 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3185 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3186 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3187 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3188 3189 /* wait 100 msec */ 3190 if (sleep_flag == CAN_SLEEP) 3191 msleep(100); 3192 else 3193 mdelay(100); 3194 3195 if (count++ > 20) 3196 goto out; 3197 3198 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3199 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 3200 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3201 ioc->name, count, host_diagnostic)); 3202 3203 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3204 3205 hcb_size = readl(&ioc->chip->HCBSize); 3206 3207 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 3208 ioc->name)); 3209 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3210 &ioc->chip->HostDiagnostic); 3211 3212 /* don't access any registers for 50 milliseconds */ 3213 msleep(50); 3214 3215 /* 300 second max wait */ 3216 for (count = 0; count < 3000000 ; count++) { 3217 3218 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3219 3220 if (host_diagnostic == 0xFFFFFFFF) 3221 goto out; 3222 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3223 break; 3224 3225 /* wait 100 msec */ 3226 if (sleep_flag == CAN_SLEEP) 3227 msleep(1); 3228 else 3229 mdelay(1); 3230 } 3231 3232 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3233 3234 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3235 "assuming the HCB Address points to good F/W\n", 3236 ioc->name)); 3237 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3238 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3239 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3240 3241 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3242 "re-enable the HCDW\n", ioc->name)); 3243 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3244 &ioc->chip->HCBSize); 3245 } 3246 3247 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3248 ioc->name)); 3249 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3250 &ioc->chip->HostDiagnostic); 3251 3252 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3253 "diagnostic register\n", ioc->name)); 3254 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3255 3256 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3257 "READY state\n", ioc->name)); 3258 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3259 sleep_flag); 3260 if (ioc_state) { 3261 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3262 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3263 goto out; 3264 } 3265 3266 _base_restore_msix_table(ioc); 3267 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3268 return 0; 3269 3270 out: 3271 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3272 return -EFAULT; 3273} 3274 3275/** 3276 * _base_make_ioc_ready - put controller in READY state 3277 * @ioc: per adapter object 3278 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3279 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3280 * 3281 * Returns 0 for success, non-zero for failure. 3282 */ 3283static int 3284_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3285 enum reset_type type) 3286{ 3287 u32 ioc_state; 3288 3289 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3290 __func__)); 3291 3292 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3293 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3294 ioc->name, __func__, ioc_state)); 3295 3296 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3297 return 0; 3298 3299 if (ioc_state & MPI2_DOORBELL_USED) { 3300 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3301 "active!\n", ioc->name)); 3302 goto issue_diag_reset; 3303 } 3304 3305 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3306 mpt2sas_base_fault_info(ioc, ioc_state & 3307 MPI2_DOORBELL_DATA_MASK); 3308 goto issue_diag_reset; 3309 } 3310 3311 if (type == FORCE_BIG_HAMMER) 3312 goto issue_diag_reset; 3313 3314 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3315 if (!(_base_send_ioc_reset(ioc, 3316 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3317 return 0; 3318 3319 issue_diag_reset: 3320 return _base_diag_reset(ioc, CAN_SLEEP); 3321} 3322 3323/** 3324 * _base_make_ioc_operational - put controller in OPERATIONAL state 3325 * @ioc: per adapter object 3326 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3327 * 3328 * Returns 0 for success, non-zero for failure. 3329 */ 3330static int 3331_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3332{ 3333 int r, i; 3334 unsigned long flags; 3335 u32 reply_address; 3336 u16 smid; 3337 struct _tr_list *delayed_tr, *delayed_tr_next; 3338 3339 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3340 __func__)); 3341 3342 /* clean the delayed target reset list */ 3343 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 3344 &ioc->delayed_tr_list, list) { 3345 list_del(&delayed_tr->list); 3346 kfree(delayed_tr); 3347 } 3348 3349 /* initialize the scsi lookup free list */ 3350 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3351 INIT_LIST_HEAD(&ioc->free_list); 3352 smid = 1; 3353 for (i = 0; i < ioc->scsiio_depth; i++, smid++) { 3354 ioc->scsi_lookup[i].cb_idx = 0xFF; 3355 ioc->scsi_lookup[i].smid = smid; 3356 ioc->scsi_lookup[i].scmd = NULL; 3357 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3358 &ioc->free_list); 3359 } 3360 3361 /* hi-priority queue */ 3362 INIT_LIST_HEAD(&ioc->hpr_free_list); 3363 smid = ioc->hi_priority_smid; 3364 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { 3365 ioc->hpr_lookup[i].cb_idx = 0xFF; 3366 ioc->hpr_lookup[i].smid = smid; 3367 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 3368 &ioc->hpr_free_list); 3369 } 3370 3371 /* internal queue */ 3372 INIT_LIST_HEAD(&ioc->internal_free_list); 3373 smid = ioc->internal_smid; 3374 for (i = 0; i < ioc->internal_depth; i++, smid++) { 3375 ioc->internal_lookup[i].cb_idx = 0xFF; 3376 ioc->internal_lookup[i].smid = smid; 3377 list_add_tail(&ioc->internal_lookup[i].tracker_list, 3378 &ioc->internal_free_list); 3379 } 3380 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3381 3382 /* initialize Reply Free Queue */ 3383 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3384 i < ioc->reply_free_queue_depth ; i++, reply_address += 3385 ioc->reply_sz) 3386 ioc->reply_free[i] = cpu_to_le32(reply_address); 3387 3388 /* initialize Reply Post Free Queue */ 3389 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3390 ioc->reply_post_free[i].Words = ULLONG_MAX; 3391 3392 r = _base_send_ioc_init(ioc, sleep_flag); 3393 if (r) 3394 return r; 3395 3396 /* initialize the index's */ 3397 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3398 ioc->reply_post_host_index = 0; 3399 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3400 writel(0, &ioc->chip->ReplyPostHostIndex); 3401 3402 _base_unmask_interrupts(ioc); 3403 r = _base_event_notification(ioc, sleep_flag); 3404 if (r) 3405 return r; 3406 3407 if (sleep_flag == CAN_SLEEP) 3408 _base_static_config_pages(ioc); 3409 3410 r = _base_send_port_enable(ioc, sleep_flag); 3411 if (r) 3412 return r; 3413 3414 return r; 3415} 3416 3417/** 3418 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3419 * @ioc: per adapter object 3420 * 3421 * Return nothing. 3422 */ 3423void 3424mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3425{ 3426 struct pci_dev *pdev = ioc->pdev; 3427 3428 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3429 __func__)); 3430 3431 _base_mask_interrupts(ioc); 3432 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3433 if (ioc->pci_irq) { 3434 synchronize_irq(pdev->irq); 3435 free_irq(ioc->pci_irq, ioc); 3436 } 3437 _base_disable_msix(ioc); 3438 if (ioc->chip_phys) 3439 iounmap(ioc->chip); 3440 ioc->pci_irq = -1; 3441 ioc->chip_phys = 0; 3442 pci_release_selected_regions(ioc->pdev, ioc->bars); 3443 pci_disable_device(pdev); 3444 return; 3445} 3446 3447/** 3448 * mpt2sas_base_attach - attach controller instance 3449 * @ioc: per adapter object 3450 * 3451 * Returns 0 for success, non-zero for failure. 3452 */ 3453int 3454mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3455{ 3456 int r, i; 3457 3458 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3459 __func__)); 3460 3461 r = mpt2sas_base_map_resources(ioc); 3462 if (r) 3463 return r; 3464 3465 pci_set_drvdata(ioc->pdev, ioc->shost); 3466 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3467 if (r) 3468 goto out_free_resources; 3469 3470 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3471 if (r) 3472 goto out_free_resources; 3473 3474 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3475 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3476 if (!ioc->pfacts) 3477 goto out_free_resources; 3478 3479 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3480 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3481 if (r) 3482 goto out_free_resources; 3483 } 3484 3485 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3486 if (r) 3487 goto out_free_resources; 3488 3489 init_waitqueue_head(&ioc->reset_wq); 3490 3491 /* base internal command bits */ 3492 mutex_init(&ioc->base_cmds.mutex); 3493 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3494 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3495 3496 /* transport internal command bits */ 3497 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3498 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3499 mutex_init(&ioc->transport_cmds.mutex); 3500 3501 /* task management internal command bits */ 3502 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3503 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3504 mutex_init(&ioc->tm_cmds.mutex); 3505 3506 /* config page internal command bits */ 3507 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3508 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3509 mutex_init(&ioc->config_cmds.mutex); 3510 3511 /* ctl module internal command bits */ 3512 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3513 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3514 mutex_init(&ioc->ctl_cmds.mutex); 3515 3516 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3517 ioc->event_masks[i] = -1; 3518 3519 /* here we enable the events we care about */ 3520 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3521 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3522 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3523 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3524 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3525 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3526 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3527 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3528 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3529 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3530 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3531 r = _base_make_ioc_operational(ioc, CAN_SLEEP); 3532 if (r) 3533 goto out_free_resources; 3534 3535 mpt2sas_base_start_watchdog(ioc); 3536 return 0; 3537 3538 out_free_resources: 3539 3540 ioc->remove_host = 1; 3541 mpt2sas_base_free_resources(ioc); 3542 _base_release_memory_pools(ioc); 3543 pci_set_drvdata(ioc->pdev, NULL); 3544 kfree(ioc->tm_cmds.reply); 3545 kfree(ioc->transport_cmds.reply); 3546 kfree(ioc->config_cmds.reply); 3547 kfree(ioc->base_cmds.reply); 3548 kfree(ioc->ctl_cmds.reply); 3549 kfree(ioc->pfacts); 3550 ioc->ctl_cmds.reply = NULL; 3551 ioc->base_cmds.reply = NULL; 3552 ioc->tm_cmds.reply = NULL; 3553 ioc->transport_cmds.reply = NULL; 3554 ioc->config_cmds.reply = NULL; 3555 ioc->pfacts = NULL; 3556 return r; 3557} 3558 3559 3560/** 3561 * mpt2sas_base_detach - remove controller instance 3562 * @ioc: per adapter object 3563 * 3564 * Return nothing. 3565 */ 3566void 3567mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3568{ 3569 3570 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3571 __func__)); 3572 3573 mpt2sas_base_stop_watchdog(ioc); 3574 mpt2sas_base_free_resources(ioc); 3575 _base_release_memory_pools(ioc); 3576 pci_set_drvdata(ioc->pdev, NULL); 3577 kfree(ioc->pfacts); 3578 kfree(ioc->ctl_cmds.reply); 3579 kfree(ioc->base_cmds.reply); 3580 kfree(ioc->tm_cmds.reply); 3581 kfree(ioc->transport_cmds.reply); 3582 kfree(ioc->config_cmds.reply); 3583} 3584 3585/** 3586 * _base_reset_handler - reset callback handler (for base) 3587 * @ioc: per adapter object 3588 * @reset_phase: phase 3589 * 3590 * The handler for doing any required cleanup or initialization. 3591 * 3592 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3593 * MPT2_IOC_DONE_RESET 3594 * 3595 * Return nothing. 3596 */ 3597static void 3598_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3599{ 3600 switch (reset_phase) { 3601 case MPT2_IOC_PRE_RESET: 3602 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3603 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3604 break; 3605 case MPT2_IOC_AFTER_RESET: 3606 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3607 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3608 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3609 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3610 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3611 complete(&ioc->transport_cmds.done); 3612 } 3613 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3614 ioc->base_cmds.status |= MPT2_CMD_RESET; 3615 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3616 complete(&ioc->base_cmds.done); 3617 } 3618 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3619 ioc->config_cmds.status |= MPT2_CMD_RESET; 3620 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3621 ioc->config_cmds.smid = USHORT_MAX; 3622 complete(&ioc->config_cmds.done); 3623 } 3624 break; 3625 case MPT2_IOC_DONE_RESET: 3626 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3627 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3628 break; 3629 } 3630 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3631 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3632} 3633 3634/** 3635 * _wait_for_commands_to_complete - reset controller 3636 * @ioc: Pointer to MPT_ADAPTER structure 3637 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3638 * 3639 * This function waiting(3s) for all pending commands to complete 3640 * prior to putting controller in reset. 3641 */ 3642static void 3643_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3644{ 3645 u32 ioc_state; 3646 unsigned long flags; 3647 u16 i; 3648 3649 ioc->pending_io_count = 0; 3650 if (sleep_flag != CAN_SLEEP) 3651 return; 3652 3653 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3654 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3655 return; 3656 3657 /* pending command count */ 3658 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3659 for (i = 0; i < ioc->scsiio_depth; i++) 3660 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3661 ioc->pending_io_count++; 3662 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3663 3664 if (!ioc->pending_io_count) 3665 return; 3666 3667 /* wait for pending commands to complete */ 3668 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3669} 3670 3671/** 3672 * mpt2sas_base_hard_reset_handler - reset controller 3673 * @ioc: Pointer to MPT_ADAPTER structure 3674 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3675 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3676 * 3677 * Returns 0 for success, non-zero for failure. 3678 */ 3679int 3680mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3681 enum reset_type type) 3682{ 3683 int r; 3684 unsigned long flags; 3685 3686 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3687 __func__)); 3688 3689 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3690 if (ioc->shost_recovery) { 3691 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3692 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3693 ioc->name, __func__); 3694 return -EBUSY; 3695 } 3696 ioc->shost_recovery = 1; 3697 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3698 3699 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3700 _wait_for_commands_to_complete(ioc, sleep_flag); 3701 _base_mask_interrupts(ioc); 3702 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3703 if (r) 3704 goto out; 3705 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3706 r = _base_make_ioc_operational(ioc, sleep_flag); 3707 if (!r) 3708 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3709 out: 3710 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3711 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3712 3713 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3714 ioc->shost_recovery = 0; 3715 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3716 3717 if (!r) 3718 _base_reset_handler(ioc, MPT2_IOC_RUNNING); 3719 return r; 3720} 3721