mpt2sas_base.c revision be9e8cd75ce8d94ae4aab721fdcc337fa78a9090
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2008 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60 61#include "mpt2sas_base.h" 62 63static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 64 65#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 66#define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */ 67 68static int max_queue_depth = -1; 69module_param(max_queue_depth, int, 0); 70MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 71 72static int max_sgl_entries = -1; 73module_param(max_sgl_entries, int, 0); 74MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 75 76static int msix_disable = -1; 77module_param(msix_disable, int, 0); 78MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 79 80/** 81 * _base_fault_reset_work - workq handling ioc fault conditions 82 * @work: input argument, used to derive ioc 83 * Context: sleep. 84 * 85 * Return nothing. 86 */ 87static void 88_base_fault_reset_work(struct work_struct *work) 89{ 90 struct MPT2SAS_ADAPTER *ioc = 91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 92 unsigned long flags; 93 u32 doorbell; 94 int rc; 95 96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 97 if (ioc->ioc_reset_in_progress) 98 goto rearm_timer; 99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 100 101 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 104 FORCE_BIG_HAMMER); 105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 106 __func__, (rc == 0) ? "success" : "failed"); 107 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 109 mpt2sas_base_fault_info(ioc, doorbell & 110 MPI2_DOORBELL_DATA_MASK); 111 } 112 113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 114 rearm_timer: 115 if (ioc->fault_reset_work_q) 116 queue_delayed_work(ioc->fault_reset_work_q, 117 &ioc->fault_reset_work, 118 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 120} 121 122#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 123/** 124 * _base_sas_ioc_info - verbose translation of the ioc status 125 * @ioc: pointer to scsi command object 126 * @mpi_reply: reply mf payload returned from firmware 127 * @request_hdr: request mf 128 * 129 * Return nothing. 130 */ 131static void 132_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 133 MPI2RequestHeader_t *request_hdr) 134{ 135 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 136 MPI2_IOCSTATUS_MASK; 137 char *desc = NULL; 138 u16 frame_sz; 139 char *func_str = NULL; 140 141 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 142 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 143 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 144 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 145 return; 146 147 switch (ioc_status) { 148 149/**************************************************************************** 150* Common IOCStatus values for all replies 151****************************************************************************/ 152 153 case MPI2_IOCSTATUS_INVALID_FUNCTION: 154 desc = "invalid function"; 155 break; 156 case MPI2_IOCSTATUS_BUSY: 157 desc = "busy"; 158 break; 159 case MPI2_IOCSTATUS_INVALID_SGL: 160 desc = "invalid sgl"; 161 break; 162 case MPI2_IOCSTATUS_INTERNAL_ERROR: 163 desc = "internal error"; 164 break; 165 case MPI2_IOCSTATUS_INVALID_VPID: 166 desc = "invalid vpid"; 167 break; 168 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 169 desc = "insufficient resources"; 170 break; 171 case MPI2_IOCSTATUS_INVALID_FIELD: 172 desc = "invalid field"; 173 break; 174 case MPI2_IOCSTATUS_INVALID_STATE: 175 desc = "invalid state"; 176 break; 177 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 178 desc = "op state not supported"; 179 break; 180 181/**************************************************************************** 182* Config IOCStatus values 183****************************************************************************/ 184 185 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 186 desc = "config invalid action"; 187 break; 188 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 189 desc = "config invalid type"; 190 break; 191 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 192 desc = "config invalid page"; 193 break; 194 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 195 desc = "config invalid data"; 196 break; 197 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 198 desc = "config no defaults"; 199 break; 200 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 201 desc = "config cant commit"; 202 break; 203 204/**************************************************************************** 205* SCSI IO Reply 206****************************************************************************/ 207 208 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 209 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 210 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 211 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 212 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 213 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 214 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 215 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 216 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 217 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 218 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 219 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 220 break; 221 222/**************************************************************************** 223* For use by SCSI Initiator and SCSI Target end-to-end data protection 224****************************************************************************/ 225 226 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 227 desc = "eedp guard error"; 228 break; 229 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 230 desc = "eedp ref tag error"; 231 break; 232 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 233 desc = "eedp app tag error"; 234 break; 235 236/**************************************************************************** 237* SCSI Target values 238****************************************************************************/ 239 240 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 241 desc = "target invalid io index"; 242 break; 243 case MPI2_IOCSTATUS_TARGET_ABORTED: 244 desc = "target aborted"; 245 break; 246 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 247 desc = "target no conn retryable"; 248 break; 249 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 250 desc = "target no connection"; 251 break; 252 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 253 desc = "target xfer count mismatch"; 254 break; 255 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 256 desc = "target data offset error"; 257 break; 258 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 259 desc = "target too much write data"; 260 break; 261 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 262 desc = "target iu too short"; 263 break; 264 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 265 desc = "target ack nak timeout"; 266 break; 267 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 268 desc = "target nak received"; 269 break; 270 271/**************************************************************************** 272* Serial Attached SCSI values 273****************************************************************************/ 274 275 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 276 desc = "smp request failed"; 277 break; 278 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 279 desc = "smp data overrun"; 280 break; 281 282/**************************************************************************** 283* Diagnostic Buffer Post / Diagnostic Release values 284****************************************************************************/ 285 286 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 287 desc = "diagnostic released"; 288 break; 289 default: 290 break; 291 } 292 293 if (!desc) 294 return; 295 296 switch (request_hdr->Function) { 297 case MPI2_FUNCTION_CONFIG: 298 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 299 func_str = "config_page"; 300 break; 301 case MPI2_FUNCTION_SCSI_TASK_MGMT: 302 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 303 func_str = "task_mgmt"; 304 break; 305 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 306 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 307 func_str = "sas_iounit_ctl"; 308 break; 309 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 310 frame_sz = sizeof(Mpi2SepRequest_t); 311 func_str = "enclosure"; 312 break; 313 case MPI2_FUNCTION_IOC_INIT: 314 frame_sz = sizeof(Mpi2IOCInitRequest_t); 315 func_str = "ioc_init"; 316 break; 317 case MPI2_FUNCTION_PORT_ENABLE: 318 frame_sz = sizeof(Mpi2PortEnableRequest_t); 319 func_str = "port_enable"; 320 break; 321 case MPI2_FUNCTION_SMP_PASSTHROUGH: 322 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 323 func_str = "smp_passthru"; 324 break; 325 default: 326 frame_sz = 32; 327 func_str = "unknown"; 328 break; 329 } 330 331 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 332 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 333 334 _debug_dump_mf(request_hdr, frame_sz/4); 335} 336 337/** 338 * _base_display_event_data - verbose translation of firmware asyn events 339 * @ioc: pointer to scsi command object 340 * @mpi_reply: reply mf payload returned from firmware 341 * 342 * Return nothing. 343 */ 344static void 345_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 346 Mpi2EventNotificationReply_t *mpi_reply) 347{ 348 char *desc = NULL; 349 u16 event; 350 351 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 352 return; 353 354 event = le16_to_cpu(mpi_reply->Event); 355 356 switch (event) { 357 case MPI2_EVENT_LOG_DATA: 358 desc = "Log Data"; 359 break; 360 case MPI2_EVENT_STATE_CHANGE: 361 desc = "Status Change"; 362 break; 363 case MPI2_EVENT_HARD_RESET_RECEIVED: 364 desc = "Hard Reset Received"; 365 break; 366 case MPI2_EVENT_EVENT_CHANGE: 367 desc = "Event Change"; 368 break; 369 case MPI2_EVENT_TASK_SET_FULL: 370 desc = "Task Set Full"; 371 break; 372 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 373 desc = "Device Status Change"; 374 break; 375 case MPI2_EVENT_IR_OPERATION_STATUS: 376 desc = "IR Operation Status"; 377 break; 378 case MPI2_EVENT_SAS_DISCOVERY: 379 desc = "Discovery"; 380 break; 381 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 382 desc = "SAS Broadcast Primitive"; 383 break; 384 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 385 desc = "SAS Init Device Status Change"; 386 break; 387 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 388 desc = "SAS Init Table Overflow"; 389 break; 390 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 391 desc = "SAS Topology Change List"; 392 break; 393 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 394 desc = "SAS Enclosure Device Status Change"; 395 break; 396 case MPI2_EVENT_IR_VOLUME: 397 desc = "IR Volume"; 398 break; 399 case MPI2_EVENT_IR_PHYSICAL_DISK: 400 desc = "IR Physical Disk"; 401 break; 402 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 403 desc = "IR Configuration Change List"; 404 break; 405 case MPI2_EVENT_LOG_ENTRY_ADDED: 406 desc = "Log Entry Added"; 407 break; 408 } 409 410 if (!desc) 411 return; 412 413 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 414} 415#endif 416 417/** 418 * _base_sas_log_info - verbose translation of firmware log info 419 * @ioc: pointer to scsi command object 420 * @log_info: log info 421 * 422 * Return nothing. 423 */ 424static void 425_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 426{ 427 union loginfo_type { 428 u32 loginfo; 429 struct { 430 u32 subcode:16; 431 u32 code:8; 432 u32 originator:4; 433 u32 bus_type:4; 434 } dw; 435 }; 436 union loginfo_type sas_loginfo; 437 char *originator_str = NULL; 438 439 sas_loginfo.loginfo = log_info; 440 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 441 return; 442 443 /* each nexus loss loginfo */ 444 if (log_info == 0x31170000) 445 return; 446 447 /* eat the loginfos associated with task aborts */ 448 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 449 0x31140000 || log_info == 0x31130000)) 450 return; 451 452 switch (sas_loginfo.dw.originator) { 453 case 0: 454 originator_str = "IOP"; 455 break; 456 case 1: 457 originator_str = "PL"; 458 break; 459 case 2: 460 originator_str = "IR"; 461 break; 462 } 463 464 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 465 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 466 originator_str, sas_loginfo.dw.code, 467 sas_loginfo.dw.subcode); 468} 469 470/** 471 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 472 * @ioc: pointer to scsi command object 473 * @fault_code: fault code 474 * 475 * Return nothing. 476 */ 477void 478mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 479{ 480 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 481 ioc->name, fault_code); 482} 483 484/** 485 * _base_display_reply_info - 486 * @ioc: pointer to scsi command object 487 * @smid: system request message index 488 * @VF_ID: virtual function id 489 * @reply: reply message frame(lower 32bit addr) 490 * 491 * Return nothing. 492 */ 493static void 494_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, 495 u32 reply) 496{ 497 MPI2DefaultReply_t *mpi_reply; 498 u16 ioc_status; 499 500 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 501 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 502#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 503 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 504 (ioc->logging_level & MPT_DEBUG_REPLY)) { 505 _base_sas_ioc_info(ioc , mpi_reply, 506 mpt2sas_base_get_msg_frame(ioc, smid)); 507 } 508#endif 509 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 510 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 511} 512 513/** 514 * mpt2sas_base_done - base internal command completion routine 515 * @ioc: pointer to scsi command object 516 * @smid: system request message index 517 * @VF_ID: virtual function id 518 * @reply: reply message frame(lower 32bit addr) 519 * 520 * Return nothing. 521 */ 522void 523mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply) 524{ 525 MPI2DefaultReply_t *mpi_reply; 526 527 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 528 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 529 return; 530 531 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 532 return; 533 534 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 535 if (mpi_reply) { 536 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 537 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 538 } 539 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 540 complete(&ioc->base_cmds.done); 541} 542 543/** 544 * _base_async_event - main callback handler for firmware asyn events 545 * @ioc: pointer to scsi command object 546 * @VF_ID: virtual function id 547 * @reply: reply message frame(lower 32bit addr) 548 * 549 * Return nothing. 550 */ 551static void 552_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply) 553{ 554 Mpi2EventNotificationReply_t *mpi_reply; 555 Mpi2EventAckRequest_t *ack_request; 556 u16 smid; 557 558 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 559 if (!mpi_reply) 560 return; 561 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 562 return; 563#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 564 _base_display_event_data(ioc, mpi_reply); 565#endif 566 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 567 goto out; 568 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 569 if (!smid) { 570 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 571 ioc->name, __func__); 572 goto out; 573 } 574 575 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 576 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 577 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 578 ack_request->Event = mpi_reply->Event; 579 ack_request->EventContext = mpi_reply->EventContext; 580 ack_request->VF_ID = VF_ID; 581 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 582 583 out: 584 585 /* scsih callback handler */ 586 mpt2sas_scsih_event_callback(ioc, VF_ID, reply); 587 588 /* ctl callback handler */ 589 mpt2sas_ctl_event_callback(ioc, VF_ID, reply); 590} 591 592/** 593 * _base_mask_interrupts - disable interrupts 594 * @ioc: pointer to scsi command object 595 * 596 * Disabling ResetIRQ, Reply and Doorbell Interrupts 597 * 598 * Return nothing. 599 */ 600static void 601_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 602{ 603 u32 him_register; 604 605 ioc->mask_interrupts = 1; 606 him_register = readl(&ioc->chip->HostInterruptMask); 607 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 608 writel(him_register, &ioc->chip->HostInterruptMask); 609 readl(&ioc->chip->HostInterruptMask); 610} 611 612/** 613 * _base_unmask_interrupts - enable interrupts 614 * @ioc: pointer to scsi command object 615 * 616 * Enabling only Reply Interrupts 617 * 618 * Return nothing. 619 */ 620static void 621_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 622{ 623 u32 him_register; 624 625 writel(0, &ioc->chip->HostInterruptStatus); 626 him_register = readl(&ioc->chip->HostInterruptMask); 627 him_register &= ~MPI2_HIM_RIM; 628 writel(him_register, &ioc->chip->HostInterruptMask); 629 ioc->mask_interrupts = 0; 630} 631 632/** 633 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 634 * @irq: irq number (not used) 635 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 636 * @r: pt_regs pointer (not used) 637 * 638 * Return IRQ_HANDLE if processed, else IRQ_NONE. 639 */ 640static irqreturn_t 641_base_interrupt(int irq, void *bus_id) 642{ 643 union reply_descriptor { 644 u64 word; 645 struct { 646 u32 low; 647 u32 high; 648 } u; 649 }; 650 union reply_descriptor rd; 651 u32 post_index, post_index_next, completed_cmds; 652 u8 request_desript_type; 653 u16 smid; 654 u8 cb_idx; 655 u32 reply; 656 u8 VF_ID; 657 int i; 658 struct MPT2SAS_ADAPTER *ioc = bus_id; 659 660 if (ioc->mask_interrupts) 661 return IRQ_NONE; 662 663 post_index = ioc->reply_post_host_index; 664 request_desript_type = ioc->reply_post_free[post_index]. 665 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 666 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 667 return IRQ_NONE; 668 669 completed_cmds = 0; 670 do { 671 rd.word = ioc->reply_post_free[post_index].Words; 672 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 673 goto out; 674 reply = 0; 675 cb_idx = 0xFF; 676 smid = le16_to_cpu(ioc->reply_post_free[post_index]. 677 Default.DescriptorTypeDependent1); 678 VF_ID = ioc->reply_post_free[post_index]. 679 Default.VF_ID; 680 if (request_desript_type == 681 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 682 reply = le32_to_cpu(ioc->reply_post_free[post_index]. 683 AddressReply.ReplyFrameAddress); 684 } else if (request_desript_type == 685 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 686 goto next; 687 else if (request_desript_type == 688 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 689 goto next; 690 if (smid) 691 cb_idx = ioc->scsi_lookup[smid - 1].cb_idx; 692 if (smid && cb_idx != 0xFF) { 693 mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply); 694 if (reply) 695 _base_display_reply_info(ioc, smid, VF_ID, 696 reply); 697 mpt2sas_base_free_smid(ioc, smid); 698 } 699 if (!smid) 700 _base_async_event(ioc, VF_ID, reply); 701 702 /* reply free queue handling */ 703 if (reply) { 704 ioc->reply_free_host_index = 705 (ioc->reply_free_host_index == 706 (ioc->reply_free_queue_depth - 1)) ? 707 0 : ioc->reply_free_host_index + 1; 708 ioc->reply_free[ioc->reply_free_host_index] = 709 cpu_to_le32(reply); 710 writel(ioc->reply_free_host_index, 711 &ioc->chip->ReplyFreeHostIndex); 712 wmb(); 713 } 714 715 next: 716 post_index_next = (post_index == (ioc->reply_post_queue_depth - 717 1)) ? 0 : post_index + 1; 718 request_desript_type = 719 ioc->reply_post_free[post_index_next].Default.ReplyFlags 720 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 721 completed_cmds++; 722 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 723 goto out; 724 post_index = post_index_next; 725 } while (1); 726 727 out: 728 729 if (!completed_cmds) 730 return IRQ_NONE; 731 732 /* reply post descriptor handling */ 733 post_index_next = ioc->reply_post_host_index; 734 for (i = 0 ; i < completed_cmds; i++) { 735 post_index = post_index_next; 736 /* poison the reply post descriptor */ 737 ioc->reply_post_free[post_index_next].Words = ULLONG_MAX; 738 post_index_next = (post_index == 739 (ioc->reply_post_queue_depth - 1)) 740 ? 0 : post_index + 1; 741 } 742 ioc->reply_post_host_index = post_index_next; 743 writel(post_index_next, &ioc->chip->ReplyPostHostIndex); 744 wmb(); 745 return IRQ_HANDLED; 746} 747 748/** 749 * mpt2sas_base_release_callback_handler - clear interupt callback handler 750 * @cb_idx: callback index 751 * 752 * Return nothing. 753 */ 754void 755mpt2sas_base_release_callback_handler(u8 cb_idx) 756{ 757 mpt_callbacks[cb_idx] = NULL; 758} 759 760/** 761 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 762 * @cb_func: callback function 763 * 764 * Returns cb_func. 765 */ 766u8 767mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 768{ 769 u8 cb_idx; 770 771 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 772 if (mpt_callbacks[cb_idx] == NULL) 773 break; 774 775 mpt_callbacks[cb_idx] = cb_func; 776 return cb_idx; 777} 778 779/** 780 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 781 * 782 * Return nothing. 783 */ 784void 785mpt2sas_base_initialize_callback_handler(void) 786{ 787 u8 cb_idx; 788 789 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 790 mpt2sas_base_release_callback_handler(cb_idx); 791} 792 793/** 794 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 795 * @ioc: per adapter object 796 * @paddr: virtual address for SGE 797 * 798 * Create a zero length scatter gather entry to insure the IOCs hardware has 799 * something to use if the target device goes brain dead and tries 800 * to send data even when none is asked for. 801 * 802 * Return nothing. 803 */ 804void 805mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 806{ 807 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 808 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 809 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 810 MPI2_SGE_FLAGS_SHIFT); 811 ioc->base_add_sg_single(paddr, flags_length, -1); 812} 813 814/** 815 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 816 * @paddr: virtual address for SGE 817 * @flags_length: SGE flags and data transfer length 818 * @dma_addr: Physical address 819 * 820 * Return nothing. 821 */ 822static void 823_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 824{ 825 Mpi2SGESimple32_t *sgel = paddr; 826 827 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 828 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 829 sgel->FlagsLength = cpu_to_le32(flags_length); 830 sgel->Address = cpu_to_le32(dma_addr); 831} 832 833 834/** 835 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 836 * @paddr: virtual address for SGE 837 * @flags_length: SGE flags and data transfer length 838 * @dma_addr: Physical address 839 * 840 * Return nothing. 841 */ 842static void 843_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 844{ 845 Mpi2SGESimple64_t *sgel = paddr; 846 847 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 848 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 849 sgel->FlagsLength = cpu_to_le32(flags_length); 850 sgel->Address = cpu_to_le64(dma_addr); 851} 852 853#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 854 855/** 856 * _base_config_dma_addressing - set dma addressing 857 * @ioc: per adapter object 858 * @pdev: PCI device struct 859 * 860 * Returns 0 for success, non-zero for failure. 861 */ 862static int 863_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 864{ 865 struct sysinfo s; 866 char *desc = NULL; 867 868 if (sizeof(dma_addr_t) > 4) { 869 const uint64_t required_mask = 870 dma_get_required_mask(&pdev->dev); 871 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 872 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 873 DMA_BIT_MASK(64))) { 874 ioc->base_add_sg_single = &_base_add_sg_single_64; 875 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 876 desc = "64"; 877 goto out; 878 } 879 } 880 881 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 882 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 883 ioc->base_add_sg_single = &_base_add_sg_single_32; 884 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 885 desc = "32"; 886 } else 887 return -ENODEV; 888 889 out: 890 si_meminfo(&s); 891 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 892 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 893 894 return 0; 895} 896 897/** 898 * _base_save_msix_table - backup msix vector table 899 * @ioc: per adapter object 900 * 901 * This address an errata where diag reset clears out the table 902 */ 903static void 904_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 905{ 906 int i; 907 908 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 909 return; 910 911 for (i = 0; i < ioc->msix_vector_count; i++) 912 ioc->msix_table_backup[i] = ioc->msix_table[i]; 913} 914 915/** 916 * _base_restore_msix_table - this restores the msix vector table 917 * @ioc: per adapter object 918 * 919 */ 920static void 921_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 922{ 923 int i; 924 925 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 926 return; 927 928 for (i = 0; i < ioc->msix_vector_count; i++) 929 ioc->msix_table[i] = ioc->msix_table_backup[i]; 930} 931 932/** 933 * _base_check_enable_msix - checks MSIX capabable. 934 * @ioc: per adapter object 935 * 936 * Check to see if card is capable of MSIX, and set number 937 * of avaliable msix vectors 938 */ 939static int 940_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 941{ 942 int base; 943 u16 message_control; 944 u32 msix_table_offset; 945 946 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 947 if (!base) { 948 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 949 "supported\n", ioc->name)); 950 return -EINVAL; 951 } 952 953 /* get msix vector count */ 954 pci_read_config_word(ioc->pdev, base + 2, &message_control); 955 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 956 957 /* get msix table */ 958 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 959 msix_table_offset &= 0xFFFFFFF8; 960 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 961 962 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 963 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 964 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 965 return 0; 966} 967 968/** 969 * _base_disable_msix - disables msix 970 * @ioc: per adapter object 971 * 972 */ 973static void 974_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 975{ 976 if (ioc->msix_enable) { 977 pci_disable_msix(ioc->pdev); 978 kfree(ioc->msix_table_backup); 979 ioc->msix_table_backup = NULL; 980 ioc->msix_enable = 0; 981 } 982} 983 984/** 985 * _base_enable_msix - enables msix, failback to io_apic 986 * @ioc: per adapter object 987 * 988 */ 989static int 990_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 991{ 992 struct msix_entry entries; 993 int r; 994 u8 try_msix = 0; 995 996 if (msix_disable == -1 || msix_disable == 0) 997 try_msix = 1; 998 999 if (!try_msix) 1000 goto try_ioapic; 1001 1002 if (_base_check_enable_msix(ioc) != 0) 1003 goto try_ioapic; 1004 1005 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1006 sizeof(u32), GFP_KERNEL); 1007 if (!ioc->msix_table_backup) { 1008 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1009 "msix_table_backup failed!!!\n", ioc->name)); 1010 goto try_ioapic; 1011 } 1012 1013 memset(&entries, 0, sizeof(struct msix_entry)); 1014 r = pci_enable_msix(ioc->pdev, &entries, 1); 1015 if (r) { 1016 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1017 "failed (r=%d) !!!\n", ioc->name, r)); 1018 goto try_ioapic; 1019 } 1020 1021 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1022 ioc->name, ioc); 1023 if (r) { 1024 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1025 "interrupt %d !!!\n", ioc->name, entries.vector)); 1026 pci_disable_msix(ioc->pdev); 1027 goto try_ioapic; 1028 } 1029 1030 ioc->pci_irq = entries.vector; 1031 ioc->msix_enable = 1; 1032 return 0; 1033 1034/* failback to io_apic interrupt routing */ 1035 try_ioapic: 1036 1037 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1038 ioc->name, ioc); 1039 if (r) { 1040 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1041 ioc->name, ioc->pdev->irq); 1042 r = -EBUSY; 1043 goto out_fail; 1044 } 1045 1046 ioc->pci_irq = ioc->pdev->irq; 1047 return 0; 1048 1049 out_fail: 1050 return r; 1051} 1052 1053/** 1054 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1055 * @ioc: per adapter object 1056 * 1057 * Returns 0 for success, non-zero for failure. 1058 */ 1059int 1060mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1061{ 1062 struct pci_dev *pdev = ioc->pdev; 1063 u32 memap_sz; 1064 u32 pio_sz; 1065 int i, r = 0; 1066 1067 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1068 ioc->name, __func__)); 1069 1070 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1071 if (pci_enable_device_mem(pdev)) { 1072 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1073 "failed\n", ioc->name); 1074 return -ENODEV; 1075 } 1076 1077 1078 if (pci_request_selected_regions(pdev, ioc->bars, 1079 MPT2SAS_DRIVER_NAME)) { 1080 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1081 "failed\n", ioc->name); 1082 r = -ENODEV; 1083 goto out_fail; 1084 } 1085 1086 pci_set_master(pdev); 1087 1088 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1089 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1090 ioc->name, pci_name(pdev)); 1091 r = -ENODEV; 1092 goto out_fail; 1093 } 1094 1095 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1096 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1097 if (pio_sz) 1098 continue; 1099 ioc->pio_chip = pci_resource_start(pdev, i); 1100 pio_sz = pci_resource_len(pdev, i); 1101 } else { 1102 if (memap_sz) 1103 continue; 1104 ioc->chip_phys = pci_resource_start(pdev, i); 1105 memap_sz = pci_resource_len(pdev, i); 1106 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1107 if (ioc->chip == NULL) { 1108 printk(MPT2SAS_ERR_FMT "unable to map adapter " 1109 "memory!\n", ioc->name); 1110 r = -EINVAL; 1111 goto out_fail; 1112 } 1113 } 1114 } 1115 1116 pci_set_drvdata(pdev, ioc->shost); 1117 _base_mask_interrupts(ioc); 1118 r = _base_enable_msix(ioc); 1119 if (r) 1120 goto out_fail; 1121 1122 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1123 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1124 "IO-APIC enabled"), ioc->pci_irq); 1125 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1126 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1127 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1128 ioc->name, ioc->pio_chip, pio_sz); 1129 1130 return 0; 1131 1132 out_fail: 1133 if (ioc->chip_phys) 1134 iounmap(ioc->chip); 1135 ioc->chip_phys = 0; 1136 ioc->pci_irq = -1; 1137 pci_release_selected_regions(ioc->pdev, ioc->bars); 1138 pci_disable_device(pdev); 1139 pci_set_drvdata(pdev, NULL); 1140 return r; 1141} 1142 1143/** 1144 * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr 1145 * @ioc: per adapter object 1146 * @smid: system request message index(smid zero is invalid) 1147 * 1148 * Returns phys pointer to message frame. 1149 */ 1150dma_addr_t 1151mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1152{ 1153 return ioc->request_dma + (smid * ioc->request_sz); 1154} 1155 1156/** 1157 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1158 * @ioc: per adapter object 1159 * @smid: system request message index(smid zero is invalid) 1160 * 1161 * Returns virt pointer to message frame. 1162 */ 1163void * 1164mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1165{ 1166 return (void *)(ioc->request + (smid * ioc->request_sz)); 1167} 1168 1169/** 1170 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1171 * @ioc: per adapter object 1172 * @smid: system request message index 1173 * 1174 * Returns virt pointer to sense buffer. 1175 */ 1176void * 1177mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1178{ 1179 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1180} 1181 1182/** 1183 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1184 * @ioc: per adapter object 1185 * @smid: system request message index 1186 * 1187 * Returns phys pointer to sense buffer. 1188 */ 1189dma_addr_t 1190mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1191{ 1192 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE); 1193} 1194 1195/** 1196 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1197 * @ioc: per adapter object 1198 * @phys_addr: lower 32 physical addr of the reply 1199 * 1200 * Converts 32bit lower physical addr into a virt address. 1201 */ 1202void * 1203mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1204{ 1205 if (!phys_addr) 1206 return NULL; 1207 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1208} 1209 1210/** 1211 * mpt2sas_base_get_smid - obtain a free smid 1212 * @ioc: per adapter object 1213 * @cb_idx: callback index 1214 * 1215 * Returns smid (zero is invalid) 1216 */ 1217u16 1218mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1219{ 1220 unsigned long flags; 1221 struct request_tracker *request; 1222 u16 smid; 1223 1224 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1225 if (list_empty(&ioc->free_list)) { 1226 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1227 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1228 ioc->name, __func__); 1229 return 0; 1230 } 1231 1232 request = list_entry(ioc->free_list.next, 1233 struct request_tracker, tracker_list); 1234 request->cb_idx = cb_idx; 1235 smid = request->smid; 1236 list_del(&request->tracker_list); 1237 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1238 return smid; 1239} 1240 1241 1242/** 1243 * mpt2sas_base_free_smid - put smid back on free_list 1244 * @ioc: per adapter object 1245 * @smid: system request message index 1246 * 1247 * Return nothing. 1248 */ 1249void 1250mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1251{ 1252 unsigned long flags; 1253 1254 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1255 ioc->scsi_lookup[smid - 1].cb_idx = 0xFF; 1256 list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list, 1257 &ioc->free_list); 1258 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1259 1260 /* 1261 * See _wait_for_commands_to_complete() call with regards to this code. 1262 */ 1263 if (ioc->shost_recovery && ioc->pending_io_count) { 1264 if (ioc->pending_io_count == 1) 1265 wake_up(&ioc->reset_wq); 1266 ioc->pending_io_count--; 1267 } 1268} 1269 1270/** 1271 * _base_writeq - 64 bit write to MMIO 1272 * @ioc: per adapter object 1273 * @b: data payload 1274 * @addr: address in MMIO space 1275 * @writeq_lock: spin lock 1276 * 1277 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1278 * care of 32 bit environment where its not quarenteed to send the entire word 1279 * in one transfer. 1280 */ 1281#ifndef writeq 1282static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1283 spinlock_t *writeq_lock) 1284{ 1285 unsigned long flags; 1286 __u64 data_out = cpu_to_le64(b); 1287 1288 spin_lock_irqsave(writeq_lock, flags); 1289 writel((u32)(data_out), addr); 1290 writel((u32)(data_out >> 32), (addr + 4)); 1291 spin_unlock_irqrestore(writeq_lock, flags); 1292} 1293#else 1294static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1295 spinlock_t *writeq_lock) 1296{ 1297 writeq(cpu_to_le64(b), addr); 1298} 1299#endif 1300 1301/** 1302 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1303 * @ioc: per adapter object 1304 * @smid: system request message index 1305 * @vf_id: virtual function id 1306 * @handle: device handle 1307 * 1308 * Return nothing. 1309 */ 1310void 1311mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id, 1312 u16 handle) 1313{ 1314 Mpi2RequestDescriptorUnion_t descriptor; 1315 u64 *request = (u64 *)&descriptor; 1316 1317 1318 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1319 descriptor.SCSIIO.VF_ID = vf_id; 1320 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1321 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1322 descriptor.SCSIIO.LMID = 0; 1323 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1324 &ioc->scsi_lookup_lock); 1325} 1326 1327 1328/** 1329 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1330 * @ioc: per adapter object 1331 * @smid: system request message index 1332 * @vf_id: virtual function id 1333 * 1334 * Return nothing. 1335 */ 1336void 1337mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1338 u8 vf_id) 1339{ 1340 Mpi2RequestDescriptorUnion_t descriptor; 1341 u64 *request = (u64 *)&descriptor; 1342 1343 descriptor.HighPriority.RequestFlags = 1344 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1345 descriptor.HighPriority.VF_ID = vf_id; 1346 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1347 descriptor.HighPriority.LMID = 0; 1348 descriptor.HighPriority.Reserved1 = 0; 1349 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1350 &ioc->scsi_lookup_lock); 1351} 1352 1353/** 1354 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1355 * @ioc: per adapter object 1356 * @smid: system request message index 1357 * @vf_id: virtual function id 1358 * 1359 * Return nothing. 1360 */ 1361void 1362mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id) 1363{ 1364 Mpi2RequestDescriptorUnion_t descriptor; 1365 u64 *request = (u64 *)&descriptor; 1366 1367 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1368 descriptor.Default.VF_ID = vf_id; 1369 descriptor.Default.SMID = cpu_to_le16(smid); 1370 descriptor.Default.LMID = 0; 1371 descriptor.Default.DescriptorTypeDependent = 0; 1372 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1373 &ioc->scsi_lookup_lock); 1374} 1375 1376/** 1377 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1378 * @ioc: per adapter object 1379 * @smid: system request message index 1380 * @vf_id: virtual function id 1381 * @io_index: value used to track the IO 1382 * 1383 * Return nothing. 1384 */ 1385void 1386mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1387 u8 vf_id, u16 io_index) 1388{ 1389 Mpi2RequestDescriptorUnion_t descriptor; 1390 u64 *request = (u64 *)&descriptor; 1391 1392 descriptor.SCSITarget.RequestFlags = 1393 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1394 descriptor.SCSITarget.VF_ID = vf_id; 1395 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1396 descriptor.SCSITarget.LMID = 0; 1397 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1398 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1399 &ioc->scsi_lookup_lock); 1400} 1401 1402/** 1403 * _base_display_dell_branding - Disply branding string 1404 * @ioc: per adapter object 1405 * 1406 * Return nothing. 1407 */ 1408static void 1409_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1410{ 1411 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1412 1413 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1414 return; 1415 1416 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1417 switch (ioc->pdev->subsystem_device) { 1418 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1419 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1420 MPT2SAS_DELL_BRANDING_SIZE - 1); 1421 break; 1422 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1423 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1424 MPT2SAS_DELL_BRANDING_SIZE - 1); 1425 break; 1426 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1427 strncpy(dell_branding, 1428 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1429 MPT2SAS_DELL_BRANDING_SIZE - 1); 1430 break; 1431 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1432 strncpy(dell_branding, 1433 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1434 MPT2SAS_DELL_BRANDING_SIZE - 1); 1435 break; 1436 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1437 strncpy(dell_branding, 1438 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1439 MPT2SAS_DELL_BRANDING_SIZE - 1); 1440 break; 1441 case MPT2SAS_DELL_PERC_H200_SSDID: 1442 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1443 MPT2SAS_DELL_BRANDING_SIZE - 1); 1444 break; 1445 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1446 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1447 MPT2SAS_DELL_BRANDING_SIZE - 1); 1448 break; 1449 default: 1450 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1451 break; 1452 } 1453 1454 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1455 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1456 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1457 ioc->pdev->subsystem_device); 1458} 1459 1460/** 1461 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1462 * @ioc: per adapter object 1463 * 1464 * Return nothing. 1465 */ 1466static void 1467_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1468{ 1469 int i = 0; 1470 char desc[16]; 1471 u8 revision; 1472 u32 iounit_pg1_flags; 1473 1474 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1475 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1476 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1477 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1478 ioc->name, desc, 1479 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1480 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1481 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1482 ioc->facts.FWVersion.Word & 0x000000FF, 1483 revision, 1484 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1485 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1486 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1487 ioc->bios_pg3.BiosVersion & 0x000000FF); 1488 1489 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1490 1491 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1492 printk("Initiator"); 1493 i++; 1494 } 1495 1496 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1497 printk("%sTarget", i ? "," : ""); 1498 i++; 1499 } 1500 1501 _base_display_dell_branding(ioc); 1502 1503 i = 0; 1504 printk("), "); 1505 printk("Capabilities=("); 1506 1507 if (ioc->facts.IOCCapabilities & 1508 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1509 printk("Raid"); 1510 i++; 1511 } 1512 1513 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1514 printk("%sTLR", i ? "," : ""); 1515 i++; 1516 } 1517 1518 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1519 printk("%sMulticast", i ? "," : ""); 1520 i++; 1521 } 1522 1523 if (ioc->facts.IOCCapabilities & 1524 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1525 printk("%sBIDI Target", i ? "," : ""); 1526 i++; 1527 } 1528 1529 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1530 printk("%sEEDP", i ? "," : ""); 1531 i++; 1532 } 1533 1534 if (ioc->facts.IOCCapabilities & 1535 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1536 printk("%sSnapshot Buffer", i ? "," : ""); 1537 i++; 1538 } 1539 1540 if (ioc->facts.IOCCapabilities & 1541 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1542 printk("%sDiag Trace Buffer", i ? "," : ""); 1543 i++; 1544 } 1545 1546 if (ioc->facts.IOCCapabilities & 1547 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1548 printk("%sTask Set Full", i ? "," : ""); 1549 i++; 1550 } 1551 1552 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1553 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1554 printk("%sNCQ", i ? "," : ""); 1555 i++; 1556 } 1557 1558 printk(")\n"); 1559} 1560 1561/** 1562 * _base_static_config_pages - static start of day config pages 1563 * @ioc: per adapter object 1564 * 1565 * Return nothing. 1566 */ 1567static void 1568_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1569{ 1570 Mpi2ConfigReply_t mpi_reply; 1571 u32 iounit_pg1_flags; 1572 1573 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1574 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1575 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1576 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1577 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1578 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1579 _base_display_ioc_capabilities(ioc); 1580 1581 /* 1582 * Enable task_set_full handling in iounit_pg1 when the 1583 * facts capabilities indicate that its supported. 1584 */ 1585 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1586 if ((ioc->facts.IOCCapabilities & 1587 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1588 iounit_pg1_flags &= 1589 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1590 else 1591 iounit_pg1_flags |= 1592 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1593 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1594 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1); 1595} 1596 1597/** 1598 * _base_release_memory_pools - release memory 1599 * @ioc: per adapter object 1600 * 1601 * Free memory allocated from _base_allocate_memory_pools. 1602 * 1603 * Return nothing. 1604 */ 1605static void 1606_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1607{ 1608 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1609 __func__)); 1610 1611 if (ioc->request) { 1612 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1613 ioc->request, ioc->request_dma); 1614 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1615 ": free\n", ioc->name, ioc->request)); 1616 ioc->request = NULL; 1617 } 1618 1619 if (ioc->sense) { 1620 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1621 if (ioc->sense_dma_pool) 1622 pci_pool_destroy(ioc->sense_dma_pool); 1623 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1624 ": free\n", ioc->name, ioc->sense)); 1625 ioc->sense = NULL; 1626 } 1627 1628 if (ioc->reply) { 1629 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1630 if (ioc->reply_dma_pool) 1631 pci_pool_destroy(ioc->reply_dma_pool); 1632 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1633 ": free\n", ioc->name, ioc->reply)); 1634 ioc->reply = NULL; 1635 } 1636 1637 if (ioc->reply_free) { 1638 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1639 ioc->reply_free_dma); 1640 if (ioc->reply_free_dma_pool) 1641 pci_pool_destroy(ioc->reply_free_dma_pool); 1642 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1643 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1644 ioc->reply_free = NULL; 1645 } 1646 1647 if (ioc->reply_post_free) { 1648 pci_pool_free(ioc->reply_post_free_dma_pool, 1649 ioc->reply_post_free, ioc->reply_post_free_dma); 1650 if (ioc->reply_post_free_dma_pool) 1651 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1652 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1653 "reply_post_free_pool(0x%p): free\n", ioc->name, 1654 ioc->reply_post_free)); 1655 ioc->reply_post_free = NULL; 1656 } 1657 1658 if (ioc->config_page) { 1659 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1660 "config_page(0x%p): free\n", ioc->name, 1661 ioc->config_page)); 1662 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1663 ioc->config_page, ioc->config_page_dma); 1664 } 1665 1666 kfree(ioc->scsi_lookup); 1667} 1668 1669 1670/** 1671 * _base_allocate_memory_pools - allocate start of day memory pools 1672 * @ioc: per adapter object 1673 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1674 * 1675 * Returns 0 success, anything else error 1676 */ 1677static int 1678_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1679{ 1680 Mpi2IOCFactsReply_t *facts; 1681 u32 queue_size, queue_diff; 1682 u16 max_sge_elements; 1683 u16 num_of_reply_frames; 1684 u16 chains_needed_per_io; 1685 u32 sz, total_sz; 1686 u16 i; 1687 u32 retry_sz; 1688 u16 max_request_credit; 1689 1690 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1691 __func__)); 1692 1693 retry_sz = 0; 1694 facts = &ioc->facts; 1695 1696 /* command line tunables for max sgl entries */ 1697 if (max_sgl_entries != -1) { 1698 ioc->shost->sg_tablesize = (max_sgl_entries < 1699 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1700 MPT2SAS_SG_DEPTH; 1701 } else { 1702 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1703 } 1704 1705 /* command line tunables for max controller queue depth */ 1706 if (max_queue_depth != -1) { 1707 max_request_credit = (max_queue_depth < facts->RequestCredit) 1708 ? max_queue_depth : facts->RequestCredit; 1709 } else { 1710 max_request_credit = (facts->RequestCredit > 1711 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1712 facts->RequestCredit; 1713 } 1714 ioc->request_depth = max_request_credit; 1715 1716 /* request frame size */ 1717 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1718 1719 /* reply frame size */ 1720 ioc->reply_sz = facts->ReplyFrameSize * 4; 1721 1722 retry_allocation: 1723 total_sz = 0; 1724 /* calculate number of sg elements left over in the 1st frame */ 1725 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1726 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1727 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1728 1729 /* now do the same for a chain buffer */ 1730 max_sge_elements = ioc->request_sz - ioc->sge_size; 1731 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1732 1733 ioc->chain_offset_value_for_main_message = 1734 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1735 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1736 1737 /* 1738 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1739 */ 1740 chains_needed_per_io = ((ioc->shost->sg_tablesize - 1741 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 1742 + 1; 1743 if (chains_needed_per_io > facts->MaxChainDepth) { 1744 chains_needed_per_io = facts->MaxChainDepth; 1745 ioc->shost->sg_tablesize = min_t(u16, 1746 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 1747 * chains_needed_per_io), ioc->shost->sg_tablesize); 1748 } 1749 ioc->chains_needed_per_io = chains_needed_per_io; 1750 1751 /* reply free queue sizing - taking into account for events */ 1752 num_of_reply_frames = ioc->request_depth + 32; 1753 1754 /* number of replies frames can't be a multiple of 16 */ 1755 /* decrease number of reply frames by 1 */ 1756 if (!(num_of_reply_frames % 16)) 1757 num_of_reply_frames--; 1758 1759 /* calculate number of reply free queue entries 1760 * (must be multiple of 16) 1761 */ 1762 1763 /* (we know reply_free_queue_depth is not a multiple of 16) */ 1764 queue_size = num_of_reply_frames; 1765 queue_size += 16 - (queue_size % 16); 1766 ioc->reply_free_queue_depth = queue_size; 1767 1768 /* reply descriptor post queue sizing */ 1769 /* this size should be the number of request frames + number of reply 1770 * frames 1771 */ 1772 1773 queue_size = ioc->request_depth + num_of_reply_frames + 1; 1774 /* round up to 16 byte boundary */ 1775 if (queue_size % 16) 1776 queue_size += 16 - (queue_size % 16); 1777 1778 /* check against IOC maximum reply post queue depth */ 1779 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 1780 queue_diff = queue_size - 1781 facts->MaxReplyDescriptorPostQueueDepth; 1782 1783 /* round queue_diff up to multiple of 16 */ 1784 if (queue_diff % 16) 1785 queue_diff += 16 - (queue_diff % 16); 1786 1787 /* adjust request_depth, reply_free_queue_depth, 1788 * and queue_size 1789 */ 1790 ioc->request_depth -= queue_diff; 1791 ioc->reply_free_queue_depth -= queue_diff; 1792 queue_size -= queue_diff; 1793 } 1794 ioc->reply_post_queue_depth = queue_size; 1795 1796 /* max scsi host queue depth */ 1797 ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT; 1798 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth" 1799 "(%d)\n", ioc->name, ioc->shost->can_queue)); 1800 1801 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 1802 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 1803 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 1804 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 1805 ioc->chains_needed_per_io)); 1806 1807 /* contiguous pool for request and chains, 16 byte align, one extra " 1808 * "frame for smid=0 1809 */ 1810 ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth; 1811 sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz); 1812 1813 ioc->request_dma_sz = sz; 1814 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 1815 if (!ioc->request) { 1816 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1817 "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1818 "total(%d kB)\n", ioc->name, ioc->request_depth, 1819 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1820 if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH) 1821 goto out; 1822 retry_sz += 64; 1823 ioc->request_depth = max_request_credit - retry_sz; 1824 goto retry_allocation; 1825 } 1826 1827 if (retry_sz) 1828 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1829 "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1830 "total(%d kb)\n", ioc->name, ioc->request_depth, 1831 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1832 1833 ioc->chain = ioc->request + ((ioc->request_depth + 1) * 1834 ioc->request_sz); 1835 ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) * 1836 ioc->request_sz); 1837 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 1838 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 1839 ioc->request, ioc->request_depth, ioc->request_sz, 1840 ((ioc->request_depth + 1) * ioc->request_sz)/1024)); 1841 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 1842 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 1843 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 1844 ioc->request_sz))/1024)); 1845 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 1846 ioc->name, (unsigned long long) ioc->request_dma)); 1847 total_sz += sz; 1848 1849 ioc->scsi_lookup = kcalloc(ioc->request_depth, 1850 sizeof(struct request_tracker), GFP_KERNEL); 1851 if (!ioc->scsi_lookup) { 1852 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n", 1853 ioc->name); 1854 goto out; 1855 } 1856 1857 /* initialize some bits */ 1858 for (i = 0; i < ioc->request_depth; i++) 1859 ioc->scsi_lookup[i].smid = i + 1; 1860 1861 /* sense buffers, 4 byte align */ 1862 sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE; 1863 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 1864 0); 1865 if (!ioc->sense_dma_pool) { 1866 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 1867 ioc->name); 1868 goto out; 1869 } 1870 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 1871 &ioc->sense_dma); 1872 if (!ioc->sense) { 1873 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 1874 ioc->name); 1875 goto out; 1876 } 1877 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 1878 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 1879 "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth, 1880 SCSI_SENSE_BUFFERSIZE, sz/1024)); 1881 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 1882 ioc->name, (unsigned long long)ioc->sense_dma)); 1883 total_sz += sz; 1884 1885 /* reply pool, 4 byte align */ 1886 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 1887 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 1888 0); 1889 if (!ioc->reply_dma_pool) { 1890 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 1891 ioc->name); 1892 goto out; 1893 } 1894 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 1895 &ioc->reply_dma); 1896 if (!ioc->reply) { 1897 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 1898 ioc->name); 1899 goto out; 1900 } 1901 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 1902 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 1903 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 1904 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 1905 ioc->name, (unsigned long long)ioc->reply_dma)); 1906 total_sz += sz; 1907 1908 /* reply free queue, 16 byte align */ 1909 sz = ioc->reply_free_queue_depth * 4; 1910 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 1911 ioc->pdev, sz, 16, 0); 1912 if (!ioc->reply_free_dma_pool) { 1913 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 1914 "failed\n", ioc->name); 1915 goto out; 1916 } 1917 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 1918 &ioc->reply_free_dma); 1919 if (!ioc->reply_free) { 1920 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 1921 "failed\n", ioc->name); 1922 goto out; 1923 } 1924 memset(ioc->reply_free, 0, sz); 1925 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 1926 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 1927 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 1928 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 1929 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 1930 total_sz += sz; 1931 1932 /* reply post queue, 16 byte align */ 1933 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 1934 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 1935 ioc->pdev, sz, 16, 0); 1936 if (!ioc->reply_post_free_dma_pool) { 1937 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 1938 "failed\n", ioc->name); 1939 goto out; 1940 } 1941 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 1942 GFP_KERNEL, &ioc->reply_post_free_dma); 1943 if (!ioc->reply_post_free) { 1944 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 1945 "failed\n", ioc->name); 1946 goto out; 1947 } 1948 memset(ioc->reply_post_free, 0, sz); 1949 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 1950 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 1951 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 1952 sz/1024)); 1953 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 1954 "(0x%llx)\n", ioc->name, (unsigned long long) 1955 ioc->reply_post_free_dma)); 1956 total_sz += sz; 1957 1958 ioc->config_page_sz = 512; 1959 ioc->config_page = pci_alloc_consistent(ioc->pdev, 1960 ioc->config_page_sz, &ioc->config_page_dma); 1961 if (!ioc->config_page) { 1962 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 1963 "failed\n", ioc->name); 1964 goto out; 1965 } 1966 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 1967 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 1968 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 1969 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 1970 total_sz += ioc->config_page_sz; 1971 1972 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 1973 ioc->name, total_sz/1024); 1974 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 1975 "Max Controller Queue Depth(%d)\n", 1976 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 1977 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 1978 ioc->name, ioc->shost->sg_tablesize); 1979 return 0; 1980 1981 out: 1982 _base_release_memory_pools(ioc); 1983 return -ENOMEM; 1984} 1985 1986 1987/** 1988 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 1989 * @ioc: Pointer to MPT_ADAPTER structure 1990 * @cooked: Request raw or cooked IOC state 1991 * 1992 * Returns all IOC Doorbell register bits if cooked==0, else just the 1993 * Doorbell bits in MPI_IOC_STATE_MASK. 1994 */ 1995u32 1996mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 1997{ 1998 u32 s, sc; 1999 2000 s = readl(&ioc->chip->Doorbell); 2001 sc = s & MPI2_IOC_STATE_MASK; 2002 return cooked ? sc : s; 2003} 2004 2005/** 2006 * _base_wait_on_iocstate - waiting on a particular ioc state 2007 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2008 * @timeout: timeout in second 2009 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2010 * 2011 * Returns 0 for success, non-zero for failure. 2012 */ 2013static int 2014_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2015 int sleep_flag) 2016{ 2017 u32 count, cntdn; 2018 u32 current_state; 2019 2020 count = 0; 2021 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2022 do { 2023 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2024 if (current_state == ioc_state) 2025 return 0; 2026 if (count && current_state == MPI2_IOC_STATE_FAULT) 2027 break; 2028 if (sleep_flag == CAN_SLEEP) 2029 msleep(1); 2030 else 2031 udelay(500); 2032 count++; 2033 } while (--cntdn); 2034 2035 return current_state; 2036} 2037 2038/** 2039 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2040 * a write to the doorbell) 2041 * @ioc: per adapter object 2042 * @timeout: timeout in second 2043 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2044 * 2045 * Returns 0 for success, non-zero for failure. 2046 * 2047 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2048 */ 2049static int 2050_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2051 int sleep_flag) 2052{ 2053 u32 cntdn, count; 2054 u32 int_status; 2055 2056 count = 0; 2057 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2058 do { 2059 int_status = readl(&ioc->chip->HostInterruptStatus); 2060 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2061 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2062 "successfull count(%d), timeout(%d)\n", ioc->name, 2063 __func__, count, timeout)); 2064 return 0; 2065 } 2066 if (sleep_flag == CAN_SLEEP) 2067 msleep(1); 2068 else 2069 udelay(500); 2070 count++; 2071 } while (--cntdn); 2072 2073 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2074 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2075 return -EFAULT; 2076} 2077 2078/** 2079 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2080 * @ioc: per adapter object 2081 * @timeout: timeout in second 2082 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2083 * 2084 * Returns 0 for success, non-zero for failure. 2085 * 2086 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2087 * doorbell. 2088 */ 2089static int 2090_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2091 int sleep_flag) 2092{ 2093 u32 cntdn, count; 2094 u32 int_status; 2095 u32 doorbell; 2096 2097 count = 0; 2098 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2099 do { 2100 int_status = readl(&ioc->chip->HostInterruptStatus); 2101 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2102 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2103 "successfull count(%d), timeout(%d)\n", ioc->name, 2104 __func__, count, timeout)); 2105 return 0; 2106 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2107 doorbell = readl(&ioc->chip->Doorbell); 2108 if ((doorbell & MPI2_IOC_STATE_MASK) == 2109 MPI2_IOC_STATE_FAULT) { 2110 mpt2sas_base_fault_info(ioc , doorbell); 2111 return -EFAULT; 2112 } 2113 } else if (int_status == 0xFFFFFFFF) 2114 goto out; 2115 2116 if (sleep_flag == CAN_SLEEP) 2117 msleep(1); 2118 else 2119 udelay(500); 2120 count++; 2121 } while (--cntdn); 2122 2123 out: 2124 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2125 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2126 return -EFAULT; 2127} 2128 2129/** 2130 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2131 * @ioc: per adapter object 2132 * @timeout: timeout in second 2133 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2134 * 2135 * Returns 0 for success, non-zero for failure. 2136 * 2137 */ 2138static int 2139_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2140 int sleep_flag) 2141{ 2142 u32 cntdn, count; 2143 u32 doorbell_reg; 2144 2145 count = 0; 2146 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2147 do { 2148 doorbell_reg = readl(&ioc->chip->Doorbell); 2149 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2150 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2151 "successfull count(%d), timeout(%d)\n", ioc->name, 2152 __func__, count, timeout)); 2153 return 0; 2154 } 2155 if (sleep_flag == CAN_SLEEP) 2156 msleep(1); 2157 else 2158 udelay(500); 2159 count++; 2160 } while (--cntdn); 2161 2162 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2163 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2164 return -EFAULT; 2165} 2166 2167/** 2168 * _base_send_ioc_reset - send doorbell reset 2169 * @ioc: per adapter object 2170 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2171 * @timeout: timeout in second 2172 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2173 * 2174 * Returns 0 for success, non-zero for failure. 2175 */ 2176static int 2177_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2178 int sleep_flag) 2179{ 2180 u32 ioc_state; 2181 int r = 0; 2182 2183 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2184 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2185 ioc->name, __func__); 2186 return -EFAULT; 2187 } 2188 2189 if (!(ioc->facts.IOCCapabilities & 2190 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2191 return -EFAULT; 2192 2193 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2194 2195 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2196 &ioc->chip->Doorbell); 2197 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2198 r = -EFAULT; 2199 goto out; 2200 } 2201 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2202 timeout, sleep_flag); 2203 if (ioc_state) { 2204 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2205 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2206 r = -EFAULT; 2207 goto out; 2208 } 2209 out: 2210 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2211 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2212 return r; 2213} 2214 2215/** 2216 * _base_handshake_req_reply_wait - send request thru doorbell interface 2217 * @ioc: per adapter object 2218 * @request_bytes: request length 2219 * @request: pointer having request payload 2220 * @reply_bytes: reply length 2221 * @reply: pointer to reply payload 2222 * @timeout: timeout in second 2223 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2224 * 2225 * Returns 0 for success, non-zero for failure. 2226 */ 2227static int 2228_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2229 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2230{ 2231 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2232 int i; 2233 u8 failed; 2234 u16 dummy; 2235 u32 *mfp; 2236 2237 /* make sure doorbell is not in use */ 2238 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2239 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2240 " (line=%d)\n", ioc->name, __LINE__); 2241 return -EFAULT; 2242 } 2243 2244 /* clear pending doorbell interrupts from previous state changes */ 2245 if (readl(&ioc->chip->HostInterruptStatus) & 2246 MPI2_HIS_IOC2SYS_DB_STATUS) 2247 writel(0, &ioc->chip->HostInterruptStatus); 2248 2249 /* send message to ioc */ 2250 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2251 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2252 &ioc->chip->Doorbell); 2253 2254 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2255 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2256 "int failed (line=%d)\n", ioc->name, __LINE__); 2257 return -EFAULT; 2258 } 2259 writel(0, &ioc->chip->HostInterruptStatus); 2260 2261 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2262 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2263 "ack failed (line=%d)\n", ioc->name, __LINE__); 2264 return -EFAULT; 2265 } 2266 2267 /* send message 32-bits at a time */ 2268 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2269 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2270 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2271 failed = 1; 2272 } 2273 2274 if (failed) { 2275 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2276 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2277 return -EFAULT; 2278 } 2279 2280 /* now wait for the reply */ 2281 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2282 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2283 "int failed (line=%d)\n", ioc->name, __LINE__); 2284 return -EFAULT; 2285 } 2286 2287 /* read the first two 16-bits, it gives the total length of the reply */ 2288 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2289 & MPI2_DOORBELL_DATA_MASK); 2290 writel(0, &ioc->chip->HostInterruptStatus); 2291 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2292 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2293 "int failed (line=%d)\n", ioc->name, __LINE__); 2294 return -EFAULT; 2295 } 2296 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2297 & MPI2_DOORBELL_DATA_MASK); 2298 writel(0, &ioc->chip->HostInterruptStatus); 2299 2300 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2301 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2302 printk(MPT2SAS_ERR_FMT "doorbell " 2303 "handshake int failed (line=%d)\n", ioc->name, 2304 __LINE__); 2305 return -EFAULT; 2306 } 2307 if (i >= reply_bytes/2) /* overflow case */ 2308 dummy = readl(&ioc->chip->Doorbell); 2309 else 2310 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2311 & MPI2_DOORBELL_DATA_MASK); 2312 writel(0, &ioc->chip->HostInterruptStatus); 2313 } 2314 2315 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2316 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2317 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2318 " (line=%d)\n", ioc->name, __LINE__)); 2319 } 2320 writel(0, &ioc->chip->HostInterruptStatus); 2321 2322 if (ioc->logging_level & MPT_DEBUG_INIT) { 2323 mfp = (u32 *)reply; 2324 printk(KERN_DEBUG "\toffset:data\n"); 2325 for (i = 0; i < reply_bytes/4; i++) 2326 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2327 le32_to_cpu(mfp[i])); 2328 } 2329 return 0; 2330} 2331 2332/** 2333 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2334 * @ioc: per adapter object 2335 * @mpi_reply: the reply payload from FW 2336 * @mpi_request: the request payload sent to FW 2337 * 2338 * The SAS IO Unit Control Request message allows the host to perform low-level 2339 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2340 * to obtain the IOC assigned device handles for a device if it has other 2341 * identifying information about the device, in addition allows the host to 2342 * remove IOC resources associated with the device. 2343 * 2344 * Returns 0 for success, non-zero for failure. 2345 */ 2346int 2347mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2348 Mpi2SasIoUnitControlReply_t *mpi_reply, 2349 Mpi2SasIoUnitControlRequest_t *mpi_request) 2350{ 2351 u16 smid; 2352 u32 ioc_state; 2353 unsigned long timeleft; 2354 u8 issue_reset; 2355 int rc; 2356 void *request; 2357 u16 wait_state_count; 2358 2359 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2360 __func__)); 2361 2362 mutex_lock(&ioc->base_cmds.mutex); 2363 2364 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2365 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2366 ioc->name, __func__); 2367 rc = -EAGAIN; 2368 goto out; 2369 } 2370 2371 wait_state_count = 0; 2372 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2373 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2374 if (wait_state_count++ == 10) { 2375 printk(MPT2SAS_ERR_FMT 2376 "%s: failed due to ioc not operational\n", 2377 ioc->name, __func__); 2378 rc = -EFAULT; 2379 goto out; 2380 } 2381 ssleep(1); 2382 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2383 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2384 "operational state(count=%d)\n", ioc->name, 2385 __func__, wait_state_count); 2386 } 2387 2388 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2389 if (!smid) { 2390 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2391 ioc->name, __func__); 2392 rc = -EAGAIN; 2393 goto out; 2394 } 2395 2396 rc = 0; 2397 ioc->base_cmds.status = MPT2_CMD_PENDING; 2398 request = mpt2sas_base_get_msg_frame(ioc, smid); 2399 ioc->base_cmds.smid = smid; 2400 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2401 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2402 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2403 ioc->ioc_link_reset_in_progress = 1; 2404 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2405 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2406 msecs_to_jiffies(10000)); 2407 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2408 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2409 ioc->ioc_link_reset_in_progress) 2410 ioc->ioc_link_reset_in_progress = 0; 2411 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2412 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2413 ioc->name, __func__); 2414 _debug_dump_mf(mpi_request, 2415 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2416 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2417 issue_reset = 1; 2418 goto issue_host_reset; 2419 } 2420 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2421 memcpy(mpi_reply, ioc->base_cmds.reply, 2422 sizeof(Mpi2SasIoUnitControlReply_t)); 2423 else 2424 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2425 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2426 goto out; 2427 2428 issue_host_reset: 2429 if (issue_reset) 2430 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2431 FORCE_BIG_HAMMER); 2432 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2433 rc = -EFAULT; 2434 out: 2435 mutex_unlock(&ioc->base_cmds.mutex); 2436 return rc; 2437} 2438 2439 2440/** 2441 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2442 * @ioc: per adapter object 2443 * @mpi_reply: the reply payload from FW 2444 * @mpi_request: the request payload sent to FW 2445 * 2446 * The SCSI Enclosure Processor request message causes the IOC to 2447 * communicate with SES devices to control LED status signals. 2448 * 2449 * Returns 0 for success, non-zero for failure. 2450 */ 2451int 2452mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2453 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2454{ 2455 u16 smid; 2456 u32 ioc_state; 2457 unsigned long timeleft; 2458 u8 issue_reset; 2459 int rc; 2460 void *request; 2461 u16 wait_state_count; 2462 2463 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2464 __func__)); 2465 2466 mutex_lock(&ioc->base_cmds.mutex); 2467 2468 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2469 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2470 ioc->name, __func__); 2471 rc = -EAGAIN; 2472 goto out; 2473 } 2474 2475 wait_state_count = 0; 2476 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2477 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2478 if (wait_state_count++ == 10) { 2479 printk(MPT2SAS_ERR_FMT 2480 "%s: failed due to ioc not operational\n", 2481 ioc->name, __func__); 2482 rc = -EFAULT; 2483 goto out; 2484 } 2485 ssleep(1); 2486 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2487 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2488 "operational state(count=%d)\n", ioc->name, 2489 __func__, wait_state_count); 2490 } 2491 2492 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2493 if (!smid) { 2494 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2495 ioc->name, __func__); 2496 rc = -EAGAIN; 2497 goto out; 2498 } 2499 2500 rc = 0; 2501 ioc->base_cmds.status = MPT2_CMD_PENDING; 2502 request = mpt2sas_base_get_msg_frame(ioc, smid); 2503 ioc->base_cmds.smid = smid; 2504 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2505 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2506 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2507 msecs_to_jiffies(10000)); 2508 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2509 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2510 ioc->name, __func__); 2511 _debug_dump_mf(mpi_request, 2512 sizeof(Mpi2SepRequest_t)/4); 2513 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2514 issue_reset = 1; 2515 goto issue_host_reset; 2516 } 2517 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2518 memcpy(mpi_reply, ioc->base_cmds.reply, 2519 sizeof(Mpi2SepReply_t)); 2520 else 2521 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2522 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2523 goto out; 2524 2525 issue_host_reset: 2526 if (issue_reset) 2527 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2528 FORCE_BIG_HAMMER); 2529 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2530 rc = -EFAULT; 2531 out: 2532 mutex_unlock(&ioc->base_cmds.mutex); 2533 return rc; 2534} 2535 2536/** 2537 * _base_get_port_facts - obtain port facts reply and save in ioc 2538 * @ioc: per adapter object 2539 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2540 * 2541 * Returns 0 for success, non-zero for failure. 2542 */ 2543static int 2544_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2545{ 2546 Mpi2PortFactsRequest_t mpi_request; 2547 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2548 int mpi_reply_sz, mpi_request_sz, r; 2549 2550 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2551 __func__)); 2552 2553 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2554 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2555 memset(&mpi_request, 0, mpi_request_sz); 2556 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2557 mpi_request.PortNumber = port; 2558 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2559 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2560 2561 if (r != 0) { 2562 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2563 ioc->name, __func__, r); 2564 return r; 2565 } 2566 2567 pfacts = &ioc->pfacts[port]; 2568 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2569 pfacts->PortNumber = mpi_reply.PortNumber; 2570 pfacts->VP_ID = mpi_reply.VP_ID; 2571 pfacts->VF_ID = mpi_reply.VF_ID; 2572 pfacts->MaxPostedCmdBuffers = 2573 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2574 2575 return 0; 2576} 2577 2578/** 2579 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2580 * @ioc: per adapter object 2581 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2582 * 2583 * Returns 0 for success, non-zero for failure. 2584 */ 2585static int 2586_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2587{ 2588 Mpi2IOCFactsRequest_t mpi_request; 2589 Mpi2IOCFactsReply_t mpi_reply, *facts; 2590 int mpi_reply_sz, mpi_request_sz, r; 2591 2592 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2593 __func__)); 2594 2595 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2596 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2597 memset(&mpi_request, 0, mpi_request_sz); 2598 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2599 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2600 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2601 2602 if (r != 0) { 2603 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2604 ioc->name, __func__, r); 2605 return r; 2606 } 2607 2608 facts = &ioc->facts; 2609 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2610 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2611 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2612 facts->VP_ID = mpi_reply.VP_ID; 2613 facts->VF_ID = mpi_reply.VF_ID; 2614 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2615 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2616 facts->WhoInit = mpi_reply.WhoInit; 2617 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2618 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2619 facts->MaxReplyDescriptorPostQueueDepth = 2620 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2621 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2622 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2623 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2624 ioc->ir_firmware = 1; 2625 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2626 facts->IOCRequestFrameSize = 2627 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2628 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2629 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2630 ioc->shost->max_id = -1; 2631 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2632 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2633 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2634 facts->HighPriorityCredit = 2635 le16_to_cpu(mpi_reply.HighPriorityCredit); 2636 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2637 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2638 2639 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2640 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2641 facts->MaxChainDepth)); 2642 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2643 "reply frame size(%d)\n", ioc->name, 2644 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2645 return 0; 2646} 2647 2648/** 2649 * _base_send_ioc_init - send ioc_init to firmware 2650 * @ioc: per adapter object 2651 * @VF_ID: virtual function id 2652 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2653 * 2654 * Returns 0 for success, non-zero for failure. 2655 */ 2656static int 2657_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2658{ 2659 Mpi2IOCInitRequest_t mpi_request; 2660 Mpi2IOCInitReply_t mpi_reply; 2661 int r; 2662 2663 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2664 __func__)); 2665 2666 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2667 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2668 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2669 mpi_request.VF_ID = VF_ID; 2670 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2671 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2672 2673 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2674 * removed and made reserved. For those with older firmware will need 2675 * this fix. It was decided that the Reply and Request frame sizes are 2676 * the same. 2677 */ 2678 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2679 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2680/* mpi_request.SystemReplyFrameSize = 2681 * cpu_to_le16(ioc->reply_sz); 2682 */ 2683 } 2684 2685 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 2686 mpi_request.ReplyDescriptorPostQueueDepth = 2687 cpu_to_le16(ioc->reply_post_queue_depth); 2688 mpi_request.ReplyFreeQueueDepth = 2689 cpu_to_le16(ioc->reply_free_queue_depth); 2690 2691#if BITS_PER_LONG > 32 2692 mpi_request.SenseBufferAddressHigh = 2693 cpu_to_le32(ioc->sense_dma >> 32); 2694 mpi_request.SystemReplyAddressHigh = 2695 cpu_to_le32(ioc->reply_dma >> 32); 2696 mpi_request.SystemRequestFrameBaseAddress = 2697 cpu_to_le64(ioc->request_dma); 2698 mpi_request.ReplyFreeQueueAddress = 2699 cpu_to_le64(ioc->reply_free_dma); 2700 mpi_request.ReplyDescriptorPostQueueAddress = 2701 cpu_to_le64(ioc->reply_post_free_dma); 2702#else 2703 mpi_request.SystemRequestFrameBaseAddress = 2704 cpu_to_le32(ioc->request_dma); 2705 mpi_request.ReplyFreeQueueAddress = 2706 cpu_to_le32(ioc->reply_free_dma); 2707 mpi_request.ReplyDescriptorPostQueueAddress = 2708 cpu_to_le32(ioc->reply_post_free_dma); 2709#endif 2710 2711 if (ioc->logging_level & MPT_DEBUG_INIT) { 2712 u32 *mfp; 2713 int i; 2714 2715 mfp = (u32 *)&mpi_request; 2716 printk(KERN_DEBUG "\toffset:data\n"); 2717 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 2718 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2719 le32_to_cpu(mfp[i])); 2720 } 2721 2722 r = _base_handshake_req_reply_wait(ioc, 2723 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 2724 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 2725 sleep_flag); 2726 2727 if (r != 0) { 2728 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2729 ioc->name, __func__, r); 2730 return r; 2731 } 2732 2733 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS || 2734 mpi_reply.IOCLogInfo) { 2735 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 2736 r = -EIO; 2737 } 2738 2739 return 0; 2740} 2741 2742/** 2743 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 2744 * @ioc: per adapter object 2745 * @VF_ID: virtual function id 2746 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2747 * 2748 * Returns 0 for success, non-zero for failure. 2749 */ 2750static int 2751_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2752{ 2753 Mpi2PortEnableRequest_t *mpi_request; 2754 u32 ioc_state; 2755 unsigned long timeleft; 2756 int r = 0; 2757 u16 smid; 2758 2759 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 2760 2761 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2762 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2763 ioc->name, __func__); 2764 return -EAGAIN; 2765 } 2766 2767 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2768 if (!smid) { 2769 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2770 ioc->name, __func__); 2771 return -EAGAIN; 2772 } 2773 2774 ioc->base_cmds.status = MPT2_CMD_PENDING; 2775 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2776 ioc->base_cmds.smid = smid; 2777 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 2778 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 2779 mpi_request->VF_ID = VF_ID; 2780 2781 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2782 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2783 300*HZ); 2784 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2785 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2786 ioc->name, __func__); 2787 _debug_dump_mf(mpi_request, 2788 sizeof(Mpi2PortEnableRequest_t)/4); 2789 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2790 r = -EFAULT; 2791 else 2792 r = -ETIME; 2793 goto out; 2794 } else 2795 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2796 ioc->name, __func__)); 2797 2798 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 2799 60, sleep_flag); 2800 if (ioc_state) { 2801 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 2802 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2803 r = -EFAULT; 2804 } 2805 out: 2806 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2807 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 2808 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2809 return r; 2810} 2811 2812/** 2813 * _base_unmask_events - turn on notification for this event 2814 * @ioc: per adapter object 2815 * @event: firmware event 2816 * 2817 * The mask is stored in ioc->event_masks. 2818 */ 2819static void 2820_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 2821{ 2822 u32 desired_event; 2823 2824 if (event >= 128) 2825 return; 2826 2827 desired_event = (1 << (event % 32)); 2828 2829 if (event < 32) 2830 ioc->event_masks[0] &= ~desired_event; 2831 else if (event < 64) 2832 ioc->event_masks[1] &= ~desired_event; 2833 else if (event < 96) 2834 ioc->event_masks[2] &= ~desired_event; 2835 else if (event < 128) 2836 ioc->event_masks[3] &= ~desired_event; 2837} 2838 2839/** 2840 * _base_event_notification - send event notification 2841 * @ioc: per adapter object 2842 * @VF_ID: virtual function id 2843 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2844 * 2845 * Returns 0 for success, non-zero for failure. 2846 */ 2847static int 2848_base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2849{ 2850 Mpi2EventNotificationRequest_t *mpi_request; 2851 unsigned long timeleft; 2852 u16 smid; 2853 int r = 0; 2854 int i; 2855 2856 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2857 __func__)); 2858 2859 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2860 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2861 ioc->name, __func__); 2862 return -EAGAIN; 2863 } 2864 2865 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2866 if (!smid) { 2867 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2868 ioc->name, __func__); 2869 return -EAGAIN; 2870 } 2871 ioc->base_cmds.status = MPT2_CMD_PENDING; 2872 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2873 ioc->base_cmds.smid = smid; 2874 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 2875 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2876 mpi_request->VF_ID = VF_ID; 2877 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2878 mpi_request->EventMasks[i] = 2879 le32_to_cpu(ioc->event_masks[i]); 2880 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2881 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 2882 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2883 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2884 ioc->name, __func__); 2885 _debug_dump_mf(mpi_request, 2886 sizeof(Mpi2EventNotificationRequest_t)/4); 2887 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2888 r = -EFAULT; 2889 else 2890 r = -ETIME; 2891 } else 2892 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2893 ioc->name, __func__)); 2894 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2895 return r; 2896} 2897 2898/** 2899 * mpt2sas_base_validate_event_type - validating event types 2900 * @ioc: per adapter object 2901 * @event: firmware event 2902 * 2903 * This will turn on firmware event notification when application 2904 * ask for that event. We don't mask events that are already enabled. 2905 */ 2906void 2907mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 2908{ 2909 int i, j; 2910 u32 event_mask, desired_event; 2911 u8 send_update_to_fw; 2912 2913 for (i = 0, send_update_to_fw = 0; i < 2914 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 2915 event_mask = ~event_type[i]; 2916 desired_event = 1; 2917 for (j = 0; j < 32; j++) { 2918 if (!(event_mask & desired_event) && 2919 (ioc->event_masks[i] & desired_event)) { 2920 ioc->event_masks[i] &= ~desired_event; 2921 send_update_to_fw = 1; 2922 } 2923 desired_event = (desired_event << 1); 2924 } 2925 } 2926 2927 if (!send_update_to_fw) 2928 return; 2929 2930 mutex_lock(&ioc->base_cmds.mutex); 2931 _base_event_notification(ioc, 0, CAN_SLEEP); 2932 mutex_unlock(&ioc->base_cmds.mutex); 2933} 2934 2935/** 2936 * _base_diag_reset - the "big hammer" start of day reset 2937 * @ioc: per adapter object 2938 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2939 * 2940 * Returns 0 for success, non-zero for failure. 2941 */ 2942static int 2943_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2944{ 2945 u32 host_diagnostic; 2946 u32 ioc_state; 2947 u32 count; 2948 u32 hcb_size; 2949 2950 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 2951 2952 _base_save_msix_table(ioc); 2953 2954 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 2955 ioc->name)); 2956 writel(0, &ioc->chip->HostInterruptStatus); 2957 2958 count = 0; 2959 do { 2960 /* Write magic sequence to WriteSequence register 2961 * Loop until in diagnostic mode 2962 */ 2963 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 2964 "sequence\n", ioc->name)); 2965 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 2966 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 2967 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 2968 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 2969 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 2970 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 2971 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 2972 2973 /* wait 100 msec */ 2974 if (sleep_flag == CAN_SLEEP) 2975 msleep(100); 2976 else 2977 mdelay(100); 2978 2979 if (count++ > 20) 2980 goto out; 2981 2982 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 2983 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 2984 "sequence: count(%d), host_diagnostic(0x%08x)\n", 2985 ioc->name, count, host_diagnostic)); 2986 2987 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 2988 2989 hcb_size = readl(&ioc->chip->HCBSize); 2990 2991 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 2992 ioc->name)); 2993 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 2994 &ioc->chip->HostDiagnostic); 2995 2996 /* don't access any registers for 50 milliseconds */ 2997 msleep(50); 2998 2999 /* 300 second max wait */ 3000 for (count = 0; count < 3000000 ; count++) { 3001 3002 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3003 3004 if (host_diagnostic == 0xFFFFFFFF) 3005 goto out; 3006 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3007 break; 3008 3009 /* wait 100 msec */ 3010 if (sleep_flag == CAN_SLEEP) 3011 msleep(1); 3012 else 3013 mdelay(1); 3014 } 3015 3016 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3017 3018 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3019 "assuming the HCB Address points to good F/W\n", 3020 ioc->name)); 3021 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3022 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3023 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3024 3025 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3026 "re-enable the HCDW\n", ioc->name)); 3027 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3028 &ioc->chip->HCBSize); 3029 } 3030 3031 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3032 ioc->name)); 3033 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3034 &ioc->chip->HostDiagnostic); 3035 3036 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3037 "diagnostic register\n", ioc->name)); 3038 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3039 3040 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3041 "READY state\n", ioc->name)); 3042 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3043 sleep_flag); 3044 if (ioc_state) { 3045 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3046 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3047 goto out; 3048 } 3049 3050 _base_restore_msix_table(ioc); 3051 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3052 return 0; 3053 3054 out: 3055 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3056 return -EFAULT; 3057} 3058 3059/** 3060 * _base_make_ioc_ready - put controller in READY state 3061 * @ioc: per adapter object 3062 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3063 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3064 * 3065 * Returns 0 for success, non-zero for failure. 3066 */ 3067static int 3068_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3069 enum reset_type type) 3070{ 3071 u32 ioc_state; 3072 3073 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3074 __func__)); 3075 3076 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3077 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3078 ioc->name, __func__, ioc_state)); 3079 3080 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3081 return 0; 3082 3083 if (ioc_state & MPI2_DOORBELL_USED) { 3084 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3085 "active!\n", ioc->name)); 3086 goto issue_diag_reset; 3087 } 3088 3089 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3090 mpt2sas_base_fault_info(ioc, ioc_state & 3091 MPI2_DOORBELL_DATA_MASK); 3092 goto issue_diag_reset; 3093 } 3094 3095 if (type == FORCE_BIG_HAMMER) 3096 goto issue_diag_reset; 3097 3098 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3099 if (!(_base_send_ioc_reset(ioc, 3100 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3101 return 0; 3102 3103 issue_diag_reset: 3104 return _base_diag_reset(ioc, CAN_SLEEP); 3105} 3106 3107/** 3108 * _base_make_ioc_operational - put controller in OPERATIONAL state 3109 * @ioc: per adapter object 3110 * @VF_ID: virtual function id 3111 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3112 * 3113 * Returns 0 for success, non-zero for failure. 3114 */ 3115static int 3116_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, 3117 int sleep_flag) 3118{ 3119 int r, i; 3120 unsigned long flags; 3121 u32 reply_address; 3122 3123 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3124 __func__)); 3125 3126 /* initialize the scsi lookup free list */ 3127 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3128 INIT_LIST_HEAD(&ioc->free_list); 3129 for (i = 0; i < ioc->request_depth; i++) { 3130 ioc->scsi_lookup[i].cb_idx = 0xFF; 3131 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3132 &ioc->free_list); 3133 } 3134 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3135 3136 /* initialize Reply Free Queue */ 3137 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3138 i < ioc->reply_free_queue_depth ; i++, reply_address += 3139 ioc->reply_sz) 3140 ioc->reply_free[i] = cpu_to_le32(reply_address); 3141 3142 /* initialize Reply Post Free Queue */ 3143 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3144 ioc->reply_post_free[i].Words = ULLONG_MAX; 3145 3146 r = _base_send_ioc_init(ioc, VF_ID, sleep_flag); 3147 if (r) 3148 return r; 3149 3150 /* initialize the index's */ 3151 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3152 ioc->reply_post_host_index = 0; 3153 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3154 writel(0, &ioc->chip->ReplyPostHostIndex); 3155 3156 _base_unmask_interrupts(ioc); 3157 r = _base_event_notification(ioc, VF_ID, sleep_flag); 3158 if (r) 3159 return r; 3160 3161 if (sleep_flag == CAN_SLEEP) 3162 _base_static_config_pages(ioc); 3163 3164 r = _base_send_port_enable(ioc, VF_ID, sleep_flag); 3165 if (r) 3166 return r; 3167 3168 return r; 3169} 3170 3171/** 3172 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3173 * @ioc: per adapter object 3174 * 3175 * Return nothing. 3176 */ 3177void 3178mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3179{ 3180 struct pci_dev *pdev = ioc->pdev; 3181 3182 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3183 __func__)); 3184 3185 _base_mask_interrupts(ioc); 3186 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3187 if (ioc->pci_irq) { 3188 synchronize_irq(pdev->irq); 3189 free_irq(ioc->pci_irq, ioc); 3190 } 3191 _base_disable_msix(ioc); 3192 if (ioc->chip_phys) 3193 iounmap(ioc->chip); 3194 ioc->pci_irq = -1; 3195 ioc->chip_phys = 0; 3196 pci_release_selected_regions(ioc->pdev, ioc->bars); 3197 pci_disable_device(pdev); 3198 pci_set_drvdata(pdev, NULL); 3199 return; 3200} 3201 3202/** 3203 * mpt2sas_base_attach - attach controller instance 3204 * @ioc: per adapter object 3205 * 3206 * Returns 0 for success, non-zero for failure. 3207 */ 3208int 3209mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3210{ 3211 int r, i; 3212 unsigned long flags; 3213 3214 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3215 __func__)); 3216 3217 r = mpt2sas_base_map_resources(ioc); 3218 if (r) 3219 return r; 3220 3221 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3222 if (r) 3223 goto out_free_resources; 3224 3225 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3226 if (r) 3227 goto out_free_resources; 3228 3229 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3230 if (r) 3231 goto out_free_resources; 3232 3233 init_waitqueue_head(&ioc->reset_wq); 3234 3235 /* base internal command bits */ 3236 mutex_init(&ioc->base_cmds.mutex); 3237 init_completion(&ioc->base_cmds.done); 3238 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3239 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3240 3241 /* transport internal command bits */ 3242 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3243 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3244 mutex_init(&ioc->transport_cmds.mutex); 3245 init_completion(&ioc->transport_cmds.done); 3246 3247 /* task management internal command bits */ 3248 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3249 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3250 mutex_init(&ioc->tm_cmds.mutex); 3251 init_completion(&ioc->tm_cmds.done); 3252 3253 /* config page internal command bits */ 3254 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3255 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3256 mutex_init(&ioc->config_cmds.mutex); 3257 init_completion(&ioc->config_cmds.done); 3258 3259 /* ctl module internal command bits */ 3260 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3261 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3262 mutex_init(&ioc->ctl_cmds.mutex); 3263 init_completion(&ioc->ctl_cmds.done); 3264 3265 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3266 ioc->event_masks[i] = -1; 3267 3268 /* here we enable the events we care about */ 3269 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3270 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3271 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3272 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3273 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3274 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3275 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3276 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3277 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3278 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3279 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3280 3281 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3282 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3283 if (!ioc->pfacts) 3284 goto out_free_resources; 3285 3286 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3287 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3288 if (r) 3289 goto out_free_resources; 3290 } 3291 r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP); 3292 if (r) 3293 goto out_free_resources; 3294 3295 /* initialize fault polling */ 3296 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 3297 snprintf(ioc->fault_reset_work_q_name, 3298 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 3299 ioc->fault_reset_work_q = 3300 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 3301 if (!ioc->fault_reset_work_q) { 3302 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 3303 ioc->name, __func__, __LINE__); 3304 goto out_free_resources; 3305 } 3306 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3307 if (ioc->fault_reset_work_q) 3308 queue_delayed_work(ioc->fault_reset_work_q, 3309 &ioc->fault_reset_work, 3310 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 3311 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3312 return 0; 3313 3314 out_free_resources: 3315 3316 ioc->remove_host = 1; 3317 mpt2sas_base_free_resources(ioc); 3318 _base_release_memory_pools(ioc); 3319 kfree(ioc->tm_cmds.reply); 3320 kfree(ioc->transport_cmds.reply); 3321 kfree(ioc->config_cmds.reply); 3322 kfree(ioc->base_cmds.reply); 3323 kfree(ioc->ctl_cmds.reply); 3324 kfree(ioc->pfacts); 3325 ioc->ctl_cmds.reply = NULL; 3326 ioc->base_cmds.reply = NULL; 3327 ioc->tm_cmds.reply = NULL; 3328 ioc->transport_cmds.reply = NULL; 3329 ioc->config_cmds.reply = NULL; 3330 ioc->pfacts = NULL; 3331 return r; 3332} 3333 3334 3335/** 3336 * mpt2sas_base_detach - remove controller instance 3337 * @ioc: per adapter object 3338 * 3339 * Return nothing. 3340 */ 3341void 3342mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3343{ 3344 unsigned long flags; 3345 struct workqueue_struct *wq; 3346 3347 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3348 __func__)); 3349 3350 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3351 wq = ioc->fault_reset_work_q; 3352 ioc->fault_reset_work_q = NULL; 3353 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3354 if (!cancel_delayed_work(&ioc->fault_reset_work)) 3355 flush_workqueue(wq); 3356 destroy_workqueue(wq); 3357 3358 mpt2sas_base_free_resources(ioc); 3359 _base_release_memory_pools(ioc); 3360 kfree(ioc->pfacts); 3361 kfree(ioc->ctl_cmds.reply); 3362 kfree(ioc->base_cmds.reply); 3363 kfree(ioc->tm_cmds.reply); 3364 kfree(ioc->transport_cmds.reply); 3365 kfree(ioc->config_cmds.reply); 3366} 3367 3368/** 3369 * _base_reset_handler - reset callback handler (for base) 3370 * @ioc: per adapter object 3371 * @reset_phase: phase 3372 * 3373 * The handler for doing any required cleanup or initialization. 3374 * 3375 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3376 * MPT2_IOC_DONE_RESET 3377 * 3378 * Return nothing. 3379 */ 3380static void 3381_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3382{ 3383 switch (reset_phase) { 3384 case MPT2_IOC_PRE_RESET: 3385 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3386 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3387 break; 3388 case MPT2_IOC_AFTER_RESET: 3389 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3390 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3391 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3392 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3393 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3394 complete(&ioc->transport_cmds.done); 3395 } 3396 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3397 ioc->base_cmds.status |= MPT2_CMD_RESET; 3398 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3399 complete(&ioc->base_cmds.done); 3400 } 3401 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3402 ioc->config_cmds.status |= MPT2_CMD_RESET; 3403 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3404 complete(&ioc->config_cmds.done); 3405 } 3406 break; 3407 case MPT2_IOC_DONE_RESET: 3408 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3409 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3410 break; 3411 } 3412 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3413 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3414} 3415 3416/** 3417 * _wait_for_commands_to_complete - reset controller 3418 * @ioc: Pointer to MPT_ADAPTER structure 3419 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3420 * 3421 * This function waiting(3s) for all pending commands to complete 3422 * prior to putting controller in reset. 3423 */ 3424static void 3425_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3426{ 3427 u32 ioc_state; 3428 unsigned long flags; 3429 u16 i; 3430 3431 ioc->pending_io_count = 0; 3432 if (sleep_flag != CAN_SLEEP) 3433 return; 3434 3435 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3436 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3437 return; 3438 3439 /* pending command count */ 3440 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3441 for (i = 0; i < ioc->request_depth; i++) 3442 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3443 ioc->pending_io_count++; 3444 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3445 3446 if (!ioc->pending_io_count) 3447 return; 3448 3449 /* wait for pending commands to complete */ 3450 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3451} 3452 3453/** 3454 * mpt2sas_base_hard_reset_handler - reset controller 3455 * @ioc: Pointer to MPT_ADAPTER structure 3456 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3457 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3458 * 3459 * Returns 0 for success, non-zero for failure. 3460 */ 3461int 3462mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3463 enum reset_type type) 3464{ 3465 int r, i; 3466 unsigned long flags; 3467 3468 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3469 __func__)); 3470 3471 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3472 if (ioc->ioc_reset_in_progress) { 3473 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3474 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3475 ioc->name, __func__); 3476 return -EBUSY; 3477 } 3478 ioc->ioc_reset_in_progress = 1; 3479 ioc->shost_recovery = 1; 3480 if (ioc->shost->shost_state == SHOST_RUNNING) { 3481 /* set back to SHOST_RUNNING in mpt2sas_scsih.c */ 3482 scsi_host_set_state(ioc->shost, SHOST_RECOVERY); 3483 printk(MPT2SAS_INFO_FMT "putting controller into " 3484 "SHOST_RECOVERY\n", ioc->name); 3485 } 3486 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3487 3488 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3489 _wait_for_commands_to_complete(ioc, sleep_flag); 3490 _base_mask_interrupts(ioc); 3491 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3492 if (r) 3493 goto out; 3494 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3495 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) 3496 r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID, 3497 sleep_flag); 3498 if (!r) 3499 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3500 out: 3501 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3502 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3503 3504 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3505 ioc->ioc_reset_in_progress = 0; 3506 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3507 return r; 3508} 3509