mpt2sas_base.c revision cd4e12e8ad246ec5bc23ab04d0da0e6985025620
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2008 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60 61#include "mpt2sas_base.h" 62 63static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 64 65#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 66#define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */ 67 68static int max_queue_depth = -1; 69module_param(max_queue_depth, int, 0); 70MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 71 72static int max_sgl_entries = -1; 73module_param(max_sgl_entries, int, 0); 74MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 75 76static int msix_disable = -1; 77module_param(msix_disable, int, 0); 78MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 79 80/** 81 * _base_fault_reset_work - workq handling ioc fault conditions 82 * @work: input argument, used to derive ioc 83 * Context: sleep. 84 * 85 * Return nothing. 86 */ 87static void 88_base_fault_reset_work(struct work_struct *work) 89{ 90 struct MPT2SAS_ADAPTER *ioc = 91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 92 unsigned long flags; 93 u32 doorbell; 94 int rc; 95 96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 97 if (ioc->ioc_reset_in_progress) 98 goto rearm_timer; 99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 100 101 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 104 FORCE_BIG_HAMMER); 105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 106 __func__, (rc == 0) ? "success" : "failed"); 107 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 109 mpt2sas_base_fault_info(ioc, doorbell & 110 MPI2_DOORBELL_DATA_MASK); 111 } 112 113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 114 rearm_timer: 115 if (ioc->fault_reset_work_q) 116 queue_delayed_work(ioc->fault_reset_work_q, 117 &ioc->fault_reset_work, 118 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 120} 121 122/** 123 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 124 * @ioc: pointer to scsi command object 125 * Context: sleep. 126 * 127 * Return nothing. 128 */ 129void 130mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 131{ 132 unsigned long flags; 133 134 if (ioc->fault_reset_work_q) 135 return; 136 137 /* initialize fault polling */ 138 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 139 snprintf(ioc->fault_reset_work_q_name, 140 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 141 ioc->fault_reset_work_q = 142 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 143 if (!ioc->fault_reset_work_q) { 144 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 145 ioc->name, __func__, __LINE__); 146 return; 147 } 148 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 149 if (ioc->fault_reset_work_q) 150 queue_delayed_work(ioc->fault_reset_work_q, 151 &ioc->fault_reset_work, 152 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 153 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 154} 155 156/** 157 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 158 * @ioc: pointer to scsi command object 159 * Context: sleep. 160 * 161 * Return nothing. 162 */ 163void 164mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 165{ 166 unsigned long flags; 167 struct workqueue_struct *wq; 168 169 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 170 wq = ioc->fault_reset_work_q; 171 ioc->fault_reset_work_q = NULL; 172 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 173 if (wq) { 174 if (!cancel_delayed_work(&ioc->fault_reset_work)) 175 flush_workqueue(wq); 176 destroy_workqueue(wq); 177 } 178} 179 180#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 181/** 182 * _base_sas_ioc_info - verbose translation of the ioc status 183 * @ioc: pointer to scsi command object 184 * @mpi_reply: reply mf payload returned from firmware 185 * @request_hdr: request mf 186 * 187 * Return nothing. 188 */ 189static void 190_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 191 MPI2RequestHeader_t *request_hdr) 192{ 193 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 194 MPI2_IOCSTATUS_MASK; 195 char *desc = NULL; 196 u16 frame_sz; 197 char *func_str = NULL; 198 199 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 200 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 201 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 202 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 203 return; 204 205 switch (ioc_status) { 206 207/**************************************************************************** 208* Common IOCStatus values for all replies 209****************************************************************************/ 210 211 case MPI2_IOCSTATUS_INVALID_FUNCTION: 212 desc = "invalid function"; 213 break; 214 case MPI2_IOCSTATUS_BUSY: 215 desc = "busy"; 216 break; 217 case MPI2_IOCSTATUS_INVALID_SGL: 218 desc = "invalid sgl"; 219 break; 220 case MPI2_IOCSTATUS_INTERNAL_ERROR: 221 desc = "internal error"; 222 break; 223 case MPI2_IOCSTATUS_INVALID_VPID: 224 desc = "invalid vpid"; 225 break; 226 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 227 desc = "insufficient resources"; 228 break; 229 case MPI2_IOCSTATUS_INVALID_FIELD: 230 desc = "invalid field"; 231 break; 232 case MPI2_IOCSTATUS_INVALID_STATE: 233 desc = "invalid state"; 234 break; 235 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 236 desc = "op state not supported"; 237 break; 238 239/**************************************************************************** 240* Config IOCStatus values 241****************************************************************************/ 242 243 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 244 desc = "config invalid action"; 245 break; 246 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 247 desc = "config invalid type"; 248 break; 249 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 250 desc = "config invalid page"; 251 break; 252 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 253 desc = "config invalid data"; 254 break; 255 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 256 desc = "config no defaults"; 257 break; 258 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 259 desc = "config cant commit"; 260 break; 261 262/**************************************************************************** 263* SCSI IO Reply 264****************************************************************************/ 265 266 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 267 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 268 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 269 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 270 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 271 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 272 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 273 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 274 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 275 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 276 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 277 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 278 break; 279 280/**************************************************************************** 281* For use by SCSI Initiator and SCSI Target end-to-end data protection 282****************************************************************************/ 283 284 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 285 desc = "eedp guard error"; 286 break; 287 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 288 desc = "eedp ref tag error"; 289 break; 290 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 291 desc = "eedp app tag error"; 292 break; 293 294/**************************************************************************** 295* SCSI Target values 296****************************************************************************/ 297 298 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 299 desc = "target invalid io index"; 300 break; 301 case MPI2_IOCSTATUS_TARGET_ABORTED: 302 desc = "target aborted"; 303 break; 304 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 305 desc = "target no conn retryable"; 306 break; 307 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 308 desc = "target no connection"; 309 break; 310 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 311 desc = "target xfer count mismatch"; 312 break; 313 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 314 desc = "target data offset error"; 315 break; 316 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 317 desc = "target too much write data"; 318 break; 319 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 320 desc = "target iu too short"; 321 break; 322 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 323 desc = "target ack nak timeout"; 324 break; 325 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 326 desc = "target nak received"; 327 break; 328 329/**************************************************************************** 330* Serial Attached SCSI values 331****************************************************************************/ 332 333 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 334 desc = "smp request failed"; 335 break; 336 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 337 desc = "smp data overrun"; 338 break; 339 340/**************************************************************************** 341* Diagnostic Buffer Post / Diagnostic Release values 342****************************************************************************/ 343 344 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 345 desc = "diagnostic released"; 346 break; 347 default: 348 break; 349 } 350 351 if (!desc) 352 return; 353 354 switch (request_hdr->Function) { 355 case MPI2_FUNCTION_CONFIG: 356 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 357 func_str = "config_page"; 358 break; 359 case MPI2_FUNCTION_SCSI_TASK_MGMT: 360 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 361 func_str = "task_mgmt"; 362 break; 363 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 364 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 365 func_str = "sas_iounit_ctl"; 366 break; 367 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 368 frame_sz = sizeof(Mpi2SepRequest_t); 369 func_str = "enclosure"; 370 break; 371 case MPI2_FUNCTION_IOC_INIT: 372 frame_sz = sizeof(Mpi2IOCInitRequest_t); 373 func_str = "ioc_init"; 374 break; 375 case MPI2_FUNCTION_PORT_ENABLE: 376 frame_sz = sizeof(Mpi2PortEnableRequest_t); 377 func_str = "port_enable"; 378 break; 379 case MPI2_FUNCTION_SMP_PASSTHROUGH: 380 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 381 func_str = "smp_passthru"; 382 break; 383 default: 384 frame_sz = 32; 385 func_str = "unknown"; 386 break; 387 } 388 389 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 390 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 391 392 _debug_dump_mf(request_hdr, frame_sz/4); 393} 394 395/** 396 * _base_display_event_data - verbose translation of firmware asyn events 397 * @ioc: pointer to scsi command object 398 * @mpi_reply: reply mf payload returned from firmware 399 * 400 * Return nothing. 401 */ 402static void 403_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 404 Mpi2EventNotificationReply_t *mpi_reply) 405{ 406 char *desc = NULL; 407 u16 event; 408 409 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 410 return; 411 412 event = le16_to_cpu(mpi_reply->Event); 413 414 switch (event) { 415 case MPI2_EVENT_LOG_DATA: 416 desc = "Log Data"; 417 break; 418 case MPI2_EVENT_STATE_CHANGE: 419 desc = "Status Change"; 420 break; 421 case MPI2_EVENT_HARD_RESET_RECEIVED: 422 desc = "Hard Reset Received"; 423 break; 424 case MPI2_EVENT_EVENT_CHANGE: 425 desc = "Event Change"; 426 break; 427 case MPI2_EVENT_TASK_SET_FULL: 428 desc = "Task Set Full"; 429 break; 430 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 431 desc = "Device Status Change"; 432 break; 433 case MPI2_EVENT_IR_OPERATION_STATUS: 434 desc = "IR Operation Status"; 435 break; 436 case MPI2_EVENT_SAS_DISCOVERY: 437 desc = "Discovery"; 438 break; 439 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 440 desc = "SAS Broadcast Primitive"; 441 break; 442 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 443 desc = "SAS Init Device Status Change"; 444 break; 445 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 446 desc = "SAS Init Table Overflow"; 447 break; 448 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 449 desc = "SAS Topology Change List"; 450 break; 451 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 452 desc = "SAS Enclosure Device Status Change"; 453 break; 454 case MPI2_EVENT_IR_VOLUME: 455 desc = "IR Volume"; 456 break; 457 case MPI2_EVENT_IR_PHYSICAL_DISK: 458 desc = "IR Physical Disk"; 459 break; 460 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 461 desc = "IR Configuration Change List"; 462 break; 463 case MPI2_EVENT_LOG_ENTRY_ADDED: 464 desc = "Log Entry Added"; 465 break; 466 } 467 468 if (!desc) 469 return; 470 471 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 472} 473#endif 474 475/** 476 * _base_sas_log_info - verbose translation of firmware log info 477 * @ioc: pointer to scsi command object 478 * @log_info: log info 479 * 480 * Return nothing. 481 */ 482static void 483_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 484{ 485 union loginfo_type { 486 u32 loginfo; 487 struct { 488 u32 subcode:16; 489 u32 code:8; 490 u32 originator:4; 491 u32 bus_type:4; 492 } dw; 493 }; 494 union loginfo_type sas_loginfo; 495 char *originator_str = NULL; 496 497 sas_loginfo.loginfo = log_info; 498 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 499 return; 500 501 /* each nexus loss loginfo */ 502 if (log_info == 0x31170000) 503 return; 504 505 /* eat the loginfos associated with task aborts */ 506 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 507 0x31140000 || log_info == 0x31130000)) 508 return; 509 510 switch (sas_loginfo.dw.originator) { 511 case 0: 512 originator_str = "IOP"; 513 break; 514 case 1: 515 originator_str = "PL"; 516 break; 517 case 2: 518 originator_str = "IR"; 519 break; 520 } 521 522 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 523 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 524 originator_str, sas_loginfo.dw.code, 525 sas_loginfo.dw.subcode); 526} 527 528/** 529 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 530 * @ioc: pointer to scsi command object 531 * @fault_code: fault code 532 * 533 * Return nothing. 534 */ 535void 536mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 537{ 538 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 539 ioc->name, fault_code); 540} 541 542/** 543 * _base_display_reply_info - 544 * @ioc: pointer to scsi command object 545 * @smid: system request message index 546 * @VF_ID: virtual function id 547 * @reply: reply message frame(lower 32bit addr) 548 * 549 * Return nothing. 550 */ 551static void 552_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, 553 u32 reply) 554{ 555 MPI2DefaultReply_t *mpi_reply; 556 u16 ioc_status; 557 558 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 559 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 560#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 561 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 562 (ioc->logging_level & MPT_DEBUG_REPLY)) { 563 _base_sas_ioc_info(ioc , mpi_reply, 564 mpt2sas_base_get_msg_frame(ioc, smid)); 565 } 566#endif 567 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 568 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 569} 570 571/** 572 * mpt2sas_base_done - base internal command completion routine 573 * @ioc: pointer to scsi command object 574 * @smid: system request message index 575 * @VF_ID: virtual function id 576 * @reply: reply message frame(lower 32bit addr) 577 * 578 * Return nothing. 579 */ 580void 581mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply) 582{ 583 MPI2DefaultReply_t *mpi_reply; 584 585 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 586 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 587 return; 588 589 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 590 return; 591 592 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 593 if (mpi_reply) { 594 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 595 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 596 } 597 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 598 complete(&ioc->base_cmds.done); 599} 600 601/** 602 * _base_async_event - main callback handler for firmware asyn events 603 * @ioc: pointer to scsi command object 604 * @VF_ID: virtual function id 605 * @reply: reply message frame(lower 32bit addr) 606 * 607 * Return nothing. 608 */ 609static void 610_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply) 611{ 612 Mpi2EventNotificationReply_t *mpi_reply; 613 Mpi2EventAckRequest_t *ack_request; 614 u16 smid; 615 616 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 617 if (!mpi_reply) 618 return; 619 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 620 return; 621#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 622 _base_display_event_data(ioc, mpi_reply); 623#endif 624 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 625 goto out; 626 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 627 if (!smid) { 628 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 629 ioc->name, __func__); 630 goto out; 631 } 632 633 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 634 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 635 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 636 ack_request->Event = mpi_reply->Event; 637 ack_request->EventContext = mpi_reply->EventContext; 638 ack_request->VF_ID = VF_ID; 639 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 640 641 out: 642 643 /* scsih callback handler */ 644 mpt2sas_scsih_event_callback(ioc, VF_ID, reply); 645 646 /* ctl callback handler */ 647 mpt2sas_ctl_event_callback(ioc, VF_ID, reply); 648} 649 650/** 651 * _base_mask_interrupts - disable interrupts 652 * @ioc: pointer to scsi command object 653 * 654 * Disabling ResetIRQ, Reply and Doorbell Interrupts 655 * 656 * Return nothing. 657 */ 658static void 659_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 660{ 661 u32 him_register; 662 663 ioc->mask_interrupts = 1; 664 him_register = readl(&ioc->chip->HostInterruptMask); 665 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 666 writel(him_register, &ioc->chip->HostInterruptMask); 667 readl(&ioc->chip->HostInterruptMask); 668} 669 670/** 671 * _base_unmask_interrupts - enable interrupts 672 * @ioc: pointer to scsi command object 673 * 674 * Enabling only Reply Interrupts 675 * 676 * Return nothing. 677 */ 678static void 679_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 680{ 681 u32 him_register; 682 683 writel(0, &ioc->chip->HostInterruptStatus); 684 him_register = readl(&ioc->chip->HostInterruptMask); 685 him_register &= ~MPI2_HIM_RIM; 686 writel(him_register, &ioc->chip->HostInterruptMask); 687 ioc->mask_interrupts = 0; 688} 689 690/** 691 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 692 * @irq: irq number (not used) 693 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 694 * @r: pt_regs pointer (not used) 695 * 696 * Return IRQ_HANDLE if processed, else IRQ_NONE. 697 */ 698static irqreturn_t 699_base_interrupt(int irq, void *bus_id) 700{ 701 union reply_descriptor { 702 u64 word; 703 struct { 704 u32 low; 705 u32 high; 706 } u; 707 }; 708 union reply_descriptor rd; 709 u32 post_index, post_index_next, completed_cmds; 710 u8 request_desript_type; 711 u16 smid; 712 u8 cb_idx; 713 u32 reply; 714 u8 VF_ID; 715 int i; 716 struct MPT2SAS_ADAPTER *ioc = bus_id; 717 718 if (ioc->mask_interrupts) 719 return IRQ_NONE; 720 721 post_index = ioc->reply_post_host_index; 722 request_desript_type = ioc->reply_post_free[post_index]. 723 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 724 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 725 return IRQ_NONE; 726 727 completed_cmds = 0; 728 do { 729 rd.word = ioc->reply_post_free[post_index].Words; 730 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 731 goto out; 732 reply = 0; 733 cb_idx = 0xFF; 734 smid = le16_to_cpu(ioc->reply_post_free[post_index]. 735 Default.DescriptorTypeDependent1); 736 VF_ID = ioc->reply_post_free[post_index]. 737 Default.VF_ID; 738 if (request_desript_type == 739 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 740 reply = le32_to_cpu(ioc->reply_post_free[post_index]. 741 AddressReply.ReplyFrameAddress); 742 } else if (request_desript_type == 743 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 744 goto next; 745 else if (request_desript_type == 746 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 747 goto next; 748 if (smid) 749 cb_idx = ioc->scsi_lookup[smid - 1].cb_idx; 750 if (smid && cb_idx != 0xFF) { 751 mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply); 752 if (reply) 753 _base_display_reply_info(ioc, smid, VF_ID, 754 reply); 755 mpt2sas_base_free_smid(ioc, smid); 756 } 757 if (!smid) 758 _base_async_event(ioc, VF_ID, reply); 759 760 /* reply free queue handling */ 761 if (reply) { 762 ioc->reply_free_host_index = 763 (ioc->reply_free_host_index == 764 (ioc->reply_free_queue_depth - 1)) ? 765 0 : ioc->reply_free_host_index + 1; 766 ioc->reply_free[ioc->reply_free_host_index] = 767 cpu_to_le32(reply); 768 writel(ioc->reply_free_host_index, 769 &ioc->chip->ReplyFreeHostIndex); 770 wmb(); 771 } 772 773 next: 774 post_index_next = (post_index == (ioc->reply_post_queue_depth - 775 1)) ? 0 : post_index + 1; 776 request_desript_type = 777 ioc->reply_post_free[post_index_next].Default.ReplyFlags 778 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 779 completed_cmds++; 780 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 781 goto out; 782 post_index = post_index_next; 783 } while (1); 784 785 out: 786 787 if (!completed_cmds) 788 return IRQ_NONE; 789 790 /* reply post descriptor handling */ 791 post_index_next = ioc->reply_post_host_index; 792 for (i = 0 ; i < completed_cmds; i++) { 793 post_index = post_index_next; 794 /* poison the reply post descriptor */ 795 ioc->reply_post_free[post_index_next].Words = ULLONG_MAX; 796 post_index_next = (post_index == 797 (ioc->reply_post_queue_depth - 1)) 798 ? 0 : post_index + 1; 799 } 800 ioc->reply_post_host_index = post_index_next; 801 writel(post_index_next, &ioc->chip->ReplyPostHostIndex); 802 wmb(); 803 return IRQ_HANDLED; 804} 805 806/** 807 * mpt2sas_base_release_callback_handler - clear interupt callback handler 808 * @cb_idx: callback index 809 * 810 * Return nothing. 811 */ 812void 813mpt2sas_base_release_callback_handler(u8 cb_idx) 814{ 815 mpt_callbacks[cb_idx] = NULL; 816} 817 818/** 819 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 820 * @cb_func: callback function 821 * 822 * Returns cb_func. 823 */ 824u8 825mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 826{ 827 u8 cb_idx; 828 829 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 830 if (mpt_callbacks[cb_idx] == NULL) 831 break; 832 833 mpt_callbacks[cb_idx] = cb_func; 834 return cb_idx; 835} 836 837/** 838 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 839 * 840 * Return nothing. 841 */ 842void 843mpt2sas_base_initialize_callback_handler(void) 844{ 845 u8 cb_idx; 846 847 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 848 mpt2sas_base_release_callback_handler(cb_idx); 849} 850 851/** 852 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 853 * @ioc: per adapter object 854 * @paddr: virtual address for SGE 855 * 856 * Create a zero length scatter gather entry to insure the IOCs hardware has 857 * something to use if the target device goes brain dead and tries 858 * to send data even when none is asked for. 859 * 860 * Return nothing. 861 */ 862void 863mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 864{ 865 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 866 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 867 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 868 MPI2_SGE_FLAGS_SHIFT); 869 ioc->base_add_sg_single(paddr, flags_length, -1); 870} 871 872/** 873 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 874 * @paddr: virtual address for SGE 875 * @flags_length: SGE flags and data transfer length 876 * @dma_addr: Physical address 877 * 878 * Return nothing. 879 */ 880static void 881_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 882{ 883 Mpi2SGESimple32_t *sgel = paddr; 884 885 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 886 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 887 sgel->FlagsLength = cpu_to_le32(flags_length); 888 sgel->Address = cpu_to_le32(dma_addr); 889} 890 891 892/** 893 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 894 * @paddr: virtual address for SGE 895 * @flags_length: SGE flags and data transfer length 896 * @dma_addr: Physical address 897 * 898 * Return nothing. 899 */ 900static void 901_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 902{ 903 Mpi2SGESimple64_t *sgel = paddr; 904 905 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 906 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 907 sgel->FlagsLength = cpu_to_le32(flags_length); 908 sgel->Address = cpu_to_le64(dma_addr); 909} 910 911#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 912 913/** 914 * _base_config_dma_addressing - set dma addressing 915 * @ioc: per adapter object 916 * @pdev: PCI device struct 917 * 918 * Returns 0 for success, non-zero for failure. 919 */ 920static int 921_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 922{ 923 struct sysinfo s; 924 char *desc = NULL; 925 926 if (sizeof(dma_addr_t) > 4) { 927 const uint64_t required_mask = 928 dma_get_required_mask(&pdev->dev); 929 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 930 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 931 DMA_BIT_MASK(64))) { 932 ioc->base_add_sg_single = &_base_add_sg_single_64; 933 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 934 desc = "64"; 935 goto out; 936 } 937 } 938 939 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 940 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 941 ioc->base_add_sg_single = &_base_add_sg_single_32; 942 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 943 desc = "32"; 944 } else 945 return -ENODEV; 946 947 out: 948 si_meminfo(&s); 949 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 950 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 951 952 return 0; 953} 954 955/** 956 * _base_save_msix_table - backup msix vector table 957 * @ioc: per adapter object 958 * 959 * This address an errata where diag reset clears out the table 960 */ 961static void 962_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 963{ 964 int i; 965 966 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 967 return; 968 969 for (i = 0; i < ioc->msix_vector_count; i++) 970 ioc->msix_table_backup[i] = ioc->msix_table[i]; 971} 972 973/** 974 * _base_restore_msix_table - this restores the msix vector table 975 * @ioc: per adapter object 976 * 977 */ 978static void 979_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 980{ 981 int i; 982 983 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 984 return; 985 986 for (i = 0; i < ioc->msix_vector_count; i++) 987 ioc->msix_table[i] = ioc->msix_table_backup[i]; 988} 989 990/** 991 * _base_check_enable_msix - checks MSIX capabable. 992 * @ioc: per adapter object 993 * 994 * Check to see if card is capable of MSIX, and set number 995 * of avaliable msix vectors 996 */ 997static int 998_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 999{ 1000 int base; 1001 u16 message_control; 1002 u32 msix_table_offset; 1003 1004 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1005 if (!base) { 1006 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1007 "supported\n", ioc->name)); 1008 return -EINVAL; 1009 } 1010 1011 /* get msix vector count */ 1012 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1013 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1014 1015 /* get msix table */ 1016 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 1017 msix_table_offset &= 0xFFFFFFF8; 1018 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 1019 1020 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1021 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 1022 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 1023 return 0; 1024} 1025 1026/** 1027 * _base_disable_msix - disables msix 1028 * @ioc: per adapter object 1029 * 1030 */ 1031static void 1032_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1033{ 1034 if (ioc->msix_enable) { 1035 pci_disable_msix(ioc->pdev); 1036 kfree(ioc->msix_table_backup); 1037 ioc->msix_table_backup = NULL; 1038 ioc->msix_enable = 0; 1039 } 1040} 1041 1042/** 1043 * _base_enable_msix - enables msix, failback to io_apic 1044 * @ioc: per adapter object 1045 * 1046 */ 1047static int 1048_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1049{ 1050 struct msix_entry entries; 1051 int r; 1052 u8 try_msix = 0; 1053 1054 if (msix_disable == -1 || msix_disable == 0) 1055 try_msix = 1; 1056 1057 if (!try_msix) 1058 goto try_ioapic; 1059 1060 if (_base_check_enable_msix(ioc) != 0) 1061 goto try_ioapic; 1062 1063 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1064 sizeof(u32), GFP_KERNEL); 1065 if (!ioc->msix_table_backup) { 1066 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1067 "msix_table_backup failed!!!\n", ioc->name)); 1068 goto try_ioapic; 1069 } 1070 1071 memset(&entries, 0, sizeof(struct msix_entry)); 1072 r = pci_enable_msix(ioc->pdev, &entries, 1); 1073 if (r) { 1074 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1075 "failed (r=%d) !!!\n", ioc->name, r)); 1076 goto try_ioapic; 1077 } 1078 1079 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1080 ioc->name, ioc); 1081 if (r) { 1082 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1083 "interrupt %d !!!\n", ioc->name, entries.vector)); 1084 pci_disable_msix(ioc->pdev); 1085 goto try_ioapic; 1086 } 1087 1088 ioc->pci_irq = entries.vector; 1089 ioc->msix_enable = 1; 1090 return 0; 1091 1092/* failback to io_apic interrupt routing */ 1093 try_ioapic: 1094 1095 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1096 ioc->name, ioc); 1097 if (r) { 1098 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1099 ioc->name, ioc->pdev->irq); 1100 r = -EBUSY; 1101 goto out_fail; 1102 } 1103 1104 ioc->pci_irq = ioc->pdev->irq; 1105 return 0; 1106 1107 out_fail: 1108 return r; 1109} 1110 1111/** 1112 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1113 * @ioc: per adapter object 1114 * 1115 * Returns 0 for success, non-zero for failure. 1116 */ 1117int 1118mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1119{ 1120 struct pci_dev *pdev = ioc->pdev; 1121 u32 memap_sz; 1122 u32 pio_sz; 1123 int i, r = 0; 1124 1125 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1126 ioc->name, __func__)); 1127 1128 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1129 if (pci_enable_device_mem(pdev)) { 1130 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1131 "failed\n", ioc->name); 1132 return -ENODEV; 1133 } 1134 1135 1136 if (pci_request_selected_regions(pdev, ioc->bars, 1137 MPT2SAS_DRIVER_NAME)) { 1138 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1139 "failed\n", ioc->name); 1140 r = -ENODEV; 1141 goto out_fail; 1142 } 1143 1144 pci_set_master(pdev); 1145 1146 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1147 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1148 ioc->name, pci_name(pdev)); 1149 r = -ENODEV; 1150 goto out_fail; 1151 } 1152 1153 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1154 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1155 if (pio_sz) 1156 continue; 1157 ioc->pio_chip = pci_resource_start(pdev, i); 1158 pio_sz = pci_resource_len(pdev, i); 1159 } else { 1160 if (memap_sz) 1161 continue; 1162 ioc->chip_phys = pci_resource_start(pdev, i); 1163 memap_sz = pci_resource_len(pdev, i); 1164 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1165 if (ioc->chip == NULL) { 1166 printk(MPT2SAS_ERR_FMT "unable to map adapter " 1167 "memory!\n", ioc->name); 1168 r = -EINVAL; 1169 goto out_fail; 1170 } 1171 } 1172 } 1173 1174 _base_mask_interrupts(ioc); 1175 r = _base_enable_msix(ioc); 1176 if (r) 1177 goto out_fail; 1178 1179 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1180 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1181 "IO-APIC enabled"), ioc->pci_irq); 1182 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1183 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1184 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1185 ioc->name, ioc->pio_chip, pio_sz); 1186 1187 return 0; 1188 1189 out_fail: 1190 if (ioc->chip_phys) 1191 iounmap(ioc->chip); 1192 ioc->chip_phys = 0; 1193 ioc->pci_irq = -1; 1194 pci_release_selected_regions(ioc->pdev, ioc->bars); 1195 pci_disable_device(pdev); 1196 return r; 1197} 1198 1199/** 1200 * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr 1201 * @ioc: per adapter object 1202 * @smid: system request message index(smid zero is invalid) 1203 * 1204 * Returns phys pointer to message frame. 1205 */ 1206dma_addr_t 1207mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1208{ 1209 return ioc->request_dma + (smid * ioc->request_sz); 1210} 1211 1212/** 1213 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1214 * @ioc: per adapter object 1215 * @smid: system request message index(smid zero is invalid) 1216 * 1217 * Returns virt pointer to message frame. 1218 */ 1219void * 1220mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1221{ 1222 return (void *)(ioc->request + (smid * ioc->request_sz)); 1223} 1224 1225/** 1226 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1227 * @ioc: per adapter object 1228 * @smid: system request message index 1229 * 1230 * Returns virt pointer to sense buffer. 1231 */ 1232void * 1233mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1234{ 1235 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1236} 1237 1238/** 1239 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1240 * @ioc: per adapter object 1241 * @smid: system request message index 1242 * 1243 * Returns phys pointer to sense buffer. 1244 */ 1245dma_addr_t 1246mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1247{ 1248 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE); 1249} 1250 1251/** 1252 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1253 * @ioc: per adapter object 1254 * @phys_addr: lower 32 physical addr of the reply 1255 * 1256 * Converts 32bit lower physical addr into a virt address. 1257 */ 1258void * 1259mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1260{ 1261 if (!phys_addr) 1262 return NULL; 1263 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1264} 1265 1266/** 1267 * mpt2sas_base_get_smid - obtain a free smid 1268 * @ioc: per adapter object 1269 * @cb_idx: callback index 1270 * 1271 * Returns smid (zero is invalid) 1272 */ 1273u16 1274mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1275{ 1276 unsigned long flags; 1277 struct request_tracker *request; 1278 u16 smid; 1279 1280 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1281 if (list_empty(&ioc->free_list)) { 1282 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1283 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1284 ioc->name, __func__); 1285 return 0; 1286 } 1287 1288 request = list_entry(ioc->free_list.next, 1289 struct request_tracker, tracker_list); 1290 request->cb_idx = cb_idx; 1291 smid = request->smid; 1292 list_del(&request->tracker_list); 1293 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1294 return smid; 1295} 1296 1297 1298/** 1299 * mpt2sas_base_free_smid - put smid back on free_list 1300 * @ioc: per adapter object 1301 * @smid: system request message index 1302 * 1303 * Return nothing. 1304 */ 1305void 1306mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1307{ 1308 unsigned long flags; 1309 1310 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1311 ioc->scsi_lookup[smid - 1].cb_idx = 0xFF; 1312 list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list, 1313 &ioc->free_list); 1314 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1315 1316 /* 1317 * See _wait_for_commands_to_complete() call with regards to this code. 1318 */ 1319 if (ioc->shost_recovery && ioc->pending_io_count) { 1320 if (ioc->pending_io_count == 1) 1321 wake_up(&ioc->reset_wq); 1322 ioc->pending_io_count--; 1323 } 1324} 1325 1326/** 1327 * _base_writeq - 64 bit write to MMIO 1328 * @ioc: per adapter object 1329 * @b: data payload 1330 * @addr: address in MMIO space 1331 * @writeq_lock: spin lock 1332 * 1333 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1334 * care of 32 bit environment where its not quarenteed to send the entire word 1335 * in one transfer. 1336 */ 1337#ifndef writeq 1338static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1339 spinlock_t *writeq_lock) 1340{ 1341 unsigned long flags; 1342 __u64 data_out = cpu_to_le64(b); 1343 1344 spin_lock_irqsave(writeq_lock, flags); 1345 writel((u32)(data_out), addr); 1346 writel((u32)(data_out >> 32), (addr + 4)); 1347 spin_unlock_irqrestore(writeq_lock, flags); 1348} 1349#else 1350static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1351 spinlock_t *writeq_lock) 1352{ 1353 writeq(cpu_to_le64(b), addr); 1354} 1355#endif 1356 1357/** 1358 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1359 * @ioc: per adapter object 1360 * @smid: system request message index 1361 * @vf_id: virtual function id 1362 * @handle: device handle 1363 * 1364 * Return nothing. 1365 */ 1366void 1367mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id, 1368 u16 handle) 1369{ 1370 Mpi2RequestDescriptorUnion_t descriptor; 1371 u64 *request = (u64 *)&descriptor; 1372 1373 1374 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1375 descriptor.SCSIIO.VF_ID = vf_id; 1376 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1377 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1378 descriptor.SCSIIO.LMID = 0; 1379 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1380 &ioc->scsi_lookup_lock); 1381} 1382 1383 1384/** 1385 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1386 * @ioc: per adapter object 1387 * @smid: system request message index 1388 * @vf_id: virtual function id 1389 * 1390 * Return nothing. 1391 */ 1392void 1393mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1394 u8 vf_id) 1395{ 1396 Mpi2RequestDescriptorUnion_t descriptor; 1397 u64 *request = (u64 *)&descriptor; 1398 1399 descriptor.HighPriority.RequestFlags = 1400 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1401 descriptor.HighPriority.VF_ID = vf_id; 1402 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1403 descriptor.HighPriority.LMID = 0; 1404 descriptor.HighPriority.Reserved1 = 0; 1405 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1406 &ioc->scsi_lookup_lock); 1407} 1408 1409/** 1410 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1411 * @ioc: per adapter object 1412 * @smid: system request message index 1413 * @vf_id: virtual function id 1414 * 1415 * Return nothing. 1416 */ 1417void 1418mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id) 1419{ 1420 Mpi2RequestDescriptorUnion_t descriptor; 1421 u64 *request = (u64 *)&descriptor; 1422 1423 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1424 descriptor.Default.VF_ID = vf_id; 1425 descriptor.Default.SMID = cpu_to_le16(smid); 1426 descriptor.Default.LMID = 0; 1427 descriptor.Default.DescriptorTypeDependent = 0; 1428 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1429 &ioc->scsi_lookup_lock); 1430} 1431 1432/** 1433 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1434 * @ioc: per adapter object 1435 * @smid: system request message index 1436 * @vf_id: virtual function id 1437 * @io_index: value used to track the IO 1438 * 1439 * Return nothing. 1440 */ 1441void 1442mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1443 u8 vf_id, u16 io_index) 1444{ 1445 Mpi2RequestDescriptorUnion_t descriptor; 1446 u64 *request = (u64 *)&descriptor; 1447 1448 descriptor.SCSITarget.RequestFlags = 1449 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1450 descriptor.SCSITarget.VF_ID = vf_id; 1451 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1452 descriptor.SCSITarget.LMID = 0; 1453 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1454 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1455 &ioc->scsi_lookup_lock); 1456} 1457 1458/** 1459 * _base_display_dell_branding - Disply branding string 1460 * @ioc: per adapter object 1461 * 1462 * Return nothing. 1463 */ 1464static void 1465_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1466{ 1467 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1468 1469 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1470 return; 1471 1472 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1473 switch (ioc->pdev->subsystem_device) { 1474 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1475 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1476 MPT2SAS_DELL_BRANDING_SIZE - 1); 1477 break; 1478 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1479 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1480 MPT2SAS_DELL_BRANDING_SIZE - 1); 1481 break; 1482 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1483 strncpy(dell_branding, 1484 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1485 MPT2SAS_DELL_BRANDING_SIZE - 1); 1486 break; 1487 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1488 strncpy(dell_branding, 1489 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1490 MPT2SAS_DELL_BRANDING_SIZE - 1); 1491 break; 1492 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1493 strncpy(dell_branding, 1494 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1495 MPT2SAS_DELL_BRANDING_SIZE - 1); 1496 break; 1497 case MPT2SAS_DELL_PERC_H200_SSDID: 1498 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1499 MPT2SAS_DELL_BRANDING_SIZE - 1); 1500 break; 1501 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1502 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1503 MPT2SAS_DELL_BRANDING_SIZE - 1); 1504 break; 1505 default: 1506 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1507 break; 1508 } 1509 1510 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1511 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1512 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1513 ioc->pdev->subsystem_device); 1514} 1515 1516/** 1517 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1518 * @ioc: per adapter object 1519 * 1520 * Return nothing. 1521 */ 1522static void 1523_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1524{ 1525 int i = 0; 1526 char desc[16]; 1527 u8 revision; 1528 u32 iounit_pg1_flags; 1529 1530 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1531 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1532 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1533 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1534 ioc->name, desc, 1535 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1536 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1537 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1538 ioc->facts.FWVersion.Word & 0x000000FF, 1539 revision, 1540 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1541 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1542 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1543 ioc->bios_pg3.BiosVersion & 0x000000FF); 1544 1545 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1546 1547 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1548 printk("Initiator"); 1549 i++; 1550 } 1551 1552 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1553 printk("%sTarget", i ? "," : ""); 1554 i++; 1555 } 1556 1557 _base_display_dell_branding(ioc); 1558 1559 i = 0; 1560 printk("), "); 1561 printk("Capabilities=("); 1562 1563 if (ioc->facts.IOCCapabilities & 1564 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1565 printk("Raid"); 1566 i++; 1567 } 1568 1569 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1570 printk("%sTLR", i ? "," : ""); 1571 i++; 1572 } 1573 1574 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1575 printk("%sMulticast", i ? "," : ""); 1576 i++; 1577 } 1578 1579 if (ioc->facts.IOCCapabilities & 1580 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1581 printk("%sBIDI Target", i ? "," : ""); 1582 i++; 1583 } 1584 1585 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1586 printk("%sEEDP", i ? "," : ""); 1587 i++; 1588 } 1589 1590 if (ioc->facts.IOCCapabilities & 1591 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1592 printk("%sSnapshot Buffer", i ? "," : ""); 1593 i++; 1594 } 1595 1596 if (ioc->facts.IOCCapabilities & 1597 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1598 printk("%sDiag Trace Buffer", i ? "," : ""); 1599 i++; 1600 } 1601 1602 if (ioc->facts.IOCCapabilities & 1603 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1604 printk("%sTask Set Full", i ? "," : ""); 1605 i++; 1606 } 1607 1608 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1609 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1610 printk("%sNCQ", i ? "," : ""); 1611 i++; 1612 } 1613 1614 printk(")\n"); 1615} 1616 1617/** 1618 * _base_static_config_pages - static start of day config pages 1619 * @ioc: per adapter object 1620 * 1621 * Return nothing. 1622 */ 1623static void 1624_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1625{ 1626 Mpi2ConfigReply_t mpi_reply; 1627 u32 iounit_pg1_flags; 1628 1629 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1630 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1631 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1632 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1633 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1634 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1635 _base_display_ioc_capabilities(ioc); 1636 1637 /* 1638 * Enable task_set_full handling in iounit_pg1 when the 1639 * facts capabilities indicate that its supported. 1640 */ 1641 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1642 if ((ioc->facts.IOCCapabilities & 1643 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1644 iounit_pg1_flags &= 1645 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1646 else 1647 iounit_pg1_flags |= 1648 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1649 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1650 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1); 1651} 1652 1653/** 1654 * _base_release_memory_pools - release memory 1655 * @ioc: per adapter object 1656 * 1657 * Free memory allocated from _base_allocate_memory_pools. 1658 * 1659 * Return nothing. 1660 */ 1661static void 1662_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1663{ 1664 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1665 __func__)); 1666 1667 if (ioc->request) { 1668 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1669 ioc->request, ioc->request_dma); 1670 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1671 ": free\n", ioc->name, ioc->request)); 1672 ioc->request = NULL; 1673 } 1674 1675 if (ioc->sense) { 1676 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1677 if (ioc->sense_dma_pool) 1678 pci_pool_destroy(ioc->sense_dma_pool); 1679 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1680 ": free\n", ioc->name, ioc->sense)); 1681 ioc->sense = NULL; 1682 } 1683 1684 if (ioc->reply) { 1685 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1686 if (ioc->reply_dma_pool) 1687 pci_pool_destroy(ioc->reply_dma_pool); 1688 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1689 ": free\n", ioc->name, ioc->reply)); 1690 ioc->reply = NULL; 1691 } 1692 1693 if (ioc->reply_free) { 1694 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1695 ioc->reply_free_dma); 1696 if (ioc->reply_free_dma_pool) 1697 pci_pool_destroy(ioc->reply_free_dma_pool); 1698 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1699 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1700 ioc->reply_free = NULL; 1701 } 1702 1703 if (ioc->reply_post_free) { 1704 pci_pool_free(ioc->reply_post_free_dma_pool, 1705 ioc->reply_post_free, ioc->reply_post_free_dma); 1706 if (ioc->reply_post_free_dma_pool) 1707 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1708 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1709 "reply_post_free_pool(0x%p): free\n", ioc->name, 1710 ioc->reply_post_free)); 1711 ioc->reply_post_free = NULL; 1712 } 1713 1714 if (ioc->config_page) { 1715 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1716 "config_page(0x%p): free\n", ioc->name, 1717 ioc->config_page)); 1718 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1719 ioc->config_page, ioc->config_page_dma); 1720 } 1721 1722 kfree(ioc->scsi_lookup); 1723} 1724 1725 1726/** 1727 * _base_allocate_memory_pools - allocate start of day memory pools 1728 * @ioc: per adapter object 1729 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1730 * 1731 * Returns 0 success, anything else error 1732 */ 1733static int 1734_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1735{ 1736 Mpi2IOCFactsReply_t *facts; 1737 u32 queue_size, queue_diff; 1738 u16 max_sge_elements; 1739 u16 num_of_reply_frames; 1740 u16 chains_needed_per_io; 1741 u32 sz, total_sz; 1742 u16 i; 1743 u32 retry_sz; 1744 u16 max_request_credit; 1745 1746 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1747 __func__)); 1748 1749 retry_sz = 0; 1750 facts = &ioc->facts; 1751 1752 /* command line tunables for max sgl entries */ 1753 if (max_sgl_entries != -1) { 1754 ioc->shost->sg_tablesize = (max_sgl_entries < 1755 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1756 MPT2SAS_SG_DEPTH; 1757 } else { 1758 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1759 } 1760 1761 /* command line tunables for max controller queue depth */ 1762 if (max_queue_depth != -1) { 1763 max_request_credit = (max_queue_depth < facts->RequestCredit) 1764 ? max_queue_depth : facts->RequestCredit; 1765 } else { 1766 max_request_credit = (facts->RequestCredit > 1767 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1768 facts->RequestCredit; 1769 } 1770 ioc->request_depth = max_request_credit; 1771 1772 /* request frame size */ 1773 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1774 1775 /* reply frame size */ 1776 ioc->reply_sz = facts->ReplyFrameSize * 4; 1777 1778 retry_allocation: 1779 total_sz = 0; 1780 /* calculate number of sg elements left over in the 1st frame */ 1781 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1782 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1783 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1784 1785 /* now do the same for a chain buffer */ 1786 max_sge_elements = ioc->request_sz - ioc->sge_size; 1787 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1788 1789 ioc->chain_offset_value_for_main_message = 1790 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1791 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1792 1793 /* 1794 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1795 */ 1796 chains_needed_per_io = ((ioc->shost->sg_tablesize - 1797 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 1798 + 1; 1799 if (chains_needed_per_io > facts->MaxChainDepth) { 1800 chains_needed_per_io = facts->MaxChainDepth; 1801 ioc->shost->sg_tablesize = min_t(u16, 1802 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 1803 * chains_needed_per_io), ioc->shost->sg_tablesize); 1804 } 1805 ioc->chains_needed_per_io = chains_needed_per_io; 1806 1807 /* reply free queue sizing - taking into account for events */ 1808 num_of_reply_frames = ioc->request_depth + 32; 1809 1810 /* number of replies frames can't be a multiple of 16 */ 1811 /* decrease number of reply frames by 1 */ 1812 if (!(num_of_reply_frames % 16)) 1813 num_of_reply_frames--; 1814 1815 /* calculate number of reply free queue entries 1816 * (must be multiple of 16) 1817 */ 1818 1819 /* (we know reply_free_queue_depth is not a multiple of 16) */ 1820 queue_size = num_of_reply_frames; 1821 queue_size += 16 - (queue_size % 16); 1822 ioc->reply_free_queue_depth = queue_size; 1823 1824 /* reply descriptor post queue sizing */ 1825 /* this size should be the number of request frames + number of reply 1826 * frames 1827 */ 1828 1829 queue_size = ioc->request_depth + num_of_reply_frames + 1; 1830 /* round up to 16 byte boundary */ 1831 if (queue_size % 16) 1832 queue_size += 16 - (queue_size % 16); 1833 1834 /* check against IOC maximum reply post queue depth */ 1835 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 1836 queue_diff = queue_size - 1837 facts->MaxReplyDescriptorPostQueueDepth; 1838 1839 /* round queue_diff up to multiple of 16 */ 1840 if (queue_diff % 16) 1841 queue_diff += 16 - (queue_diff % 16); 1842 1843 /* adjust request_depth, reply_free_queue_depth, 1844 * and queue_size 1845 */ 1846 ioc->request_depth -= queue_diff; 1847 ioc->reply_free_queue_depth -= queue_diff; 1848 queue_size -= queue_diff; 1849 } 1850 ioc->reply_post_queue_depth = queue_size; 1851 1852 /* max scsi host queue depth */ 1853 ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT; 1854 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth" 1855 "(%d)\n", ioc->name, ioc->shost->can_queue)); 1856 1857 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 1858 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 1859 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 1860 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 1861 ioc->chains_needed_per_io)); 1862 1863 /* contiguous pool for request and chains, 16 byte align, one extra " 1864 * "frame for smid=0 1865 */ 1866 ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth; 1867 sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz); 1868 1869 ioc->request_dma_sz = sz; 1870 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 1871 if (!ioc->request) { 1872 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1873 "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1874 "total(%d kB)\n", ioc->name, ioc->request_depth, 1875 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1876 if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH) 1877 goto out; 1878 retry_sz += 64; 1879 ioc->request_depth = max_request_credit - retry_sz; 1880 goto retry_allocation; 1881 } 1882 1883 if (retry_sz) 1884 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1885 "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1886 "total(%d kb)\n", ioc->name, ioc->request_depth, 1887 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1888 1889 ioc->chain = ioc->request + ((ioc->request_depth + 1) * 1890 ioc->request_sz); 1891 ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) * 1892 ioc->request_sz); 1893 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 1894 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 1895 ioc->request, ioc->request_depth, ioc->request_sz, 1896 ((ioc->request_depth + 1) * ioc->request_sz)/1024)); 1897 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 1898 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 1899 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 1900 ioc->request_sz))/1024)); 1901 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 1902 ioc->name, (unsigned long long) ioc->request_dma)); 1903 total_sz += sz; 1904 1905 ioc->scsi_lookup = kcalloc(ioc->request_depth, 1906 sizeof(struct request_tracker), GFP_KERNEL); 1907 if (!ioc->scsi_lookup) { 1908 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n", 1909 ioc->name); 1910 goto out; 1911 } 1912 1913 /* initialize some bits */ 1914 for (i = 0; i < ioc->request_depth; i++) 1915 ioc->scsi_lookup[i].smid = i + 1; 1916 1917 /* sense buffers, 4 byte align */ 1918 sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE; 1919 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 1920 0); 1921 if (!ioc->sense_dma_pool) { 1922 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 1923 ioc->name); 1924 goto out; 1925 } 1926 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 1927 &ioc->sense_dma); 1928 if (!ioc->sense) { 1929 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 1930 ioc->name); 1931 goto out; 1932 } 1933 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 1934 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 1935 "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth, 1936 SCSI_SENSE_BUFFERSIZE, sz/1024)); 1937 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 1938 ioc->name, (unsigned long long)ioc->sense_dma)); 1939 total_sz += sz; 1940 1941 /* reply pool, 4 byte align */ 1942 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 1943 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 1944 0); 1945 if (!ioc->reply_dma_pool) { 1946 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 1947 ioc->name); 1948 goto out; 1949 } 1950 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 1951 &ioc->reply_dma); 1952 if (!ioc->reply) { 1953 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 1954 ioc->name); 1955 goto out; 1956 } 1957 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 1958 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 1959 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 1960 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 1961 ioc->name, (unsigned long long)ioc->reply_dma)); 1962 total_sz += sz; 1963 1964 /* reply free queue, 16 byte align */ 1965 sz = ioc->reply_free_queue_depth * 4; 1966 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 1967 ioc->pdev, sz, 16, 0); 1968 if (!ioc->reply_free_dma_pool) { 1969 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 1970 "failed\n", ioc->name); 1971 goto out; 1972 } 1973 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 1974 &ioc->reply_free_dma); 1975 if (!ioc->reply_free) { 1976 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 1977 "failed\n", ioc->name); 1978 goto out; 1979 } 1980 memset(ioc->reply_free, 0, sz); 1981 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 1982 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 1983 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 1984 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 1985 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 1986 total_sz += sz; 1987 1988 /* reply post queue, 16 byte align */ 1989 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 1990 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 1991 ioc->pdev, sz, 16, 0); 1992 if (!ioc->reply_post_free_dma_pool) { 1993 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 1994 "failed\n", ioc->name); 1995 goto out; 1996 } 1997 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 1998 GFP_KERNEL, &ioc->reply_post_free_dma); 1999 if (!ioc->reply_post_free) { 2000 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2001 "failed\n", ioc->name); 2002 goto out; 2003 } 2004 memset(ioc->reply_post_free, 0, sz); 2005 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2006 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2007 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2008 sz/1024)); 2009 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2010 "(0x%llx)\n", ioc->name, (unsigned long long) 2011 ioc->reply_post_free_dma)); 2012 total_sz += sz; 2013 2014 ioc->config_page_sz = 512; 2015 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2016 ioc->config_page_sz, &ioc->config_page_dma); 2017 if (!ioc->config_page) { 2018 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2019 "failed\n", ioc->name); 2020 goto out; 2021 } 2022 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2023 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2024 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2025 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2026 total_sz += ioc->config_page_sz; 2027 2028 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2029 ioc->name, total_sz/1024); 2030 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2031 "Max Controller Queue Depth(%d)\n", 2032 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2033 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2034 ioc->name, ioc->shost->sg_tablesize); 2035 return 0; 2036 2037 out: 2038 _base_release_memory_pools(ioc); 2039 return -ENOMEM; 2040} 2041 2042 2043/** 2044 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2045 * @ioc: Pointer to MPT_ADAPTER structure 2046 * @cooked: Request raw or cooked IOC state 2047 * 2048 * Returns all IOC Doorbell register bits if cooked==0, else just the 2049 * Doorbell bits in MPI_IOC_STATE_MASK. 2050 */ 2051u32 2052mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2053{ 2054 u32 s, sc; 2055 2056 s = readl(&ioc->chip->Doorbell); 2057 sc = s & MPI2_IOC_STATE_MASK; 2058 return cooked ? sc : s; 2059} 2060 2061/** 2062 * _base_wait_on_iocstate - waiting on a particular ioc state 2063 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2064 * @timeout: timeout in second 2065 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2066 * 2067 * Returns 0 for success, non-zero for failure. 2068 */ 2069static int 2070_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2071 int sleep_flag) 2072{ 2073 u32 count, cntdn; 2074 u32 current_state; 2075 2076 count = 0; 2077 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2078 do { 2079 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2080 if (current_state == ioc_state) 2081 return 0; 2082 if (count && current_state == MPI2_IOC_STATE_FAULT) 2083 break; 2084 if (sleep_flag == CAN_SLEEP) 2085 msleep(1); 2086 else 2087 udelay(500); 2088 count++; 2089 } while (--cntdn); 2090 2091 return current_state; 2092} 2093 2094/** 2095 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2096 * a write to the doorbell) 2097 * @ioc: per adapter object 2098 * @timeout: timeout in second 2099 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2100 * 2101 * Returns 0 for success, non-zero for failure. 2102 * 2103 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2104 */ 2105static int 2106_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2107 int sleep_flag) 2108{ 2109 u32 cntdn, count; 2110 u32 int_status; 2111 2112 count = 0; 2113 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2114 do { 2115 int_status = readl(&ioc->chip->HostInterruptStatus); 2116 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2117 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2118 "successfull count(%d), timeout(%d)\n", ioc->name, 2119 __func__, count, timeout)); 2120 return 0; 2121 } 2122 if (sleep_flag == CAN_SLEEP) 2123 msleep(1); 2124 else 2125 udelay(500); 2126 count++; 2127 } while (--cntdn); 2128 2129 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2130 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2131 return -EFAULT; 2132} 2133 2134/** 2135 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2136 * @ioc: per adapter object 2137 * @timeout: timeout in second 2138 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2139 * 2140 * Returns 0 for success, non-zero for failure. 2141 * 2142 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2143 * doorbell. 2144 */ 2145static int 2146_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2147 int sleep_flag) 2148{ 2149 u32 cntdn, count; 2150 u32 int_status; 2151 u32 doorbell; 2152 2153 count = 0; 2154 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2155 do { 2156 int_status = readl(&ioc->chip->HostInterruptStatus); 2157 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2158 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2159 "successfull count(%d), timeout(%d)\n", ioc->name, 2160 __func__, count, timeout)); 2161 return 0; 2162 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2163 doorbell = readl(&ioc->chip->Doorbell); 2164 if ((doorbell & MPI2_IOC_STATE_MASK) == 2165 MPI2_IOC_STATE_FAULT) { 2166 mpt2sas_base_fault_info(ioc , doorbell); 2167 return -EFAULT; 2168 } 2169 } else if (int_status == 0xFFFFFFFF) 2170 goto out; 2171 2172 if (sleep_flag == CAN_SLEEP) 2173 msleep(1); 2174 else 2175 udelay(500); 2176 count++; 2177 } while (--cntdn); 2178 2179 out: 2180 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2181 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2182 return -EFAULT; 2183} 2184 2185/** 2186 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2187 * @ioc: per adapter object 2188 * @timeout: timeout in second 2189 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2190 * 2191 * Returns 0 for success, non-zero for failure. 2192 * 2193 */ 2194static int 2195_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2196 int sleep_flag) 2197{ 2198 u32 cntdn, count; 2199 u32 doorbell_reg; 2200 2201 count = 0; 2202 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2203 do { 2204 doorbell_reg = readl(&ioc->chip->Doorbell); 2205 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2206 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2207 "successfull count(%d), timeout(%d)\n", ioc->name, 2208 __func__, count, timeout)); 2209 return 0; 2210 } 2211 if (sleep_flag == CAN_SLEEP) 2212 msleep(1); 2213 else 2214 udelay(500); 2215 count++; 2216 } while (--cntdn); 2217 2218 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2219 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2220 return -EFAULT; 2221} 2222 2223/** 2224 * _base_send_ioc_reset - send doorbell reset 2225 * @ioc: per adapter object 2226 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2227 * @timeout: timeout in second 2228 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2229 * 2230 * Returns 0 for success, non-zero for failure. 2231 */ 2232static int 2233_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2234 int sleep_flag) 2235{ 2236 u32 ioc_state; 2237 int r = 0; 2238 2239 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2240 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2241 ioc->name, __func__); 2242 return -EFAULT; 2243 } 2244 2245 if (!(ioc->facts.IOCCapabilities & 2246 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2247 return -EFAULT; 2248 2249 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2250 2251 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2252 &ioc->chip->Doorbell); 2253 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2254 r = -EFAULT; 2255 goto out; 2256 } 2257 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2258 timeout, sleep_flag); 2259 if (ioc_state) { 2260 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2261 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2262 r = -EFAULT; 2263 goto out; 2264 } 2265 out: 2266 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2267 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2268 return r; 2269} 2270 2271/** 2272 * _base_handshake_req_reply_wait - send request thru doorbell interface 2273 * @ioc: per adapter object 2274 * @request_bytes: request length 2275 * @request: pointer having request payload 2276 * @reply_bytes: reply length 2277 * @reply: pointer to reply payload 2278 * @timeout: timeout in second 2279 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2280 * 2281 * Returns 0 for success, non-zero for failure. 2282 */ 2283static int 2284_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2285 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2286{ 2287 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2288 int i; 2289 u8 failed; 2290 u16 dummy; 2291 u32 *mfp; 2292 2293 /* make sure doorbell is not in use */ 2294 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2295 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2296 " (line=%d)\n", ioc->name, __LINE__); 2297 return -EFAULT; 2298 } 2299 2300 /* clear pending doorbell interrupts from previous state changes */ 2301 if (readl(&ioc->chip->HostInterruptStatus) & 2302 MPI2_HIS_IOC2SYS_DB_STATUS) 2303 writel(0, &ioc->chip->HostInterruptStatus); 2304 2305 /* send message to ioc */ 2306 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2307 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2308 &ioc->chip->Doorbell); 2309 2310 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2311 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2312 "int failed (line=%d)\n", ioc->name, __LINE__); 2313 return -EFAULT; 2314 } 2315 writel(0, &ioc->chip->HostInterruptStatus); 2316 2317 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2318 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2319 "ack failed (line=%d)\n", ioc->name, __LINE__); 2320 return -EFAULT; 2321 } 2322 2323 /* send message 32-bits at a time */ 2324 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2325 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2326 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2327 failed = 1; 2328 } 2329 2330 if (failed) { 2331 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2332 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2333 return -EFAULT; 2334 } 2335 2336 /* now wait for the reply */ 2337 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2338 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2339 "int failed (line=%d)\n", ioc->name, __LINE__); 2340 return -EFAULT; 2341 } 2342 2343 /* read the first two 16-bits, it gives the total length of the reply */ 2344 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2345 & MPI2_DOORBELL_DATA_MASK); 2346 writel(0, &ioc->chip->HostInterruptStatus); 2347 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2348 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2349 "int failed (line=%d)\n", ioc->name, __LINE__); 2350 return -EFAULT; 2351 } 2352 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2353 & MPI2_DOORBELL_DATA_MASK); 2354 writel(0, &ioc->chip->HostInterruptStatus); 2355 2356 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2357 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2358 printk(MPT2SAS_ERR_FMT "doorbell " 2359 "handshake int failed (line=%d)\n", ioc->name, 2360 __LINE__); 2361 return -EFAULT; 2362 } 2363 if (i >= reply_bytes/2) /* overflow case */ 2364 dummy = readl(&ioc->chip->Doorbell); 2365 else 2366 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2367 & MPI2_DOORBELL_DATA_MASK); 2368 writel(0, &ioc->chip->HostInterruptStatus); 2369 } 2370 2371 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2372 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2373 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2374 " (line=%d)\n", ioc->name, __LINE__)); 2375 } 2376 writel(0, &ioc->chip->HostInterruptStatus); 2377 2378 if (ioc->logging_level & MPT_DEBUG_INIT) { 2379 mfp = (u32 *)reply; 2380 printk(KERN_DEBUG "\toffset:data\n"); 2381 for (i = 0; i < reply_bytes/4; i++) 2382 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2383 le32_to_cpu(mfp[i])); 2384 } 2385 return 0; 2386} 2387 2388/** 2389 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2390 * @ioc: per adapter object 2391 * @mpi_reply: the reply payload from FW 2392 * @mpi_request: the request payload sent to FW 2393 * 2394 * The SAS IO Unit Control Request message allows the host to perform low-level 2395 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2396 * to obtain the IOC assigned device handles for a device if it has other 2397 * identifying information about the device, in addition allows the host to 2398 * remove IOC resources associated with the device. 2399 * 2400 * Returns 0 for success, non-zero for failure. 2401 */ 2402int 2403mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2404 Mpi2SasIoUnitControlReply_t *mpi_reply, 2405 Mpi2SasIoUnitControlRequest_t *mpi_request) 2406{ 2407 u16 smid; 2408 u32 ioc_state; 2409 unsigned long timeleft; 2410 u8 issue_reset; 2411 int rc; 2412 void *request; 2413 u16 wait_state_count; 2414 2415 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2416 __func__)); 2417 2418 mutex_lock(&ioc->base_cmds.mutex); 2419 2420 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2421 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2422 ioc->name, __func__); 2423 rc = -EAGAIN; 2424 goto out; 2425 } 2426 2427 wait_state_count = 0; 2428 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2429 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2430 if (wait_state_count++ == 10) { 2431 printk(MPT2SAS_ERR_FMT 2432 "%s: failed due to ioc not operational\n", 2433 ioc->name, __func__); 2434 rc = -EFAULT; 2435 goto out; 2436 } 2437 ssleep(1); 2438 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2439 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2440 "operational state(count=%d)\n", ioc->name, 2441 __func__, wait_state_count); 2442 } 2443 2444 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2445 if (!smid) { 2446 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2447 ioc->name, __func__); 2448 rc = -EAGAIN; 2449 goto out; 2450 } 2451 2452 rc = 0; 2453 ioc->base_cmds.status = MPT2_CMD_PENDING; 2454 request = mpt2sas_base_get_msg_frame(ioc, smid); 2455 ioc->base_cmds.smid = smid; 2456 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2457 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2458 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2459 ioc->ioc_link_reset_in_progress = 1; 2460 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2461 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2462 msecs_to_jiffies(10000)); 2463 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2464 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2465 ioc->ioc_link_reset_in_progress) 2466 ioc->ioc_link_reset_in_progress = 0; 2467 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2468 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2469 ioc->name, __func__); 2470 _debug_dump_mf(mpi_request, 2471 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2472 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2473 issue_reset = 1; 2474 goto issue_host_reset; 2475 } 2476 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2477 memcpy(mpi_reply, ioc->base_cmds.reply, 2478 sizeof(Mpi2SasIoUnitControlReply_t)); 2479 else 2480 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2481 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2482 goto out; 2483 2484 issue_host_reset: 2485 if (issue_reset) 2486 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2487 FORCE_BIG_HAMMER); 2488 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2489 rc = -EFAULT; 2490 out: 2491 mutex_unlock(&ioc->base_cmds.mutex); 2492 return rc; 2493} 2494 2495 2496/** 2497 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2498 * @ioc: per adapter object 2499 * @mpi_reply: the reply payload from FW 2500 * @mpi_request: the request payload sent to FW 2501 * 2502 * The SCSI Enclosure Processor request message causes the IOC to 2503 * communicate with SES devices to control LED status signals. 2504 * 2505 * Returns 0 for success, non-zero for failure. 2506 */ 2507int 2508mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2509 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2510{ 2511 u16 smid; 2512 u32 ioc_state; 2513 unsigned long timeleft; 2514 u8 issue_reset; 2515 int rc; 2516 void *request; 2517 u16 wait_state_count; 2518 2519 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2520 __func__)); 2521 2522 mutex_lock(&ioc->base_cmds.mutex); 2523 2524 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2525 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2526 ioc->name, __func__); 2527 rc = -EAGAIN; 2528 goto out; 2529 } 2530 2531 wait_state_count = 0; 2532 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2533 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2534 if (wait_state_count++ == 10) { 2535 printk(MPT2SAS_ERR_FMT 2536 "%s: failed due to ioc not operational\n", 2537 ioc->name, __func__); 2538 rc = -EFAULT; 2539 goto out; 2540 } 2541 ssleep(1); 2542 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2543 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2544 "operational state(count=%d)\n", ioc->name, 2545 __func__, wait_state_count); 2546 } 2547 2548 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2549 if (!smid) { 2550 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2551 ioc->name, __func__); 2552 rc = -EAGAIN; 2553 goto out; 2554 } 2555 2556 rc = 0; 2557 ioc->base_cmds.status = MPT2_CMD_PENDING; 2558 request = mpt2sas_base_get_msg_frame(ioc, smid); 2559 ioc->base_cmds.smid = smid; 2560 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2561 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2562 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2563 msecs_to_jiffies(10000)); 2564 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2565 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2566 ioc->name, __func__); 2567 _debug_dump_mf(mpi_request, 2568 sizeof(Mpi2SepRequest_t)/4); 2569 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2570 issue_reset = 1; 2571 goto issue_host_reset; 2572 } 2573 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2574 memcpy(mpi_reply, ioc->base_cmds.reply, 2575 sizeof(Mpi2SepReply_t)); 2576 else 2577 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2578 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2579 goto out; 2580 2581 issue_host_reset: 2582 if (issue_reset) 2583 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2584 FORCE_BIG_HAMMER); 2585 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2586 rc = -EFAULT; 2587 out: 2588 mutex_unlock(&ioc->base_cmds.mutex); 2589 return rc; 2590} 2591 2592/** 2593 * _base_get_port_facts - obtain port facts reply and save in ioc 2594 * @ioc: per adapter object 2595 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2596 * 2597 * Returns 0 for success, non-zero for failure. 2598 */ 2599static int 2600_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2601{ 2602 Mpi2PortFactsRequest_t mpi_request; 2603 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2604 int mpi_reply_sz, mpi_request_sz, r; 2605 2606 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2607 __func__)); 2608 2609 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2610 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2611 memset(&mpi_request, 0, mpi_request_sz); 2612 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2613 mpi_request.PortNumber = port; 2614 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2615 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2616 2617 if (r != 0) { 2618 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2619 ioc->name, __func__, r); 2620 return r; 2621 } 2622 2623 pfacts = &ioc->pfacts[port]; 2624 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2625 pfacts->PortNumber = mpi_reply.PortNumber; 2626 pfacts->VP_ID = mpi_reply.VP_ID; 2627 pfacts->VF_ID = mpi_reply.VF_ID; 2628 pfacts->MaxPostedCmdBuffers = 2629 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2630 2631 return 0; 2632} 2633 2634/** 2635 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2636 * @ioc: per adapter object 2637 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2638 * 2639 * Returns 0 for success, non-zero for failure. 2640 */ 2641static int 2642_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2643{ 2644 Mpi2IOCFactsRequest_t mpi_request; 2645 Mpi2IOCFactsReply_t mpi_reply, *facts; 2646 int mpi_reply_sz, mpi_request_sz, r; 2647 2648 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2649 __func__)); 2650 2651 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2652 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2653 memset(&mpi_request, 0, mpi_request_sz); 2654 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2655 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2656 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2657 2658 if (r != 0) { 2659 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2660 ioc->name, __func__, r); 2661 return r; 2662 } 2663 2664 facts = &ioc->facts; 2665 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2666 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2667 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2668 facts->VP_ID = mpi_reply.VP_ID; 2669 facts->VF_ID = mpi_reply.VF_ID; 2670 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2671 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2672 facts->WhoInit = mpi_reply.WhoInit; 2673 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2674 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2675 facts->MaxReplyDescriptorPostQueueDepth = 2676 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2677 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2678 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2679 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2680 ioc->ir_firmware = 1; 2681 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2682 facts->IOCRequestFrameSize = 2683 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2684 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2685 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2686 ioc->shost->max_id = -1; 2687 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2688 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2689 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2690 facts->HighPriorityCredit = 2691 le16_to_cpu(mpi_reply.HighPriorityCredit); 2692 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2693 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2694 2695 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2696 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2697 facts->MaxChainDepth)); 2698 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2699 "reply frame size(%d)\n", ioc->name, 2700 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2701 return 0; 2702} 2703 2704/** 2705 * _base_send_ioc_init - send ioc_init to firmware 2706 * @ioc: per adapter object 2707 * @VF_ID: virtual function id 2708 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2709 * 2710 * Returns 0 for success, non-zero for failure. 2711 */ 2712static int 2713_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2714{ 2715 Mpi2IOCInitRequest_t mpi_request; 2716 Mpi2IOCInitReply_t mpi_reply; 2717 int r; 2718 2719 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2720 __func__)); 2721 2722 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2723 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2724 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2725 mpi_request.VF_ID = VF_ID; 2726 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2727 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2728 2729 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2730 * removed and made reserved. For those with older firmware will need 2731 * this fix. It was decided that the Reply and Request frame sizes are 2732 * the same. 2733 */ 2734 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2735 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2736/* mpi_request.SystemReplyFrameSize = 2737 * cpu_to_le16(ioc->reply_sz); 2738 */ 2739 } 2740 2741 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 2742 mpi_request.ReplyDescriptorPostQueueDepth = 2743 cpu_to_le16(ioc->reply_post_queue_depth); 2744 mpi_request.ReplyFreeQueueDepth = 2745 cpu_to_le16(ioc->reply_free_queue_depth); 2746 2747#if BITS_PER_LONG > 32 2748 mpi_request.SenseBufferAddressHigh = 2749 cpu_to_le32(ioc->sense_dma >> 32); 2750 mpi_request.SystemReplyAddressHigh = 2751 cpu_to_le32(ioc->reply_dma >> 32); 2752 mpi_request.SystemRequestFrameBaseAddress = 2753 cpu_to_le64(ioc->request_dma); 2754 mpi_request.ReplyFreeQueueAddress = 2755 cpu_to_le64(ioc->reply_free_dma); 2756 mpi_request.ReplyDescriptorPostQueueAddress = 2757 cpu_to_le64(ioc->reply_post_free_dma); 2758#else 2759 mpi_request.SystemRequestFrameBaseAddress = 2760 cpu_to_le32(ioc->request_dma); 2761 mpi_request.ReplyFreeQueueAddress = 2762 cpu_to_le32(ioc->reply_free_dma); 2763 mpi_request.ReplyDescriptorPostQueueAddress = 2764 cpu_to_le32(ioc->reply_post_free_dma); 2765#endif 2766 2767 if (ioc->logging_level & MPT_DEBUG_INIT) { 2768 u32 *mfp; 2769 int i; 2770 2771 mfp = (u32 *)&mpi_request; 2772 printk(KERN_DEBUG "\toffset:data\n"); 2773 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 2774 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2775 le32_to_cpu(mfp[i])); 2776 } 2777 2778 r = _base_handshake_req_reply_wait(ioc, 2779 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 2780 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 2781 sleep_flag); 2782 2783 if (r != 0) { 2784 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2785 ioc->name, __func__, r); 2786 return r; 2787 } 2788 2789 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS || 2790 mpi_reply.IOCLogInfo) { 2791 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 2792 r = -EIO; 2793 } 2794 2795 return 0; 2796} 2797 2798/** 2799 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 2800 * @ioc: per adapter object 2801 * @VF_ID: virtual function id 2802 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2803 * 2804 * Returns 0 for success, non-zero for failure. 2805 */ 2806static int 2807_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2808{ 2809 Mpi2PortEnableRequest_t *mpi_request; 2810 u32 ioc_state; 2811 unsigned long timeleft; 2812 int r = 0; 2813 u16 smid; 2814 2815 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 2816 2817 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2818 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2819 ioc->name, __func__); 2820 return -EAGAIN; 2821 } 2822 2823 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2824 if (!smid) { 2825 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2826 ioc->name, __func__); 2827 return -EAGAIN; 2828 } 2829 2830 ioc->base_cmds.status = MPT2_CMD_PENDING; 2831 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2832 ioc->base_cmds.smid = smid; 2833 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 2834 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 2835 mpi_request->VF_ID = VF_ID; 2836 2837 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2838 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2839 300*HZ); 2840 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2841 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2842 ioc->name, __func__); 2843 _debug_dump_mf(mpi_request, 2844 sizeof(Mpi2PortEnableRequest_t)/4); 2845 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2846 r = -EFAULT; 2847 else 2848 r = -ETIME; 2849 goto out; 2850 } else 2851 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2852 ioc->name, __func__)); 2853 2854 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 2855 60, sleep_flag); 2856 if (ioc_state) { 2857 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 2858 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2859 r = -EFAULT; 2860 } 2861 out: 2862 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2863 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 2864 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2865 return r; 2866} 2867 2868/** 2869 * _base_unmask_events - turn on notification for this event 2870 * @ioc: per adapter object 2871 * @event: firmware event 2872 * 2873 * The mask is stored in ioc->event_masks. 2874 */ 2875static void 2876_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 2877{ 2878 u32 desired_event; 2879 2880 if (event >= 128) 2881 return; 2882 2883 desired_event = (1 << (event % 32)); 2884 2885 if (event < 32) 2886 ioc->event_masks[0] &= ~desired_event; 2887 else if (event < 64) 2888 ioc->event_masks[1] &= ~desired_event; 2889 else if (event < 96) 2890 ioc->event_masks[2] &= ~desired_event; 2891 else if (event < 128) 2892 ioc->event_masks[3] &= ~desired_event; 2893} 2894 2895/** 2896 * _base_event_notification - send event notification 2897 * @ioc: per adapter object 2898 * @VF_ID: virtual function id 2899 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2900 * 2901 * Returns 0 for success, non-zero for failure. 2902 */ 2903static int 2904_base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2905{ 2906 Mpi2EventNotificationRequest_t *mpi_request; 2907 unsigned long timeleft; 2908 u16 smid; 2909 int r = 0; 2910 int i; 2911 2912 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2913 __func__)); 2914 2915 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2916 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2917 ioc->name, __func__); 2918 return -EAGAIN; 2919 } 2920 2921 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2922 if (!smid) { 2923 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2924 ioc->name, __func__); 2925 return -EAGAIN; 2926 } 2927 ioc->base_cmds.status = MPT2_CMD_PENDING; 2928 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2929 ioc->base_cmds.smid = smid; 2930 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 2931 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2932 mpi_request->VF_ID = VF_ID; 2933 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2934 mpi_request->EventMasks[i] = 2935 le32_to_cpu(ioc->event_masks[i]); 2936 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2937 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 2938 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2939 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2940 ioc->name, __func__); 2941 _debug_dump_mf(mpi_request, 2942 sizeof(Mpi2EventNotificationRequest_t)/4); 2943 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2944 r = -EFAULT; 2945 else 2946 r = -ETIME; 2947 } else 2948 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2949 ioc->name, __func__)); 2950 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2951 return r; 2952} 2953 2954/** 2955 * mpt2sas_base_validate_event_type - validating event types 2956 * @ioc: per adapter object 2957 * @event: firmware event 2958 * 2959 * This will turn on firmware event notification when application 2960 * ask for that event. We don't mask events that are already enabled. 2961 */ 2962void 2963mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 2964{ 2965 int i, j; 2966 u32 event_mask, desired_event; 2967 u8 send_update_to_fw; 2968 2969 for (i = 0, send_update_to_fw = 0; i < 2970 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 2971 event_mask = ~event_type[i]; 2972 desired_event = 1; 2973 for (j = 0; j < 32; j++) { 2974 if (!(event_mask & desired_event) && 2975 (ioc->event_masks[i] & desired_event)) { 2976 ioc->event_masks[i] &= ~desired_event; 2977 send_update_to_fw = 1; 2978 } 2979 desired_event = (desired_event << 1); 2980 } 2981 } 2982 2983 if (!send_update_to_fw) 2984 return; 2985 2986 mutex_lock(&ioc->base_cmds.mutex); 2987 _base_event_notification(ioc, 0, CAN_SLEEP); 2988 mutex_unlock(&ioc->base_cmds.mutex); 2989} 2990 2991/** 2992 * _base_diag_reset - the "big hammer" start of day reset 2993 * @ioc: per adapter object 2994 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2995 * 2996 * Returns 0 for success, non-zero for failure. 2997 */ 2998static int 2999_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3000{ 3001 u32 host_diagnostic; 3002 u32 ioc_state; 3003 u32 count; 3004 u32 hcb_size; 3005 3006 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3007 3008 _base_save_msix_table(ioc); 3009 3010 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 3011 ioc->name)); 3012 writel(0, &ioc->chip->HostInterruptStatus); 3013 3014 count = 0; 3015 do { 3016 /* Write magic sequence to WriteSequence register 3017 * Loop until in diagnostic mode 3018 */ 3019 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 3020 "sequence\n", ioc->name)); 3021 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3022 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3023 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3024 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3025 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3026 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3027 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3028 3029 /* wait 100 msec */ 3030 if (sleep_flag == CAN_SLEEP) 3031 msleep(100); 3032 else 3033 mdelay(100); 3034 3035 if (count++ > 20) 3036 goto out; 3037 3038 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3039 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 3040 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3041 ioc->name, count, host_diagnostic)); 3042 3043 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3044 3045 hcb_size = readl(&ioc->chip->HCBSize); 3046 3047 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 3048 ioc->name)); 3049 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3050 &ioc->chip->HostDiagnostic); 3051 3052 /* don't access any registers for 50 milliseconds */ 3053 msleep(50); 3054 3055 /* 300 second max wait */ 3056 for (count = 0; count < 3000000 ; count++) { 3057 3058 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3059 3060 if (host_diagnostic == 0xFFFFFFFF) 3061 goto out; 3062 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3063 break; 3064 3065 /* wait 100 msec */ 3066 if (sleep_flag == CAN_SLEEP) 3067 msleep(1); 3068 else 3069 mdelay(1); 3070 } 3071 3072 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3073 3074 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3075 "assuming the HCB Address points to good F/W\n", 3076 ioc->name)); 3077 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3078 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3079 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3080 3081 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3082 "re-enable the HCDW\n", ioc->name)); 3083 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3084 &ioc->chip->HCBSize); 3085 } 3086 3087 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3088 ioc->name)); 3089 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3090 &ioc->chip->HostDiagnostic); 3091 3092 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3093 "diagnostic register\n", ioc->name)); 3094 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3095 3096 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3097 "READY state\n", ioc->name)); 3098 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3099 sleep_flag); 3100 if (ioc_state) { 3101 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3102 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3103 goto out; 3104 } 3105 3106 _base_restore_msix_table(ioc); 3107 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3108 return 0; 3109 3110 out: 3111 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3112 return -EFAULT; 3113} 3114 3115/** 3116 * _base_make_ioc_ready - put controller in READY state 3117 * @ioc: per adapter object 3118 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3119 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3120 * 3121 * Returns 0 for success, non-zero for failure. 3122 */ 3123static int 3124_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3125 enum reset_type type) 3126{ 3127 u32 ioc_state; 3128 3129 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3130 __func__)); 3131 3132 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3133 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3134 ioc->name, __func__, ioc_state)); 3135 3136 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3137 return 0; 3138 3139 if (ioc_state & MPI2_DOORBELL_USED) { 3140 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3141 "active!\n", ioc->name)); 3142 goto issue_diag_reset; 3143 } 3144 3145 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3146 mpt2sas_base_fault_info(ioc, ioc_state & 3147 MPI2_DOORBELL_DATA_MASK); 3148 goto issue_diag_reset; 3149 } 3150 3151 if (type == FORCE_BIG_HAMMER) 3152 goto issue_diag_reset; 3153 3154 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3155 if (!(_base_send_ioc_reset(ioc, 3156 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3157 return 0; 3158 3159 issue_diag_reset: 3160 return _base_diag_reset(ioc, CAN_SLEEP); 3161} 3162 3163/** 3164 * _base_make_ioc_operational - put controller in OPERATIONAL state 3165 * @ioc: per adapter object 3166 * @VF_ID: virtual function id 3167 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3168 * 3169 * Returns 0 for success, non-zero for failure. 3170 */ 3171static int 3172_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, 3173 int sleep_flag) 3174{ 3175 int r, i; 3176 unsigned long flags; 3177 u32 reply_address; 3178 3179 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3180 __func__)); 3181 3182 /* initialize the scsi lookup free list */ 3183 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3184 INIT_LIST_HEAD(&ioc->free_list); 3185 for (i = 0; i < ioc->request_depth; i++) { 3186 ioc->scsi_lookup[i].cb_idx = 0xFF; 3187 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3188 &ioc->free_list); 3189 } 3190 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3191 3192 /* initialize Reply Free Queue */ 3193 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3194 i < ioc->reply_free_queue_depth ; i++, reply_address += 3195 ioc->reply_sz) 3196 ioc->reply_free[i] = cpu_to_le32(reply_address); 3197 3198 /* initialize Reply Post Free Queue */ 3199 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3200 ioc->reply_post_free[i].Words = ULLONG_MAX; 3201 3202 r = _base_send_ioc_init(ioc, VF_ID, sleep_flag); 3203 if (r) 3204 return r; 3205 3206 /* initialize the index's */ 3207 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3208 ioc->reply_post_host_index = 0; 3209 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3210 writel(0, &ioc->chip->ReplyPostHostIndex); 3211 3212 _base_unmask_interrupts(ioc); 3213 r = _base_event_notification(ioc, VF_ID, sleep_flag); 3214 if (r) 3215 return r; 3216 3217 if (sleep_flag == CAN_SLEEP) 3218 _base_static_config_pages(ioc); 3219 3220 r = _base_send_port_enable(ioc, VF_ID, sleep_flag); 3221 if (r) 3222 return r; 3223 3224 return r; 3225} 3226 3227/** 3228 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3229 * @ioc: per adapter object 3230 * 3231 * Return nothing. 3232 */ 3233void 3234mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3235{ 3236 struct pci_dev *pdev = ioc->pdev; 3237 3238 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3239 __func__)); 3240 3241 _base_mask_interrupts(ioc); 3242 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3243 if (ioc->pci_irq) { 3244 synchronize_irq(pdev->irq); 3245 free_irq(ioc->pci_irq, ioc); 3246 } 3247 _base_disable_msix(ioc); 3248 if (ioc->chip_phys) 3249 iounmap(ioc->chip); 3250 ioc->pci_irq = -1; 3251 ioc->chip_phys = 0; 3252 pci_release_selected_regions(ioc->pdev, ioc->bars); 3253 pci_disable_device(pdev); 3254 return; 3255} 3256 3257/** 3258 * mpt2sas_base_attach - attach controller instance 3259 * @ioc: per adapter object 3260 * 3261 * Returns 0 for success, non-zero for failure. 3262 */ 3263int 3264mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3265{ 3266 int r, i; 3267 3268 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3269 __func__)); 3270 3271 r = mpt2sas_base_map_resources(ioc); 3272 if (r) 3273 return r; 3274 3275 pci_set_drvdata(ioc->pdev, ioc->shost); 3276 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3277 if (r) 3278 goto out_free_resources; 3279 3280 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3281 if (r) 3282 goto out_free_resources; 3283 3284 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3285 if (r) 3286 goto out_free_resources; 3287 3288 init_waitqueue_head(&ioc->reset_wq); 3289 3290 /* base internal command bits */ 3291 mutex_init(&ioc->base_cmds.mutex); 3292 init_completion(&ioc->base_cmds.done); 3293 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3294 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3295 3296 /* transport internal command bits */ 3297 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3298 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3299 mutex_init(&ioc->transport_cmds.mutex); 3300 init_completion(&ioc->transport_cmds.done); 3301 3302 /* task management internal command bits */ 3303 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3304 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3305 mutex_init(&ioc->tm_cmds.mutex); 3306 init_completion(&ioc->tm_cmds.done); 3307 3308 /* config page internal command bits */ 3309 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3310 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3311 mutex_init(&ioc->config_cmds.mutex); 3312 init_completion(&ioc->config_cmds.done); 3313 3314 /* ctl module internal command bits */ 3315 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3316 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3317 mutex_init(&ioc->ctl_cmds.mutex); 3318 init_completion(&ioc->ctl_cmds.done); 3319 3320 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3321 ioc->event_masks[i] = -1; 3322 3323 /* here we enable the events we care about */ 3324 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3325 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3326 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3327 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3328 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3329 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3330 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3331 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3332 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3333 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3334 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3335 3336 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3337 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3338 if (!ioc->pfacts) 3339 goto out_free_resources; 3340 3341 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3342 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3343 if (r) 3344 goto out_free_resources; 3345 } 3346 r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP); 3347 if (r) 3348 goto out_free_resources; 3349 3350 mpt2sas_base_start_watchdog(ioc); 3351 return 0; 3352 3353 out_free_resources: 3354 3355 ioc->remove_host = 1; 3356 mpt2sas_base_free_resources(ioc); 3357 _base_release_memory_pools(ioc); 3358 pci_set_drvdata(ioc->pdev, NULL); 3359 kfree(ioc->tm_cmds.reply); 3360 kfree(ioc->transport_cmds.reply); 3361 kfree(ioc->config_cmds.reply); 3362 kfree(ioc->base_cmds.reply); 3363 kfree(ioc->ctl_cmds.reply); 3364 kfree(ioc->pfacts); 3365 ioc->ctl_cmds.reply = NULL; 3366 ioc->base_cmds.reply = NULL; 3367 ioc->tm_cmds.reply = NULL; 3368 ioc->transport_cmds.reply = NULL; 3369 ioc->config_cmds.reply = NULL; 3370 ioc->pfacts = NULL; 3371 return r; 3372} 3373 3374 3375/** 3376 * mpt2sas_base_detach - remove controller instance 3377 * @ioc: per adapter object 3378 * 3379 * Return nothing. 3380 */ 3381void 3382mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3383{ 3384 3385 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3386 __func__)); 3387 3388 mpt2sas_base_stop_watchdog(ioc); 3389 mpt2sas_base_free_resources(ioc); 3390 _base_release_memory_pools(ioc); 3391 pci_set_drvdata(ioc->pdev, NULL); 3392 kfree(ioc->pfacts); 3393 kfree(ioc->ctl_cmds.reply); 3394 kfree(ioc->base_cmds.reply); 3395 kfree(ioc->tm_cmds.reply); 3396 kfree(ioc->transport_cmds.reply); 3397 kfree(ioc->config_cmds.reply); 3398} 3399 3400/** 3401 * _base_reset_handler - reset callback handler (for base) 3402 * @ioc: per adapter object 3403 * @reset_phase: phase 3404 * 3405 * The handler for doing any required cleanup or initialization. 3406 * 3407 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3408 * MPT2_IOC_DONE_RESET 3409 * 3410 * Return nothing. 3411 */ 3412static void 3413_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3414{ 3415 switch (reset_phase) { 3416 case MPT2_IOC_PRE_RESET: 3417 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3418 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3419 break; 3420 case MPT2_IOC_AFTER_RESET: 3421 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3422 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3423 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3424 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3425 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3426 complete(&ioc->transport_cmds.done); 3427 } 3428 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3429 ioc->base_cmds.status |= MPT2_CMD_RESET; 3430 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3431 complete(&ioc->base_cmds.done); 3432 } 3433 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3434 ioc->config_cmds.status |= MPT2_CMD_RESET; 3435 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3436 complete(&ioc->config_cmds.done); 3437 } 3438 break; 3439 case MPT2_IOC_DONE_RESET: 3440 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3441 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3442 break; 3443 } 3444 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3445 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3446} 3447 3448/** 3449 * _wait_for_commands_to_complete - reset controller 3450 * @ioc: Pointer to MPT_ADAPTER structure 3451 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3452 * 3453 * This function waiting(3s) for all pending commands to complete 3454 * prior to putting controller in reset. 3455 */ 3456static void 3457_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3458{ 3459 u32 ioc_state; 3460 unsigned long flags; 3461 u16 i; 3462 3463 ioc->pending_io_count = 0; 3464 if (sleep_flag != CAN_SLEEP) 3465 return; 3466 3467 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3468 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3469 return; 3470 3471 /* pending command count */ 3472 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3473 for (i = 0; i < ioc->request_depth; i++) 3474 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3475 ioc->pending_io_count++; 3476 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3477 3478 if (!ioc->pending_io_count) 3479 return; 3480 3481 /* wait for pending commands to complete */ 3482 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3483} 3484 3485/** 3486 * mpt2sas_base_hard_reset_handler - reset controller 3487 * @ioc: Pointer to MPT_ADAPTER structure 3488 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3489 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3490 * 3491 * Returns 0 for success, non-zero for failure. 3492 */ 3493int 3494mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3495 enum reset_type type) 3496{ 3497 int r, i; 3498 unsigned long flags; 3499 3500 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3501 __func__)); 3502 3503 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3504 if (ioc->ioc_reset_in_progress) { 3505 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3506 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3507 ioc->name, __func__); 3508 return -EBUSY; 3509 } 3510 ioc->ioc_reset_in_progress = 1; 3511 ioc->shost_recovery = 1; 3512 if (ioc->shost->shost_state == SHOST_RUNNING) { 3513 /* set back to SHOST_RUNNING in mpt2sas_scsih.c */ 3514 scsi_host_set_state(ioc->shost, SHOST_RECOVERY); 3515 printk(MPT2SAS_INFO_FMT "putting controller into " 3516 "SHOST_RECOVERY\n", ioc->name); 3517 } 3518 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3519 3520 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3521 _wait_for_commands_to_complete(ioc, sleep_flag); 3522 _base_mask_interrupts(ioc); 3523 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3524 if (r) 3525 goto out; 3526 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3527 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) 3528 r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID, 3529 sleep_flag); 3530 if (!r) 3531 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3532 out: 3533 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3534 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3535 3536 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3537 ioc->ioc_reset_in_progress = 0; 3538 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3539 3540 if (!r) 3541 _base_reset_handler(ioc, MPT2_IOC_RUNNING); 3542 return r; 3543} 3544