mpt2sas_base.c revision e4750c989f732555fca86dd73d488c79972362db
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2008 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60 61#include "mpt2sas_base.h" 62 63static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 64 65#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 66#define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */ 67 68static int max_queue_depth = -1; 69module_param(max_queue_depth, int, 0); 70MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 71 72static int max_sgl_entries = -1; 73module_param(max_sgl_entries, int, 0); 74MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 75 76static int msix_disable = -1; 77module_param(msix_disable, int, 0); 78MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 79 80/** 81 * _base_fault_reset_work - workq handling ioc fault conditions 82 * @work: input argument, used to derive ioc 83 * Context: sleep. 84 * 85 * Return nothing. 86 */ 87static void 88_base_fault_reset_work(struct work_struct *work) 89{ 90 struct MPT2SAS_ADAPTER *ioc = 91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 92 unsigned long flags; 93 u32 doorbell; 94 int rc; 95 96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 97 if (ioc->ioc_reset_in_progress) 98 goto rearm_timer; 99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 100 101 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 104 FORCE_BIG_HAMMER); 105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 106 __func__, (rc == 0) ? "success" : "failed"); 107 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 109 mpt2sas_base_fault_info(ioc, doorbell & 110 MPI2_DOORBELL_DATA_MASK); 111 } 112 113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 114 rearm_timer: 115 if (ioc->fault_reset_work_q) 116 queue_delayed_work(ioc->fault_reset_work_q, 117 &ioc->fault_reset_work, 118 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 120} 121 122/** 123 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 124 * @ioc: pointer to scsi command object 125 * Context: sleep. 126 * 127 * Return nothing. 128 */ 129void 130mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 131{ 132 unsigned long flags; 133 134 if (ioc->fault_reset_work_q) 135 return; 136 137 /* initialize fault polling */ 138 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 139 snprintf(ioc->fault_reset_work_q_name, 140 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 141 ioc->fault_reset_work_q = 142 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 143 if (!ioc->fault_reset_work_q) { 144 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 145 ioc->name, __func__, __LINE__); 146 return; 147 } 148 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 149 if (ioc->fault_reset_work_q) 150 queue_delayed_work(ioc->fault_reset_work_q, 151 &ioc->fault_reset_work, 152 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 153 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 154} 155 156/** 157 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 158 * @ioc: pointer to scsi command object 159 * Context: sleep. 160 * 161 * Return nothing. 162 */ 163void 164mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 165{ 166 unsigned long flags; 167 struct workqueue_struct *wq; 168 169 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 170 wq = ioc->fault_reset_work_q; 171 ioc->fault_reset_work_q = NULL; 172 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 173 if (wq) { 174 if (!cancel_delayed_work(&ioc->fault_reset_work)) 175 flush_workqueue(wq); 176 destroy_workqueue(wq); 177 } 178} 179 180#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 181/** 182 * _base_sas_ioc_info - verbose translation of the ioc status 183 * @ioc: pointer to scsi command object 184 * @mpi_reply: reply mf payload returned from firmware 185 * @request_hdr: request mf 186 * 187 * Return nothing. 188 */ 189static void 190_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 191 MPI2RequestHeader_t *request_hdr) 192{ 193 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 194 MPI2_IOCSTATUS_MASK; 195 char *desc = NULL; 196 u16 frame_sz; 197 char *func_str = NULL; 198 199 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 200 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 201 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 202 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 203 return; 204 205 switch (ioc_status) { 206 207/**************************************************************************** 208* Common IOCStatus values for all replies 209****************************************************************************/ 210 211 case MPI2_IOCSTATUS_INVALID_FUNCTION: 212 desc = "invalid function"; 213 break; 214 case MPI2_IOCSTATUS_BUSY: 215 desc = "busy"; 216 break; 217 case MPI2_IOCSTATUS_INVALID_SGL: 218 desc = "invalid sgl"; 219 break; 220 case MPI2_IOCSTATUS_INTERNAL_ERROR: 221 desc = "internal error"; 222 break; 223 case MPI2_IOCSTATUS_INVALID_VPID: 224 desc = "invalid vpid"; 225 break; 226 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 227 desc = "insufficient resources"; 228 break; 229 case MPI2_IOCSTATUS_INVALID_FIELD: 230 desc = "invalid field"; 231 break; 232 case MPI2_IOCSTATUS_INVALID_STATE: 233 desc = "invalid state"; 234 break; 235 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 236 desc = "op state not supported"; 237 break; 238 239/**************************************************************************** 240* Config IOCStatus values 241****************************************************************************/ 242 243 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 244 desc = "config invalid action"; 245 break; 246 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 247 desc = "config invalid type"; 248 break; 249 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 250 desc = "config invalid page"; 251 break; 252 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 253 desc = "config invalid data"; 254 break; 255 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 256 desc = "config no defaults"; 257 break; 258 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 259 desc = "config cant commit"; 260 break; 261 262/**************************************************************************** 263* SCSI IO Reply 264****************************************************************************/ 265 266 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 267 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 268 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 269 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 270 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 271 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 272 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 273 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 274 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 275 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 276 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 277 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 278 break; 279 280/**************************************************************************** 281* For use by SCSI Initiator and SCSI Target end-to-end data protection 282****************************************************************************/ 283 284 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 285 desc = "eedp guard error"; 286 break; 287 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 288 desc = "eedp ref tag error"; 289 break; 290 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 291 desc = "eedp app tag error"; 292 break; 293 294/**************************************************************************** 295* SCSI Target values 296****************************************************************************/ 297 298 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 299 desc = "target invalid io index"; 300 break; 301 case MPI2_IOCSTATUS_TARGET_ABORTED: 302 desc = "target aborted"; 303 break; 304 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 305 desc = "target no conn retryable"; 306 break; 307 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 308 desc = "target no connection"; 309 break; 310 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 311 desc = "target xfer count mismatch"; 312 break; 313 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 314 desc = "target data offset error"; 315 break; 316 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 317 desc = "target too much write data"; 318 break; 319 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 320 desc = "target iu too short"; 321 break; 322 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 323 desc = "target ack nak timeout"; 324 break; 325 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 326 desc = "target nak received"; 327 break; 328 329/**************************************************************************** 330* Serial Attached SCSI values 331****************************************************************************/ 332 333 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 334 desc = "smp request failed"; 335 break; 336 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 337 desc = "smp data overrun"; 338 break; 339 340/**************************************************************************** 341* Diagnostic Buffer Post / Diagnostic Release values 342****************************************************************************/ 343 344 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 345 desc = "diagnostic released"; 346 break; 347 default: 348 break; 349 } 350 351 if (!desc) 352 return; 353 354 switch (request_hdr->Function) { 355 case MPI2_FUNCTION_CONFIG: 356 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 357 func_str = "config_page"; 358 break; 359 case MPI2_FUNCTION_SCSI_TASK_MGMT: 360 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 361 func_str = "task_mgmt"; 362 break; 363 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 364 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 365 func_str = "sas_iounit_ctl"; 366 break; 367 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 368 frame_sz = sizeof(Mpi2SepRequest_t); 369 func_str = "enclosure"; 370 break; 371 case MPI2_FUNCTION_IOC_INIT: 372 frame_sz = sizeof(Mpi2IOCInitRequest_t); 373 func_str = "ioc_init"; 374 break; 375 case MPI2_FUNCTION_PORT_ENABLE: 376 frame_sz = sizeof(Mpi2PortEnableRequest_t); 377 func_str = "port_enable"; 378 break; 379 case MPI2_FUNCTION_SMP_PASSTHROUGH: 380 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 381 func_str = "smp_passthru"; 382 break; 383 default: 384 frame_sz = 32; 385 func_str = "unknown"; 386 break; 387 } 388 389 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 390 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 391 392 _debug_dump_mf(request_hdr, frame_sz/4); 393} 394 395/** 396 * _base_display_event_data - verbose translation of firmware asyn events 397 * @ioc: pointer to scsi command object 398 * @mpi_reply: reply mf payload returned from firmware 399 * 400 * Return nothing. 401 */ 402static void 403_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 404 Mpi2EventNotificationReply_t *mpi_reply) 405{ 406 char *desc = NULL; 407 u16 event; 408 409 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 410 return; 411 412 event = le16_to_cpu(mpi_reply->Event); 413 414 switch (event) { 415 case MPI2_EVENT_LOG_DATA: 416 desc = "Log Data"; 417 break; 418 case MPI2_EVENT_STATE_CHANGE: 419 desc = "Status Change"; 420 break; 421 case MPI2_EVENT_HARD_RESET_RECEIVED: 422 desc = "Hard Reset Received"; 423 break; 424 case MPI2_EVENT_EVENT_CHANGE: 425 desc = "Event Change"; 426 break; 427 case MPI2_EVENT_TASK_SET_FULL: 428 desc = "Task Set Full"; 429 break; 430 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 431 desc = "Device Status Change"; 432 break; 433 case MPI2_EVENT_IR_OPERATION_STATUS: 434 desc = "IR Operation Status"; 435 break; 436 case MPI2_EVENT_SAS_DISCOVERY: 437 desc = "Discovery"; 438 break; 439 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 440 desc = "SAS Broadcast Primitive"; 441 break; 442 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 443 desc = "SAS Init Device Status Change"; 444 break; 445 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 446 desc = "SAS Init Table Overflow"; 447 break; 448 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 449 desc = "SAS Topology Change List"; 450 break; 451 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 452 desc = "SAS Enclosure Device Status Change"; 453 break; 454 case MPI2_EVENT_IR_VOLUME: 455 desc = "IR Volume"; 456 break; 457 case MPI2_EVENT_IR_PHYSICAL_DISK: 458 desc = "IR Physical Disk"; 459 break; 460 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 461 desc = "IR Configuration Change List"; 462 break; 463 case MPI2_EVENT_LOG_ENTRY_ADDED: 464 desc = "Log Entry Added"; 465 break; 466 } 467 468 if (!desc) 469 return; 470 471 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 472} 473#endif 474 475/** 476 * _base_sas_log_info - verbose translation of firmware log info 477 * @ioc: pointer to scsi command object 478 * @log_info: log info 479 * 480 * Return nothing. 481 */ 482static void 483_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 484{ 485 union loginfo_type { 486 u32 loginfo; 487 struct { 488 u32 subcode:16; 489 u32 code:8; 490 u32 originator:4; 491 u32 bus_type:4; 492 } dw; 493 }; 494 union loginfo_type sas_loginfo; 495 char *originator_str = NULL; 496 497 sas_loginfo.loginfo = log_info; 498 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 499 return; 500 501 /* each nexus loss loginfo */ 502 if (log_info == 0x31170000) 503 return; 504 505 /* eat the loginfos associated with task aborts */ 506 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 507 0x31140000 || log_info == 0x31130000)) 508 return; 509 510 switch (sas_loginfo.dw.originator) { 511 case 0: 512 originator_str = "IOP"; 513 break; 514 case 1: 515 originator_str = "PL"; 516 break; 517 case 2: 518 originator_str = "IR"; 519 break; 520 } 521 522 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 523 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 524 originator_str, sas_loginfo.dw.code, 525 sas_loginfo.dw.subcode); 526} 527 528/** 529 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 530 * @ioc: pointer to scsi command object 531 * @fault_code: fault code 532 * 533 * Return nothing. 534 */ 535void 536mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 537{ 538 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 539 ioc->name, fault_code); 540} 541 542/** 543 * _base_display_reply_info - 544 * @ioc: pointer to scsi command object 545 * @smid: system request message index 546 * @VF_ID: virtual function id 547 * @reply: reply message frame(lower 32bit addr) 548 * 549 * Return nothing. 550 */ 551static void 552_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, 553 u32 reply) 554{ 555 MPI2DefaultReply_t *mpi_reply; 556 u16 ioc_status; 557 558 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 559 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 560#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 561 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 562 (ioc->logging_level & MPT_DEBUG_REPLY)) { 563 _base_sas_ioc_info(ioc , mpi_reply, 564 mpt2sas_base_get_msg_frame(ioc, smid)); 565 } 566#endif 567 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 568 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 569} 570 571/** 572 * mpt2sas_base_done - base internal command completion routine 573 * @ioc: pointer to scsi command object 574 * @smid: system request message index 575 * @VF_ID: virtual function id 576 * @reply: reply message frame(lower 32bit addr) 577 * 578 * Return nothing. 579 */ 580void 581mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply) 582{ 583 MPI2DefaultReply_t *mpi_reply; 584 585 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 586 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 587 return; 588 589 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 590 return; 591 592 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 593 if (mpi_reply) { 594 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 595 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 596 } 597 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 598 complete(&ioc->base_cmds.done); 599} 600 601/** 602 * _base_async_event - main callback handler for firmware asyn events 603 * @ioc: pointer to scsi command object 604 * @VF_ID: virtual function id 605 * @reply: reply message frame(lower 32bit addr) 606 * 607 * Return nothing. 608 */ 609static void 610_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply) 611{ 612 Mpi2EventNotificationReply_t *mpi_reply; 613 Mpi2EventAckRequest_t *ack_request; 614 u16 smid; 615 616 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 617 if (!mpi_reply) 618 return; 619 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 620 return; 621#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 622 _base_display_event_data(ioc, mpi_reply); 623#endif 624 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 625 goto out; 626 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 627 if (!smid) { 628 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 629 ioc->name, __func__); 630 goto out; 631 } 632 633 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 634 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 635 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 636 ack_request->Event = mpi_reply->Event; 637 ack_request->EventContext = mpi_reply->EventContext; 638 ack_request->VF_ID = VF_ID; 639 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 640 641 out: 642 643 /* scsih callback handler */ 644 mpt2sas_scsih_event_callback(ioc, VF_ID, reply); 645 646 /* ctl callback handler */ 647 mpt2sas_ctl_event_callback(ioc, VF_ID, reply); 648} 649 650/** 651 * _base_mask_interrupts - disable interrupts 652 * @ioc: pointer to scsi command object 653 * 654 * Disabling ResetIRQ, Reply and Doorbell Interrupts 655 * 656 * Return nothing. 657 */ 658static void 659_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 660{ 661 u32 him_register; 662 663 ioc->mask_interrupts = 1; 664 him_register = readl(&ioc->chip->HostInterruptMask); 665 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 666 writel(him_register, &ioc->chip->HostInterruptMask); 667 readl(&ioc->chip->HostInterruptMask); 668} 669 670/** 671 * _base_unmask_interrupts - enable interrupts 672 * @ioc: pointer to scsi command object 673 * 674 * Enabling only Reply Interrupts 675 * 676 * Return nothing. 677 */ 678static void 679_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 680{ 681 u32 him_register; 682 683 writel(0, &ioc->chip->HostInterruptStatus); 684 him_register = readl(&ioc->chip->HostInterruptMask); 685 him_register &= ~MPI2_HIM_RIM; 686 writel(him_register, &ioc->chip->HostInterruptMask); 687 ioc->mask_interrupts = 0; 688} 689 690/** 691 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 692 * @irq: irq number (not used) 693 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 694 * @r: pt_regs pointer (not used) 695 * 696 * Return IRQ_HANDLE if processed, else IRQ_NONE. 697 */ 698static irqreturn_t 699_base_interrupt(int irq, void *bus_id) 700{ 701 union reply_descriptor { 702 u64 word; 703 struct { 704 u32 low; 705 u32 high; 706 } u; 707 }; 708 union reply_descriptor rd; 709 u32 post_index, post_index_next, completed_cmds; 710 u8 request_desript_type; 711 u16 smid; 712 u8 cb_idx; 713 u32 reply; 714 u8 VF_ID; 715 int i; 716 struct MPT2SAS_ADAPTER *ioc = bus_id; 717 718 if (ioc->mask_interrupts) 719 return IRQ_NONE; 720 721 post_index = ioc->reply_post_host_index; 722 request_desript_type = ioc->reply_post_free[post_index]. 723 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 724 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 725 return IRQ_NONE; 726 727 completed_cmds = 0; 728 do { 729 rd.word = ioc->reply_post_free[post_index].Words; 730 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 731 goto out; 732 reply = 0; 733 cb_idx = 0xFF; 734 smid = le16_to_cpu(ioc->reply_post_free[post_index]. 735 Default.DescriptorTypeDependent1); 736 VF_ID = ioc->reply_post_free[post_index]. 737 Default.VF_ID; 738 if (request_desript_type == 739 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 740 reply = le32_to_cpu(ioc->reply_post_free[post_index]. 741 AddressReply.ReplyFrameAddress); 742 } else if (request_desript_type == 743 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 744 goto next; 745 else if (request_desript_type == 746 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 747 goto next; 748 if (smid) 749 cb_idx = ioc->scsi_lookup[smid - 1].cb_idx; 750 if (smid && cb_idx != 0xFF) { 751 mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply); 752 if (reply) 753 _base_display_reply_info(ioc, smid, VF_ID, 754 reply); 755 mpt2sas_base_free_smid(ioc, smid); 756 } 757 if (!smid) 758 _base_async_event(ioc, VF_ID, reply); 759 760 /* reply free queue handling */ 761 if (reply) { 762 ioc->reply_free_host_index = 763 (ioc->reply_free_host_index == 764 (ioc->reply_free_queue_depth - 1)) ? 765 0 : ioc->reply_free_host_index + 1; 766 ioc->reply_free[ioc->reply_free_host_index] = 767 cpu_to_le32(reply); 768 writel(ioc->reply_free_host_index, 769 &ioc->chip->ReplyFreeHostIndex); 770 wmb(); 771 } 772 773 next: 774 post_index_next = (post_index == (ioc->reply_post_queue_depth - 775 1)) ? 0 : post_index + 1; 776 request_desript_type = 777 ioc->reply_post_free[post_index_next].Default.ReplyFlags 778 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 779 completed_cmds++; 780 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 781 goto out; 782 post_index = post_index_next; 783 } while (1); 784 785 out: 786 787 if (!completed_cmds) 788 return IRQ_NONE; 789 790 /* reply post descriptor handling */ 791 post_index_next = ioc->reply_post_host_index; 792 for (i = 0 ; i < completed_cmds; i++) { 793 post_index = post_index_next; 794 /* poison the reply post descriptor */ 795 ioc->reply_post_free[post_index_next].Words = ULLONG_MAX; 796 post_index_next = (post_index == 797 (ioc->reply_post_queue_depth - 1)) 798 ? 0 : post_index + 1; 799 } 800 ioc->reply_post_host_index = post_index_next; 801 writel(post_index_next, &ioc->chip->ReplyPostHostIndex); 802 wmb(); 803 return IRQ_HANDLED; 804} 805 806/** 807 * mpt2sas_base_release_callback_handler - clear interupt callback handler 808 * @cb_idx: callback index 809 * 810 * Return nothing. 811 */ 812void 813mpt2sas_base_release_callback_handler(u8 cb_idx) 814{ 815 mpt_callbacks[cb_idx] = NULL; 816} 817 818/** 819 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 820 * @cb_func: callback function 821 * 822 * Returns cb_func. 823 */ 824u8 825mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 826{ 827 u8 cb_idx; 828 829 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 830 if (mpt_callbacks[cb_idx] == NULL) 831 break; 832 833 mpt_callbacks[cb_idx] = cb_func; 834 return cb_idx; 835} 836 837/** 838 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 839 * 840 * Return nothing. 841 */ 842void 843mpt2sas_base_initialize_callback_handler(void) 844{ 845 u8 cb_idx; 846 847 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 848 mpt2sas_base_release_callback_handler(cb_idx); 849} 850 851/** 852 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 853 * @ioc: per adapter object 854 * @paddr: virtual address for SGE 855 * 856 * Create a zero length scatter gather entry to insure the IOCs hardware has 857 * something to use if the target device goes brain dead and tries 858 * to send data even when none is asked for. 859 * 860 * Return nothing. 861 */ 862void 863mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 864{ 865 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 866 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 867 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 868 MPI2_SGE_FLAGS_SHIFT); 869 ioc->base_add_sg_single(paddr, flags_length, -1); 870} 871 872/** 873 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 874 * @paddr: virtual address for SGE 875 * @flags_length: SGE flags and data transfer length 876 * @dma_addr: Physical address 877 * 878 * Return nothing. 879 */ 880static void 881_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 882{ 883 Mpi2SGESimple32_t *sgel = paddr; 884 885 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 886 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 887 sgel->FlagsLength = cpu_to_le32(flags_length); 888 sgel->Address = cpu_to_le32(dma_addr); 889} 890 891 892/** 893 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 894 * @paddr: virtual address for SGE 895 * @flags_length: SGE flags and data transfer length 896 * @dma_addr: Physical address 897 * 898 * Return nothing. 899 */ 900static void 901_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 902{ 903 Mpi2SGESimple64_t *sgel = paddr; 904 905 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 906 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 907 sgel->FlagsLength = cpu_to_le32(flags_length); 908 sgel->Address = cpu_to_le64(dma_addr); 909} 910 911#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 912 913/** 914 * _base_config_dma_addressing - set dma addressing 915 * @ioc: per adapter object 916 * @pdev: PCI device struct 917 * 918 * Returns 0 for success, non-zero for failure. 919 */ 920static int 921_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 922{ 923 struct sysinfo s; 924 char *desc = NULL; 925 926 if (sizeof(dma_addr_t) > 4) { 927 const uint64_t required_mask = 928 dma_get_required_mask(&pdev->dev); 929 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 930 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 931 DMA_BIT_MASK(64))) { 932 ioc->base_add_sg_single = &_base_add_sg_single_64; 933 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 934 desc = "64"; 935 goto out; 936 } 937 } 938 939 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 940 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 941 ioc->base_add_sg_single = &_base_add_sg_single_32; 942 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 943 desc = "32"; 944 } else 945 return -ENODEV; 946 947 out: 948 si_meminfo(&s); 949 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 950 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 951 952 return 0; 953} 954 955/** 956 * _base_save_msix_table - backup msix vector table 957 * @ioc: per adapter object 958 * 959 * This address an errata where diag reset clears out the table 960 */ 961static void 962_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 963{ 964 int i; 965 966 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 967 return; 968 969 for (i = 0; i < ioc->msix_vector_count; i++) 970 ioc->msix_table_backup[i] = ioc->msix_table[i]; 971} 972 973/** 974 * _base_restore_msix_table - this restores the msix vector table 975 * @ioc: per adapter object 976 * 977 */ 978static void 979_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 980{ 981 int i; 982 983 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 984 return; 985 986 for (i = 0; i < ioc->msix_vector_count; i++) 987 ioc->msix_table[i] = ioc->msix_table_backup[i]; 988} 989 990/** 991 * _base_check_enable_msix - checks MSIX capabable. 992 * @ioc: per adapter object 993 * 994 * Check to see if card is capable of MSIX, and set number 995 * of avaliable msix vectors 996 */ 997static int 998_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 999{ 1000 int base; 1001 u16 message_control; 1002 u32 msix_table_offset; 1003 1004 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1005 if (!base) { 1006 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1007 "supported\n", ioc->name)); 1008 return -EINVAL; 1009 } 1010 1011 /* get msix vector count */ 1012 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1013 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1014 1015 /* get msix table */ 1016 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 1017 msix_table_offset &= 0xFFFFFFF8; 1018 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 1019 1020 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1021 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 1022 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 1023 return 0; 1024} 1025 1026/** 1027 * _base_disable_msix - disables msix 1028 * @ioc: per adapter object 1029 * 1030 */ 1031static void 1032_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1033{ 1034 if (ioc->msix_enable) { 1035 pci_disable_msix(ioc->pdev); 1036 kfree(ioc->msix_table_backup); 1037 ioc->msix_table_backup = NULL; 1038 ioc->msix_enable = 0; 1039 } 1040} 1041 1042/** 1043 * _base_enable_msix - enables msix, failback to io_apic 1044 * @ioc: per adapter object 1045 * 1046 */ 1047static int 1048_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1049{ 1050 struct msix_entry entries; 1051 int r; 1052 u8 try_msix = 0; 1053 1054 if (msix_disable == -1 || msix_disable == 0) 1055 try_msix = 1; 1056 1057 if (!try_msix) 1058 goto try_ioapic; 1059 1060 if (_base_check_enable_msix(ioc) != 0) 1061 goto try_ioapic; 1062 1063 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1064 sizeof(u32), GFP_KERNEL); 1065 if (!ioc->msix_table_backup) { 1066 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1067 "msix_table_backup failed!!!\n", ioc->name)); 1068 goto try_ioapic; 1069 } 1070 1071 memset(&entries, 0, sizeof(struct msix_entry)); 1072 r = pci_enable_msix(ioc->pdev, &entries, 1); 1073 if (r) { 1074 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1075 "failed (r=%d) !!!\n", ioc->name, r)); 1076 goto try_ioapic; 1077 } 1078 1079 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1080 ioc->name, ioc); 1081 if (r) { 1082 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1083 "interrupt %d !!!\n", ioc->name, entries.vector)); 1084 pci_disable_msix(ioc->pdev); 1085 goto try_ioapic; 1086 } 1087 1088 ioc->pci_irq = entries.vector; 1089 ioc->msix_enable = 1; 1090 return 0; 1091 1092/* failback to io_apic interrupt routing */ 1093 try_ioapic: 1094 1095 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1096 ioc->name, ioc); 1097 if (r) { 1098 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1099 ioc->name, ioc->pdev->irq); 1100 r = -EBUSY; 1101 goto out_fail; 1102 } 1103 1104 ioc->pci_irq = ioc->pdev->irq; 1105 return 0; 1106 1107 out_fail: 1108 return r; 1109} 1110 1111/** 1112 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1113 * @ioc: per adapter object 1114 * 1115 * Returns 0 for success, non-zero for failure. 1116 */ 1117int 1118mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1119{ 1120 struct pci_dev *pdev = ioc->pdev; 1121 u32 memap_sz; 1122 u32 pio_sz; 1123 int i, r = 0; 1124 1125 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1126 ioc->name, __func__)); 1127 1128 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1129 if (pci_enable_device_mem(pdev)) { 1130 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1131 "failed\n", ioc->name); 1132 return -ENODEV; 1133 } 1134 1135 1136 if (pci_request_selected_regions(pdev, ioc->bars, 1137 MPT2SAS_DRIVER_NAME)) { 1138 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1139 "failed\n", ioc->name); 1140 r = -ENODEV; 1141 goto out_fail; 1142 } 1143 1144 pci_set_master(pdev); 1145 1146 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1147 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1148 ioc->name, pci_name(pdev)); 1149 r = -ENODEV; 1150 goto out_fail; 1151 } 1152 1153 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1154 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1155 if (pio_sz) 1156 continue; 1157 ioc->pio_chip = pci_resource_start(pdev, i); 1158 pio_sz = pci_resource_len(pdev, i); 1159 } else { 1160 if (memap_sz) 1161 continue; 1162 ioc->chip_phys = pci_resource_start(pdev, i); 1163 memap_sz = pci_resource_len(pdev, i); 1164 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1165 if (ioc->chip == NULL) { 1166 printk(MPT2SAS_ERR_FMT "unable to map adapter " 1167 "memory!\n", ioc->name); 1168 r = -EINVAL; 1169 goto out_fail; 1170 } 1171 } 1172 } 1173 1174 pci_set_drvdata(pdev, ioc->shost); 1175 _base_mask_interrupts(ioc); 1176 r = _base_enable_msix(ioc); 1177 if (r) 1178 goto out_fail; 1179 1180 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1181 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1182 "IO-APIC enabled"), ioc->pci_irq); 1183 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1184 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1185 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1186 ioc->name, ioc->pio_chip, pio_sz); 1187 1188 return 0; 1189 1190 out_fail: 1191 if (ioc->chip_phys) 1192 iounmap(ioc->chip); 1193 ioc->chip_phys = 0; 1194 ioc->pci_irq = -1; 1195 pci_release_selected_regions(ioc->pdev, ioc->bars); 1196 pci_disable_device(pdev); 1197 pci_set_drvdata(pdev, NULL); 1198 return r; 1199} 1200 1201/** 1202 * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr 1203 * @ioc: per adapter object 1204 * @smid: system request message index(smid zero is invalid) 1205 * 1206 * Returns phys pointer to message frame. 1207 */ 1208dma_addr_t 1209mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1210{ 1211 return ioc->request_dma + (smid * ioc->request_sz); 1212} 1213 1214/** 1215 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1216 * @ioc: per adapter object 1217 * @smid: system request message index(smid zero is invalid) 1218 * 1219 * Returns virt pointer to message frame. 1220 */ 1221void * 1222mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1223{ 1224 return (void *)(ioc->request + (smid * ioc->request_sz)); 1225} 1226 1227/** 1228 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1229 * @ioc: per adapter object 1230 * @smid: system request message index 1231 * 1232 * Returns virt pointer to sense buffer. 1233 */ 1234void * 1235mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1236{ 1237 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1238} 1239 1240/** 1241 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1242 * @ioc: per adapter object 1243 * @smid: system request message index 1244 * 1245 * Returns phys pointer to sense buffer. 1246 */ 1247dma_addr_t 1248mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1249{ 1250 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE); 1251} 1252 1253/** 1254 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1255 * @ioc: per adapter object 1256 * @phys_addr: lower 32 physical addr of the reply 1257 * 1258 * Converts 32bit lower physical addr into a virt address. 1259 */ 1260void * 1261mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1262{ 1263 if (!phys_addr) 1264 return NULL; 1265 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1266} 1267 1268/** 1269 * mpt2sas_base_get_smid - obtain a free smid 1270 * @ioc: per adapter object 1271 * @cb_idx: callback index 1272 * 1273 * Returns smid (zero is invalid) 1274 */ 1275u16 1276mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1277{ 1278 unsigned long flags; 1279 struct request_tracker *request; 1280 u16 smid; 1281 1282 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1283 if (list_empty(&ioc->free_list)) { 1284 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1285 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1286 ioc->name, __func__); 1287 return 0; 1288 } 1289 1290 request = list_entry(ioc->free_list.next, 1291 struct request_tracker, tracker_list); 1292 request->cb_idx = cb_idx; 1293 smid = request->smid; 1294 list_del(&request->tracker_list); 1295 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1296 return smid; 1297} 1298 1299 1300/** 1301 * mpt2sas_base_free_smid - put smid back on free_list 1302 * @ioc: per adapter object 1303 * @smid: system request message index 1304 * 1305 * Return nothing. 1306 */ 1307void 1308mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1309{ 1310 unsigned long flags; 1311 1312 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1313 ioc->scsi_lookup[smid - 1].cb_idx = 0xFF; 1314 list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list, 1315 &ioc->free_list); 1316 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1317 1318 /* 1319 * See _wait_for_commands_to_complete() call with regards to this code. 1320 */ 1321 if (ioc->shost_recovery && ioc->pending_io_count) { 1322 if (ioc->pending_io_count == 1) 1323 wake_up(&ioc->reset_wq); 1324 ioc->pending_io_count--; 1325 } 1326} 1327 1328/** 1329 * _base_writeq - 64 bit write to MMIO 1330 * @ioc: per adapter object 1331 * @b: data payload 1332 * @addr: address in MMIO space 1333 * @writeq_lock: spin lock 1334 * 1335 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1336 * care of 32 bit environment where its not quarenteed to send the entire word 1337 * in one transfer. 1338 */ 1339#ifndef writeq 1340static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1341 spinlock_t *writeq_lock) 1342{ 1343 unsigned long flags; 1344 __u64 data_out = cpu_to_le64(b); 1345 1346 spin_lock_irqsave(writeq_lock, flags); 1347 writel((u32)(data_out), addr); 1348 writel((u32)(data_out >> 32), (addr + 4)); 1349 spin_unlock_irqrestore(writeq_lock, flags); 1350} 1351#else 1352static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1353 spinlock_t *writeq_lock) 1354{ 1355 writeq(cpu_to_le64(b), addr); 1356} 1357#endif 1358 1359/** 1360 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1361 * @ioc: per adapter object 1362 * @smid: system request message index 1363 * @vf_id: virtual function id 1364 * @handle: device handle 1365 * 1366 * Return nothing. 1367 */ 1368void 1369mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id, 1370 u16 handle) 1371{ 1372 Mpi2RequestDescriptorUnion_t descriptor; 1373 u64 *request = (u64 *)&descriptor; 1374 1375 1376 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1377 descriptor.SCSIIO.VF_ID = vf_id; 1378 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1379 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1380 descriptor.SCSIIO.LMID = 0; 1381 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1382 &ioc->scsi_lookup_lock); 1383} 1384 1385 1386/** 1387 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1388 * @ioc: per adapter object 1389 * @smid: system request message index 1390 * @vf_id: virtual function id 1391 * 1392 * Return nothing. 1393 */ 1394void 1395mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1396 u8 vf_id) 1397{ 1398 Mpi2RequestDescriptorUnion_t descriptor; 1399 u64 *request = (u64 *)&descriptor; 1400 1401 descriptor.HighPriority.RequestFlags = 1402 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1403 descriptor.HighPriority.VF_ID = vf_id; 1404 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1405 descriptor.HighPriority.LMID = 0; 1406 descriptor.HighPriority.Reserved1 = 0; 1407 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1408 &ioc->scsi_lookup_lock); 1409} 1410 1411/** 1412 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1413 * @ioc: per adapter object 1414 * @smid: system request message index 1415 * @vf_id: virtual function id 1416 * 1417 * Return nothing. 1418 */ 1419void 1420mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id) 1421{ 1422 Mpi2RequestDescriptorUnion_t descriptor; 1423 u64 *request = (u64 *)&descriptor; 1424 1425 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1426 descriptor.Default.VF_ID = vf_id; 1427 descriptor.Default.SMID = cpu_to_le16(smid); 1428 descriptor.Default.LMID = 0; 1429 descriptor.Default.DescriptorTypeDependent = 0; 1430 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1431 &ioc->scsi_lookup_lock); 1432} 1433 1434/** 1435 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1436 * @ioc: per adapter object 1437 * @smid: system request message index 1438 * @vf_id: virtual function id 1439 * @io_index: value used to track the IO 1440 * 1441 * Return nothing. 1442 */ 1443void 1444mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1445 u8 vf_id, u16 io_index) 1446{ 1447 Mpi2RequestDescriptorUnion_t descriptor; 1448 u64 *request = (u64 *)&descriptor; 1449 1450 descriptor.SCSITarget.RequestFlags = 1451 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1452 descriptor.SCSITarget.VF_ID = vf_id; 1453 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1454 descriptor.SCSITarget.LMID = 0; 1455 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1456 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1457 &ioc->scsi_lookup_lock); 1458} 1459 1460/** 1461 * _base_display_dell_branding - Disply branding string 1462 * @ioc: per adapter object 1463 * 1464 * Return nothing. 1465 */ 1466static void 1467_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1468{ 1469 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1470 1471 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1472 return; 1473 1474 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1475 switch (ioc->pdev->subsystem_device) { 1476 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1477 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1478 MPT2SAS_DELL_BRANDING_SIZE - 1); 1479 break; 1480 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1481 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1482 MPT2SAS_DELL_BRANDING_SIZE - 1); 1483 break; 1484 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1485 strncpy(dell_branding, 1486 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1487 MPT2SAS_DELL_BRANDING_SIZE - 1); 1488 break; 1489 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1490 strncpy(dell_branding, 1491 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1492 MPT2SAS_DELL_BRANDING_SIZE - 1); 1493 break; 1494 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1495 strncpy(dell_branding, 1496 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1497 MPT2SAS_DELL_BRANDING_SIZE - 1); 1498 break; 1499 case MPT2SAS_DELL_PERC_H200_SSDID: 1500 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1501 MPT2SAS_DELL_BRANDING_SIZE - 1); 1502 break; 1503 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1504 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1505 MPT2SAS_DELL_BRANDING_SIZE - 1); 1506 break; 1507 default: 1508 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1509 break; 1510 } 1511 1512 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1513 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1514 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1515 ioc->pdev->subsystem_device); 1516} 1517 1518/** 1519 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1520 * @ioc: per adapter object 1521 * 1522 * Return nothing. 1523 */ 1524static void 1525_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1526{ 1527 int i = 0; 1528 char desc[16]; 1529 u8 revision; 1530 u32 iounit_pg1_flags; 1531 1532 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1533 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1534 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1535 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1536 ioc->name, desc, 1537 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1538 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1539 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1540 ioc->facts.FWVersion.Word & 0x000000FF, 1541 revision, 1542 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1543 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1544 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1545 ioc->bios_pg3.BiosVersion & 0x000000FF); 1546 1547 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1548 1549 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1550 printk("Initiator"); 1551 i++; 1552 } 1553 1554 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1555 printk("%sTarget", i ? "," : ""); 1556 i++; 1557 } 1558 1559 _base_display_dell_branding(ioc); 1560 1561 i = 0; 1562 printk("), "); 1563 printk("Capabilities=("); 1564 1565 if (ioc->facts.IOCCapabilities & 1566 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1567 printk("Raid"); 1568 i++; 1569 } 1570 1571 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1572 printk("%sTLR", i ? "," : ""); 1573 i++; 1574 } 1575 1576 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1577 printk("%sMulticast", i ? "," : ""); 1578 i++; 1579 } 1580 1581 if (ioc->facts.IOCCapabilities & 1582 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1583 printk("%sBIDI Target", i ? "," : ""); 1584 i++; 1585 } 1586 1587 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1588 printk("%sEEDP", i ? "," : ""); 1589 i++; 1590 } 1591 1592 if (ioc->facts.IOCCapabilities & 1593 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1594 printk("%sSnapshot Buffer", i ? "," : ""); 1595 i++; 1596 } 1597 1598 if (ioc->facts.IOCCapabilities & 1599 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1600 printk("%sDiag Trace Buffer", i ? "," : ""); 1601 i++; 1602 } 1603 1604 if (ioc->facts.IOCCapabilities & 1605 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1606 printk("%sTask Set Full", i ? "," : ""); 1607 i++; 1608 } 1609 1610 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1611 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1612 printk("%sNCQ", i ? "," : ""); 1613 i++; 1614 } 1615 1616 printk(")\n"); 1617} 1618 1619/** 1620 * _base_static_config_pages - static start of day config pages 1621 * @ioc: per adapter object 1622 * 1623 * Return nothing. 1624 */ 1625static void 1626_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1627{ 1628 Mpi2ConfigReply_t mpi_reply; 1629 u32 iounit_pg1_flags; 1630 1631 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1632 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1633 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1634 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1635 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1636 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1637 _base_display_ioc_capabilities(ioc); 1638 1639 /* 1640 * Enable task_set_full handling in iounit_pg1 when the 1641 * facts capabilities indicate that its supported. 1642 */ 1643 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1644 if ((ioc->facts.IOCCapabilities & 1645 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1646 iounit_pg1_flags &= 1647 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1648 else 1649 iounit_pg1_flags |= 1650 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1651 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1652 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1); 1653} 1654 1655/** 1656 * _base_release_memory_pools - release memory 1657 * @ioc: per adapter object 1658 * 1659 * Free memory allocated from _base_allocate_memory_pools. 1660 * 1661 * Return nothing. 1662 */ 1663static void 1664_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1665{ 1666 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1667 __func__)); 1668 1669 if (ioc->request) { 1670 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1671 ioc->request, ioc->request_dma); 1672 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1673 ": free\n", ioc->name, ioc->request)); 1674 ioc->request = NULL; 1675 } 1676 1677 if (ioc->sense) { 1678 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1679 if (ioc->sense_dma_pool) 1680 pci_pool_destroy(ioc->sense_dma_pool); 1681 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1682 ": free\n", ioc->name, ioc->sense)); 1683 ioc->sense = NULL; 1684 } 1685 1686 if (ioc->reply) { 1687 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1688 if (ioc->reply_dma_pool) 1689 pci_pool_destroy(ioc->reply_dma_pool); 1690 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1691 ": free\n", ioc->name, ioc->reply)); 1692 ioc->reply = NULL; 1693 } 1694 1695 if (ioc->reply_free) { 1696 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1697 ioc->reply_free_dma); 1698 if (ioc->reply_free_dma_pool) 1699 pci_pool_destroy(ioc->reply_free_dma_pool); 1700 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1701 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1702 ioc->reply_free = NULL; 1703 } 1704 1705 if (ioc->reply_post_free) { 1706 pci_pool_free(ioc->reply_post_free_dma_pool, 1707 ioc->reply_post_free, ioc->reply_post_free_dma); 1708 if (ioc->reply_post_free_dma_pool) 1709 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1710 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1711 "reply_post_free_pool(0x%p): free\n", ioc->name, 1712 ioc->reply_post_free)); 1713 ioc->reply_post_free = NULL; 1714 } 1715 1716 if (ioc->config_page) { 1717 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1718 "config_page(0x%p): free\n", ioc->name, 1719 ioc->config_page)); 1720 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1721 ioc->config_page, ioc->config_page_dma); 1722 } 1723 1724 kfree(ioc->scsi_lookup); 1725} 1726 1727 1728/** 1729 * _base_allocate_memory_pools - allocate start of day memory pools 1730 * @ioc: per adapter object 1731 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1732 * 1733 * Returns 0 success, anything else error 1734 */ 1735static int 1736_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1737{ 1738 Mpi2IOCFactsReply_t *facts; 1739 u32 queue_size, queue_diff; 1740 u16 max_sge_elements; 1741 u16 num_of_reply_frames; 1742 u16 chains_needed_per_io; 1743 u32 sz, total_sz; 1744 u16 i; 1745 u32 retry_sz; 1746 u16 max_request_credit; 1747 1748 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1749 __func__)); 1750 1751 retry_sz = 0; 1752 facts = &ioc->facts; 1753 1754 /* command line tunables for max sgl entries */ 1755 if (max_sgl_entries != -1) { 1756 ioc->shost->sg_tablesize = (max_sgl_entries < 1757 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1758 MPT2SAS_SG_DEPTH; 1759 } else { 1760 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1761 } 1762 1763 /* command line tunables for max controller queue depth */ 1764 if (max_queue_depth != -1) { 1765 max_request_credit = (max_queue_depth < facts->RequestCredit) 1766 ? max_queue_depth : facts->RequestCredit; 1767 } else { 1768 max_request_credit = (facts->RequestCredit > 1769 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1770 facts->RequestCredit; 1771 } 1772 ioc->request_depth = max_request_credit; 1773 1774 /* request frame size */ 1775 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1776 1777 /* reply frame size */ 1778 ioc->reply_sz = facts->ReplyFrameSize * 4; 1779 1780 retry_allocation: 1781 total_sz = 0; 1782 /* calculate number of sg elements left over in the 1st frame */ 1783 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1784 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1785 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1786 1787 /* now do the same for a chain buffer */ 1788 max_sge_elements = ioc->request_sz - ioc->sge_size; 1789 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1790 1791 ioc->chain_offset_value_for_main_message = 1792 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1793 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1794 1795 /* 1796 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1797 */ 1798 chains_needed_per_io = ((ioc->shost->sg_tablesize - 1799 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 1800 + 1; 1801 if (chains_needed_per_io > facts->MaxChainDepth) { 1802 chains_needed_per_io = facts->MaxChainDepth; 1803 ioc->shost->sg_tablesize = min_t(u16, 1804 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 1805 * chains_needed_per_io), ioc->shost->sg_tablesize); 1806 } 1807 ioc->chains_needed_per_io = chains_needed_per_io; 1808 1809 /* reply free queue sizing - taking into account for events */ 1810 num_of_reply_frames = ioc->request_depth + 32; 1811 1812 /* number of replies frames can't be a multiple of 16 */ 1813 /* decrease number of reply frames by 1 */ 1814 if (!(num_of_reply_frames % 16)) 1815 num_of_reply_frames--; 1816 1817 /* calculate number of reply free queue entries 1818 * (must be multiple of 16) 1819 */ 1820 1821 /* (we know reply_free_queue_depth is not a multiple of 16) */ 1822 queue_size = num_of_reply_frames; 1823 queue_size += 16 - (queue_size % 16); 1824 ioc->reply_free_queue_depth = queue_size; 1825 1826 /* reply descriptor post queue sizing */ 1827 /* this size should be the number of request frames + number of reply 1828 * frames 1829 */ 1830 1831 queue_size = ioc->request_depth + num_of_reply_frames + 1; 1832 /* round up to 16 byte boundary */ 1833 if (queue_size % 16) 1834 queue_size += 16 - (queue_size % 16); 1835 1836 /* check against IOC maximum reply post queue depth */ 1837 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 1838 queue_diff = queue_size - 1839 facts->MaxReplyDescriptorPostQueueDepth; 1840 1841 /* round queue_diff up to multiple of 16 */ 1842 if (queue_diff % 16) 1843 queue_diff += 16 - (queue_diff % 16); 1844 1845 /* adjust request_depth, reply_free_queue_depth, 1846 * and queue_size 1847 */ 1848 ioc->request_depth -= queue_diff; 1849 ioc->reply_free_queue_depth -= queue_diff; 1850 queue_size -= queue_diff; 1851 } 1852 ioc->reply_post_queue_depth = queue_size; 1853 1854 /* max scsi host queue depth */ 1855 ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT; 1856 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth" 1857 "(%d)\n", ioc->name, ioc->shost->can_queue)); 1858 1859 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 1860 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 1861 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 1862 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 1863 ioc->chains_needed_per_io)); 1864 1865 /* contiguous pool for request and chains, 16 byte align, one extra " 1866 * "frame for smid=0 1867 */ 1868 ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth; 1869 sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz); 1870 1871 ioc->request_dma_sz = sz; 1872 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 1873 if (!ioc->request) { 1874 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1875 "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1876 "total(%d kB)\n", ioc->name, ioc->request_depth, 1877 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1878 if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH) 1879 goto out; 1880 retry_sz += 64; 1881 ioc->request_depth = max_request_credit - retry_sz; 1882 goto retry_allocation; 1883 } 1884 1885 if (retry_sz) 1886 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1887 "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1888 "total(%d kb)\n", ioc->name, ioc->request_depth, 1889 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1890 1891 ioc->chain = ioc->request + ((ioc->request_depth + 1) * 1892 ioc->request_sz); 1893 ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) * 1894 ioc->request_sz); 1895 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 1896 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 1897 ioc->request, ioc->request_depth, ioc->request_sz, 1898 ((ioc->request_depth + 1) * ioc->request_sz)/1024)); 1899 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 1900 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 1901 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 1902 ioc->request_sz))/1024)); 1903 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 1904 ioc->name, (unsigned long long) ioc->request_dma)); 1905 total_sz += sz; 1906 1907 ioc->scsi_lookup = kcalloc(ioc->request_depth, 1908 sizeof(struct request_tracker), GFP_KERNEL); 1909 if (!ioc->scsi_lookup) { 1910 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n", 1911 ioc->name); 1912 goto out; 1913 } 1914 1915 /* initialize some bits */ 1916 for (i = 0; i < ioc->request_depth; i++) 1917 ioc->scsi_lookup[i].smid = i + 1; 1918 1919 /* sense buffers, 4 byte align */ 1920 sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE; 1921 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 1922 0); 1923 if (!ioc->sense_dma_pool) { 1924 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 1925 ioc->name); 1926 goto out; 1927 } 1928 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 1929 &ioc->sense_dma); 1930 if (!ioc->sense) { 1931 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 1932 ioc->name); 1933 goto out; 1934 } 1935 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 1936 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 1937 "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth, 1938 SCSI_SENSE_BUFFERSIZE, sz/1024)); 1939 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 1940 ioc->name, (unsigned long long)ioc->sense_dma)); 1941 total_sz += sz; 1942 1943 /* reply pool, 4 byte align */ 1944 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 1945 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 1946 0); 1947 if (!ioc->reply_dma_pool) { 1948 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 1949 ioc->name); 1950 goto out; 1951 } 1952 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 1953 &ioc->reply_dma); 1954 if (!ioc->reply) { 1955 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 1956 ioc->name); 1957 goto out; 1958 } 1959 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 1960 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 1961 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 1962 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 1963 ioc->name, (unsigned long long)ioc->reply_dma)); 1964 total_sz += sz; 1965 1966 /* reply free queue, 16 byte align */ 1967 sz = ioc->reply_free_queue_depth * 4; 1968 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 1969 ioc->pdev, sz, 16, 0); 1970 if (!ioc->reply_free_dma_pool) { 1971 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 1972 "failed\n", ioc->name); 1973 goto out; 1974 } 1975 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 1976 &ioc->reply_free_dma); 1977 if (!ioc->reply_free) { 1978 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 1979 "failed\n", ioc->name); 1980 goto out; 1981 } 1982 memset(ioc->reply_free, 0, sz); 1983 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 1984 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 1985 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 1986 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 1987 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 1988 total_sz += sz; 1989 1990 /* reply post queue, 16 byte align */ 1991 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 1992 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 1993 ioc->pdev, sz, 16, 0); 1994 if (!ioc->reply_post_free_dma_pool) { 1995 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 1996 "failed\n", ioc->name); 1997 goto out; 1998 } 1999 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 2000 GFP_KERNEL, &ioc->reply_post_free_dma); 2001 if (!ioc->reply_post_free) { 2002 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2003 "failed\n", ioc->name); 2004 goto out; 2005 } 2006 memset(ioc->reply_post_free, 0, sz); 2007 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2008 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2009 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2010 sz/1024)); 2011 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2012 "(0x%llx)\n", ioc->name, (unsigned long long) 2013 ioc->reply_post_free_dma)); 2014 total_sz += sz; 2015 2016 ioc->config_page_sz = 512; 2017 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2018 ioc->config_page_sz, &ioc->config_page_dma); 2019 if (!ioc->config_page) { 2020 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2021 "failed\n", ioc->name); 2022 goto out; 2023 } 2024 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2025 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2026 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2027 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2028 total_sz += ioc->config_page_sz; 2029 2030 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2031 ioc->name, total_sz/1024); 2032 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2033 "Max Controller Queue Depth(%d)\n", 2034 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2035 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2036 ioc->name, ioc->shost->sg_tablesize); 2037 return 0; 2038 2039 out: 2040 _base_release_memory_pools(ioc); 2041 return -ENOMEM; 2042} 2043 2044 2045/** 2046 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2047 * @ioc: Pointer to MPT_ADAPTER structure 2048 * @cooked: Request raw or cooked IOC state 2049 * 2050 * Returns all IOC Doorbell register bits if cooked==0, else just the 2051 * Doorbell bits in MPI_IOC_STATE_MASK. 2052 */ 2053u32 2054mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2055{ 2056 u32 s, sc; 2057 2058 s = readl(&ioc->chip->Doorbell); 2059 sc = s & MPI2_IOC_STATE_MASK; 2060 return cooked ? sc : s; 2061} 2062 2063/** 2064 * _base_wait_on_iocstate - waiting on a particular ioc state 2065 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2066 * @timeout: timeout in second 2067 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2068 * 2069 * Returns 0 for success, non-zero for failure. 2070 */ 2071static int 2072_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2073 int sleep_flag) 2074{ 2075 u32 count, cntdn; 2076 u32 current_state; 2077 2078 count = 0; 2079 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2080 do { 2081 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2082 if (current_state == ioc_state) 2083 return 0; 2084 if (count && current_state == MPI2_IOC_STATE_FAULT) 2085 break; 2086 if (sleep_flag == CAN_SLEEP) 2087 msleep(1); 2088 else 2089 udelay(500); 2090 count++; 2091 } while (--cntdn); 2092 2093 return current_state; 2094} 2095 2096/** 2097 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2098 * a write to the doorbell) 2099 * @ioc: per adapter object 2100 * @timeout: timeout in second 2101 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2102 * 2103 * Returns 0 for success, non-zero for failure. 2104 * 2105 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2106 */ 2107static int 2108_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2109 int sleep_flag) 2110{ 2111 u32 cntdn, count; 2112 u32 int_status; 2113 2114 count = 0; 2115 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2116 do { 2117 int_status = readl(&ioc->chip->HostInterruptStatus); 2118 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2119 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2120 "successfull count(%d), timeout(%d)\n", ioc->name, 2121 __func__, count, timeout)); 2122 return 0; 2123 } 2124 if (sleep_flag == CAN_SLEEP) 2125 msleep(1); 2126 else 2127 udelay(500); 2128 count++; 2129 } while (--cntdn); 2130 2131 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2132 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2133 return -EFAULT; 2134} 2135 2136/** 2137 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2138 * @ioc: per adapter object 2139 * @timeout: timeout in second 2140 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2141 * 2142 * Returns 0 for success, non-zero for failure. 2143 * 2144 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2145 * doorbell. 2146 */ 2147static int 2148_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2149 int sleep_flag) 2150{ 2151 u32 cntdn, count; 2152 u32 int_status; 2153 u32 doorbell; 2154 2155 count = 0; 2156 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2157 do { 2158 int_status = readl(&ioc->chip->HostInterruptStatus); 2159 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2160 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2161 "successfull count(%d), timeout(%d)\n", ioc->name, 2162 __func__, count, timeout)); 2163 return 0; 2164 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2165 doorbell = readl(&ioc->chip->Doorbell); 2166 if ((doorbell & MPI2_IOC_STATE_MASK) == 2167 MPI2_IOC_STATE_FAULT) { 2168 mpt2sas_base_fault_info(ioc , doorbell); 2169 return -EFAULT; 2170 } 2171 } else if (int_status == 0xFFFFFFFF) 2172 goto out; 2173 2174 if (sleep_flag == CAN_SLEEP) 2175 msleep(1); 2176 else 2177 udelay(500); 2178 count++; 2179 } while (--cntdn); 2180 2181 out: 2182 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2183 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2184 return -EFAULT; 2185} 2186 2187/** 2188 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2189 * @ioc: per adapter object 2190 * @timeout: timeout in second 2191 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2192 * 2193 * Returns 0 for success, non-zero for failure. 2194 * 2195 */ 2196static int 2197_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2198 int sleep_flag) 2199{ 2200 u32 cntdn, count; 2201 u32 doorbell_reg; 2202 2203 count = 0; 2204 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2205 do { 2206 doorbell_reg = readl(&ioc->chip->Doorbell); 2207 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2208 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2209 "successfull count(%d), timeout(%d)\n", ioc->name, 2210 __func__, count, timeout)); 2211 return 0; 2212 } 2213 if (sleep_flag == CAN_SLEEP) 2214 msleep(1); 2215 else 2216 udelay(500); 2217 count++; 2218 } while (--cntdn); 2219 2220 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2221 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2222 return -EFAULT; 2223} 2224 2225/** 2226 * _base_send_ioc_reset - send doorbell reset 2227 * @ioc: per adapter object 2228 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2229 * @timeout: timeout in second 2230 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2231 * 2232 * Returns 0 for success, non-zero for failure. 2233 */ 2234static int 2235_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2236 int sleep_flag) 2237{ 2238 u32 ioc_state; 2239 int r = 0; 2240 2241 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2242 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2243 ioc->name, __func__); 2244 return -EFAULT; 2245 } 2246 2247 if (!(ioc->facts.IOCCapabilities & 2248 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2249 return -EFAULT; 2250 2251 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2252 2253 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2254 &ioc->chip->Doorbell); 2255 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2256 r = -EFAULT; 2257 goto out; 2258 } 2259 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2260 timeout, sleep_flag); 2261 if (ioc_state) { 2262 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2263 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2264 r = -EFAULT; 2265 goto out; 2266 } 2267 out: 2268 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2269 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2270 return r; 2271} 2272 2273/** 2274 * _base_handshake_req_reply_wait - send request thru doorbell interface 2275 * @ioc: per adapter object 2276 * @request_bytes: request length 2277 * @request: pointer having request payload 2278 * @reply_bytes: reply length 2279 * @reply: pointer to reply payload 2280 * @timeout: timeout in second 2281 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2282 * 2283 * Returns 0 for success, non-zero for failure. 2284 */ 2285static int 2286_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2287 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2288{ 2289 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2290 int i; 2291 u8 failed; 2292 u16 dummy; 2293 u32 *mfp; 2294 2295 /* make sure doorbell is not in use */ 2296 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2297 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2298 " (line=%d)\n", ioc->name, __LINE__); 2299 return -EFAULT; 2300 } 2301 2302 /* clear pending doorbell interrupts from previous state changes */ 2303 if (readl(&ioc->chip->HostInterruptStatus) & 2304 MPI2_HIS_IOC2SYS_DB_STATUS) 2305 writel(0, &ioc->chip->HostInterruptStatus); 2306 2307 /* send message to ioc */ 2308 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2309 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2310 &ioc->chip->Doorbell); 2311 2312 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2313 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2314 "int failed (line=%d)\n", ioc->name, __LINE__); 2315 return -EFAULT; 2316 } 2317 writel(0, &ioc->chip->HostInterruptStatus); 2318 2319 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2320 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2321 "ack failed (line=%d)\n", ioc->name, __LINE__); 2322 return -EFAULT; 2323 } 2324 2325 /* send message 32-bits at a time */ 2326 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2327 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2328 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2329 failed = 1; 2330 } 2331 2332 if (failed) { 2333 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2334 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2335 return -EFAULT; 2336 } 2337 2338 /* now wait for the reply */ 2339 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2340 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2341 "int failed (line=%d)\n", ioc->name, __LINE__); 2342 return -EFAULT; 2343 } 2344 2345 /* read the first two 16-bits, it gives the total length of the reply */ 2346 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2347 & MPI2_DOORBELL_DATA_MASK); 2348 writel(0, &ioc->chip->HostInterruptStatus); 2349 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2350 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2351 "int failed (line=%d)\n", ioc->name, __LINE__); 2352 return -EFAULT; 2353 } 2354 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2355 & MPI2_DOORBELL_DATA_MASK); 2356 writel(0, &ioc->chip->HostInterruptStatus); 2357 2358 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2359 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2360 printk(MPT2SAS_ERR_FMT "doorbell " 2361 "handshake int failed (line=%d)\n", ioc->name, 2362 __LINE__); 2363 return -EFAULT; 2364 } 2365 if (i >= reply_bytes/2) /* overflow case */ 2366 dummy = readl(&ioc->chip->Doorbell); 2367 else 2368 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2369 & MPI2_DOORBELL_DATA_MASK); 2370 writel(0, &ioc->chip->HostInterruptStatus); 2371 } 2372 2373 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2374 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2375 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2376 " (line=%d)\n", ioc->name, __LINE__)); 2377 } 2378 writel(0, &ioc->chip->HostInterruptStatus); 2379 2380 if (ioc->logging_level & MPT_DEBUG_INIT) { 2381 mfp = (u32 *)reply; 2382 printk(KERN_DEBUG "\toffset:data\n"); 2383 for (i = 0; i < reply_bytes/4; i++) 2384 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2385 le32_to_cpu(mfp[i])); 2386 } 2387 return 0; 2388} 2389 2390/** 2391 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2392 * @ioc: per adapter object 2393 * @mpi_reply: the reply payload from FW 2394 * @mpi_request: the request payload sent to FW 2395 * 2396 * The SAS IO Unit Control Request message allows the host to perform low-level 2397 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2398 * to obtain the IOC assigned device handles for a device if it has other 2399 * identifying information about the device, in addition allows the host to 2400 * remove IOC resources associated with the device. 2401 * 2402 * Returns 0 for success, non-zero for failure. 2403 */ 2404int 2405mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2406 Mpi2SasIoUnitControlReply_t *mpi_reply, 2407 Mpi2SasIoUnitControlRequest_t *mpi_request) 2408{ 2409 u16 smid; 2410 u32 ioc_state; 2411 unsigned long timeleft; 2412 u8 issue_reset; 2413 int rc; 2414 void *request; 2415 u16 wait_state_count; 2416 2417 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2418 __func__)); 2419 2420 mutex_lock(&ioc->base_cmds.mutex); 2421 2422 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2423 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2424 ioc->name, __func__); 2425 rc = -EAGAIN; 2426 goto out; 2427 } 2428 2429 wait_state_count = 0; 2430 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2431 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2432 if (wait_state_count++ == 10) { 2433 printk(MPT2SAS_ERR_FMT 2434 "%s: failed due to ioc not operational\n", 2435 ioc->name, __func__); 2436 rc = -EFAULT; 2437 goto out; 2438 } 2439 ssleep(1); 2440 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2441 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2442 "operational state(count=%d)\n", ioc->name, 2443 __func__, wait_state_count); 2444 } 2445 2446 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2447 if (!smid) { 2448 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2449 ioc->name, __func__); 2450 rc = -EAGAIN; 2451 goto out; 2452 } 2453 2454 rc = 0; 2455 ioc->base_cmds.status = MPT2_CMD_PENDING; 2456 request = mpt2sas_base_get_msg_frame(ioc, smid); 2457 ioc->base_cmds.smid = smid; 2458 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2459 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2460 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2461 ioc->ioc_link_reset_in_progress = 1; 2462 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2463 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2464 msecs_to_jiffies(10000)); 2465 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2466 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2467 ioc->ioc_link_reset_in_progress) 2468 ioc->ioc_link_reset_in_progress = 0; 2469 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2470 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2471 ioc->name, __func__); 2472 _debug_dump_mf(mpi_request, 2473 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2474 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2475 issue_reset = 1; 2476 goto issue_host_reset; 2477 } 2478 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2479 memcpy(mpi_reply, ioc->base_cmds.reply, 2480 sizeof(Mpi2SasIoUnitControlReply_t)); 2481 else 2482 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2483 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2484 goto out; 2485 2486 issue_host_reset: 2487 if (issue_reset) 2488 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2489 FORCE_BIG_HAMMER); 2490 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2491 rc = -EFAULT; 2492 out: 2493 mutex_unlock(&ioc->base_cmds.mutex); 2494 return rc; 2495} 2496 2497 2498/** 2499 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2500 * @ioc: per adapter object 2501 * @mpi_reply: the reply payload from FW 2502 * @mpi_request: the request payload sent to FW 2503 * 2504 * The SCSI Enclosure Processor request message causes the IOC to 2505 * communicate with SES devices to control LED status signals. 2506 * 2507 * Returns 0 for success, non-zero for failure. 2508 */ 2509int 2510mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2511 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2512{ 2513 u16 smid; 2514 u32 ioc_state; 2515 unsigned long timeleft; 2516 u8 issue_reset; 2517 int rc; 2518 void *request; 2519 u16 wait_state_count; 2520 2521 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2522 __func__)); 2523 2524 mutex_lock(&ioc->base_cmds.mutex); 2525 2526 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2527 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2528 ioc->name, __func__); 2529 rc = -EAGAIN; 2530 goto out; 2531 } 2532 2533 wait_state_count = 0; 2534 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2535 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2536 if (wait_state_count++ == 10) { 2537 printk(MPT2SAS_ERR_FMT 2538 "%s: failed due to ioc not operational\n", 2539 ioc->name, __func__); 2540 rc = -EFAULT; 2541 goto out; 2542 } 2543 ssleep(1); 2544 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2545 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2546 "operational state(count=%d)\n", ioc->name, 2547 __func__, wait_state_count); 2548 } 2549 2550 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2551 if (!smid) { 2552 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2553 ioc->name, __func__); 2554 rc = -EAGAIN; 2555 goto out; 2556 } 2557 2558 rc = 0; 2559 ioc->base_cmds.status = MPT2_CMD_PENDING; 2560 request = mpt2sas_base_get_msg_frame(ioc, smid); 2561 ioc->base_cmds.smid = smid; 2562 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2563 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2564 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2565 msecs_to_jiffies(10000)); 2566 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2567 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2568 ioc->name, __func__); 2569 _debug_dump_mf(mpi_request, 2570 sizeof(Mpi2SepRequest_t)/4); 2571 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2572 issue_reset = 1; 2573 goto issue_host_reset; 2574 } 2575 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2576 memcpy(mpi_reply, ioc->base_cmds.reply, 2577 sizeof(Mpi2SepReply_t)); 2578 else 2579 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2580 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2581 goto out; 2582 2583 issue_host_reset: 2584 if (issue_reset) 2585 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2586 FORCE_BIG_HAMMER); 2587 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2588 rc = -EFAULT; 2589 out: 2590 mutex_unlock(&ioc->base_cmds.mutex); 2591 return rc; 2592} 2593 2594/** 2595 * _base_get_port_facts - obtain port facts reply and save in ioc 2596 * @ioc: per adapter object 2597 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2598 * 2599 * Returns 0 for success, non-zero for failure. 2600 */ 2601static int 2602_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2603{ 2604 Mpi2PortFactsRequest_t mpi_request; 2605 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2606 int mpi_reply_sz, mpi_request_sz, r; 2607 2608 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2609 __func__)); 2610 2611 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2612 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2613 memset(&mpi_request, 0, mpi_request_sz); 2614 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2615 mpi_request.PortNumber = port; 2616 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2617 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2618 2619 if (r != 0) { 2620 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2621 ioc->name, __func__, r); 2622 return r; 2623 } 2624 2625 pfacts = &ioc->pfacts[port]; 2626 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2627 pfacts->PortNumber = mpi_reply.PortNumber; 2628 pfacts->VP_ID = mpi_reply.VP_ID; 2629 pfacts->VF_ID = mpi_reply.VF_ID; 2630 pfacts->MaxPostedCmdBuffers = 2631 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2632 2633 return 0; 2634} 2635 2636/** 2637 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2638 * @ioc: per adapter object 2639 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2640 * 2641 * Returns 0 for success, non-zero for failure. 2642 */ 2643static int 2644_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2645{ 2646 Mpi2IOCFactsRequest_t mpi_request; 2647 Mpi2IOCFactsReply_t mpi_reply, *facts; 2648 int mpi_reply_sz, mpi_request_sz, r; 2649 2650 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2651 __func__)); 2652 2653 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2654 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2655 memset(&mpi_request, 0, mpi_request_sz); 2656 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2657 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2658 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2659 2660 if (r != 0) { 2661 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2662 ioc->name, __func__, r); 2663 return r; 2664 } 2665 2666 facts = &ioc->facts; 2667 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2668 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2669 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2670 facts->VP_ID = mpi_reply.VP_ID; 2671 facts->VF_ID = mpi_reply.VF_ID; 2672 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2673 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2674 facts->WhoInit = mpi_reply.WhoInit; 2675 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2676 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2677 facts->MaxReplyDescriptorPostQueueDepth = 2678 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2679 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2680 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2681 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2682 ioc->ir_firmware = 1; 2683 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2684 facts->IOCRequestFrameSize = 2685 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2686 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2687 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2688 ioc->shost->max_id = -1; 2689 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2690 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2691 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2692 facts->HighPriorityCredit = 2693 le16_to_cpu(mpi_reply.HighPriorityCredit); 2694 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2695 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2696 2697 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2698 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2699 facts->MaxChainDepth)); 2700 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2701 "reply frame size(%d)\n", ioc->name, 2702 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2703 return 0; 2704} 2705 2706/** 2707 * _base_send_ioc_init - send ioc_init to firmware 2708 * @ioc: per adapter object 2709 * @VF_ID: virtual function id 2710 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2711 * 2712 * Returns 0 for success, non-zero for failure. 2713 */ 2714static int 2715_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2716{ 2717 Mpi2IOCInitRequest_t mpi_request; 2718 Mpi2IOCInitReply_t mpi_reply; 2719 int r; 2720 2721 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2722 __func__)); 2723 2724 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2725 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2726 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2727 mpi_request.VF_ID = VF_ID; 2728 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2729 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2730 2731 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2732 * removed and made reserved. For those with older firmware will need 2733 * this fix. It was decided that the Reply and Request frame sizes are 2734 * the same. 2735 */ 2736 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2737 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2738/* mpi_request.SystemReplyFrameSize = 2739 * cpu_to_le16(ioc->reply_sz); 2740 */ 2741 } 2742 2743 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 2744 mpi_request.ReplyDescriptorPostQueueDepth = 2745 cpu_to_le16(ioc->reply_post_queue_depth); 2746 mpi_request.ReplyFreeQueueDepth = 2747 cpu_to_le16(ioc->reply_free_queue_depth); 2748 2749#if BITS_PER_LONG > 32 2750 mpi_request.SenseBufferAddressHigh = 2751 cpu_to_le32(ioc->sense_dma >> 32); 2752 mpi_request.SystemReplyAddressHigh = 2753 cpu_to_le32(ioc->reply_dma >> 32); 2754 mpi_request.SystemRequestFrameBaseAddress = 2755 cpu_to_le64(ioc->request_dma); 2756 mpi_request.ReplyFreeQueueAddress = 2757 cpu_to_le64(ioc->reply_free_dma); 2758 mpi_request.ReplyDescriptorPostQueueAddress = 2759 cpu_to_le64(ioc->reply_post_free_dma); 2760#else 2761 mpi_request.SystemRequestFrameBaseAddress = 2762 cpu_to_le32(ioc->request_dma); 2763 mpi_request.ReplyFreeQueueAddress = 2764 cpu_to_le32(ioc->reply_free_dma); 2765 mpi_request.ReplyDescriptorPostQueueAddress = 2766 cpu_to_le32(ioc->reply_post_free_dma); 2767#endif 2768 2769 if (ioc->logging_level & MPT_DEBUG_INIT) { 2770 u32 *mfp; 2771 int i; 2772 2773 mfp = (u32 *)&mpi_request; 2774 printk(KERN_DEBUG "\toffset:data\n"); 2775 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 2776 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2777 le32_to_cpu(mfp[i])); 2778 } 2779 2780 r = _base_handshake_req_reply_wait(ioc, 2781 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 2782 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 2783 sleep_flag); 2784 2785 if (r != 0) { 2786 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2787 ioc->name, __func__, r); 2788 return r; 2789 } 2790 2791 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS || 2792 mpi_reply.IOCLogInfo) { 2793 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 2794 r = -EIO; 2795 } 2796 2797 return 0; 2798} 2799 2800/** 2801 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 2802 * @ioc: per adapter object 2803 * @VF_ID: virtual function id 2804 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2805 * 2806 * Returns 0 for success, non-zero for failure. 2807 */ 2808static int 2809_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2810{ 2811 Mpi2PortEnableRequest_t *mpi_request; 2812 u32 ioc_state; 2813 unsigned long timeleft; 2814 int r = 0; 2815 u16 smid; 2816 2817 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 2818 2819 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2820 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2821 ioc->name, __func__); 2822 return -EAGAIN; 2823 } 2824 2825 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2826 if (!smid) { 2827 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2828 ioc->name, __func__); 2829 return -EAGAIN; 2830 } 2831 2832 ioc->base_cmds.status = MPT2_CMD_PENDING; 2833 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2834 ioc->base_cmds.smid = smid; 2835 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 2836 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 2837 mpi_request->VF_ID = VF_ID; 2838 2839 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2840 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2841 300*HZ); 2842 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2843 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2844 ioc->name, __func__); 2845 _debug_dump_mf(mpi_request, 2846 sizeof(Mpi2PortEnableRequest_t)/4); 2847 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2848 r = -EFAULT; 2849 else 2850 r = -ETIME; 2851 goto out; 2852 } else 2853 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2854 ioc->name, __func__)); 2855 2856 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 2857 60, sleep_flag); 2858 if (ioc_state) { 2859 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 2860 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2861 r = -EFAULT; 2862 } 2863 out: 2864 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2865 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 2866 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2867 return r; 2868} 2869 2870/** 2871 * _base_unmask_events - turn on notification for this event 2872 * @ioc: per adapter object 2873 * @event: firmware event 2874 * 2875 * The mask is stored in ioc->event_masks. 2876 */ 2877static void 2878_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 2879{ 2880 u32 desired_event; 2881 2882 if (event >= 128) 2883 return; 2884 2885 desired_event = (1 << (event % 32)); 2886 2887 if (event < 32) 2888 ioc->event_masks[0] &= ~desired_event; 2889 else if (event < 64) 2890 ioc->event_masks[1] &= ~desired_event; 2891 else if (event < 96) 2892 ioc->event_masks[2] &= ~desired_event; 2893 else if (event < 128) 2894 ioc->event_masks[3] &= ~desired_event; 2895} 2896 2897/** 2898 * _base_event_notification - send event notification 2899 * @ioc: per adapter object 2900 * @VF_ID: virtual function id 2901 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2902 * 2903 * Returns 0 for success, non-zero for failure. 2904 */ 2905static int 2906_base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2907{ 2908 Mpi2EventNotificationRequest_t *mpi_request; 2909 unsigned long timeleft; 2910 u16 smid; 2911 int r = 0; 2912 int i; 2913 2914 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2915 __func__)); 2916 2917 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2918 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2919 ioc->name, __func__); 2920 return -EAGAIN; 2921 } 2922 2923 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2924 if (!smid) { 2925 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2926 ioc->name, __func__); 2927 return -EAGAIN; 2928 } 2929 ioc->base_cmds.status = MPT2_CMD_PENDING; 2930 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2931 ioc->base_cmds.smid = smid; 2932 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 2933 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2934 mpi_request->VF_ID = VF_ID; 2935 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2936 mpi_request->EventMasks[i] = 2937 le32_to_cpu(ioc->event_masks[i]); 2938 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2939 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 2940 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2941 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2942 ioc->name, __func__); 2943 _debug_dump_mf(mpi_request, 2944 sizeof(Mpi2EventNotificationRequest_t)/4); 2945 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2946 r = -EFAULT; 2947 else 2948 r = -ETIME; 2949 } else 2950 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2951 ioc->name, __func__)); 2952 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2953 return r; 2954} 2955 2956/** 2957 * mpt2sas_base_validate_event_type - validating event types 2958 * @ioc: per adapter object 2959 * @event: firmware event 2960 * 2961 * This will turn on firmware event notification when application 2962 * ask for that event. We don't mask events that are already enabled. 2963 */ 2964void 2965mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 2966{ 2967 int i, j; 2968 u32 event_mask, desired_event; 2969 u8 send_update_to_fw; 2970 2971 for (i = 0, send_update_to_fw = 0; i < 2972 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 2973 event_mask = ~event_type[i]; 2974 desired_event = 1; 2975 for (j = 0; j < 32; j++) { 2976 if (!(event_mask & desired_event) && 2977 (ioc->event_masks[i] & desired_event)) { 2978 ioc->event_masks[i] &= ~desired_event; 2979 send_update_to_fw = 1; 2980 } 2981 desired_event = (desired_event << 1); 2982 } 2983 } 2984 2985 if (!send_update_to_fw) 2986 return; 2987 2988 mutex_lock(&ioc->base_cmds.mutex); 2989 _base_event_notification(ioc, 0, CAN_SLEEP); 2990 mutex_unlock(&ioc->base_cmds.mutex); 2991} 2992 2993/** 2994 * _base_diag_reset - the "big hammer" start of day reset 2995 * @ioc: per adapter object 2996 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2997 * 2998 * Returns 0 for success, non-zero for failure. 2999 */ 3000static int 3001_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3002{ 3003 u32 host_diagnostic; 3004 u32 ioc_state; 3005 u32 count; 3006 u32 hcb_size; 3007 3008 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3009 3010 _base_save_msix_table(ioc); 3011 3012 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 3013 ioc->name)); 3014 writel(0, &ioc->chip->HostInterruptStatus); 3015 3016 count = 0; 3017 do { 3018 /* Write magic sequence to WriteSequence register 3019 * Loop until in diagnostic mode 3020 */ 3021 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 3022 "sequence\n", ioc->name)); 3023 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3024 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3025 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3026 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3027 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3028 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3029 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3030 3031 /* wait 100 msec */ 3032 if (sleep_flag == CAN_SLEEP) 3033 msleep(100); 3034 else 3035 mdelay(100); 3036 3037 if (count++ > 20) 3038 goto out; 3039 3040 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3041 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 3042 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3043 ioc->name, count, host_diagnostic)); 3044 3045 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3046 3047 hcb_size = readl(&ioc->chip->HCBSize); 3048 3049 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 3050 ioc->name)); 3051 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3052 &ioc->chip->HostDiagnostic); 3053 3054 /* don't access any registers for 50 milliseconds */ 3055 msleep(50); 3056 3057 /* 300 second max wait */ 3058 for (count = 0; count < 3000000 ; count++) { 3059 3060 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3061 3062 if (host_diagnostic == 0xFFFFFFFF) 3063 goto out; 3064 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3065 break; 3066 3067 /* wait 100 msec */ 3068 if (sleep_flag == CAN_SLEEP) 3069 msleep(1); 3070 else 3071 mdelay(1); 3072 } 3073 3074 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3075 3076 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3077 "assuming the HCB Address points to good F/W\n", 3078 ioc->name)); 3079 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3080 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3081 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3082 3083 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3084 "re-enable the HCDW\n", ioc->name)); 3085 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3086 &ioc->chip->HCBSize); 3087 } 3088 3089 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3090 ioc->name)); 3091 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3092 &ioc->chip->HostDiagnostic); 3093 3094 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3095 "diagnostic register\n", ioc->name)); 3096 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3097 3098 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3099 "READY state\n", ioc->name)); 3100 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3101 sleep_flag); 3102 if (ioc_state) { 3103 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3104 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3105 goto out; 3106 } 3107 3108 _base_restore_msix_table(ioc); 3109 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3110 return 0; 3111 3112 out: 3113 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3114 return -EFAULT; 3115} 3116 3117/** 3118 * _base_make_ioc_ready - put controller in READY state 3119 * @ioc: per adapter object 3120 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3121 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3122 * 3123 * Returns 0 for success, non-zero for failure. 3124 */ 3125static int 3126_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3127 enum reset_type type) 3128{ 3129 u32 ioc_state; 3130 3131 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3132 __func__)); 3133 3134 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3135 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3136 ioc->name, __func__, ioc_state)); 3137 3138 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3139 return 0; 3140 3141 if (ioc_state & MPI2_DOORBELL_USED) { 3142 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3143 "active!\n", ioc->name)); 3144 goto issue_diag_reset; 3145 } 3146 3147 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3148 mpt2sas_base_fault_info(ioc, ioc_state & 3149 MPI2_DOORBELL_DATA_MASK); 3150 goto issue_diag_reset; 3151 } 3152 3153 if (type == FORCE_BIG_HAMMER) 3154 goto issue_diag_reset; 3155 3156 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3157 if (!(_base_send_ioc_reset(ioc, 3158 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3159 return 0; 3160 3161 issue_diag_reset: 3162 return _base_diag_reset(ioc, CAN_SLEEP); 3163} 3164 3165/** 3166 * _base_make_ioc_operational - put controller in OPERATIONAL state 3167 * @ioc: per adapter object 3168 * @VF_ID: virtual function id 3169 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3170 * 3171 * Returns 0 for success, non-zero for failure. 3172 */ 3173static int 3174_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, 3175 int sleep_flag) 3176{ 3177 int r, i; 3178 unsigned long flags; 3179 u32 reply_address; 3180 3181 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3182 __func__)); 3183 3184 /* initialize the scsi lookup free list */ 3185 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3186 INIT_LIST_HEAD(&ioc->free_list); 3187 for (i = 0; i < ioc->request_depth; i++) { 3188 ioc->scsi_lookup[i].cb_idx = 0xFF; 3189 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3190 &ioc->free_list); 3191 } 3192 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3193 3194 /* initialize Reply Free Queue */ 3195 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3196 i < ioc->reply_free_queue_depth ; i++, reply_address += 3197 ioc->reply_sz) 3198 ioc->reply_free[i] = cpu_to_le32(reply_address); 3199 3200 /* initialize Reply Post Free Queue */ 3201 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3202 ioc->reply_post_free[i].Words = ULLONG_MAX; 3203 3204 r = _base_send_ioc_init(ioc, VF_ID, sleep_flag); 3205 if (r) 3206 return r; 3207 3208 /* initialize the index's */ 3209 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3210 ioc->reply_post_host_index = 0; 3211 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3212 writel(0, &ioc->chip->ReplyPostHostIndex); 3213 3214 _base_unmask_interrupts(ioc); 3215 r = _base_event_notification(ioc, VF_ID, sleep_flag); 3216 if (r) 3217 return r; 3218 3219 if (sleep_flag == CAN_SLEEP) 3220 _base_static_config_pages(ioc); 3221 3222 r = _base_send_port_enable(ioc, VF_ID, sleep_flag); 3223 if (r) 3224 return r; 3225 3226 return r; 3227} 3228 3229/** 3230 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3231 * @ioc: per adapter object 3232 * 3233 * Return nothing. 3234 */ 3235void 3236mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3237{ 3238 struct pci_dev *pdev = ioc->pdev; 3239 3240 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3241 __func__)); 3242 3243 _base_mask_interrupts(ioc); 3244 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3245 if (ioc->pci_irq) { 3246 synchronize_irq(pdev->irq); 3247 free_irq(ioc->pci_irq, ioc); 3248 } 3249 _base_disable_msix(ioc); 3250 if (ioc->chip_phys) 3251 iounmap(ioc->chip); 3252 ioc->pci_irq = -1; 3253 ioc->chip_phys = 0; 3254 pci_release_selected_regions(ioc->pdev, ioc->bars); 3255 pci_disable_device(pdev); 3256 pci_set_drvdata(pdev, NULL); 3257 return; 3258} 3259 3260/** 3261 * mpt2sas_base_attach - attach controller instance 3262 * @ioc: per adapter object 3263 * 3264 * Returns 0 for success, non-zero for failure. 3265 */ 3266int 3267mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3268{ 3269 int r, i; 3270 3271 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3272 __func__)); 3273 3274 r = mpt2sas_base_map_resources(ioc); 3275 if (r) 3276 return r; 3277 3278 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3279 if (r) 3280 goto out_free_resources; 3281 3282 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3283 if (r) 3284 goto out_free_resources; 3285 3286 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3287 if (r) 3288 goto out_free_resources; 3289 3290 init_waitqueue_head(&ioc->reset_wq); 3291 3292 /* base internal command bits */ 3293 mutex_init(&ioc->base_cmds.mutex); 3294 init_completion(&ioc->base_cmds.done); 3295 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3296 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3297 3298 /* transport internal command bits */ 3299 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3300 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3301 mutex_init(&ioc->transport_cmds.mutex); 3302 init_completion(&ioc->transport_cmds.done); 3303 3304 /* task management internal command bits */ 3305 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3306 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3307 mutex_init(&ioc->tm_cmds.mutex); 3308 init_completion(&ioc->tm_cmds.done); 3309 3310 /* config page internal command bits */ 3311 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3312 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3313 mutex_init(&ioc->config_cmds.mutex); 3314 init_completion(&ioc->config_cmds.done); 3315 3316 /* ctl module internal command bits */ 3317 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3318 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3319 mutex_init(&ioc->ctl_cmds.mutex); 3320 init_completion(&ioc->ctl_cmds.done); 3321 3322 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3323 ioc->event_masks[i] = -1; 3324 3325 /* here we enable the events we care about */ 3326 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3327 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3328 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3329 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3330 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3331 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3332 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3333 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3334 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3335 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3336 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3337 3338 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3339 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3340 if (!ioc->pfacts) 3341 goto out_free_resources; 3342 3343 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3344 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3345 if (r) 3346 goto out_free_resources; 3347 } 3348 r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP); 3349 if (r) 3350 goto out_free_resources; 3351 3352 mpt2sas_base_start_watchdog(ioc); 3353 return 0; 3354 3355 out_free_resources: 3356 3357 ioc->remove_host = 1; 3358 mpt2sas_base_free_resources(ioc); 3359 _base_release_memory_pools(ioc); 3360 kfree(ioc->tm_cmds.reply); 3361 kfree(ioc->transport_cmds.reply); 3362 kfree(ioc->config_cmds.reply); 3363 kfree(ioc->base_cmds.reply); 3364 kfree(ioc->ctl_cmds.reply); 3365 kfree(ioc->pfacts); 3366 ioc->ctl_cmds.reply = NULL; 3367 ioc->base_cmds.reply = NULL; 3368 ioc->tm_cmds.reply = NULL; 3369 ioc->transport_cmds.reply = NULL; 3370 ioc->config_cmds.reply = NULL; 3371 ioc->pfacts = NULL; 3372 return r; 3373} 3374 3375 3376/** 3377 * mpt2sas_base_detach - remove controller instance 3378 * @ioc: per adapter object 3379 * 3380 * Return nothing. 3381 */ 3382void 3383mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3384{ 3385 3386 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3387 __func__)); 3388 3389 mpt2sas_base_stop_watchdog(ioc); 3390 mpt2sas_base_free_resources(ioc); 3391 _base_release_memory_pools(ioc); 3392 kfree(ioc->pfacts); 3393 kfree(ioc->ctl_cmds.reply); 3394 kfree(ioc->base_cmds.reply); 3395 kfree(ioc->tm_cmds.reply); 3396 kfree(ioc->transport_cmds.reply); 3397 kfree(ioc->config_cmds.reply); 3398} 3399 3400/** 3401 * _base_reset_handler - reset callback handler (for base) 3402 * @ioc: per adapter object 3403 * @reset_phase: phase 3404 * 3405 * The handler for doing any required cleanup or initialization. 3406 * 3407 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3408 * MPT2_IOC_DONE_RESET 3409 * 3410 * Return nothing. 3411 */ 3412static void 3413_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3414{ 3415 switch (reset_phase) { 3416 case MPT2_IOC_PRE_RESET: 3417 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3418 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3419 break; 3420 case MPT2_IOC_AFTER_RESET: 3421 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3422 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3423 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3424 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3425 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3426 complete(&ioc->transport_cmds.done); 3427 } 3428 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3429 ioc->base_cmds.status |= MPT2_CMD_RESET; 3430 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3431 complete(&ioc->base_cmds.done); 3432 } 3433 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3434 ioc->config_cmds.status |= MPT2_CMD_RESET; 3435 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3436 complete(&ioc->config_cmds.done); 3437 } 3438 break; 3439 case MPT2_IOC_DONE_RESET: 3440 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3441 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3442 break; 3443 } 3444 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3445 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3446} 3447 3448/** 3449 * _wait_for_commands_to_complete - reset controller 3450 * @ioc: Pointer to MPT_ADAPTER structure 3451 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3452 * 3453 * This function waiting(3s) for all pending commands to complete 3454 * prior to putting controller in reset. 3455 */ 3456static void 3457_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3458{ 3459 u32 ioc_state; 3460 unsigned long flags; 3461 u16 i; 3462 3463 ioc->pending_io_count = 0; 3464 if (sleep_flag != CAN_SLEEP) 3465 return; 3466 3467 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3468 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3469 return; 3470 3471 /* pending command count */ 3472 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3473 for (i = 0; i < ioc->request_depth; i++) 3474 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3475 ioc->pending_io_count++; 3476 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3477 3478 if (!ioc->pending_io_count) 3479 return; 3480 3481 /* wait for pending commands to complete */ 3482 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3483} 3484 3485/** 3486 * mpt2sas_base_hard_reset_handler - reset controller 3487 * @ioc: Pointer to MPT_ADAPTER structure 3488 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3489 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3490 * 3491 * Returns 0 for success, non-zero for failure. 3492 */ 3493int 3494mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3495 enum reset_type type) 3496{ 3497 int r, i; 3498 unsigned long flags; 3499 3500 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3501 __func__)); 3502 3503 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3504 if (ioc->ioc_reset_in_progress) { 3505 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3506 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3507 ioc->name, __func__); 3508 return -EBUSY; 3509 } 3510 ioc->ioc_reset_in_progress = 1; 3511 ioc->shost_recovery = 1; 3512 if (ioc->shost->shost_state == SHOST_RUNNING) { 3513 /* set back to SHOST_RUNNING in mpt2sas_scsih.c */ 3514 scsi_host_set_state(ioc->shost, SHOST_RECOVERY); 3515 printk(MPT2SAS_INFO_FMT "putting controller into " 3516 "SHOST_RECOVERY\n", ioc->name); 3517 } 3518 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3519 3520 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3521 _wait_for_commands_to_complete(ioc, sleep_flag); 3522 _base_mask_interrupts(ioc); 3523 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3524 if (r) 3525 goto out; 3526 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3527 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) 3528 r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID, 3529 sleep_flag); 3530 if (!r) 3531 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3532 out: 3533 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3534 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3535 3536 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3537 ioc->ioc_reset_in_progress = 0; 3538 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3539 return r; 3540} 3541