mpt2sas_base.c revision e930438c42e744ef1f8bfdbb338253c9f384df42
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2008 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60 61#include "mpt2sas_base.h" 62 63static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 64 65#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 66#define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */ 67 68static int max_queue_depth = -1; 69module_param(max_queue_depth, int, 0); 70MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 71 72static int max_sgl_entries = -1; 73module_param(max_sgl_entries, int, 0); 74MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 75 76static int msix_disable = -1; 77module_param(msix_disable, int, 0); 78MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 79 80/** 81 * _base_fault_reset_work - workq handling ioc fault conditions 82 * @work: input argument, used to derive ioc 83 * Context: sleep. 84 * 85 * Return nothing. 86 */ 87static void 88_base_fault_reset_work(struct work_struct *work) 89{ 90 struct MPT2SAS_ADAPTER *ioc = 91 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 92 unsigned long flags; 93 u32 doorbell; 94 int rc; 95 96 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 97 if (ioc->ioc_reset_in_progress) 98 goto rearm_timer; 99 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 100 101 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 102 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 103 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 104 FORCE_BIG_HAMMER); 105 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 106 __func__, (rc == 0) ? "success" : "failed"); 107 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 108 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 109 mpt2sas_base_fault_info(ioc, doorbell & 110 MPI2_DOORBELL_DATA_MASK); 111 } 112 113 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 114 rearm_timer: 115 if (ioc->fault_reset_work_q) 116 queue_delayed_work(ioc->fault_reset_work_q, 117 &ioc->fault_reset_work, 118 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 119 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 120} 121 122#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 123/** 124 * _base_sas_ioc_info - verbose translation of the ioc status 125 * @ioc: pointer to scsi command object 126 * @mpi_reply: reply mf payload returned from firmware 127 * @request_hdr: request mf 128 * 129 * Return nothing. 130 */ 131static void 132_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 133 MPI2RequestHeader_t *request_hdr) 134{ 135 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 136 MPI2_IOCSTATUS_MASK; 137 char *desc = NULL; 138 u16 frame_sz; 139 char *func_str = NULL; 140 141 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 142 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 143 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 144 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 145 return; 146 147 switch (ioc_status) { 148 149/**************************************************************************** 150* Common IOCStatus values for all replies 151****************************************************************************/ 152 153 case MPI2_IOCSTATUS_INVALID_FUNCTION: 154 desc = "invalid function"; 155 break; 156 case MPI2_IOCSTATUS_BUSY: 157 desc = "busy"; 158 break; 159 case MPI2_IOCSTATUS_INVALID_SGL: 160 desc = "invalid sgl"; 161 break; 162 case MPI2_IOCSTATUS_INTERNAL_ERROR: 163 desc = "internal error"; 164 break; 165 case MPI2_IOCSTATUS_INVALID_VPID: 166 desc = "invalid vpid"; 167 break; 168 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 169 desc = "insufficient resources"; 170 break; 171 case MPI2_IOCSTATUS_INVALID_FIELD: 172 desc = "invalid field"; 173 break; 174 case MPI2_IOCSTATUS_INVALID_STATE: 175 desc = "invalid state"; 176 break; 177 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 178 desc = "op state not supported"; 179 break; 180 181/**************************************************************************** 182* Config IOCStatus values 183****************************************************************************/ 184 185 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 186 desc = "config invalid action"; 187 break; 188 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 189 desc = "config invalid type"; 190 break; 191 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 192 desc = "config invalid page"; 193 break; 194 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 195 desc = "config invalid data"; 196 break; 197 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 198 desc = "config no defaults"; 199 break; 200 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 201 desc = "config cant commit"; 202 break; 203 204/**************************************************************************** 205* SCSI IO Reply 206****************************************************************************/ 207 208 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 209 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 210 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 211 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 212 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 213 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 214 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 215 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 216 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 217 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 218 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 219 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 220 break; 221 222/**************************************************************************** 223* For use by SCSI Initiator and SCSI Target end-to-end data protection 224****************************************************************************/ 225 226 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 227 desc = "eedp guard error"; 228 break; 229 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 230 desc = "eedp ref tag error"; 231 break; 232 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 233 desc = "eedp app tag error"; 234 break; 235 236/**************************************************************************** 237* SCSI Target values 238****************************************************************************/ 239 240 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 241 desc = "target invalid io index"; 242 break; 243 case MPI2_IOCSTATUS_TARGET_ABORTED: 244 desc = "target aborted"; 245 break; 246 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 247 desc = "target no conn retryable"; 248 break; 249 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 250 desc = "target no connection"; 251 break; 252 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 253 desc = "target xfer count mismatch"; 254 break; 255 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 256 desc = "target data offset error"; 257 break; 258 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 259 desc = "target too much write data"; 260 break; 261 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 262 desc = "target iu too short"; 263 break; 264 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 265 desc = "target ack nak timeout"; 266 break; 267 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 268 desc = "target nak received"; 269 break; 270 271/**************************************************************************** 272* Serial Attached SCSI values 273****************************************************************************/ 274 275 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 276 desc = "smp request failed"; 277 break; 278 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 279 desc = "smp data overrun"; 280 break; 281 282/**************************************************************************** 283* Diagnostic Buffer Post / Diagnostic Release values 284****************************************************************************/ 285 286 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 287 desc = "diagnostic released"; 288 break; 289 default: 290 break; 291 } 292 293 if (!desc) 294 return; 295 296 switch (request_hdr->Function) { 297 case MPI2_FUNCTION_CONFIG: 298 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 299 func_str = "config_page"; 300 break; 301 case MPI2_FUNCTION_SCSI_TASK_MGMT: 302 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 303 func_str = "task_mgmt"; 304 break; 305 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 306 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 307 func_str = "sas_iounit_ctl"; 308 break; 309 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 310 frame_sz = sizeof(Mpi2SepRequest_t); 311 func_str = "enclosure"; 312 break; 313 case MPI2_FUNCTION_IOC_INIT: 314 frame_sz = sizeof(Mpi2IOCInitRequest_t); 315 func_str = "ioc_init"; 316 break; 317 case MPI2_FUNCTION_PORT_ENABLE: 318 frame_sz = sizeof(Mpi2PortEnableRequest_t); 319 func_str = "port_enable"; 320 break; 321 case MPI2_FUNCTION_SMP_PASSTHROUGH: 322 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 323 func_str = "smp_passthru"; 324 break; 325 default: 326 frame_sz = 32; 327 func_str = "unknown"; 328 break; 329 } 330 331 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 332 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 333 334 _debug_dump_mf(request_hdr, frame_sz/4); 335} 336 337/** 338 * _base_display_event_data - verbose translation of firmware asyn events 339 * @ioc: pointer to scsi command object 340 * @mpi_reply: reply mf payload returned from firmware 341 * 342 * Return nothing. 343 */ 344static void 345_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 346 Mpi2EventNotificationReply_t *mpi_reply) 347{ 348 char *desc = NULL; 349 u16 event; 350 351 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 352 return; 353 354 event = le16_to_cpu(mpi_reply->Event); 355 356 switch (event) { 357 case MPI2_EVENT_LOG_DATA: 358 desc = "Log Data"; 359 break; 360 case MPI2_EVENT_STATE_CHANGE: 361 desc = "Status Change"; 362 break; 363 case MPI2_EVENT_HARD_RESET_RECEIVED: 364 desc = "Hard Reset Received"; 365 break; 366 case MPI2_EVENT_EVENT_CHANGE: 367 desc = "Event Change"; 368 break; 369 case MPI2_EVENT_TASK_SET_FULL: 370 desc = "Task Set Full"; 371 break; 372 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 373 desc = "Device Status Change"; 374 break; 375 case MPI2_EVENT_IR_OPERATION_STATUS: 376 desc = "IR Operation Status"; 377 break; 378 case MPI2_EVENT_SAS_DISCOVERY: 379 desc = "Discovery"; 380 break; 381 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 382 desc = "SAS Broadcast Primitive"; 383 break; 384 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 385 desc = "SAS Init Device Status Change"; 386 break; 387 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 388 desc = "SAS Init Table Overflow"; 389 break; 390 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 391 desc = "SAS Topology Change List"; 392 break; 393 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 394 desc = "SAS Enclosure Device Status Change"; 395 break; 396 case MPI2_EVENT_IR_VOLUME: 397 desc = "IR Volume"; 398 break; 399 case MPI2_EVENT_IR_PHYSICAL_DISK: 400 desc = "IR Physical Disk"; 401 break; 402 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 403 desc = "IR Configuration Change List"; 404 break; 405 case MPI2_EVENT_LOG_ENTRY_ADDED: 406 desc = "Log Entry Added"; 407 break; 408 } 409 410 if (!desc) 411 return; 412 413 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 414} 415#endif 416 417/** 418 * _base_sas_log_info - verbose translation of firmware log info 419 * @ioc: pointer to scsi command object 420 * @log_info: log info 421 * 422 * Return nothing. 423 */ 424static void 425_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 426{ 427 union loginfo_type { 428 u32 loginfo; 429 struct { 430 u32 subcode:16; 431 u32 code:8; 432 u32 originator:4; 433 u32 bus_type:4; 434 } dw; 435 }; 436 union loginfo_type sas_loginfo; 437 char *originator_str = NULL; 438 439 sas_loginfo.loginfo = log_info; 440 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 441 return; 442 443 /* eat the loginfos associated with task aborts */ 444 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 445 0x31140000 || log_info == 0x31130000)) 446 return; 447 448 switch (sas_loginfo.dw.originator) { 449 case 0: 450 originator_str = "IOP"; 451 break; 452 case 1: 453 originator_str = "PL"; 454 break; 455 case 2: 456 originator_str = "IR"; 457 break; 458 } 459 460 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 461 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 462 originator_str, sas_loginfo.dw.code, 463 sas_loginfo.dw.subcode); 464} 465 466/** 467 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 468 * @ioc: pointer to scsi command object 469 * @fault_code: fault code 470 * 471 * Return nothing. 472 */ 473void 474mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 475{ 476 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 477 ioc->name, fault_code); 478} 479 480/** 481 * _base_display_reply_info - 482 * @ioc: pointer to scsi command object 483 * @smid: system request message index 484 * @VF_ID: virtual function id 485 * @reply: reply message frame(lower 32bit addr) 486 * 487 * Return nothing. 488 */ 489static void 490_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, 491 u32 reply) 492{ 493 MPI2DefaultReply_t *mpi_reply; 494 u16 ioc_status; 495 496 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 497 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 498#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 499 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 500 (ioc->logging_level & MPT_DEBUG_REPLY)) { 501 _base_sas_ioc_info(ioc , mpi_reply, 502 mpt2sas_base_get_msg_frame(ioc, smid)); 503 } 504#endif 505 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 506 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 507} 508 509/** 510 * mpt2sas_base_done - base internal command completion routine 511 * @ioc: pointer to scsi command object 512 * @smid: system request message index 513 * @VF_ID: virtual function id 514 * @reply: reply message frame(lower 32bit addr) 515 * 516 * Return nothing. 517 */ 518void 519mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply) 520{ 521 MPI2DefaultReply_t *mpi_reply; 522 523 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 524 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 525 return; 526 527 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 528 return; 529 530 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 531 if (mpi_reply) { 532 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 533 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 534 } 535 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 536 complete(&ioc->base_cmds.done); 537} 538 539/** 540 * _base_async_event - main callback handler for firmware asyn events 541 * @ioc: pointer to scsi command object 542 * @VF_ID: virtual function id 543 * @reply: reply message frame(lower 32bit addr) 544 * 545 * Return nothing. 546 */ 547static void 548_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply) 549{ 550 Mpi2EventNotificationReply_t *mpi_reply; 551 Mpi2EventAckRequest_t *ack_request; 552 u16 smid; 553 554 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 555 if (!mpi_reply) 556 return; 557 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 558 return; 559#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 560 _base_display_event_data(ioc, mpi_reply); 561#endif 562 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 563 goto out; 564 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 565 if (!smid) { 566 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 567 ioc->name, __func__); 568 goto out; 569 } 570 571 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 572 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 573 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 574 ack_request->Event = mpi_reply->Event; 575 ack_request->EventContext = mpi_reply->EventContext; 576 ack_request->VF_ID = VF_ID; 577 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 578 579 out: 580 581 /* scsih callback handler */ 582 mpt2sas_scsih_event_callback(ioc, VF_ID, reply); 583 584 /* ctl callback handler */ 585 mpt2sas_ctl_event_callback(ioc, VF_ID, reply); 586} 587 588/** 589 * _base_mask_interrupts - disable interrupts 590 * @ioc: pointer to scsi command object 591 * 592 * Disabling ResetIRQ, Reply and Doorbell Interrupts 593 * 594 * Return nothing. 595 */ 596static void 597_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 598{ 599 u32 him_register; 600 601 ioc->mask_interrupts = 1; 602 him_register = readl(&ioc->chip->HostInterruptMask); 603 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 604 writel(him_register, &ioc->chip->HostInterruptMask); 605 readl(&ioc->chip->HostInterruptMask); 606} 607 608/** 609 * _base_unmask_interrupts - enable interrupts 610 * @ioc: pointer to scsi command object 611 * 612 * Enabling only Reply Interrupts 613 * 614 * Return nothing. 615 */ 616static void 617_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 618{ 619 u32 him_register; 620 621 writel(0, &ioc->chip->HostInterruptStatus); 622 him_register = readl(&ioc->chip->HostInterruptMask); 623 him_register &= ~MPI2_HIM_RIM; 624 writel(him_register, &ioc->chip->HostInterruptMask); 625 ioc->mask_interrupts = 0; 626} 627 628/** 629 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 630 * @irq: irq number (not used) 631 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 632 * @r: pt_regs pointer (not used) 633 * 634 * Return IRQ_HANDLE if processed, else IRQ_NONE. 635 */ 636static irqreturn_t 637_base_interrupt(int irq, void *bus_id) 638{ 639 u32 post_index, post_index_next, completed_cmds; 640 u8 request_desript_type; 641 u16 smid; 642 u8 cb_idx; 643 u32 reply; 644 u8 VF_ID; 645 int i; 646 struct MPT2SAS_ADAPTER *ioc = bus_id; 647 648 if (ioc->mask_interrupts) 649 return IRQ_NONE; 650 651 post_index = ioc->reply_post_host_index; 652 request_desript_type = ioc->reply_post_free[post_index]. 653 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 654 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 655 return IRQ_NONE; 656 657 completed_cmds = 0; 658 do { 659 if (ioc->reply_post_free[post_index].Words == ~0ULL) 660 goto out; 661 reply = 0; 662 cb_idx = 0xFF; 663 smid = le16_to_cpu(ioc->reply_post_free[post_index]. 664 Default.DescriptorTypeDependent1); 665 VF_ID = ioc->reply_post_free[post_index]. 666 Default.VF_ID; 667 if (request_desript_type == 668 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 669 reply = le32_to_cpu(ioc->reply_post_free[post_index]. 670 AddressReply.ReplyFrameAddress); 671 } else if (request_desript_type == 672 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 673 goto next; 674 else if (request_desript_type == 675 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 676 goto next; 677 if (smid) 678 cb_idx = ioc->scsi_lookup[smid - 1].cb_idx; 679 if (smid && cb_idx != 0xFF) { 680 mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply); 681 if (reply) 682 _base_display_reply_info(ioc, smid, VF_ID, 683 reply); 684 mpt2sas_base_free_smid(ioc, smid); 685 } 686 if (!smid) 687 _base_async_event(ioc, VF_ID, reply); 688 689 /* reply free queue handling */ 690 if (reply) { 691 ioc->reply_free_host_index = 692 (ioc->reply_free_host_index == 693 (ioc->reply_free_queue_depth - 1)) ? 694 0 : ioc->reply_free_host_index + 1; 695 ioc->reply_free[ioc->reply_free_host_index] = 696 cpu_to_le32(reply); 697 writel(ioc->reply_free_host_index, 698 &ioc->chip->ReplyFreeHostIndex); 699 wmb(); 700 } 701 702 next: 703 post_index_next = (post_index == (ioc->reply_post_queue_depth - 704 1)) ? 0 : post_index + 1; 705 request_desript_type = 706 ioc->reply_post_free[post_index_next].Default.ReplyFlags 707 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 708 completed_cmds++; 709 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 710 goto out; 711 post_index = post_index_next; 712 } while (1); 713 714 out: 715 716 if (!completed_cmds) 717 return IRQ_NONE; 718 719 /* reply post descriptor handling */ 720 post_index_next = ioc->reply_post_host_index; 721 for (i = 0 ; i < completed_cmds; i++) { 722 post_index = post_index_next; 723 /* poison the reply post descriptor */ 724 ioc->reply_post_free[post_index_next].Words = ~0ULL; 725 post_index_next = (post_index == 726 (ioc->reply_post_queue_depth - 1)) 727 ? 0 : post_index + 1; 728 } 729 ioc->reply_post_host_index = post_index_next; 730 writel(post_index_next, &ioc->chip->ReplyPostHostIndex); 731 wmb(); 732 return IRQ_HANDLED; 733} 734 735/** 736 * mpt2sas_base_release_callback_handler - clear interupt callback handler 737 * @cb_idx: callback index 738 * 739 * Return nothing. 740 */ 741void 742mpt2sas_base_release_callback_handler(u8 cb_idx) 743{ 744 mpt_callbacks[cb_idx] = NULL; 745} 746 747/** 748 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 749 * @cb_func: callback function 750 * 751 * Returns cb_func. 752 */ 753u8 754mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 755{ 756 u8 cb_idx; 757 758 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 759 if (mpt_callbacks[cb_idx] == NULL) 760 break; 761 762 mpt_callbacks[cb_idx] = cb_func; 763 return cb_idx; 764} 765 766/** 767 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 768 * 769 * Return nothing. 770 */ 771void 772mpt2sas_base_initialize_callback_handler(void) 773{ 774 u8 cb_idx; 775 776 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 777 mpt2sas_base_release_callback_handler(cb_idx); 778} 779 780/** 781 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 782 * @ioc: per adapter object 783 * @paddr: virtual address for SGE 784 * 785 * Create a zero length scatter gather entry to insure the IOCs hardware has 786 * something to use if the target device goes brain dead and tries 787 * to send data even when none is asked for. 788 * 789 * Return nothing. 790 */ 791void 792mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 793{ 794 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 795 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 796 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 797 MPI2_SGE_FLAGS_SHIFT); 798 ioc->base_add_sg_single(paddr, flags_length, -1); 799} 800 801/** 802 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 803 * @paddr: virtual address for SGE 804 * @flags_length: SGE flags and data transfer length 805 * @dma_addr: Physical address 806 * 807 * Return nothing. 808 */ 809static void 810_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 811{ 812 Mpi2SGESimple32_t *sgel = paddr; 813 814 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 815 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 816 sgel->FlagsLength = cpu_to_le32(flags_length); 817 sgel->Address = cpu_to_le32(dma_addr); 818} 819 820 821/** 822 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 823 * @paddr: virtual address for SGE 824 * @flags_length: SGE flags and data transfer length 825 * @dma_addr: Physical address 826 * 827 * Return nothing. 828 */ 829static void 830_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 831{ 832 Mpi2SGESimple64_t *sgel = paddr; 833 834 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 835 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 836 sgel->FlagsLength = cpu_to_le32(flags_length); 837 sgel->Address = cpu_to_le64(dma_addr); 838} 839 840#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 841 842/** 843 * _base_config_dma_addressing - set dma addressing 844 * @ioc: per adapter object 845 * @pdev: PCI device struct 846 * 847 * Returns 0 for success, non-zero for failure. 848 */ 849static int 850_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 851{ 852 struct sysinfo s; 853 char *desc = NULL; 854 855 if (sizeof(dma_addr_t) > 4) { 856 const uint64_t required_mask = 857 dma_get_required_mask(&pdev->dev); 858 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 859 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 860 DMA_BIT_MASK(64))) { 861 ioc->base_add_sg_single = &_base_add_sg_single_64; 862 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 863 desc = "64"; 864 goto out; 865 } 866 } 867 868 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 869 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 870 ioc->base_add_sg_single = &_base_add_sg_single_32; 871 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 872 desc = "32"; 873 } else 874 return -ENODEV; 875 876 out: 877 si_meminfo(&s); 878 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 879 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 880 881 return 0; 882} 883 884/** 885 * _base_save_msix_table - backup msix vector table 886 * @ioc: per adapter object 887 * 888 * This address an errata where diag reset clears out the table 889 */ 890static void 891_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 892{ 893 int i; 894 895 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 896 return; 897 898 for (i = 0; i < ioc->msix_vector_count; i++) 899 ioc->msix_table_backup[i] = ioc->msix_table[i]; 900} 901 902/** 903 * _base_restore_msix_table - this restores the msix vector table 904 * @ioc: per adapter object 905 * 906 */ 907static void 908_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 909{ 910 int i; 911 912 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 913 return; 914 915 for (i = 0; i < ioc->msix_vector_count; i++) 916 ioc->msix_table[i] = ioc->msix_table_backup[i]; 917} 918 919/** 920 * _base_check_enable_msix - checks MSIX capabable. 921 * @ioc: per adapter object 922 * 923 * Check to see if card is capable of MSIX, and set number 924 * of avaliable msix vectors 925 */ 926static int 927_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 928{ 929 int base; 930 u16 message_control; 931 u32 msix_table_offset; 932 933 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 934 if (!base) { 935 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 936 "supported\n", ioc->name)); 937 return -EINVAL; 938 } 939 940 /* get msix vector count */ 941 pci_read_config_word(ioc->pdev, base + 2, &message_control); 942 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 943 944 /* get msix table */ 945 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 946 msix_table_offset &= 0xFFFFFFF8; 947 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 948 949 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 950 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 951 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 952 return 0; 953} 954 955/** 956 * _base_disable_msix - disables msix 957 * @ioc: per adapter object 958 * 959 */ 960static void 961_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 962{ 963 if (ioc->msix_enable) { 964 pci_disable_msix(ioc->pdev); 965 kfree(ioc->msix_table_backup); 966 ioc->msix_table_backup = NULL; 967 ioc->msix_enable = 0; 968 } 969} 970 971/** 972 * _base_enable_msix - enables msix, failback to io_apic 973 * @ioc: per adapter object 974 * 975 */ 976static int 977_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 978{ 979 struct msix_entry entries; 980 int r; 981 u8 try_msix = 0; 982 983 if (msix_disable == -1 || msix_disable == 0) 984 try_msix = 1; 985 986 if (!try_msix) 987 goto try_ioapic; 988 989 if (_base_check_enable_msix(ioc) != 0) 990 goto try_ioapic; 991 992 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 993 sizeof(u32), GFP_KERNEL); 994 if (!ioc->msix_table_backup) { 995 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 996 "msix_table_backup failed!!!\n", ioc->name)); 997 goto try_ioapic; 998 } 999 1000 memset(&entries, 0, sizeof(struct msix_entry)); 1001 r = pci_enable_msix(ioc->pdev, &entries, 1); 1002 if (r) { 1003 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1004 "failed (r=%d) !!!\n", ioc->name, r)); 1005 goto try_ioapic; 1006 } 1007 1008 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1009 ioc->name, ioc); 1010 if (r) { 1011 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1012 "interrupt %d !!!\n", ioc->name, entries.vector)); 1013 pci_disable_msix(ioc->pdev); 1014 goto try_ioapic; 1015 } 1016 1017 ioc->pci_irq = entries.vector; 1018 ioc->msix_enable = 1; 1019 return 0; 1020 1021/* failback to io_apic interrupt routing */ 1022 try_ioapic: 1023 1024 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1025 ioc->name, ioc); 1026 if (r) { 1027 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1028 ioc->name, ioc->pdev->irq); 1029 r = -EBUSY; 1030 goto out_fail; 1031 } 1032 1033 ioc->pci_irq = ioc->pdev->irq; 1034 return 0; 1035 1036 out_fail: 1037 return r; 1038} 1039 1040/** 1041 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1042 * @ioc: per adapter object 1043 * 1044 * Returns 0 for success, non-zero for failure. 1045 */ 1046int 1047mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1048{ 1049 struct pci_dev *pdev = ioc->pdev; 1050 u32 memap_sz; 1051 u32 pio_sz; 1052 int i, r = 0; 1053 1054 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1055 ioc->name, __func__)); 1056 1057 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1058 if (pci_enable_device_mem(pdev)) { 1059 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1060 "failed\n", ioc->name); 1061 return -ENODEV; 1062 } 1063 1064 1065 if (pci_request_selected_regions(pdev, ioc->bars, 1066 MPT2SAS_DRIVER_NAME)) { 1067 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1068 "failed\n", ioc->name); 1069 r = -ENODEV; 1070 goto out_fail; 1071 } 1072 1073 pci_set_master(pdev); 1074 1075 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1076 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1077 ioc->name, pci_name(pdev)); 1078 r = -ENODEV; 1079 goto out_fail; 1080 } 1081 1082 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1083 if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) { 1084 if (pio_sz) 1085 continue; 1086 ioc->pio_chip = pci_resource_start(pdev, i); 1087 pio_sz = pci_resource_len(pdev, i); 1088 } else { 1089 if (memap_sz) 1090 continue; 1091 ioc->chip_phys = pci_resource_start(pdev, i); 1092 memap_sz = pci_resource_len(pdev, i); 1093 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1094 if (ioc->chip == NULL) { 1095 printk(MPT2SAS_ERR_FMT "unable to map adapter " 1096 "memory!\n", ioc->name); 1097 r = -EINVAL; 1098 goto out_fail; 1099 } 1100 } 1101 } 1102 1103 pci_set_drvdata(pdev, ioc->shost); 1104 _base_mask_interrupts(ioc); 1105 r = _base_enable_msix(ioc); 1106 if (r) 1107 goto out_fail; 1108 1109 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1110 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1111 "IO-APIC enabled"), ioc->pci_irq); 1112 printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n", 1113 ioc->name, ioc->chip_phys, ioc->chip, memap_sz); 1114 printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n", 1115 ioc->name, ioc->pio_chip, pio_sz); 1116 1117 return 0; 1118 1119 out_fail: 1120 if (ioc->chip_phys) 1121 iounmap(ioc->chip); 1122 ioc->chip_phys = 0; 1123 ioc->pci_irq = -1; 1124 pci_release_selected_regions(ioc->pdev, ioc->bars); 1125 pci_disable_device(pdev); 1126 pci_set_drvdata(pdev, NULL); 1127 return r; 1128} 1129 1130/** 1131 * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr 1132 * @ioc: per adapter object 1133 * @smid: system request message index(smid zero is invalid) 1134 * 1135 * Returns phys pointer to message frame. 1136 */ 1137dma_addr_t 1138mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1139{ 1140 return ioc->request_dma + (smid * ioc->request_sz); 1141} 1142 1143/** 1144 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1145 * @ioc: per adapter object 1146 * @smid: system request message index(smid zero is invalid) 1147 * 1148 * Returns virt pointer to message frame. 1149 */ 1150void * 1151mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1152{ 1153 return (void *)(ioc->request + (smid * ioc->request_sz)); 1154} 1155 1156/** 1157 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1158 * @ioc: per adapter object 1159 * @smid: system request message index 1160 * 1161 * Returns virt pointer to sense buffer. 1162 */ 1163void * 1164mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1165{ 1166 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1167} 1168 1169/** 1170 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1171 * @ioc: per adapter object 1172 * @smid: system request message index 1173 * 1174 * Returns phys pointer to sense buffer. 1175 */ 1176dma_addr_t 1177mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1178{ 1179 return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE); 1180} 1181 1182/** 1183 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1184 * @ioc: per adapter object 1185 * @phys_addr: lower 32 physical addr of the reply 1186 * 1187 * Converts 32bit lower physical addr into a virt address. 1188 */ 1189void * 1190mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1191{ 1192 if (!phys_addr) 1193 return NULL; 1194 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1195} 1196 1197/** 1198 * mpt2sas_base_get_smid - obtain a free smid 1199 * @ioc: per adapter object 1200 * @cb_idx: callback index 1201 * 1202 * Returns smid (zero is invalid) 1203 */ 1204u16 1205mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1206{ 1207 unsigned long flags; 1208 struct request_tracker *request; 1209 u16 smid; 1210 1211 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1212 if (list_empty(&ioc->free_list)) { 1213 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1214 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1215 ioc->name, __func__); 1216 return 0; 1217 } 1218 1219 request = list_entry(ioc->free_list.next, 1220 struct request_tracker, tracker_list); 1221 request->cb_idx = cb_idx; 1222 smid = request->smid; 1223 list_del(&request->tracker_list); 1224 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1225 return smid; 1226} 1227 1228 1229/** 1230 * mpt2sas_base_free_smid - put smid back on free_list 1231 * @ioc: per adapter object 1232 * @smid: system request message index 1233 * 1234 * Return nothing. 1235 */ 1236void 1237mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1238{ 1239 unsigned long flags; 1240 1241 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1242 ioc->scsi_lookup[smid - 1].cb_idx = 0xFF; 1243 list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list, 1244 &ioc->free_list); 1245 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1246 1247 /* 1248 * See _wait_for_commands_to_complete() call with regards to this code. 1249 */ 1250 if (ioc->shost_recovery && ioc->pending_io_count) { 1251 if (ioc->pending_io_count == 1) 1252 wake_up(&ioc->reset_wq); 1253 ioc->pending_io_count--; 1254 } 1255} 1256 1257/** 1258 * _base_writeq - 64 bit write to MMIO 1259 * @ioc: per adapter object 1260 * @b: data payload 1261 * @addr: address in MMIO space 1262 * @writeq_lock: spin lock 1263 * 1264 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1265 * care of 32 bit environment where its not quarenteed to send the entire word 1266 * in one transfer. 1267 */ 1268#ifndef writeq 1269static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1270 spinlock_t *writeq_lock) 1271{ 1272 unsigned long flags; 1273 __u64 data_out = cpu_to_le64(b); 1274 1275 spin_lock_irqsave(writeq_lock, flags); 1276 writel((u32)(data_out), addr); 1277 writel((u32)(data_out >> 32), (addr + 4)); 1278 spin_unlock_irqrestore(writeq_lock, flags); 1279} 1280#else 1281static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1282 spinlock_t *writeq_lock) 1283{ 1284 writeq(cpu_to_le64(b), addr); 1285} 1286#endif 1287 1288/** 1289 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1290 * @ioc: per adapter object 1291 * @smid: system request message index 1292 * @vf_id: virtual function id 1293 * @handle: device handle 1294 * 1295 * Return nothing. 1296 */ 1297void 1298mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id, 1299 u16 handle) 1300{ 1301 Mpi2RequestDescriptorUnion_t descriptor; 1302 u64 *request = (u64 *)&descriptor; 1303 1304 1305 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1306 descriptor.SCSIIO.VF_ID = vf_id; 1307 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1308 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1309 descriptor.SCSIIO.LMID = 0; 1310 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1311 &ioc->scsi_lookup_lock); 1312} 1313 1314 1315/** 1316 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1317 * @ioc: per adapter object 1318 * @smid: system request message index 1319 * @vf_id: virtual function id 1320 * 1321 * Return nothing. 1322 */ 1323void 1324mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1325 u8 vf_id) 1326{ 1327 Mpi2RequestDescriptorUnion_t descriptor; 1328 u64 *request = (u64 *)&descriptor; 1329 1330 descriptor.HighPriority.RequestFlags = 1331 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1332 descriptor.HighPriority.VF_ID = vf_id; 1333 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1334 descriptor.HighPriority.LMID = 0; 1335 descriptor.HighPriority.Reserved1 = 0; 1336 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1337 &ioc->scsi_lookup_lock); 1338} 1339 1340/** 1341 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1342 * @ioc: per adapter object 1343 * @smid: system request message index 1344 * @vf_id: virtual function id 1345 * 1346 * Return nothing. 1347 */ 1348void 1349mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id) 1350{ 1351 Mpi2RequestDescriptorUnion_t descriptor; 1352 u64 *request = (u64 *)&descriptor; 1353 1354 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1355 descriptor.Default.VF_ID = vf_id; 1356 descriptor.Default.SMID = cpu_to_le16(smid); 1357 descriptor.Default.LMID = 0; 1358 descriptor.Default.DescriptorTypeDependent = 0; 1359 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1360 &ioc->scsi_lookup_lock); 1361} 1362 1363/** 1364 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1365 * @ioc: per adapter object 1366 * @smid: system request message index 1367 * @vf_id: virtual function id 1368 * @io_index: value used to track the IO 1369 * 1370 * Return nothing. 1371 */ 1372void 1373mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1374 u8 vf_id, u16 io_index) 1375{ 1376 Mpi2RequestDescriptorUnion_t descriptor; 1377 u64 *request = (u64 *)&descriptor; 1378 1379 descriptor.SCSITarget.RequestFlags = 1380 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1381 descriptor.SCSITarget.VF_ID = vf_id; 1382 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1383 descriptor.SCSITarget.LMID = 0; 1384 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1385 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1386 &ioc->scsi_lookup_lock); 1387} 1388 1389/** 1390 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1391 * @ioc: per adapter object 1392 * 1393 * Return nothing. 1394 */ 1395static void 1396_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1397{ 1398 int i = 0; 1399 char desc[16]; 1400 u8 revision; 1401 u32 iounit_pg1_flags; 1402 1403 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1404 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1405 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1406 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1407 ioc->name, desc, 1408 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1409 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1410 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1411 ioc->facts.FWVersion.Word & 0x000000FF, 1412 revision, 1413 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1414 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1415 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1416 ioc->bios_pg3.BiosVersion & 0x000000FF); 1417 1418 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1419 1420 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1421 printk("Initiator"); 1422 i++; 1423 } 1424 1425 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1426 printk("%sTarget", i ? "," : ""); 1427 i++; 1428 } 1429 1430 i = 0; 1431 printk("), "); 1432 printk("Capabilities=("); 1433 1434 if (ioc->facts.IOCCapabilities & 1435 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1436 printk("Raid"); 1437 i++; 1438 } 1439 1440 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1441 printk("%sTLR", i ? "," : ""); 1442 i++; 1443 } 1444 1445 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1446 printk("%sMulticast", i ? "," : ""); 1447 i++; 1448 } 1449 1450 if (ioc->facts.IOCCapabilities & 1451 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1452 printk("%sBIDI Target", i ? "," : ""); 1453 i++; 1454 } 1455 1456 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1457 printk("%sEEDP", i ? "," : ""); 1458 i++; 1459 } 1460 1461 if (ioc->facts.IOCCapabilities & 1462 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1463 printk("%sSnapshot Buffer", i ? "," : ""); 1464 i++; 1465 } 1466 1467 if (ioc->facts.IOCCapabilities & 1468 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1469 printk("%sDiag Trace Buffer", i ? "," : ""); 1470 i++; 1471 } 1472 1473 if (ioc->facts.IOCCapabilities & 1474 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1475 printk("%sTask Set Full", i ? "," : ""); 1476 i++; 1477 } 1478 1479 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1480 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1481 printk("%sNCQ", i ? "," : ""); 1482 i++; 1483 } 1484 1485 printk(")\n"); 1486} 1487 1488/** 1489 * _base_static_config_pages - static start of day config pages 1490 * @ioc: per adapter object 1491 * 1492 * Return nothing. 1493 */ 1494static void 1495_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1496{ 1497 Mpi2ConfigReply_t mpi_reply; 1498 u32 iounit_pg1_flags; 1499 1500 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1501 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1502 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1503 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1504 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1505 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1506 _base_display_ioc_capabilities(ioc); 1507 1508 /* 1509 * Enable task_set_full handling in iounit_pg1 when the 1510 * facts capabilities indicate that its supported. 1511 */ 1512 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1513 if ((ioc->facts.IOCCapabilities & 1514 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1515 iounit_pg1_flags &= 1516 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1517 else 1518 iounit_pg1_flags |= 1519 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1520 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1521 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1); 1522} 1523 1524/** 1525 * _base_release_memory_pools - release memory 1526 * @ioc: per adapter object 1527 * 1528 * Free memory allocated from _base_allocate_memory_pools. 1529 * 1530 * Return nothing. 1531 */ 1532static void 1533_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1534{ 1535 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1536 __func__)); 1537 1538 if (ioc->request) { 1539 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1540 ioc->request, ioc->request_dma); 1541 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1542 ": free\n", ioc->name, ioc->request)); 1543 ioc->request = NULL; 1544 } 1545 1546 if (ioc->sense) { 1547 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1548 if (ioc->sense_dma_pool) 1549 pci_pool_destroy(ioc->sense_dma_pool); 1550 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1551 ": free\n", ioc->name, ioc->sense)); 1552 ioc->sense = NULL; 1553 } 1554 1555 if (ioc->reply) { 1556 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1557 if (ioc->reply_dma_pool) 1558 pci_pool_destroy(ioc->reply_dma_pool); 1559 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1560 ": free\n", ioc->name, ioc->reply)); 1561 ioc->reply = NULL; 1562 } 1563 1564 if (ioc->reply_free) { 1565 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1566 ioc->reply_free_dma); 1567 if (ioc->reply_free_dma_pool) 1568 pci_pool_destroy(ioc->reply_free_dma_pool); 1569 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1570 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1571 ioc->reply_free = NULL; 1572 } 1573 1574 if (ioc->reply_post_free) { 1575 pci_pool_free(ioc->reply_post_free_dma_pool, 1576 ioc->reply_post_free, ioc->reply_post_free_dma); 1577 if (ioc->reply_post_free_dma_pool) 1578 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1579 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1580 "reply_post_free_pool(0x%p): free\n", ioc->name, 1581 ioc->reply_post_free)); 1582 ioc->reply_post_free = NULL; 1583 } 1584 1585 if (ioc->config_page) { 1586 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1587 "config_page(0x%p): free\n", ioc->name, 1588 ioc->config_page)); 1589 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1590 ioc->config_page, ioc->config_page_dma); 1591 } 1592 1593 kfree(ioc->scsi_lookup); 1594} 1595 1596 1597/** 1598 * _base_allocate_memory_pools - allocate start of day memory pools 1599 * @ioc: per adapter object 1600 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1601 * 1602 * Returns 0 success, anything else error 1603 */ 1604static int 1605_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1606{ 1607 Mpi2IOCFactsReply_t *facts; 1608 u32 queue_size, queue_diff; 1609 u16 max_sge_elements; 1610 u16 num_of_reply_frames; 1611 u16 chains_needed_per_io; 1612 u32 sz, total_sz; 1613 u16 i; 1614 u32 retry_sz; 1615 u16 max_request_credit; 1616 1617 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1618 __func__)); 1619 1620 retry_sz = 0; 1621 facts = &ioc->facts; 1622 1623 /* command line tunables for max sgl entries */ 1624 if (max_sgl_entries != -1) { 1625 ioc->shost->sg_tablesize = (max_sgl_entries < 1626 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1627 MPT2SAS_SG_DEPTH; 1628 } else { 1629 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1630 } 1631 1632 /* command line tunables for max controller queue depth */ 1633 if (max_queue_depth != -1) { 1634 max_request_credit = (max_queue_depth < facts->RequestCredit) 1635 ? max_queue_depth : facts->RequestCredit; 1636 } else { 1637 max_request_credit = (facts->RequestCredit > 1638 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1639 facts->RequestCredit; 1640 } 1641 ioc->request_depth = max_request_credit; 1642 1643 /* request frame size */ 1644 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1645 1646 /* reply frame size */ 1647 ioc->reply_sz = facts->ReplyFrameSize * 4; 1648 1649 retry_allocation: 1650 total_sz = 0; 1651 /* calculate number of sg elements left over in the 1st frame */ 1652 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1653 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1654 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1655 1656 /* now do the same for a chain buffer */ 1657 max_sge_elements = ioc->request_sz - ioc->sge_size; 1658 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1659 1660 ioc->chain_offset_value_for_main_message = 1661 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1662 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1663 1664 /* 1665 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1666 */ 1667 chains_needed_per_io = ((ioc->shost->sg_tablesize - 1668 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 1669 + 1; 1670 if (chains_needed_per_io > facts->MaxChainDepth) { 1671 chains_needed_per_io = facts->MaxChainDepth; 1672 ioc->shost->sg_tablesize = min_t(u16, 1673 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 1674 * chains_needed_per_io), ioc->shost->sg_tablesize); 1675 } 1676 ioc->chains_needed_per_io = chains_needed_per_io; 1677 1678 /* reply free queue sizing - taking into account for events */ 1679 num_of_reply_frames = ioc->request_depth + 32; 1680 1681 /* number of replies frames can't be a multiple of 16 */ 1682 /* decrease number of reply frames by 1 */ 1683 if (!(num_of_reply_frames % 16)) 1684 num_of_reply_frames--; 1685 1686 /* calculate number of reply free queue entries 1687 * (must be multiple of 16) 1688 */ 1689 1690 /* (we know reply_free_queue_depth is not a multiple of 16) */ 1691 queue_size = num_of_reply_frames; 1692 queue_size += 16 - (queue_size % 16); 1693 ioc->reply_free_queue_depth = queue_size; 1694 1695 /* reply descriptor post queue sizing */ 1696 /* this size should be the number of request frames + number of reply 1697 * frames 1698 */ 1699 1700 queue_size = ioc->request_depth + num_of_reply_frames + 1; 1701 /* round up to 16 byte boundary */ 1702 if (queue_size % 16) 1703 queue_size += 16 - (queue_size % 16); 1704 1705 /* check against IOC maximum reply post queue depth */ 1706 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 1707 queue_diff = queue_size - 1708 facts->MaxReplyDescriptorPostQueueDepth; 1709 1710 /* round queue_diff up to multiple of 16 */ 1711 if (queue_diff % 16) 1712 queue_diff += 16 - (queue_diff % 16); 1713 1714 /* adjust request_depth, reply_free_queue_depth, 1715 * and queue_size 1716 */ 1717 ioc->request_depth -= queue_diff; 1718 ioc->reply_free_queue_depth -= queue_diff; 1719 queue_size -= queue_diff; 1720 } 1721 ioc->reply_post_queue_depth = queue_size; 1722 1723 /* max scsi host queue depth */ 1724 ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT; 1725 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth" 1726 "(%d)\n", ioc->name, ioc->shost->can_queue)); 1727 1728 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 1729 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 1730 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 1731 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 1732 ioc->chains_needed_per_io)); 1733 1734 /* contiguous pool for request and chains, 16 byte align, one extra " 1735 * "frame for smid=0 1736 */ 1737 ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth; 1738 sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz); 1739 1740 ioc->request_dma_sz = sz; 1741 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 1742 if (!ioc->request) { 1743 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1744 "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1745 "total(%d kB)\n", ioc->name, ioc->request_depth, 1746 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1747 if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH) 1748 goto out; 1749 retry_sz += 64; 1750 ioc->request_depth = max_request_credit - retry_sz; 1751 goto retry_allocation; 1752 } 1753 1754 if (retry_sz) 1755 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 1756 "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), " 1757 "total(%d kb)\n", ioc->name, ioc->request_depth, 1758 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 1759 1760 ioc->chain = ioc->request + ((ioc->request_depth + 1) * 1761 ioc->request_sz); 1762 ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) * 1763 ioc->request_sz); 1764 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 1765 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 1766 ioc->request, ioc->request_depth, ioc->request_sz, 1767 ((ioc->request_depth + 1) * ioc->request_sz)/1024)); 1768 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 1769 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 1770 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 1771 ioc->request_sz))/1024)); 1772 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 1773 ioc->name, (unsigned long long) ioc->request_dma)); 1774 total_sz += sz; 1775 1776 ioc->scsi_lookup = kcalloc(ioc->request_depth, 1777 sizeof(struct request_tracker), GFP_KERNEL); 1778 if (!ioc->scsi_lookup) { 1779 printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n", 1780 ioc->name); 1781 goto out; 1782 } 1783 1784 /* initialize some bits */ 1785 for (i = 0; i < ioc->request_depth; i++) 1786 ioc->scsi_lookup[i].smid = i + 1; 1787 1788 /* sense buffers, 4 byte align */ 1789 sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE; 1790 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 1791 0); 1792 if (!ioc->sense_dma_pool) { 1793 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 1794 ioc->name); 1795 goto out; 1796 } 1797 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 1798 &ioc->sense_dma); 1799 if (!ioc->sense) { 1800 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 1801 ioc->name); 1802 goto out; 1803 } 1804 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 1805 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 1806 "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth, 1807 SCSI_SENSE_BUFFERSIZE, sz/1024)); 1808 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 1809 ioc->name, (unsigned long long)ioc->sense_dma)); 1810 total_sz += sz; 1811 1812 /* reply pool, 4 byte align */ 1813 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 1814 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 1815 0); 1816 if (!ioc->reply_dma_pool) { 1817 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 1818 ioc->name); 1819 goto out; 1820 } 1821 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 1822 &ioc->reply_dma); 1823 if (!ioc->reply) { 1824 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 1825 ioc->name); 1826 goto out; 1827 } 1828 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 1829 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 1830 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 1831 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 1832 ioc->name, (unsigned long long)ioc->reply_dma)); 1833 total_sz += sz; 1834 1835 /* reply free queue, 16 byte align */ 1836 sz = ioc->reply_free_queue_depth * 4; 1837 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 1838 ioc->pdev, sz, 16, 0); 1839 if (!ioc->reply_free_dma_pool) { 1840 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 1841 "failed\n", ioc->name); 1842 goto out; 1843 } 1844 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 1845 &ioc->reply_free_dma); 1846 if (!ioc->reply_free) { 1847 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 1848 "failed\n", ioc->name); 1849 goto out; 1850 } 1851 memset(ioc->reply_free, 0, sz); 1852 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 1853 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 1854 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 1855 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 1856 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 1857 total_sz += sz; 1858 1859 /* reply post queue, 16 byte align */ 1860 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 1861 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 1862 ioc->pdev, sz, 16, 0); 1863 if (!ioc->reply_post_free_dma_pool) { 1864 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 1865 "failed\n", ioc->name); 1866 goto out; 1867 } 1868 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 1869 GFP_KERNEL, &ioc->reply_post_free_dma); 1870 if (!ioc->reply_post_free) { 1871 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 1872 "failed\n", ioc->name); 1873 goto out; 1874 } 1875 memset(ioc->reply_post_free, 0, sz); 1876 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 1877 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 1878 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 1879 sz/1024)); 1880 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 1881 "(0x%llx)\n", ioc->name, (unsigned long long) 1882 ioc->reply_post_free_dma)); 1883 total_sz += sz; 1884 1885 ioc->config_page_sz = 512; 1886 ioc->config_page = pci_alloc_consistent(ioc->pdev, 1887 ioc->config_page_sz, &ioc->config_page_dma); 1888 if (!ioc->config_page) { 1889 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 1890 "failed\n", ioc->name); 1891 goto out; 1892 } 1893 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 1894 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 1895 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 1896 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 1897 total_sz += ioc->config_page_sz; 1898 1899 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 1900 ioc->name, total_sz/1024); 1901 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 1902 "Max Controller Queue Depth(%d)\n", 1903 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 1904 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 1905 ioc->name, ioc->shost->sg_tablesize); 1906 return 0; 1907 1908 out: 1909 _base_release_memory_pools(ioc); 1910 return -ENOMEM; 1911} 1912 1913 1914/** 1915 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 1916 * @ioc: Pointer to MPT_ADAPTER structure 1917 * @cooked: Request raw or cooked IOC state 1918 * 1919 * Returns all IOC Doorbell register bits if cooked==0, else just the 1920 * Doorbell bits in MPI_IOC_STATE_MASK. 1921 */ 1922u32 1923mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 1924{ 1925 u32 s, sc; 1926 1927 s = readl(&ioc->chip->Doorbell); 1928 sc = s & MPI2_IOC_STATE_MASK; 1929 return cooked ? sc : s; 1930} 1931 1932/** 1933 * _base_wait_on_iocstate - waiting on a particular ioc state 1934 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 1935 * @timeout: timeout in second 1936 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1937 * 1938 * Returns 0 for success, non-zero for failure. 1939 */ 1940static int 1941_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 1942 int sleep_flag) 1943{ 1944 u32 count, cntdn; 1945 u32 current_state; 1946 1947 count = 0; 1948 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 1949 do { 1950 current_state = mpt2sas_base_get_iocstate(ioc, 1); 1951 if (current_state == ioc_state) 1952 return 0; 1953 if (count && current_state == MPI2_IOC_STATE_FAULT) 1954 break; 1955 if (sleep_flag == CAN_SLEEP) 1956 msleep(1); 1957 else 1958 udelay(500); 1959 count++; 1960 } while (--cntdn); 1961 1962 return current_state; 1963} 1964 1965/** 1966 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 1967 * a write to the doorbell) 1968 * @ioc: per adapter object 1969 * @timeout: timeout in second 1970 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1971 * 1972 * Returns 0 for success, non-zero for failure. 1973 * 1974 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 1975 */ 1976static int 1977_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 1978 int sleep_flag) 1979{ 1980 u32 cntdn, count; 1981 u32 int_status; 1982 1983 count = 0; 1984 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 1985 do { 1986 int_status = readl(&ioc->chip->HostInterruptStatus); 1987 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 1988 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 1989 "successfull count(%d), timeout(%d)\n", ioc->name, 1990 __func__, count, timeout)); 1991 return 0; 1992 } 1993 if (sleep_flag == CAN_SLEEP) 1994 msleep(1); 1995 else 1996 udelay(500); 1997 count++; 1998 } while (--cntdn); 1999 2000 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2001 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2002 return -EFAULT; 2003} 2004 2005/** 2006 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2007 * @ioc: per adapter object 2008 * @timeout: timeout in second 2009 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2010 * 2011 * Returns 0 for success, non-zero for failure. 2012 * 2013 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2014 * doorbell. 2015 */ 2016static int 2017_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2018 int sleep_flag) 2019{ 2020 u32 cntdn, count; 2021 u32 int_status; 2022 u32 doorbell; 2023 2024 count = 0; 2025 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2026 do { 2027 int_status = readl(&ioc->chip->HostInterruptStatus); 2028 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2029 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2030 "successfull count(%d), timeout(%d)\n", ioc->name, 2031 __func__, count, timeout)); 2032 return 0; 2033 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2034 doorbell = readl(&ioc->chip->Doorbell); 2035 if ((doorbell & MPI2_IOC_STATE_MASK) == 2036 MPI2_IOC_STATE_FAULT) { 2037 mpt2sas_base_fault_info(ioc , doorbell); 2038 return -EFAULT; 2039 } 2040 } else if (int_status == 0xFFFFFFFF) 2041 goto out; 2042 2043 if (sleep_flag == CAN_SLEEP) 2044 msleep(1); 2045 else 2046 udelay(500); 2047 count++; 2048 } while (--cntdn); 2049 2050 out: 2051 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2052 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2053 return -EFAULT; 2054} 2055 2056/** 2057 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2058 * @ioc: per adapter object 2059 * @timeout: timeout in second 2060 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2061 * 2062 * Returns 0 for success, non-zero for failure. 2063 * 2064 */ 2065static int 2066_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2067 int sleep_flag) 2068{ 2069 u32 cntdn, count; 2070 u32 doorbell_reg; 2071 2072 count = 0; 2073 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2074 do { 2075 doorbell_reg = readl(&ioc->chip->Doorbell); 2076 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2077 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2078 "successfull count(%d), timeout(%d)\n", ioc->name, 2079 __func__, count, timeout)); 2080 return 0; 2081 } 2082 if (sleep_flag == CAN_SLEEP) 2083 msleep(1); 2084 else 2085 udelay(500); 2086 count++; 2087 } while (--cntdn); 2088 2089 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2090 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2091 return -EFAULT; 2092} 2093 2094/** 2095 * _base_send_ioc_reset - send doorbell reset 2096 * @ioc: per adapter object 2097 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2098 * @timeout: timeout in second 2099 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2100 * 2101 * Returns 0 for success, non-zero for failure. 2102 */ 2103static int 2104_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2105 int sleep_flag) 2106{ 2107 u32 ioc_state; 2108 int r = 0; 2109 2110 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2111 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2112 ioc->name, __func__); 2113 return -EFAULT; 2114 } 2115 2116 if (!(ioc->facts.IOCCapabilities & 2117 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2118 return -EFAULT; 2119 2120 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2121 2122 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2123 &ioc->chip->Doorbell); 2124 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2125 r = -EFAULT; 2126 goto out; 2127 } 2128 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2129 timeout, sleep_flag); 2130 if (ioc_state) { 2131 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2132 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2133 r = -EFAULT; 2134 goto out; 2135 } 2136 out: 2137 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2138 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2139 return r; 2140} 2141 2142/** 2143 * _base_handshake_req_reply_wait - send request thru doorbell interface 2144 * @ioc: per adapter object 2145 * @request_bytes: request length 2146 * @request: pointer having request payload 2147 * @reply_bytes: reply length 2148 * @reply: pointer to reply payload 2149 * @timeout: timeout in second 2150 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2151 * 2152 * Returns 0 for success, non-zero for failure. 2153 */ 2154static int 2155_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2156 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2157{ 2158 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2159 int i; 2160 u8 failed; 2161 u16 dummy; 2162 u32 *mfp; 2163 2164 /* make sure doorbell is not in use */ 2165 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2166 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2167 " (line=%d)\n", ioc->name, __LINE__); 2168 return -EFAULT; 2169 } 2170 2171 /* clear pending doorbell interrupts from previous state changes */ 2172 if (readl(&ioc->chip->HostInterruptStatus) & 2173 MPI2_HIS_IOC2SYS_DB_STATUS) 2174 writel(0, &ioc->chip->HostInterruptStatus); 2175 2176 /* send message to ioc */ 2177 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2178 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2179 &ioc->chip->Doorbell); 2180 2181 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2182 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2183 "int failed (line=%d)\n", ioc->name, __LINE__); 2184 return -EFAULT; 2185 } 2186 writel(0, &ioc->chip->HostInterruptStatus); 2187 2188 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2189 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2190 "ack failed (line=%d)\n", ioc->name, __LINE__); 2191 return -EFAULT; 2192 } 2193 2194 /* send message 32-bits at a time */ 2195 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2196 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2197 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2198 failed = 1; 2199 } 2200 2201 if (failed) { 2202 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2203 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2204 return -EFAULT; 2205 } 2206 2207 /* now wait for the reply */ 2208 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2209 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2210 "int failed (line=%d)\n", ioc->name, __LINE__); 2211 return -EFAULT; 2212 } 2213 2214 /* read the first two 16-bits, it gives the total length of the reply */ 2215 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2216 & MPI2_DOORBELL_DATA_MASK); 2217 writel(0, &ioc->chip->HostInterruptStatus); 2218 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2219 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2220 "int failed (line=%d)\n", ioc->name, __LINE__); 2221 return -EFAULT; 2222 } 2223 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2224 & MPI2_DOORBELL_DATA_MASK); 2225 writel(0, &ioc->chip->HostInterruptStatus); 2226 2227 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2228 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2229 printk(MPT2SAS_ERR_FMT "doorbell " 2230 "handshake int failed (line=%d)\n", ioc->name, 2231 __LINE__); 2232 return -EFAULT; 2233 } 2234 if (i >= reply_bytes/2) /* overflow case */ 2235 dummy = readl(&ioc->chip->Doorbell); 2236 else 2237 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2238 & MPI2_DOORBELL_DATA_MASK); 2239 writel(0, &ioc->chip->HostInterruptStatus); 2240 } 2241 2242 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2243 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2244 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2245 " (line=%d)\n", ioc->name, __LINE__)); 2246 } 2247 writel(0, &ioc->chip->HostInterruptStatus); 2248 2249 if (ioc->logging_level & MPT_DEBUG_INIT) { 2250 mfp = (u32 *)reply; 2251 printk(KERN_DEBUG "\toffset:data\n"); 2252 for (i = 0; i < reply_bytes/4; i++) 2253 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2254 le32_to_cpu(mfp[i])); 2255 } 2256 return 0; 2257} 2258 2259/** 2260 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2261 * @ioc: per adapter object 2262 * @mpi_reply: the reply payload from FW 2263 * @mpi_request: the request payload sent to FW 2264 * 2265 * The SAS IO Unit Control Request message allows the host to perform low-level 2266 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2267 * to obtain the IOC assigned device handles for a device if it has other 2268 * identifying information about the device, in addition allows the host to 2269 * remove IOC resources associated with the device. 2270 * 2271 * Returns 0 for success, non-zero for failure. 2272 */ 2273int 2274mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2275 Mpi2SasIoUnitControlReply_t *mpi_reply, 2276 Mpi2SasIoUnitControlRequest_t *mpi_request) 2277{ 2278 u16 smid; 2279 u32 ioc_state; 2280 unsigned long timeleft; 2281 u8 issue_reset; 2282 int rc; 2283 void *request; 2284 u16 wait_state_count; 2285 2286 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2287 __func__)); 2288 2289 mutex_lock(&ioc->base_cmds.mutex); 2290 2291 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2292 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2293 ioc->name, __func__); 2294 rc = -EAGAIN; 2295 goto out; 2296 } 2297 2298 wait_state_count = 0; 2299 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2300 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2301 if (wait_state_count++ == 10) { 2302 printk(MPT2SAS_ERR_FMT 2303 "%s: failed due to ioc not operational\n", 2304 ioc->name, __func__); 2305 rc = -EFAULT; 2306 goto out; 2307 } 2308 ssleep(1); 2309 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2310 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2311 "operational state(count=%d)\n", ioc->name, 2312 __func__, wait_state_count); 2313 } 2314 2315 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2316 if (!smid) { 2317 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2318 ioc->name, __func__); 2319 rc = -EAGAIN; 2320 goto out; 2321 } 2322 2323 rc = 0; 2324 ioc->base_cmds.status = MPT2_CMD_PENDING; 2325 request = mpt2sas_base_get_msg_frame(ioc, smid); 2326 ioc->base_cmds.smid = smid; 2327 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2328 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2329 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2330 ioc->ioc_link_reset_in_progress = 1; 2331 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2332 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2333 msecs_to_jiffies(10000)); 2334 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2335 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2336 ioc->ioc_link_reset_in_progress) 2337 ioc->ioc_link_reset_in_progress = 0; 2338 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2339 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2340 ioc->name, __func__); 2341 _debug_dump_mf(mpi_request, 2342 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2343 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2344 issue_reset = 1; 2345 goto issue_host_reset; 2346 } 2347 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2348 memcpy(mpi_reply, ioc->base_cmds.reply, 2349 sizeof(Mpi2SasIoUnitControlReply_t)); 2350 else 2351 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2352 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2353 goto out; 2354 2355 issue_host_reset: 2356 if (issue_reset) 2357 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2358 FORCE_BIG_HAMMER); 2359 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2360 rc = -EFAULT; 2361 out: 2362 mutex_unlock(&ioc->base_cmds.mutex); 2363 return rc; 2364} 2365 2366 2367/** 2368 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2369 * @ioc: per adapter object 2370 * @mpi_reply: the reply payload from FW 2371 * @mpi_request: the request payload sent to FW 2372 * 2373 * The SCSI Enclosure Processor request message causes the IOC to 2374 * communicate with SES devices to control LED status signals. 2375 * 2376 * Returns 0 for success, non-zero for failure. 2377 */ 2378int 2379mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2380 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2381{ 2382 u16 smid; 2383 u32 ioc_state; 2384 unsigned long timeleft; 2385 u8 issue_reset; 2386 int rc; 2387 void *request; 2388 u16 wait_state_count; 2389 2390 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2391 __func__)); 2392 2393 mutex_lock(&ioc->base_cmds.mutex); 2394 2395 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2396 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2397 ioc->name, __func__); 2398 rc = -EAGAIN; 2399 goto out; 2400 } 2401 2402 wait_state_count = 0; 2403 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2404 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2405 if (wait_state_count++ == 10) { 2406 printk(MPT2SAS_ERR_FMT 2407 "%s: failed due to ioc not operational\n", 2408 ioc->name, __func__); 2409 rc = -EFAULT; 2410 goto out; 2411 } 2412 ssleep(1); 2413 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2414 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2415 "operational state(count=%d)\n", ioc->name, 2416 __func__, wait_state_count); 2417 } 2418 2419 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2420 if (!smid) { 2421 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2422 ioc->name, __func__); 2423 rc = -EAGAIN; 2424 goto out; 2425 } 2426 2427 rc = 0; 2428 ioc->base_cmds.status = MPT2_CMD_PENDING; 2429 request = mpt2sas_base_get_msg_frame(ioc, smid); 2430 ioc->base_cmds.smid = smid; 2431 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2432 mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID); 2433 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2434 msecs_to_jiffies(10000)); 2435 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2436 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2437 ioc->name, __func__); 2438 _debug_dump_mf(mpi_request, 2439 sizeof(Mpi2SepRequest_t)/4); 2440 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2441 issue_reset = 1; 2442 goto issue_host_reset; 2443 } 2444 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2445 memcpy(mpi_reply, ioc->base_cmds.reply, 2446 sizeof(Mpi2SepReply_t)); 2447 else 2448 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2449 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2450 goto out; 2451 2452 issue_host_reset: 2453 if (issue_reset) 2454 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2455 FORCE_BIG_HAMMER); 2456 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2457 rc = -EFAULT; 2458 out: 2459 mutex_unlock(&ioc->base_cmds.mutex); 2460 return rc; 2461} 2462 2463/** 2464 * _base_get_port_facts - obtain port facts reply and save in ioc 2465 * @ioc: per adapter object 2466 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2467 * 2468 * Returns 0 for success, non-zero for failure. 2469 */ 2470static int 2471_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2472{ 2473 Mpi2PortFactsRequest_t mpi_request; 2474 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2475 int mpi_reply_sz, mpi_request_sz, r; 2476 2477 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2478 __func__)); 2479 2480 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2481 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2482 memset(&mpi_request, 0, mpi_request_sz); 2483 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2484 mpi_request.PortNumber = port; 2485 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2486 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2487 2488 if (r != 0) { 2489 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2490 ioc->name, __func__, r); 2491 return r; 2492 } 2493 2494 pfacts = &ioc->pfacts[port]; 2495 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2496 pfacts->PortNumber = mpi_reply.PortNumber; 2497 pfacts->VP_ID = mpi_reply.VP_ID; 2498 pfacts->VF_ID = mpi_reply.VF_ID; 2499 pfacts->MaxPostedCmdBuffers = 2500 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2501 2502 return 0; 2503} 2504 2505/** 2506 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2507 * @ioc: per adapter object 2508 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2509 * 2510 * Returns 0 for success, non-zero for failure. 2511 */ 2512static int 2513_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2514{ 2515 Mpi2IOCFactsRequest_t mpi_request; 2516 Mpi2IOCFactsReply_t mpi_reply, *facts; 2517 int mpi_reply_sz, mpi_request_sz, r; 2518 2519 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2520 __func__)); 2521 2522 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2523 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2524 memset(&mpi_request, 0, mpi_request_sz); 2525 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2526 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2527 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2528 2529 if (r != 0) { 2530 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2531 ioc->name, __func__, r); 2532 return r; 2533 } 2534 2535 facts = &ioc->facts; 2536 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2537 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2538 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2539 facts->VP_ID = mpi_reply.VP_ID; 2540 facts->VF_ID = mpi_reply.VF_ID; 2541 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2542 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2543 facts->WhoInit = mpi_reply.WhoInit; 2544 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2545 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2546 facts->MaxReplyDescriptorPostQueueDepth = 2547 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2548 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2549 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2550 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2551 ioc->ir_firmware = 1; 2552 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2553 facts->IOCRequestFrameSize = 2554 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2555 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2556 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2557 ioc->shost->max_id = -1; 2558 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2559 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2560 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2561 facts->HighPriorityCredit = 2562 le16_to_cpu(mpi_reply.HighPriorityCredit); 2563 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2564 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2565 2566 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2567 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2568 facts->MaxChainDepth)); 2569 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2570 "reply frame size(%d)\n", ioc->name, 2571 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2572 return 0; 2573} 2574 2575/** 2576 * _base_send_ioc_init - send ioc_init to firmware 2577 * @ioc: per adapter object 2578 * @VF_ID: virtual function id 2579 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2580 * 2581 * Returns 0 for success, non-zero for failure. 2582 */ 2583static int 2584_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2585{ 2586 Mpi2IOCInitRequest_t mpi_request; 2587 Mpi2IOCInitReply_t mpi_reply; 2588 int r; 2589 2590 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2591 __func__)); 2592 2593 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2594 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2595 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2596 mpi_request.VF_ID = VF_ID; 2597 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2598 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2599 2600 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2601 * removed and made reserved. For those with older firmware will need 2602 * this fix. It was decided that the Reply and Request frame sizes are 2603 * the same. 2604 */ 2605 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2606 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2607/* mpi_request.SystemReplyFrameSize = 2608 * cpu_to_le16(ioc->reply_sz); 2609 */ 2610 } 2611 2612 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 2613 mpi_request.ReplyDescriptorPostQueueDepth = 2614 cpu_to_le16(ioc->reply_post_queue_depth); 2615 mpi_request.ReplyFreeQueueDepth = 2616 cpu_to_le16(ioc->reply_free_queue_depth); 2617 2618#if BITS_PER_LONG > 32 2619 mpi_request.SenseBufferAddressHigh = 2620 cpu_to_le32(ioc->sense_dma >> 32); 2621 mpi_request.SystemReplyAddressHigh = 2622 cpu_to_le32(ioc->reply_dma >> 32); 2623 mpi_request.SystemRequestFrameBaseAddress = 2624 cpu_to_le64(ioc->request_dma); 2625 mpi_request.ReplyFreeQueueAddress = 2626 cpu_to_le64(ioc->reply_free_dma); 2627 mpi_request.ReplyDescriptorPostQueueAddress = 2628 cpu_to_le64(ioc->reply_post_free_dma); 2629#else 2630 mpi_request.SystemRequestFrameBaseAddress = 2631 cpu_to_le32(ioc->request_dma); 2632 mpi_request.ReplyFreeQueueAddress = 2633 cpu_to_le32(ioc->reply_free_dma); 2634 mpi_request.ReplyDescriptorPostQueueAddress = 2635 cpu_to_le32(ioc->reply_post_free_dma); 2636#endif 2637 2638 if (ioc->logging_level & MPT_DEBUG_INIT) { 2639 u32 *mfp; 2640 int i; 2641 2642 mfp = (u32 *)&mpi_request; 2643 printk(KERN_DEBUG "\toffset:data\n"); 2644 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 2645 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2646 le32_to_cpu(mfp[i])); 2647 } 2648 2649 r = _base_handshake_req_reply_wait(ioc, 2650 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 2651 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 2652 sleep_flag); 2653 2654 if (r != 0) { 2655 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2656 ioc->name, __func__, r); 2657 return r; 2658 } 2659 2660 if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS || 2661 mpi_reply.IOCLogInfo) { 2662 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 2663 r = -EIO; 2664 } 2665 2666 return 0; 2667} 2668 2669/** 2670 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 2671 * @ioc: per adapter object 2672 * @VF_ID: virtual function id 2673 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2674 * 2675 * Returns 0 for success, non-zero for failure. 2676 */ 2677static int 2678_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2679{ 2680 Mpi2PortEnableRequest_t *mpi_request; 2681 u32 ioc_state; 2682 unsigned long timeleft; 2683 int r = 0; 2684 u16 smid; 2685 2686 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 2687 2688 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2689 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2690 ioc->name, __func__); 2691 return -EAGAIN; 2692 } 2693 2694 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2695 if (!smid) { 2696 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2697 ioc->name, __func__); 2698 return -EAGAIN; 2699 } 2700 2701 ioc->base_cmds.status = MPT2_CMD_PENDING; 2702 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2703 ioc->base_cmds.smid = smid; 2704 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 2705 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 2706 mpi_request->VF_ID = VF_ID; 2707 2708 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2709 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2710 300*HZ); 2711 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2712 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2713 ioc->name, __func__); 2714 _debug_dump_mf(mpi_request, 2715 sizeof(Mpi2PortEnableRequest_t)/4); 2716 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2717 r = -EFAULT; 2718 else 2719 r = -ETIME; 2720 goto out; 2721 } else 2722 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2723 ioc->name, __func__)); 2724 2725 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 2726 60, sleep_flag); 2727 if (ioc_state) { 2728 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 2729 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2730 r = -EFAULT; 2731 } 2732 out: 2733 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2734 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 2735 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2736 return r; 2737} 2738 2739/** 2740 * _base_unmask_events - turn on notification for this event 2741 * @ioc: per adapter object 2742 * @event: firmware event 2743 * 2744 * The mask is stored in ioc->event_masks. 2745 */ 2746static void 2747_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 2748{ 2749 u32 desired_event; 2750 2751 if (event >= 128) 2752 return; 2753 2754 desired_event = (1 << (event % 32)); 2755 2756 if (event < 32) 2757 ioc->event_masks[0] &= ~desired_event; 2758 else if (event < 64) 2759 ioc->event_masks[1] &= ~desired_event; 2760 else if (event < 96) 2761 ioc->event_masks[2] &= ~desired_event; 2762 else if (event < 128) 2763 ioc->event_masks[3] &= ~desired_event; 2764} 2765 2766/** 2767 * _base_event_notification - send event notification 2768 * @ioc: per adapter object 2769 * @VF_ID: virtual function id 2770 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2771 * 2772 * Returns 0 for success, non-zero for failure. 2773 */ 2774static int 2775_base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag) 2776{ 2777 Mpi2EventNotificationRequest_t *mpi_request; 2778 unsigned long timeleft; 2779 u16 smid; 2780 int r = 0; 2781 int i; 2782 2783 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2784 __func__)); 2785 2786 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 2787 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 2788 ioc->name, __func__); 2789 return -EAGAIN; 2790 } 2791 2792 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2793 if (!smid) { 2794 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2795 ioc->name, __func__); 2796 return -EAGAIN; 2797 } 2798 ioc->base_cmds.status = MPT2_CMD_PENDING; 2799 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 2800 ioc->base_cmds.smid = smid; 2801 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 2802 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 2803 mpi_request->VF_ID = VF_ID; 2804 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 2805 mpi_request->EventMasks[i] = 2806 le32_to_cpu(ioc->event_masks[i]); 2807 mpt2sas_base_put_smid_default(ioc, smid, VF_ID); 2808 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 2809 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2810 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2811 ioc->name, __func__); 2812 _debug_dump_mf(mpi_request, 2813 sizeof(Mpi2EventNotificationRequest_t)/4); 2814 if (ioc->base_cmds.status & MPT2_CMD_RESET) 2815 r = -EFAULT; 2816 else 2817 r = -ETIME; 2818 } else 2819 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 2820 ioc->name, __func__)); 2821 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2822 return r; 2823} 2824 2825/** 2826 * mpt2sas_base_validate_event_type - validating event types 2827 * @ioc: per adapter object 2828 * @event: firmware event 2829 * 2830 * This will turn on firmware event notification when application 2831 * ask for that event. We don't mask events that are already enabled. 2832 */ 2833void 2834mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 2835{ 2836 int i, j; 2837 u32 event_mask, desired_event; 2838 u8 send_update_to_fw; 2839 2840 for (i = 0, send_update_to_fw = 0; i < 2841 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 2842 event_mask = ~event_type[i]; 2843 desired_event = 1; 2844 for (j = 0; j < 32; j++) { 2845 if (!(event_mask & desired_event) && 2846 (ioc->event_masks[i] & desired_event)) { 2847 ioc->event_masks[i] &= ~desired_event; 2848 send_update_to_fw = 1; 2849 } 2850 desired_event = (desired_event << 1); 2851 } 2852 } 2853 2854 if (!send_update_to_fw) 2855 return; 2856 2857 mutex_lock(&ioc->base_cmds.mutex); 2858 _base_event_notification(ioc, 0, CAN_SLEEP); 2859 mutex_unlock(&ioc->base_cmds.mutex); 2860} 2861 2862/** 2863 * _base_diag_reset - the "big hammer" start of day reset 2864 * @ioc: per adapter object 2865 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2866 * 2867 * Returns 0 for success, non-zero for failure. 2868 */ 2869static int 2870_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2871{ 2872 u32 host_diagnostic; 2873 u32 ioc_state; 2874 u32 count; 2875 u32 hcb_size; 2876 2877 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 2878 2879 _base_save_msix_table(ioc); 2880 2881 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 2882 ioc->name)); 2883 writel(0, &ioc->chip->HostInterruptStatus); 2884 2885 count = 0; 2886 do { 2887 /* Write magic sequence to WriteSequence register 2888 * Loop until in diagnostic mode 2889 */ 2890 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 2891 "sequence\n", ioc->name)); 2892 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 2893 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 2894 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 2895 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 2896 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 2897 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 2898 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 2899 2900 /* wait 100 msec */ 2901 if (sleep_flag == CAN_SLEEP) 2902 msleep(100); 2903 else 2904 mdelay(100); 2905 2906 if (count++ > 20) 2907 goto out; 2908 2909 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 2910 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 2911 "sequence: count(%d), host_diagnostic(0x%08x)\n", 2912 ioc->name, count, host_diagnostic)); 2913 2914 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 2915 2916 hcb_size = readl(&ioc->chip->HCBSize); 2917 2918 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 2919 ioc->name)); 2920 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 2921 &ioc->chip->HostDiagnostic); 2922 2923 /* don't access any registers for 50 milliseconds */ 2924 msleep(50); 2925 2926 /* 300 second max wait */ 2927 for (count = 0; count < 3000000 ; count++) { 2928 2929 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 2930 2931 if (host_diagnostic == 0xFFFFFFFF) 2932 goto out; 2933 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 2934 break; 2935 2936 /* wait 100 msec */ 2937 if (sleep_flag == CAN_SLEEP) 2938 msleep(1); 2939 else 2940 mdelay(1); 2941 } 2942 2943 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 2944 2945 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 2946 "assuming the HCB Address points to good F/W\n", 2947 ioc->name)); 2948 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 2949 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 2950 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 2951 2952 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 2953 "re-enable the HCDW\n", ioc->name)); 2954 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 2955 &ioc->chip->HCBSize); 2956 } 2957 2958 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 2959 ioc->name)); 2960 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 2961 &ioc->chip->HostDiagnostic); 2962 2963 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 2964 "diagnostic register\n", ioc->name)); 2965 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 2966 2967 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 2968 "READY state\n", ioc->name)); 2969 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 2970 sleep_flag); 2971 if (ioc_state) { 2972 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2973 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2974 goto out; 2975 } 2976 2977 _base_restore_msix_table(ioc); 2978 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 2979 return 0; 2980 2981 out: 2982 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 2983 return -EFAULT; 2984} 2985 2986/** 2987 * _base_make_ioc_ready - put controller in READY state 2988 * @ioc: per adapter object 2989 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2990 * @type: FORCE_BIG_HAMMER or SOFT_RESET 2991 * 2992 * Returns 0 for success, non-zero for failure. 2993 */ 2994static int 2995_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 2996 enum reset_type type) 2997{ 2998 u32 ioc_state; 2999 3000 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3001 __func__)); 3002 3003 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3004 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3005 ioc->name, __func__, ioc_state)); 3006 3007 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3008 return 0; 3009 3010 if (ioc_state & MPI2_DOORBELL_USED) { 3011 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3012 "active!\n", ioc->name)); 3013 goto issue_diag_reset; 3014 } 3015 3016 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3017 mpt2sas_base_fault_info(ioc, ioc_state & 3018 MPI2_DOORBELL_DATA_MASK); 3019 goto issue_diag_reset; 3020 } 3021 3022 if (type == FORCE_BIG_HAMMER) 3023 goto issue_diag_reset; 3024 3025 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3026 if (!(_base_send_ioc_reset(ioc, 3027 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3028 return 0; 3029 3030 issue_diag_reset: 3031 return _base_diag_reset(ioc, CAN_SLEEP); 3032} 3033 3034/** 3035 * _base_make_ioc_operational - put controller in OPERATIONAL state 3036 * @ioc: per adapter object 3037 * @VF_ID: virtual function id 3038 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3039 * 3040 * Returns 0 for success, non-zero for failure. 3041 */ 3042static int 3043_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, 3044 int sleep_flag) 3045{ 3046 int r, i; 3047 unsigned long flags; 3048 u32 reply_address; 3049 3050 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3051 __func__)); 3052 3053 /* initialize the scsi lookup free list */ 3054 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3055 INIT_LIST_HEAD(&ioc->free_list); 3056 for (i = 0; i < ioc->request_depth; i++) { 3057 ioc->scsi_lookup[i].cb_idx = 0xFF; 3058 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3059 &ioc->free_list); 3060 } 3061 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3062 3063 /* initialize Reply Free Queue */ 3064 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3065 i < ioc->reply_free_queue_depth ; i++, reply_address += 3066 ioc->reply_sz) 3067 ioc->reply_free[i] = cpu_to_le32(reply_address); 3068 3069 /* initialize Reply Post Free Queue */ 3070 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3071 ioc->reply_post_free[i].Words = ~0ULL; 3072 3073 r = _base_send_ioc_init(ioc, VF_ID, sleep_flag); 3074 if (r) 3075 return r; 3076 3077 /* initialize the index's */ 3078 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3079 ioc->reply_post_host_index = 0; 3080 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3081 writel(0, &ioc->chip->ReplyPostHostIndex); 3082 3083 _base_unmask_interrupts(ioc); 3084 r = _base_event_notification(ioc, VF_ID, sleep_flag); 3085 if (r) 3086 return r; 3087 3088 if (sleep_flag == CAN_SLEEP) 3089 _base_static_config_pages(ioc); 3090 3091 r = _base_send_port_enable(ioc, VF_ID, sleep_flag); 3092 if (r) 3093 return r; 3094 3095 return r; 3096} 3097 3098/** 3099 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3100 * @ioc: per adapter object 3101 * 3102 * Return nothing. 3103 */ 3104void 3105mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3106{ 3107 struct pci_dev *pdev = ioc->pdev; 3108 3109 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3110 __func__)); 3111 3112 _base_mask_interrupts(ioc); 3113 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3114 if (ioc->pci_irq) { 3115 synchronize_irq(pdev->irq); 3116 free_irq(ioc->pci_irq, ioc); 3117 } 3118 _base_disable_msix(ioc); 3119 if (ioc->chip_phys) 3120 iounmap(ioc->chip); 3121 ioc->pci_irq = -1; 3122 ioc->chip_phys = 0; 3123 pci_release_selected_regions(ioc->pdev, ioc->bars); 3124 pci_disable_device(pdev); 3125 pci_set_drvdata(pdev, NULL); 3126 return; 3127} 3128 3129/** 3130 * mpt2sas_base_attach - attach controller instance 3131 * @ioc: per adapter object 3132 * 3133 * Returns 0 for success, non-zero for failure. 3134 */ 3135int 3136mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3137{ 3138 int r, i; 3139 unsigned long flags; 3140 3141 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3142 __func__)); 3143 3144 r = mpt2sas_base_map_resources(ioc); 3145 if (r) 3146 return r; 3147 3148 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3149 if (r) 3150 goto out_free_resources; 3151 3152 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3153 if (r) 3154 goto out_free_resources; 3155 3156 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3157 if (r) 3158 goto out_free_resources; 3159 3160 init_waitqueue_head(&ioc->reset_wq); 3161 3162 /* base internal command bits */ 3163 mutex_init(&ioc->base_cmds.mutex); 3164 init_completion(&ioc->base_cmds.done); 3165 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3166 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3167 3168 /* transport internal command bits */ 3169 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3170 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3171 mutex_init(&ioc->transport_cmds.mutex); 3172 init_completion(&ioc->transport_cmds.done); 3173 3174 /* task management internal command bits */ 3175 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3176 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3177 mutex_init(&ioc->tm_cmds.mutex); 3178 init_completion(&ioc->tm_cmds.done); 3179 3180 /* config page internal command bits */ 3181 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3182 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3183 mutex_init(&ioc->config_cmds.mutex); 3184 init_completion(&ioc->config_cmds.done); 3185 3186 /* ctl module internal command bits */ 3187 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3188 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3189 mutex_init(&ioc->ctl_cmds.mutex); 3190 init_completion(&ioc->ctl_cmds.done); 3191 3192 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3193 ioc->event_masks[i] = -1; 3194 3195 /* here we enable the events we care about */ 3196 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3197 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3198 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3199 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3200 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3201 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3202 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3203 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3204 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3205 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3206 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3207 3208 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3209 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3210 if (!ioc->pfacts) 3211 goto out_free_resources; 3212 3213 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3214 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3215 if (r) 3216 goto out_free_resources; 3217 } 3218 r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP); 3219 if (r) 3220 goto out_free_resources; 3221 3222 /* initialize fault polling */ 3223 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 3224 snprintf(ioc->fault_reset_work_q_name, 3225 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 3226 ioc->fault_reset_work_q = 3227 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 3228 if (!ioc->fault_reset_work_q) { 3229 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 3230 ioc->name, __func__, __LINE__); 3231 goto out_free_resources; 3232 } 3233 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3234 if (ioc->fault_reset_work_q) 3235 queue_delayed_work(ioc->fault_reset_work_q, 3236 &ioc->fault_reset_work, 3237 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 3238 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3239 return 0; 3240 3241 out_free_resources: 3242 3243 ioc->remove_host = 1; 3244 mpt2sas_base_free_resources(ioc); 3245 _base_release_memory_pools(ioc); 3246 kfree(ioc->tm_cmds.reply); 3247 kfree(ioc->transport_cmds.reply); 3248 kfree(ioc->config_cmds.reply); 3249 kfree(ioc->base_cmds.reply); 3250 kfree(ioc->ctl_cmds.reply); 3251 kfree(ioc->pfacts); 3252 ioc->ctl_cmds.reply = NULL; 3253 ioc->base_cmds.reply = NULL; 3254 ioc->tm_cmds.reply = NULL; 3255 ioc->transport_cmds.reply = NULL; 3256 ioc->config_cmds.reply = NULL; 3257 ioc->pfacts = NULL; 3258 return r; 3259} 3260 3261 3262/** 3263 * mpt2sas_base_detach - remove controller instance 3264 * @ioc: per adapter object 3265 * 3266 * Return nothing. 3267 */ 3268void 3269mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3270{ 3271 unsigned long flags; 3272 struct workqueue_struct *wq; 3273 3274 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3275 __func__)); 3276 3277 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3278 wq = ioc->fault_reset_work_q; 3279 ioc->fault_reset_work_q = NULL; 3280 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3281 if (!cancel_delayed_work(&ioc->fault_reset_work)) 3282 flush_workqueue(wq); 3283 destroy_workqueue(wq); 3284 3285 mpt2sas_base_free_resources(ioc); 3286 _base_release_memory_pools(ioc); 3287 kfree(ioc->pfacts); 3288 kfree(ioc->ctl_cmds.reply); 3289 kfree(ioc->base_cmds.reply); 3290 kfree(ioc->tm_cmds.reply); 3291 kfree(ioc->transport_cmds.reply); 3292 kfree(ioc->config_cmds.reply); 3293} 3294 3295/** 3296 * _base_reset_handler - reset callback handler (for base) 3297 * @ioc: per adapter object 3298 * @reset_phase: phase 3299 * 3300 * The handler for doing any required cleanup or initialization. 3301 * 3302 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3303 * MPT2_IOC_DONE_RESET 3304 * 3305 * Return nothing. 3306 */ 3307static void 3308_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3309{ 3310 switch (reset_phase) { 3311 case MPT2_IOC_PRE_RESET: 3312 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3313 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3314 break; 3315 case MPT2_IOC_AFTER_RESET: 3316 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3317 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3318 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3319 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3320 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3321 complete(&ioc->transport_cmds.done); 3322 } 3323 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3324 ioc->base_cmds.status |= MPT2_CMD_RESET; 3325 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3326 complete(&ioc->base_cmds.done); 3327 } 3328 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3329 ioc->config_cmds.status |= MPT2_CMD_RESET; 3330 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3331 complete(&ioc->config_cmds.done); 3332 } 3333 break; 3334 case MPT2_IOC_DONE_RESET: 3335 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3336 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3337 break; 3338 } 3339 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3340 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3341} 3342 3343/** 3344 * _wait_for_commands_to_complete - reset controller 3345 * @ioc: Pointer to MPT_ADAPTER structure 3346 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3347 * 3348 * This function waiting(3s) for all pending commands to complete 3349 * prior to putting controller in reset. 3350 */ 3351static void 3352_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3353{ 3354 u32 ioc_state; 3355 unsigned long flags; 3356 u16 i; 3357 3358 ioc->pending_io_count = 0; 3359 if (sleep_flag != CAN_SLEEP) 3360 return; 3361 3362 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3363 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3364 return; 3365 3366 /* pending command count */ 3367 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3368 for (i = 0; i < ioc->request_depth; i++) 3369 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3370 ioc->pending_io_count++; 3371 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3372 3373 if (!ioc->pending_io_count) 3374 return; 3375 3376 /* wait for pending commands to complete */ 3377 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3378} 3379 3380/** 3381 * mpt2sas_base_hard_reset_handler - reset controller 3382 * @ioc: Pointer to MPT_ADAPTER structure 3383 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3384 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3385 * 3386 * Returns 0 for success, non-zero for failure. 3387 */ 3388int 3389mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3390 enum reset_type type) 3391{ 3392 int r, i; 3393 unsigned long flags; 3394 3395 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3396 __func__)); 3397 3398 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3399 if (ioc->ioc_reset_in_progress) { 3400 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3401 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3402 ioc->name, __func__); 3403 return -EBUSY; 3404 } 3405 ioc->ioc_reset_in_progress = 1; 3406 ioc->shost_recovery = 1; 3407 if (ioc->shost->shost_state == SHOST_RUNNING) { 3408 /* set back to SHOST_RUNNING in mpt2sas_scsih.c */ 3409 scsi_host_set_state(ioc->shost, SHOST_RECOVERY); 3410 printk(MPT2SAS_INFO_FMT "putting controller into " 3411 "SHOST_RECOVERY\n", ioc->name); 3412 } 3413 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3414 3415 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3416 _wait_for_commands_to_complete(ioc, sleep_flag); 3417 _base_mask_interrupts(ioc); 3418 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3419 if (r) 3420 goto out; 3421 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3422 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) 3423 r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID, 3424 sleep_flag); 3425 if (!r) 3426 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3427 out: 3428 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3429 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3430 3431 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3432 ioc->ioc_reset_in_progress = 0; 3433 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3434 return r; 3435} 3436