mpt2sas_base.c revision e9edbe310dbb745067f7c5761ba91005fb9d60af
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2014 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/kernel.h> 46#include <linux/module.h> 47#include <linux/errno.h> 48#include <linux/init.h> 49#include <linux/slab.h> 50#include <linux/types.h> 51#include <linux/pci.h> 52#include <linux/kdev_t.h> 53#include <linux/blkdev.h> 54#include <linux/delay.h> 55#include <linux/interrupt.h> 56#include <linux/dma-mapping.h> 57#include <linux/sort.h> 58#include <linux/io.h> 59#include <linux/time.h> 60#include <linux/kthread.h> 61#include <linux/aer.h> 62 63#include "mpt2sas_base.h" 64 65static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 66 67#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 68 69#define MAX_HBA_QUEUE_DEPTH 30000 70#define MAX_CHAIN_DEPTH 100000 71static int max_queue_depth = -1; 72module_param(max_queue_depth, int, 0); 73MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 74 75static int max_sgl_entries = -1; 76module_param(max_sgl_entries, int, 0); 77MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 78 79static int msix_disable = -1; 80module_param(msix_disable, int, 0); 81MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 82 83static int max_msix_vectors = -1; 84module_param(max_msix_vectors, int, 0); 85MODULE_PARM_DESC(max_msix_vectors, " max msix vectors "); 86 87static int mpt2sas_fwfault_debug; 88MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault " 89 "and halt firmware - (default=0)"); 90 91static int disable_discovery = -1; 92module_param(disable_discovery, int, 0); 93MODULE_PARM_DESC(disable_discovery, " disable discovery "); 94 95/** 96 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug. 97 * 98 */ 99static int 100_scsih_set_fwfault_debug(const char *val, struct kernel_param *kp) 101{ 102 int ret = param_set_int(val, kp); 103 struct MPT2SAS_ADAPTER *ioc; 104 105 if (ret) 106 return ret; 107 108 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug); 109 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) 110 ioc->fwfault_debug = mpt2sas_fwfault_debug; 111 return 0; 112} 113 114module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug, 115 param_get_int, &mpt2sas_fwfault_debug, 0644); 116 117/** 118 * mpt2sas_remove_dead_ioc_func - kthread context to remove dead ioc 119 * @arg: input argument, used to derive ioc 120 * 121 * Return 0 if controller is removed from pci subsystem. 122 * Return -1 for other case. 123 */ 124static int mpt2sas_remove_dead_ioc_func(void *arg) 125{ 126 struct MPT2SAS_ADAPTER *ioc = (struct MPT2SAS_ADAPTER *)arg; 127 struct pci_dev *pdev; 128 129 if ((ioc == NULL)) 130 return -1; 131 132 pdev = ioc->pdev; 133 if ((pdev == NULL)) 134 return -1; 135 pci_stop_and_remove_bus_device_locked(pdev); 136 return 0; 137} 138 139 140/** 141 * _base_fault_reset_work - workq handling ioc fault conditions 142 * @work: input argument, used to derive ioc 143 * Context: sleep. 144 * 145 * Return nothing. 146 */ 147static void 148_base_fault_reset_work(struct work_struct *work) 149{ 150 struct MPT2SAS_ADAPTER *ioc = 151 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 152 unsigned long flags; 153 u32 doorbell; 154 int rc; 155 struct task_struct *p; 156 157 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 158 if (ioc->shost_recovery || ioc->pci_error_recovery) 159 goto rearm_timer; 160 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 161 162 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 163 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) { 164 printk(MPT2SAS_INFO_FMT "%s : SAS host is non-operational !!!!\n", 165 ioc->name, __func__); 166 167 /* It may be possible that EEH recovery can resolve some of 168 * pci bus failure issues rather removing the dead ioc function 169 * by considering controller is in a non-operational state. So 170 * here priority is given to the EEH recovery. If it doesn't 171 * not resolve this issue, mpt2sas driver will consider this 172 * controller to non-operational state and remove the dead ioc 173 * function. 174 */ 175 if (ioc->non_operational_loop++ < 5) { 176 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, 177 flags); 178 goto rearm_timer; 179 } 180 181 /* 182 * Call _scsih_flush_pending_cmds callback so that we flush all 183 * pending commands back to OS. This call is required to aovid 184 * deadlock at block layer. Dead IOC will fail to do diag reset, 185 * and this call is safe since dead ioc will never return any 186 * command back from HW. 187 */ 188 ioc->schedule_dead_ioc_flush_running_cmds(ioc); 189 /* 190 * Set remove_host flag early since kernel thread will 191 * take some time to execute. 192 */ 193 ioc->remove_host = 1; 194 /*Remove the Dead Host */ 195 p = kthread_run(mpt2sas_remove_dead_ioc_func, ioc, 196 "mpt2sas_dead_ioc_%d", ioc->id); 197 if (IS_ERR(p)) { 198 printk(MPT2SAS_ERR_FMT 199 "%s: Running mpt2sas_dead_ioc thread failed !!!!\n", 200 ioc->name, __func__); 201 } else { 202 printk(MPT2SAS_ERR_FMT 203 "%s: Running mpt2sas_dead_ioc thread success !!!!\n", 204 ioc->name, __func__); 205 } 206 207 return; /* don't rearm timer */ 208 } 209 210 ioc->non_operational_loop = 0; 211 212 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 213 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 214 FORCE_BIG_HAMMER); 215 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 216 __func__, (rc == 0) ? "success" : "failed"); 217 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 218 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 219 mpt2sas_base_fault_info(ioc, doorbell & 220 MPI2_DOORBELL_DATA_MASK); 221 } 222 223 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 224 rearm_timer: 225 if (ioc->fault_reset_work_q) 226 queue_delayed_work(ioc->fault_reset_work_q, 227 &ioc->fault_reset_work, 228 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 229 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 230} 231 232/** 233 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 234 * @ioc: per adapter object 235 * Context: sleep. 236 * 237 * Return nothing. 238 */ 239void 240mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 241{ 242 unsigned long flags; 243 244 if (ioc->fault_reset_work_q) 245 return; 246 247 /* initialize fault polling */ 248 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 249 snprintf(ioc->fault_reset_work_q_name, 250 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 251 ioc->fault_reset_work_q = 252 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 253 if (!ioc->fault_reset_work_q) { 254 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 255 ioc->name, __func__, __LINE__); 256 return; 257 } 258 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 259 if (ioc->fault_reset_work_q) 260 queue_delayed_work(ioc->fault_reset_work_q, 261 &ioc->fault_reset_work, 262 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 263 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 264} 265 266/** 267 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 268 * @ioc: per adapter object 269 * Context: sleep. 270 * 271 * Return nothing. 272 */ 273void 274mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 275{ 276 unsigned long flags; 277 struct workqueue_struct *wq; 278 279 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 280 wq = ioc->fault_reset_work_q; 281 ioc->fault_reset_work_q = NULL; 282 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 283 if (wq) { 284 if (!cancel_delayed_work_sync(&ioc->fault_reset_work)) 285 flush_workqueue(wq); 286 destroy_workqueue(wq); 287 } 288} 289 290/** 291 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 292 * @ioc: per adapter object 293 * @fault_code: fault code 294 * 295 * Return nothing. 296 */ 297void 298mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 299{ 300 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 301 ioc->name, fault_code); 302} 303 304/** 305 * mpt2sas_halt_firmware - halt's mpt controller firmware 306 * @ioc: per adapter object 307 * 308 * For debugging timeout related issues. Writing 0xCOFFEE00 309 * to the doorbell register will halt controller firmware. With 310 * the purpose to stop both driver and firmware, the enduser can 311 * obtain a ring buffer from controller UART. 312 */ 313void 314mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc) 315{ 316 u32 doorbell; 317 318 if (!ioc->fwfault_debug) 319 return; 320 321 dump_stack(); 322 323 doorbell = readl(&ioc->chip->Doorbell); 324 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 325 mpt2sas_base_fault_info(ioc , doorbell); 326 else { 327 writel(0xC0FFEE00, &ioc->chip->Doorbell); 328 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command " 329 "timeout\n", ioc->name); 330 } 331 332 panic("panic in %s\n", __func__); 333} 334 335#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 336/** 337 * _base_sas_ioc_info - verbose translation of the ioc status 338 * @ioc: per adapter object 339 * @mpi_reply: reply mf payload returned from firmware 340 * @request_hdr: request mf 341 * 342 * Return nothing. 343 */ 344static void 345_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 346 MPI2RequestHeader_t *request_hdr) 347{ 348 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 349 MPI2_IOCSTATUS_MASK; 350 char *desc = NULL; 351 u16 frame_sz; 352 char *func_str = NULL; 353 354 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 355 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 356 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 357 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 358 return; 359 360 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) 361 return; 362 363 switch (ioc_status) { 364 365/**************************************************************************** 366* Common IOCStatus values for all replies 367****************************************************************************/ 368 369 case MPI2_IOCSTATUS_INVALID_FUNCTION: 370 desc = "invalid function"; 371 break; 372 case MPI2_IOCSTATUS_BUSY: 373 desc = "busy"; 374 break; 375 case MPI2_IOCSTATUS_INVALID_SGL: 376 desc = "invalid sgl"; 377 break; 378 case MPI2_IOCSTATUS_INTERNAL_ERROR: 379 desc = "internal error"; 380 break; 381 case MPI2_IOCSTATUS_INVALID_VPID: 382 desc = "invalid vpid"; 383 break; 384 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 385 desc = "insufficient resources"; 386 break; 387 case MPI2_IOCSTATUS_INVALID_FIELD: 388 desc = "invalid field"; 389 break; 390 case MPI2_IOCSTATUS_INVALID_STATE: 391 desc = "invalid state"; 392 break; 393 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 394 desc = "op state not supported"; 395 break; 396 397/**************************************************************************** 398* Config IOCStatus values 399****************************************************************************/ 400 401 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 402 desc = "config invalid action"; 403 break; 404 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 405 desc = "config invalid type"; 406 break; 407 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 408 desc = "config invalid page"; 409 break; 410 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 411 desc = "config invalid data"; 412 break; 413 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 414 desc = "config no defaults"; 415 break; 416 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 417 desc = "config cant commit"; 418 break; 419 420/**************************************************************************** 421* SCSI IO Reply 422****************************************************************************/ 423 424 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 425 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 426 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 427 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 428 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 429 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 430 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 431 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 432 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 433 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 434 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 435 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 436 break; 437 438/**************************************************************************** 439* For use by SCSI Initiator and SCSI Target end-to-end data protection 440****************************************************************************/ 441 442 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 443 desc = "eedp guard error"; 444 break; 445 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 446 desc = "eedp ref tag error"; 447 break; 448 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 449 desc = "eedp app tag error"; 450 break; 451 452/**************************************************************************** 453* SCSI Target values 454****************************************************************************/ 455 456 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 457 desc = "target invalid io index"; 458 break; 459 case MPI2_IOCSTATUS_TARGET_ABORTED: 460 desc = "target aborted"; 461 break; 462 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 463 desc = "target no conn retryable"; 464 break; 465 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 466 desc = "target no connection"; 467 break; 468 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 469 desc = "target xfer count mismatch"; 470 break; 471 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 472 desc = "target data offset error"; 473 break; 474 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 475 desc = "target too much write data"; 476 break; 477 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 478 desc = "target iu too short"; 479 break; 480 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 481 desc = "target ack nak timeout"; 482 break; 483 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 484 desc = "target nak received"; 485 break; 486 487/**************************************************************************** 488* Serial Attached SCSI values 489****************************************************************************/ 490 491 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 492 desc = "smp request failed"; 493 break; 494 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 495 desc = "smp data overrun"; 496 break; 497 498/**************************************************************************** 499* Diagnostic Buffer Post / Diagnostic Release values 500****************************************************************************/ 501 502 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 503 desc = "diagnostic released"; 504 break; 505 default: 506 break; 507 } 508 509 if (!desc) 510 return; 511 512 switch (request_hdr->Function) { 513 case MPI2_FUNCTION_CONFIG: 514 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 515 func_str = "config_page"; 516 break; 517 case MPI2_FUNCTION_SCSI_TASK_MGMT: 518 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 519 func_str = "task_mgmt"; 520 break; 521 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 522 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 523 func_str = "sas_iounit_ctl"; 524 break; 525 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 526 frame_sz = sizeof(Mpi2SepRequest_t); 527 func_str = "enclosure"; 528 break; 529 case MPI2_FUNCTION_IOC_INIT: 530 frame_sz = sizeof(Mpi2IOCInitRequest_t); 531 func_str = "ioc_init"; 532 break; 533 case MPI2_FUNCTION_PORT_ENABLE: 534 frame_sz = sizeof(Mpi2PortEnableRequest_t); 535 func_str = "port_enable"; 536 break; 537 case MPI2_FUNCTION_SMP_PASSTHROUGH: 538 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 539 func_str = "smp_passthru"; 540 break; 541 default: 542 frame_sz = 32; 543 func_str = "unknown"; 544 break; 545 } 546 547 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 548 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 549 550 _debug_dump_mf(request_hdr, frame_sz/4); 551} 552 553/** 554 * _base_display_event_data - verbose translation of firmware asyn events 555 * @ioc: per adapter object 556 * @mpi_reply: reply mf payload returned from firmware 557 * 558 * Return nothing. 559 */ 560static void 561_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 562 Mpi2EventNotificationReply_t *mpi_reply) 563{ 564 char *desc = NULL; 565 u16 event; 566 567 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 568 return; 569 570 event = le16_to_cpu(mpi_reply->Event); 571 572 switch (event) { 573 case MPI2_EVENT_LOG_DATA: 574 desc = "Log Data"; 575 break; 576 case MPI2_EVENT_STATE_CHANGE: 577 desc = "Status Change"; 578 break; 579 case MPI2_EVENT_HARD_RESET_RECEIVED: 580 desc = "Hard Reset Received"; 581 break; 582 case MPI2_EVENT_EVENT_CHANGE: 583 desc = "Event Change"; 584 break; 585 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 586 desc = "Device Status Change"; 587 break; 588 case MPI2_EVENT_IR_OPERATION_STATUS: 589 if (!ioc->hide_ir_msg) 590 desc = "IR Operation Status"; 591 break; 592 case MPI2_EVENT_SAS_DISCOVERY: 593 { 594 Mpi2EventDataSasDiscovery_t *event_data = 595 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData; 596 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name, 597 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ? 598 "start" : "stop"); 599 if (event_data->DiscoveryStatus) 600 printk("discovery_status(0x%08x)", 601 le32_to_cpu(event_data->DiscoveryStatus)); 602 printk("\n"); 603 return; 604 } 605 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 606 desc = "SAS Broadcast Primitive"; 607 break; 608 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 609 desc = "SAS Init Device Status Change"; 610 break; 611 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 612 desc = "SAS Init Table Overflow"; 613 break; 614 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 615 desc = "SAS Topology Change List"; 616 break; 617 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 618 desc = "SAS Enclosure Device Status Change"; 619 break; 620 case MPI2_EVENT_IR_VOLUME: 621 if (!ioc->hide_ir_msg) 622 desc = "IR Volume"; 623 break; 624 case MPI2_EVENT_IR_PHYSICAL_DISK: 625 if (!ioc->hide_ir_msg) 626 desc = "IR Physical Disk"; 627 break; 628 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 629 if (!ioc->hide_ir_msg) 630 desc = "IR Configuration Change List"; 631 break; 632 case MPI2_EVENT_LOG_ENTRY_ADDED: 633 if (!ioc->hide_ir_msg) 634 desc = "Log Entry Added"; 635 break; 636 } 637 638 if (!desc) 639 return; 640 641 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 642} 643#endif 644 645/** 646 * _base_sas_log_info - verbose translation of firmware log info 647 * @ioc: per adapter object 648 * @log_info: log info 649 * 650 * Return nothing. 651 */ 652static void 653_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 654{ 655 union loginfo_type { 656 u32 loginfo; 657 struct { 658 u32 subcode:16; 659 u32 code:8; 660 u32 originator:4; 661 u32 bus_type:4; 662 } dw; 663 }; 664 union loginfo_type sas_loginfo; 665 char *originator_str = NULL; 666 667 sas_loginfo.loginfo = log_info; 668 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 669 return; 670 671 /* each nexus loss loginfo */ 672 if (log_info == 0x31170000) 673 return; 674 675 /* eat the loginfos associated with task aborts */ 676 if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info == 677 0x31140000 || log_info == 0x31130000)) 678 return; 679 680 switch (sas_loginfo.dw.originator) { 681 case 0: 682 originator_str = "IOP"; 683 break; 684 case 1: 685 originator_str = "PL"; 686 break; 687 case 2: 688 if (!ioc->hide_ir_msg) 689 originator_str = "IR"; 690 else 691 originator_str = "WarpDrive"; 692 break; 693 } 694 695 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 696 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 697 originator_str, sas_loginfo.dw.code, 698 sas_loginfo.dw.subcode); 699} 700 701/** 702 * _base_display_reply_info - 703 * @ioc: per adapter object 704 * @smid: system request message index 705 * @msix_index: MSIX table index supplied by the OS 706 * @reply: reply message frame(lower 32bit addr) 707 * 708 * Return nothing. 709 */ 710static void 711_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 712 u32 reply) 713{ 714 MPI2DefaultReply_t *mpi_reply; 715 u16 ioc_status; 716 717 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 718 if (unlikely(!mpi_reply)) { 719 printk(MPT2SAS_ERR_FMT "mpi_reply not valid at %s:%d/%s()!\n", 720 ioc->name, __FILE__, __LINE__, __func__); 721 return; 722 } 723 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 724#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 725 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 726 (ioc->logging_level & MPT_DEBUG_REPLY)) { 727 _base_sas_ioc_info(ioc , mpi_reply, 728 mpt2sas_base_get_msg_frame(ioc, smid)); 729 } 730#endif 731 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 732 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 733} 734 735/** 736 * mpt2sas_base_done - base internal command completion routine 737 * @ioc: per adapter object 738 * @smid: system request message index 739 * @msix_index: MSIX table index supplied by the OS 740 * @reply: reply message frame(lower 32bit addr) 741 * 742 * Return 1 meaning mf should be freed from _base_interrupt 743 * 0 means the mf is freed from this function. 744 */ 745u8 746mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 747 u32 reply) 748{ 749 MPI2DefaultReply_t *mpi_reply; 750 751 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 752 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 753 return 1; 754 755 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 756 return 1; 757 758 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 759 if (mpi_reply) { 760 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 761 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 762 } 763 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 764 765 complete(&ioc->base_cmds.done); 766 return 1; 767} 768 769/** 770 * _base_async_event - main callback handler for firmware asyn events 771 * @ioc: per adapter object 772 * @msix_index: MSIX table index supplied by the OS 773 * @reply: reply message frame(lower 32bit addr) 774 * 775 * Returns void. 776 */ 777static void 778_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply) 779{ 780 Mpi2EventNotificationReply_t *mpi_reply; 781 Mpi2EventAckRequest_t *ack_request; 782 u16 smid; 783 784 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 785 if (!mpi_reply) 786 return; 787 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 788 return; 789#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 790 _base_display_event_data(ioc, mpi_reply); 791#endif 792 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 793 goto out; 794 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 795 if (!smid) { 796 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 797 ioc->name, __func__); 798 goto out; 799 } 800 801 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 802 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 803 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 804 ack_request->Event = mpi_reply->Event; 805 ack_request->EventContext = mpi_reply->EventContext; 806 ack_request->VF_ID = 0; /* TODO */ 807 ack_request->VP_ID = 0; 808 mpt2sas_base_put_smid_default(ioc, smid); 809 810 out: 811 812 /* scsih callback handler */ 813 mpt2sas_scsih_event_callback(ioc, msix_index, reply); 814 815 /* ctl callback handler */ 816 mpt2sas_ctl_event_callback(ioc, msix_index, reply); 817 818 return; 819} 820 821/** 822 * _base_get_cb_idx - obtain the callback index 823 * @ioc: per adapter object 824 * @smid: system request message index 825 * 826 * Return callback index. 827 */ 828static u8 829_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid) 830{ 831 int i; 832 u8 cb_idx; 833 834 if (smid < ioc->hi_priority_smid) { 835 i = smid - 1; 836 cb_idx = ioc->scsi_lookup[i].cb_idx; 837 } else if (smid < ioc->internal_smid) { 838 i = smid - ioc->hi_priority_smid; 839 cb_idx = ioc->hpr_lookup[i].cb_idx; 840 } else if (smid <= ioc->hba_queue_depth) { 841 i = smid - ioc->internal_smid; 842 cb_idx = ioc->internal_lookup[i].cb_idx; 843 } else 844 cb_idx = 0xFF; 845 return cb_idx; 846} 847 848/** 849 * _base_mask_interrupts - disable interrupts 850 * @ioc: per adapter object 851 * 852 * Disabling ResetIRQ, Reply and Doorbell Interrupts 853 * 854 * Return nothing. 855 */ 856static void 857_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 858{ 859 u32 him_register; 860 861 ioc->mask_interrupts = 1; 862 him_register = readl(&ioc->chip->HostInterruptMask); 863 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 864 writel(him_register, &ioc->chip->HostInterruptMask); 865 readl(&ioc->chip->HostInterruptMask); 866} 867 868/** 869 * _base_unmask_interrupts - enable interrupts 870 * @ioc: per adapter object 871 * 872 * Enabling only Reply Interrupts 873 * 874 * Return nothing. 875 */ 876static void 877_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 878{ 879 u32 him_register; 880 881 him_register = readl(&ioc->chip->HostInterruptMask); 882 him_register &= ~MPI2_HIM_RIM; 883 writel(him_register, &ioc->chip->HostInterruptMask); 884 ioc->mask_interrupts = 0; 885} 886 887union reply_descriptor { 888 u64 word; 889 struct { 890 u32 low; 891 u32 high; 892 } u; 893}; 894 895/** 896 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 897 * @irq: irq number (not used) 898 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 899 * @r: pt_regs pointer (not used) 900 * 901 * Return IRQ_HANDLE if processed, else IRQ_NONE. 902 */ 903static irqreturn_t 904_base_interrupt(int irq, void *bus_id) 905{ 906 struct adapter_reply_queue *reply_q = bus_id; 907 union reply_descriptor rd; 908 u32 completed_cmds; 909 u8 request_desript_type; 910 u16 smid; 911 u8 cb_idx; 912 u32 reply; 913 u8 msix_index = reply_q->msix_index; 914 struct MPT2SAS_ADAPTER *ioc = reply_q->ioc; 915 Mpi2ReplyDescriptorsUnion_t *rpf; 916 u8 rc; 917 918 if (ioc->mask_interrupts) 919 return IRQ_NONE; 920 921 if (!atomic_add_unless(&reply_q->busy, 1, 1)) 922 return IRQ_NONE; 923 924 rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index]; 925 request_desript_type = rpf->Default.ReplyFlags 926 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 927 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) { 928 atomic_dec(&reply_q->busy); 929 return IRQ_NONE; 930 } 931 932 completed_cmds = 0; 933 cb_idx = 0xFF; 934 do { 935 rd.word = le64_to_cpu(rpf->Words); 936 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 937 goto out; 938 reply = 0; 939 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); 940 if (request_desript_type == 941 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 942 reply = le32_to_cpu 943 (rpf->AddressReply.ReplyFrameAddress); 944 if (reply > ioc->reply_dma_max_address || 945 reply < ioc->reply_dma_min_address) 946 reply = 0; 947 } else if (request_desript_type == 948 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 949 goto next; 950 else if (request_desript_type == 951 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 952 goto next; 953 if (smid) { 954 cb_idx = _base_get_cb_idx(ioc, smid); 955 if ((likely(cb_idx < MPT_MAX_CALLBACKS)) 956 && (likely(mpt_callbacks[cb_idx] != NULL))) { 957 rc = mpt_callbacks[cb_idx](ioc, smid, 958 msix_index, reply); 959 if (reply) 960 _base_display_reply_info(ioc, smid, 961 msix_index, reply); 962 if (rc) 963 mpt2sas_base_free_smid(ioc, smid); 964 } 965 } 966 if (!smid) 967 _base_async_event(ioc, msix_index, reply); 968 969 /* reply free queue handling */ 970 if (reply) { 971 ioc->reply_free_host_index = 972 (ioc->reply_free_host_index == 973 (ioc->reply_free_queue_depth - 1)) ? 974 0 : ioc->reply_free_host_index + 1; 975 ioc->reply_free[ioc->reply_free_host_index] = 976 cpu_to_le32(reply); 977 wmb(); 978 writel(ioc->reply_free_host_index, 979 &ioc->chip->ReplyFreeHostIndex); 980 } 981 982 next: 983 984 rpf->Words = cpu_to_le64(ULLONG_MAX); 985 reply_q->reply_post_host_index = 986 (reply_q->reply_post_host_index == 987 (ioc->reply_post_queue_depth - 1)) ? 0 : 988 reply_q->reply_post_host_index + 1; 989 request_desript_type = 990 reply_q->reply_post_free[reply_q->reply_post_host_index]. 991 Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 992 completed_cmds++; 993 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 994 goto out; 995 if (!reply_q->reply_post_host_index) 996 rpf = reply_q->reply_post_free; 997 else 998 rpf++; 999 } while (1); 1000 1001 out: 1002 1003 if (!completed_cmds) { 1004 atomic_dec(&reply_q->busy); 1005 return IRQ_NONE; 1006 } 1007 wmb(); 1008 if (ioc->is_warpdrive) { 1009 writel(reply_q->reply_post_host_index, 1010 ioc->reply_post_host_index[msix_index]); 1011 atomic_dec(&reply_q->busy); 1012 return IRQ_HANDLED; 1013 } 1014 writel(reply_q->reply_post_host_index | (msix_index << 1015 MPI2_RPHI_MSIX_INDEX_SHIFT), &ioc->chip->ReplyPostHostIndex); 1016 atomic_dec(&reply_q->busy); 1017 return IRQ_HANDLED; 1018} 1019 1020/** 1021 * _base_is_controller_msix_enabled - is controller support muli-reply queues 1022 * @ioc: per adapter object 1023 * 1024 */ 1025static inline int 1026_base_is_controller_msix_enabled(struct MPT2SAS_ADAPTER *ioc) 1027{ 1028 return (ioc->facts.IOCCapabilities & 1029 MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable; 1030} 1031 1032/** 1033 * mpt2sas_base_flush_reply_queues - flushing the MSIX reply queues 1034 * @ioc: per adapter object 1035 * Context: ISR conext 1036 * 1037 * Called when a Task Management request has completed. We want 1038 * to flush the other reply queues so all the outstanding IO has been 1039 * completed back to OS before we process the TM completetion. 1040 * 1041 * Return nothing. 1042 */ 1043void 1044mpt2sas_base_flush_reply_queues(struct MPT2SAS_ADAPTER *ioc) 1045{ 1046 struct adapter_reply_queue *reply_q; 1047 1048 /* If MSIX capability is turned off 1049 * then multi-queues are not enabled 1050 */ 1051 if (!_base_is_controller_msix_enabled(ioc)) 1052 return; 1053 1054 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { 1055 if (ioc->shost_recovery) 1056 return; 1057 /* TMs are on msix_index == 0 */ 1058 if (reply_q->msix_index == 0) 1059 continue; 1060 _base_interrupt(reply_q->vector, (void *)reply_q); 1061 } 1062} 1063 1064/** 1065 * mpt2sas_base_release_callback_handler - clear interrupt callback handler 1066 * @cb_idx: callback index 1067 * 1068 * Return nothing. 1069 */ 1070void 1071mpt2sas_base_release_callback_handler(u8 cb_idx) 1072{ 1073 mpt_callbacks[cb_idx] = NULL; 1074} 1075 1076/** 1077 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 1078 * @cb_func: callback function 1079 * 1080 * Returns cb_func. 1081 */ 1082u8 1083mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 1084{ 1085 u8 cb_idx; 1086 1087 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 1088 if (mpt_callbacks[cb_idx] == NULL) 1089 break; 1090 1091 mpt_callbacks[cb_idx] = cb_func; 1092 return cb_idx; 1093} 1094 1095/** 1096 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 1097 * 1098 * Return nothing. 1099 */ 1100void 1101mpt2sas_base_initialize_callback_handler(void) 1102{ 1103 u8 cb_idx; 1104 1105 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 1106 mpt2sas_base_release_callback_handler(cb_idx); 1107} 1108 1109/** 1110 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 1111 * @ioc: per adapter object 1112 * @paddr: virtual address for SGE 1113 * 1114 * Create a zero length scatter gather entry to insure the IOCs hardware has 1115 * something to use if the target device goes brain dead and tries 1116 * to send data even when none is asked for. 1117 * 1118 * Return nothing. 1119 */ 1120void 1121mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 1122{ 1123 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 1124 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 1125 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 1126 MPI2_SGE_FLAGS_SHIFT); 1127 ioc->base_add_sg_single(paddr, flags_length, -1); 1128} 1129 1130/** 1131 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 1132 * @paddr: virtual address for SGE 1133 * @flags_length: SGE flags and data transfer length 1134 * @dma_addr: Physical address 1135 * 1136 * Return nothing. 1137 */ 1138static void 1139_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1140{ 1141 Mpi2SGESimple32_t *sgel = paddr; 1142 1143 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 1144 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1145 sgel->FlagsLength = cpu_to_le32(flags_length); 1146 sgel->Address = cpu_to_le32(dma_addr); 1147} 1148 1149 1150/** 1151 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 1152 * @paddr: virtual address for SGE 1153 * @flags_length: SGE flags and data transfer length 1154 * @dma_addr: Physical address 1155 * 1156 * Return nothing. 1157 */ 1158static void 1159_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1160{ 1161 Mpi2SGESimple64_t *sgel = paddr; 1162 1163 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 1164 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1165 sgel->FlagsLength = cpu_to_le32(flags_length); 1166 sgel->Address = cpu_to_le64(dma_addr); 1167} 1168 1169#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 1170 1171/** 1172 * _base_config_dma_addressing - set dma addressing 1173 * @ioc: per adapter object 1174 * @pdev: PCI device struct 1175 * 1176 * Returns 0 for success, non-zero for failure. 1177 */ 1178static int 1179_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 1180{ 1181 struct sysinfo s; 1182 char *desc = NULL; 1183 1184 if (sizeof(dma_addr_t) > 4) { 1185 const uint64_t required_mask = 1186 dma_get_required_mask(&pdev->dev); 1187 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 1188 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 1189 DMA_BIT_MASK(64))) { 1190 ioc->base_add_sg_single = &_base_add_sg_single_64; 1191 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 1192 desc = "64"; 1193 goto out; 1194 } 1195 } 1196 1197 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 1198 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 1199 ioc->base_add_sg_single = &_base_add_sg_single_32; 1200 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 1201 desc = "32"; 1202 } else 1203 return -ENODEV; 1204 1205 out: 1206 si_meminfo(&s); 1207 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 1208 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 1209 1210 return 0; 1211} 1212 1213/** 1214 * _base_check_enable_msix - checks MSIX capabable. 1215 * @ioc: per adapter object 1216 * 1217 * Check to see if card is capable of MSIX, and set number 1218 * of available msix vectors 1219 */ 1220static int 1221_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1222{ 1223 int base; 1224 u16 message_control; 1225 1226 1227 /* Check whether controller SAS2008 B0 controller, 1228 if it is SAS2008 B0 controller use IO-APIC instead of MSIX */ 1229 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 && 1230 ioc->pdev->revision == 0x01) { 1231 return -EINVAL; 1232 } 1233 1234 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1235 if (!base) { 1236 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1237 "supported\n", ioc->name)); 1238 return -EINVAL; 1239 } 1240 1241 /* get msix vector count */ 1242 /* NUMA_IO not supported for older controllers */ 1243 if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 || 1244 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 || 1245 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 || 1246 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 || 1247 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 || 1248 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 || 1249 ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2) 1250 ioc->msix_vector_count = 1; 1251 else { 1252 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1253 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1254 } 1255 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1256 "vector_count(%d)\n", ioc->name, ioc->msix_vector_count)); 1257 1258 return 0; 1259} 1260 1261/** 1262 * _base_free_irq - free irq 1263 * @ioc: per adapter object 1264 * 1265 * Freeing respective reply_queue from the list. 1266 */ 1267static void 1268_base_free_irq(struct MPT2SAS_ADAPTER *ioc) 1269{ 1270 struct adapter_reply_queue *reply_q, *next; 1271 1272 if (list_empty(&ioc->reply_queue_list)) 1273 return; 1274 1275 list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) { 1276 list_del(&reply_q->list); 1277 synchronize_irq(reply_q->vector); 1278 free_irq(reply_q->vector, reply_q); 1279 kfree(reply_q); 1280 } 1281} 1282 1283/** 1284 * _base_request_irq - request irq 1285 * @ioc: per adapter object 1286 * @index: msix index into vector table 1287 * @vector: irq vector 1288 * 1289 * Inserting respective reply_queue into the list. 1290 */ 1291static int 1292_base_request_irq(struct MPT2SAS_ADAPTER *ioc, u8 index, u32 vector) 1293{ 1294 struct adapter_reply_queue *reply_q; 1295 int r; 1296 1297 reply_q = kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL); 1298 if (!reply_q) { 1299 printk(MPT2SAS_ERR_FMT "unable to allocate memory %d!\n", 1300 ioc->name, (int)sizeof(struct adapter_reply_queue)); 1301 return -ENOMEM; 1302 } 1303 reply_q->ioc = ioc; 1304 reply_q->msix_index = index; 1305 reply_q->vector = vector; 1306 atomic_set(&reply_q->busy, 0); 1307 if (ioc->msix_enable) 1308 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d", 1309 MPT2SAS_DRIVER_NAME, ioc->id, index); 1310 else 1311 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d", 1312 MPT2SAS_DRIVER_NAME, ioc->id); 1313 r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name, 1314 reply_q); 1315 if (r) { 1316 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1317 reply_q->name, vector); 1318 kfree(reply_q); 1319 return -EBUSY; 1320 } 1321 1322 INIT_LIST_HEAD(&reply_q->list); 1323 list_add_tail(&reply_q->list, &ioc->reply_queue_list); 1324 return 0; 1325} 1326 1327/** 1328 * _base_assign_reply_queues - assigning msix index for each cpu 1329 * @ioc: per adapter object 1330 * 1331 * The enduser would need to set the affinity via /proc/irq/#/smp_affinity 1332 * 1333 * It would nice if we could call irq_set_affinity, however it is not 1334 * an exported symbol 1335 */ 1336static void 1337_base_assign_reply_queues(struct MPT2SAS_ADAPTER *ioc) 1338{ 1339 unsigned int cpu, nr_cpus, nr_msix, index = 0; 1340 1341 if (!_base_is_controller_msix_enabled(ioc)) 1342 return; 1343 1344 memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz); 1345 1346 nr_cpus = num_online_cpus(); 1347 nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count, 1348 ioc->facts.MaxMSIxVectors); 1349 if (!nr_msix) 1350 return; 1351 1352 cpu = cpumask_first(cpu_online_mask); 1353 1354 do { 1355 unsigned int i, group = nr_cpus / nr_msix; 1356 1357 if (index < nr_cpus % nr_msix) 1358 group++; 1359 1360 for (i = 0 ; i < group ; i++) { 1361 ioc->cpu_msix_table[cpu] = index; 1362 cpu = cpumask_next(cpu, cpu_online_mask); 1363 } 1364 1365 index++; 1366 1367 } while (cpu < nr_cpus); 1368} 1369 1370/** 1371 * _base_disable_msix - disables msix 1372 * @ioc: per adapter object 1373 * 1374 */ 1375static void 1376_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1377{ 1378 if (ioc->msix_enable) { 1379 pci_disable_msix(ioc->pdev); 1380 ioc->msix_enable = 0; 1381 } 1382} 1383 1384/** 1385 * _base_enable_msix - enables msix, failback to io_apic 1386 * @ioc: per adapter object 1387 * 1388 */ 1389static int 1390_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1391{ 1392 struct msix_entry *entries, *a; 1393 int r; 1394 int i; 1395 u8 try_msix = 0; 1396 1397 if (msix_disable == -1 || msix_disable == 0) 1398 try_msix = 1; 1399 1400 if (!try_msix) 1401 goto try_ioapic; 1402 1403 if (_base_check_enable_msix(ioc) != 0) 1404 goto try_ioapic; 1405 1406 ioc->reply_queue_count = min_t(int, ioc->cpu_count, 1407 ioc->msix_vector_count); 1408 1409 if (max_msix_vectors > 0) { 1410 ioc->reply_queue_count = min_t(int, max_msix_vectors, 1411 ioc->reply_queue_count); 1412 ioc->msix_vector_count = ioc->reply_queue_count; 1413 } 1414 1415 printk(MPT2SAS_INFO_FMT 1416 "MSI-X vectors supported: %d, no of cores: %d, max_msix_vectors: %d\n", 1417 ioc->name, ioc->msix_vector_count, ioc->cpu_count, max_msix_vectors); 1418 1419 entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry), 1420 GFP_KERNEL); 1421 if (!entries) { 1422 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "kcalloc " 1423 "failed @ at %s:%d/%s() !!!\n", ioc->name, __FILE__, 1424 __LINE__, __func__)); 1425 goto try_ioapic; 1426 } 1427 1428 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) 1429 a->entry = i; 1430 1431 r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count); 1432 if (r) { 1433 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT 1434 "pci_enable_msix_exact failed (r=%d) !!!\n", ioc->name, r)); 1435 kfree(entries); 1436 goto try_ioapic; 1437 } 1438 1439 ioc->msix_enable = 1; 1440 for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) { 1441 r = _base_request_irq(ioc, i, a->vector); 1442 if (r) { 1443 _base_free_irq(ioc); 1444 _base_disable_msix(ioc); 1445 kfree(entries); 1446 goto try_ioapic; 1447 } 1448 } 1449 1450 kfree(entries); 1451 return 0; 1452 1453/* failback to io_apic interrupt routing */ 1454 try_ioapic: 1455 1456 r = _base_request_irq(ioc, 0, ioc->pdev->irq); 1457 1458 return r; 1459} 1460 1461/** 1462 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1463 * @ioc: per adapter object 1464 * 1465 * Returns 0 for success, non-zero for failure. 1466 */ 1467int 1468mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1469{ 1470 struct pci_dev *pdev = ioc->pdev; 1471 u32 memap_sz; 1472 u32 pio_sz; 1473 int i, r = 0; 1474 u64 pio_chip = 0; 1475 u64 chip_phys = 0; 1476 struct adapter_reply_queue *reply_q; 1477 1478 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", 1479 ioc->name, __func__)); 1480 1481 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1482 if (pci_enable_device_mem(pdev)) { 1483 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1484 "failed\n", ioc->name); 1485 ioc->bars = 0; 1486 return -ENODEV; 1487 } 1488 1489 1490 if (pci_request_selected_regions(pdev, ioc->bars, 1491 MPT2SAS_DRIVER_NAME)) { 1492 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1493 "failed\n", ioc->name); 1494 ioc->bars = 0; 1495 r = -ENODEV; 1496 goto out_fail; 1497 } 1498 1499 /* AER (Advanced Error Reporting) hooks */ 1500 pci_enable_pcie_error_reporting(pdev); 1501 1502 pci_set_master(pdev); 1503 1504 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1505 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1506 ioc->name, pci_name(pdev)); 1507 r = -ENODEV; 1508 goto out_fail; 1509 } 1510 1511 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1512 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { 1513 if (pio_sz) 1514 continue; 1515 pio_chip = (u64)pci_resource_start(pdev, i); 1516 pio_sz = pci_resource_len(pdev, i); 1517 } else { 1518 if (memap_sz) 1519 continue; 1520 /* verify memory resource is valid before using */ 1521 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 1522 ioc->chip_phys = pci_resource_start(pdev, i); 1523 chip_phys = (u64)ioc->chip_phys; 1524 memap_sz = pci_resource_len(pdev, i); 1525 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1526 if (ioc->chip == NULL) { 1527 printk(MPT2SAS_ERR_FMT "unable to map " 1528 "adapter memory!\n", ioc->name); 1529 r = -EINVAL; 1530 goto out_fail; 1531 } 1532 } 1533 } 1534 } 1535 1536 _base_mask_interrupts(ioc); 1537 r = _base_enable_msix(ioc); 1538 if (r) 1539 goto out_fail; 1540 1541 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) 1542 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1543 reply_q->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1544 "IO-APIC enabled"), reply_q->vector); 1545 1546 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n", 1547 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz); 1548 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n", 1549 ioc->name, (unsigned long long)pio_chip, pio_sz); 1550 1551 /* Save PCI configuration state for recovery from PCI AER/EEH errors */ 1552 pci_save_state(pdev); 1553 1554 return 0; 1555 1556 out_fail: 1557 if (ioc->chip_phys) 1558 iounmap(ioc->chip); 1559 ioc->chip_phys = 0; 1560 pci_release_selected_regions(ioc->pdev, ioc->bars); 1561 pci_disable_pcie_error_reporting(pdev); 1562 pci_disable_device(pdev); 1563 return r; 1564} 1565 1566/** 1567 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1568 * @ioc: per adapter object 1569 * @smid: system request message index(smid zero is invalid) 1570 * 1571 * Returns virt pointer to message frame. 1572 */ 1573void * 1574mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1575{ 1576 return (void *)(ioc->request + (smid * ioc->request_sz)); 1577} 1578 1579/** 1580 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1581 * @ioc: per adapter object 1582 * @smid: system request message index 1583 * 1584 * Returns virt pointer to sense buffer. 1585 */ 1586void * 1587mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1588{ 1589 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1590} 1591 1592/** 1593 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1594 * @ioc: per adapter object 1595 * @smid: system request message index 1596 * 1597 * Returns phys pointer to the low 32bit address of the sense buffer. 1598 */ 1599__le32 1600mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1601{ 1602 return cpu_to_le32(ioc->sense_dma + 1603 ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1604} 1605 1606/** 1607 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1608 * @ioc: per adapter object 1609 * @phys_addr: lower 32 physical addr of the reply 1610 * 1611 * Converts 32bit lower physical addr into a virt address. 1612 */ 1613void * 1614mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1615{ 1616 if (!phys_addr) 1617 return NULL; 1618 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1619} 1620 1621/** 1622 * mpt2sas_base_get_smid - obtain a free smid from internal queue 1623 * @ioc: per adapter object 1624 * @cb_idx: callback index 1625 * 1626 * Returns smid (zero is invalid) 1627 */ 1628u16 1629mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1630{ 1631 unsigned long flags; 1632 struct request_tracker *request; 1633 u16 smid; 1634 1635 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1636 if (list_empty(&ioc->internal_free_list)) { 1637 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1638 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1639 ioc->name, __func__); 1640 return 0; 1641 } 1642 1643 request = list_entry(ioc->internal_free_list.next, 1644 struct request_tracker, tracker_list); 1645 request->cb_idx = cb_idx; 1646 smid = request->smid; 1647 list_del(&request->tracker_list); 1648 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1649 return smid; 1650} 1651 1652/** 1653 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue 1654 * @ioc: per adapter object 1655 * @cb_idx: callback index 1656 * @scmd: pointer to scsi command object 1657 * 1658 * Returns smid (zero is invalid) 1659 */ 1660u16 1661mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx, 1662 struct scsi_cmnd *scmd) 1663{ 1664 unsigned long flags; 1665 struct scsiio_tracker *request; 1666 u16 smid; 1667 1668 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1669 if (list_empty(&ioc->free_list)) { 1670 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1671 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1672 ioc->name, __func__); 1673 return 0; 1674 } 1675 1676 request = list_entry(ioc->free_list.next, 1677 struct scsiio_tracker, tracker_list); 1678 request->scmd = scmd; 1679 request->cb_idx = cb_idx; 1680 smid = request->smid; 1681 list_del(&request->tracker_list); 1682 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1683 return smid; 1684} 1685 1686/** 1687 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue 1688 * @ioc: per adapter object 1689 * @cb_idx: callback index 1690 * 1691 * Returns smid (zero is invalid) 1692 */ 1693u16 1694mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1695{ 1696 unsigned long flags; 1697 struct request_tracker *request; 1698 u16 smid; 1699 1700 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1701 if (list_empty(&ioc->hpr_free_list)) { 1702 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1703 return 0; 1704 } 1705 1706 request = list_entry(ioc->hpr_free_list.next, 1707 struct request_tracker, tracker_list); 1708 request->cb_idx = cb_idx; 1709 smid = request->smid; 1710 list_del(&request->tracker_list); 1711 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1712 return smid; 1713} 1714 1715 1716/** 1717 * mpt2sas_base_free_smid - put smid back on free_list 1718 * @ioc: per adapter object 1719 * @smid: system request message index 1720 * 1721 * Return nothing. 1722 */ 1723void 1724mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1725{ 1726 unsigned long flags; 1727 int i; 1728 struct chain_tracker *chain_req, *next; 1729 1730 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1731 if (smid < ioc->hi_priority_smid) { 1732 /* scsiio queue */ 1733 i = smid - 1; 1734 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) { 1735 list_for_each_entry_safe(chain_req, next, 1736 &ioc->scsi_lookup[i].chain_list, tracker_list) { 1737 list_del_init(&chain_req->tracker_list); 1738 list_add(&chain_req->tracker_list, 1739 &ioc->free_chain_list); 1740 } 1741 } 1742 ioc->scsi_lookup[i].cb_idx = 0xFF; 1743 ioc->scsi_lookup[i].scmd = NULL; 1744 ioc->scsi_lookup[i].direct_io = 0; 1745 list_add(&ioc->scsi_lookup[i].tracker_list, 1746 &ioc->free_list); 1747 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1748 1749 /* 1750 * See _wait_for_commands_to_complete() call with regards 1751 * to this code. 1752 */ 1753 if (ioc->shost_recovery && ioc->pending_io_count) { 1754 if (ioc->pending_io_count == 1) 1755 wake_up(&ioc->reset_wq); 1756 ioc->pending_io_count--; 1757 } 1758 return; 1759 } else if (smid < ioc->internal_smid) { 1760 /* hi-priority */ 1761 i = smid - ioc->hi_priority_smid; 1762 ioc->hpr_lookup[i].cb_idx = 0xFF; 1763 list_add(&ioc->hpr_lookup[i].tracker_list, 1764 &ioc->hpr_free_list); 1765 } else if (smid <= ioc->hba_queue_depth) { 1766 /* internal queue */ 1767 i = smid - ioc->internal_smid; 1768 ioc->internal_lookup[i].cb_idx = 0xFF; 1769 list_add(&ioc->internal_lookup[i].tracker_list, 1770 &ioc->internal_free_list); 1771 } 1772 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1773} 1774 1775/** 1776 * _base_writeq - 64 bit write to MMIO 1777 * @ioc: per adapter object 1778 * @b: data payload 1779 * @addr: address in MMIO space 1780 * @writeq_lock: spin lock 1781 * 1782 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1783 * care of 32 bit environment where its not quarenteed to send the entire word 1784 * in one transfer. 1785 */ 1786#ifndef writeq 1787static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1788 spinlock_t *writeq_lock) 1789{ 1790 unsigned long flags; 1791 __u64 data_out = cpu_to_le64(b); 1792 1793 spin_lock_irqsave(writeq_lock, flags); 1794 writel((u32)(data_out), addr); 1795 writel((u32)(data_out >> 32), (addr + 4)); 1796 spin_unlock_irqrestore(writeq_lock, flags); 1797} 1798#else 1799static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1800 spinlock_t *writeq_lock) 1801{ 1802 writeq(cpu_to_le64(b), addr); 1803} 1804#endif 1805 1806static inline u8 1807_base_get_msix_index(struct MPT2SAS_ADAPTER *ioc) 1808{ 1809 return ioc->cpu_msix_table[raw_smp_processor_id()]; 1810} 1811 1812/** 1813 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1814 * @ioc: per adapter object 1815 * @smid: system request message index 1816 * @handle: device handle 1817 * 1818 * Return nothing. 1819 */ 1820void 1821mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle) 1822{ 1823 Mpi2RequestDescriptorUnion_t descriptor; 1824 u64 *request = (u64 *)&descriptor; 1825 1826 1827 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1828 descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc); 1829 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1830 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1831 descriptor.SCSIIO.LMID = 0; 1832 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1833 &ioc->scsi_lookup_lock); 1834} 1835 1836 1837/** 1838 * mpt2sas_base_put_smid_hi_priority - send Task Management request to firmware 1839 * @ioc: per adapter object 1840 * @smid: system request message index 1841 * 1842 * Return nothing. 1843 */ 1844void 1845mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1846{ 1847 Mpi2RequestDescriptorUnion_t descriptor; 1848 u64 *request = (u64 *)&descriptor; 1849 1850 descriptor.HighPriority.RequestFlags = 1851 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1852 descriptor.HighPriority.MSIxIndex = 0; 1853 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1854 descriptor.HighPriority.LMID = 0; 1855 descriptor.HighPriority.Reserved1 = 0; 1856 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1857 &ioc->scsi_lookup_lock); 1858} 1859 1860/** 1861 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1862 * @ioc: per adapter object 1863 * @smid: system request message index 1864 * 1865 * Return nothing. 1866 */ 1867void 1868mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1869{ 1870 Mpi2RequestDescriptorUnion_t descriptor; 1871 u64 *request = (u64 *)&descriptor; 1872 1873 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1874 descriptor.Default.MSIxIndex = _base_get_msix_index(ioc); 1875 descriptor.Default.SMID = cpu_to_le16(smid); 1876 descriptor.Default.LMID = 0; 1877 descriptor.Default.DescriptorTypeDependent = 0; 1878 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1879 &ioc->scsi_lookup_lock); 1880} 1881 1882/** 1883 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1884 * @ioc: per adapter object 1885 * @smid: system request message index 1886 * @io_index: value used to track the IO 1887 * 1888 * Return nothing. 1889 */ 1890void 1891mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1892 u16 io_index) 1893{ 1894 Mpi2RequestDescriptorUnion_t descriptor; 1895 u64 *request = (u64 *)&descriptor; 1896 1897 descriptor.SCSITarget.RequestFlags = 1898 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1899 descriptor.SCSITarget.MSIxIndex = _base_get_msix_index(ioc); 1900 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1901 descriptor.SCSITarget.LMID = 0; 1902 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1903 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1904 &ioc->scsi_lookup_lock); 1905} 1906 1907/** 1908 * _base_display_dell_branding - Disply branding string 1909 * @ioc: per adapter object 1910 * 1911 * Return nothing. 1912 */ 1913static void 1914_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1915{ 1916 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1917 1918 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1919 return; 1920 1921 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1922 switch (ioc->pdev->subsystem_device) { 1923 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1924 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1925 MPT2SAS_DELL_BRANDING_SIZE - 1); 1926 break; 1927 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1928 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1929 MPT2SAS_DELL_BRANDING_SIZE - 1); 1930 break; 1931 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1932 strncpy(dell_branding, 1933 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1934 MPT2SAS_DELL_BRANDING_SIZE - 1); 1935 break; 1936 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1937 strncpy(dell_branding, 1938 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1939 MPT2SAS_DELL_BRANDING_SIZE - 1); 1940 break; 1941 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1942 strncpy(dell_branding, 1943 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1944 MPT2SAS_DELL_BRANDING_SIZE - 1); 1945 break; 1946 case MPT2SAS_DELL_PERC_H200_SSDID: 1947 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1948 MPT2SAS_DELL_BRANDING_SIZE - 1); 1949 break; 1950 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1951 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1952 MPT2SAS_DELL_BRANDING_SIZE - 1); 1953 break; 1954 default: 1955 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1956 break; 1957 } 1958 1959 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1960 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1961 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1962 ioc->pdev->subsystem_device); 1963} 1964 1965/** 1966 * _base_display_intel_branding - Display branding string 1967 * @ioc: per adapter object 1968 * 1969 * Return nothing. 1970 */ 1971static void 1972_base_display_intel_branding(struct MPT2SAS_ADAPTER *ioc) 1973{ 1974 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL) 1975 return; 1976 1977 switch (ioc->pdev->device) { 1978 case MPI2_MFGPAGE_DEVID_SAS2008: 1979 switch (ioc->pdev->subsystem_device) { 1980 case MPT2SAS_INTEL_RMS2LL080_SSDID: 1981 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 1982 MPT2SAS_INTEL_RMS2LL080_BRANDING); 1983 break; 1984 case MPT2SAS_INTEL_RMS2LL040_SSDID: 1985 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 1986 MPT2SAS_INTEL_RMS2LL040_BRANDING); 1987 break; 1988 case MPT2SAS_INTEL_SSD910_SSDID: 1989 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 1990 MPT2SAS_INTEL_SSD910_BRANDING); 1991 break; 1992 default: 1993 break; 1994 } 1995 case MPI2_MFGPAGE_DEVID_SAS2308_2: 1996 switch (ioc->pdev->subsystem_device) { 1997 case MPT2SAS_INTEL_RS25GB008_SSDID: 1998 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 1999 MPT2SAS_INTEL_RS25GB008_BRANDING); 2000 break; 2001 case MPT2SAS_INTEL_RMS25JB080_SSDID: 2002 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2003 MPT2SAS_INTEL_RMS25JB080_BRANDING); 2004 break; 2005 case MPT2SAS_INTEL_RMS25JB040_SSDID: 2006 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2007 MPT2SAS_INTEL_RMS25JB040_BRANDING); 2008 break; 2009 case MPT2SAS_INTEL_RMS25KB080_SSDID: 2010 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2011 MPT2SAS_INTEL_RMS25KB080_BRANDING); 2012 break; 2013 case MPT2SAS_INTEL_RMS25KB040_SSDID: 2014 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2015 MPT2SAS_INTEL_RMS25KB040_BRANDING); 2016 break; 2017 case MPT2SAS_INTEL_RMS25LB040_SSDID: 2018 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2019 MPT2SAS_INTEL_RMS25LB040_BRANDING); 2020 break; 2021 case MPT2SAS_INTEL_RMS25LB080_SSDID: 2022 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2023 MPT2SAS_INTEL_RMS25LB080_BRANDING); 2024 break; 2025 default: 2026 break; 2027 } 2028 default: 2029 break; 2030 } 2031} 2032 2033/** 2034 * _base_display_hp_branding - Display branding string 2035 * @ioc: per adapter object 2036 * 2037 * Return nothing. 2038 */ 2039static void 2040_base_display_hp_branding(struct MPT2SAS_ADAPTER *ioc) 2041{ 2042 if (ioc->pdev->subsystem_vendor != MPT2SAS_HP_3PAR_SSVID) 2043 return; 2044 2045 switch (ioc->pdev->device) { 2046 case MPI2_MFGPAGE_DEVID_SAS2004: 2047 switch (ioc->pdev->subsystem_device) { 2048 case MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_SSDID: 2049 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2050 MPT2SAS_HP_DAUGHTER_2_4_INTERNAL_BRANDING); 2051 break; 2052 default: 2053 break; 2054 } 2055 case MPI2_MFGPAGE_DEVID_SAS2308_2: 2056 switch (ioc->pdev->subsystem_device) { 2057 case MPT2SAS_HP_2_4_INTERNAL_SSDID: 2058 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2059 MPT2SAS_HP_2_4_INTERNAL_BRANDING); 2060 break; 2061 case MPT2SAS_HP_2_4_EXTERNAL_SSDID: 2062 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2063 MPT2SAS_HP_2_4_EXTERNAL_BRANDING); 2064 break; 2065 case MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_SSDID: 2066 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2067 MPT2SAS_HP_1_4_INTERNAL_1_4_EXTERNAL_BRANDING); 2068 break; 2069 case MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_SSDID: 2070 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2071 MPT2SAS_HP_EMBEDDED_2_4_INTERNAL_BRANDING); 2072 break; 2073 default: 2074 break; 2075 } 2076 default: 2077 break; 2078 } 2079} 2080 2081/** 2082 * _base_display_ioc_capabilities - Disply IOC's capabilities. 2083 * @ioc: per adapter object 2084 * 2085 * Return nothing. 2086 */ 2087static void 2088_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 2089{ 2090 int i = 0; 2091 char desc[16]; 2092 u32 iounit_pg1_flags; 2093 u32 bios_version; 2094 2095 bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion); 2096 strncpy(desc, ioc->manu_pg0.ChipName, 16); 2097 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 2098 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 2099 ioc->name, desc, 2100 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 2101 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 2102 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 2103 ioc->facts.FWVersion.Word & 0x000000FF, 2104 ioc->pdev->revision, 2105 (bios_version & 0xFF000000) >> 24, 2106 (bios_version & 0x00FF0000) >> 16, 2107 (bios_version & 0x0000FF00) >> 8, 2108 bios_version & 0x000000FF); 2109 2110 _base_display_dell_branding(ioc); 2111 _base_display_intel_branding(ioc); 2112 _base_display_hp_branding(ioc); 2113 2114 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 2115 2116 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 2117 printk("Initiator"); 2118 i++; 2119 } 2120 2121 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 2122 printk("%sTarget", i ? "," : ""); 2123 i++; 2124 } 2125 2126 i = 0; 2127 printk("), "); 2128 printk("Capabilities=("); 2129 2130 if (!ioc->hide_ir_msg) { 2131 if (ioc->facts.IOCCapabilities & 2132 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 2133 printk("Raid"); 2134 i++; 2135 } 2136 } 2137 2138 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 2139 printk("%sTLR", i ? "," : ""); 2140 i++; 2141 } 2142 2143 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 2144 printk("%sMulticast", i ? "," : ""); 2145 i++; 2146 } 2147 2148 if (ioc->facts.IOCCapabilities & 2149 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 2150 printk("%sBIDI Target", i ? "," : ""); 2151 i++; 2152 } 2153 2154 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 2155 printk("%sEEDP", i ? "," : ""); 2156 i++; 2157 } 2158 2159 if (ioc->facts.IOCCapabilities & 2160 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 2161 printk("%sSnapshot Buffer", i ? "," : ""); 2162 i++; 2163 } 2164 2165 if (ioc->facts.IOCCapabilities & 2166 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 2167 printk("%sDiag Trace Buffer", i ? "," : ""); 2168 i++; 2169 } 2170 2171 if (ioc->facts.IOCCapabilities & 2172 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) { 2173 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : ""); 2174 i++; 2175 } 2176 2177 if (ioc->facts.IOCCapabilities & 2178 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 2179 printk("%sTask Set Full", i ? "," : ""); 2180 i++; 2181 } 2182 2183 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 2184 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 2185 printk("%sNCQ", i ? "," : ""); 2186 i++; 2187 } 2188 2189 printk(")\n"); 2190} 2191 2192/** 2193 * mpt2sas_base_update_missing_delay - change the missing delay timers 2194 * @ioc: per adapter object 2195 * @device_missing_delay: amount of time till device is reported missing 2196 * @io_missing_delay: interval IO is returned when there is a missing device 2197 * 2198 * Return nothing. 2199 * 2200 * Passed on the command line, this function will modify the device missing 2201 * delay, as well as the io missing delay. This should be called at driver 2202 * load time. 2203 */ 2204void 2205mpt2sas_base_update_missing_delay(struct MPT2SAS_ADAPTER *ioc, 2206 u16 device_missing_delay, u8 io_missing_delay) 2207{ 2208 u16 dmd, dmd_new, dmd_orignal; 2209 u8 io_missing_delay_original; 2210 u16 sz; 2211 Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL; 2212 Mpi2ConfigReply_t mpi_reply; 2213 u8 num_phys = 0; 2214 u16 ioc_status; 2215 2216 mpt2sas_config_get_number_hba_phys(ioc, &num_phys); 2217 if (!num_phys) 2218 return; 2219 2220 sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys * 2221 sizeof(Mpi2SasIOUnit1PhyData_t)); 2222 sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL); 2223 if (!sas_iounit_pg1) { 2224 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", 2225 ioc->name, __FILE__, __LINE__, __func__); 2226 goto out; 2227 } 2228 if ((mpt2sas_config_get_sas_iounit_pg1(ioc, &mpi_reply, 2229 sas_iounit_pg1, sz))) { 2230 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", 2231 ioc->name, __FILE__, __LINE__, __func__); 2232 goto out; 2233 } 2234 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & 2235 MPI2_IOCSTATUS_MASK; 2236 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { 2237 printk(MPT2SAS_ERR_FMT "failure at %s:%d/%s()!\n", 2238 ioc->name, __FILE__, __LINE__, __func__); 2239 goto out; 2240 } 2241 2242 /* device missing delay */ 2243 dmd = sas_iounit_pg1->ReportDeviceMissingDelay; 2244 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16) 2245 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16; 2246 else 2247 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK; 2248 dmd_orignal = dmd; 2249 if (device_missing_delay > 0x7F) { 2250 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 : 2251 device_missing_delay; 2252 dmd = dmd / 16; 2253 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16; 2254 } else 2255 dmd = device_missing_delay; 2256 sas_iounit_pg1->ReportDeviceMissingDelay = dmd; 2257 2258 /* io missing delay */ 2259 io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay; 2260 sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay; 2261 2262 if (!mpt2sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1, 2263 sz)) { 2264 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16) 2265 dmd_new = (dmd & 2266 MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16; 2267 else 2268 dmd_new = 2269 dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK; 2270 printk(MPT2SAS_INFO_FMT "device_missing_delay: old(%d), " 2271 "new(%d)\n", ioc->name, dmd_orignal, dmd_new); 2272 printk(MPT2SAS_INFO_FMT "ioc_missing_delay: old(%d), " 2273 "new(%d)\n", ioc->name, io_missing_delay_original, 2274 io_missing_delay); 2275 ioc->device_missing_delay = dmd_new; 2276 ioc->io_missing_delay = io_missing_delay; 2277 } 2278 2279out: 2280 kfree(sas_iounit_pg1); 2281} 2282 2283/** 2284 * _base_static_config_pages - static start of day config pages 2285 * @ioc: per adapter object 2286 * 2287 * Return nothing. 2288 */ 2289static void 2290_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 2291{ 2292 Mpi2ConfigReply_t mpi_reply; 2293 u32 iounit_pg1_flags; 2294 2295 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 2296 if (ioc->ir_firmware) 2297 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, 2298 &ioc->manu_pg10); 2299 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 2300 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 2301 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 2302 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 2303 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 2304 _base_display_ioc_capabilities(ioc); 2305 2306 /* 2307 * Enable task_set_full handling in iounit_pg1 when the 2308 * facts capabilities indicate that its supported. 2309 */ 2310 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 2311 if ((ioc->facts.IOCCapabilities & 2312 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 2313 iounit_pg1_flags &= 2314 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 2315 else 2316 iounit_pg1_flags |= 2317 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 2318 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 2319 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 2320 2321} 2322 2323/** 2324 * _base_release_memory_pools - release memory 2325 * @ioc: per adapter object 2326 * 2327 * Free memory allocated from _base_allocate_memory_pools. 2328 * 2329 * Return nothing. 2330 */ 2331static void 2332_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 2333{ 2334 int i; 2335 2336 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2337 __func__)); 2338 2339 if (ioc->request) { 2340 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 2341 ioc->request, ioc->request_dma); 2342 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 2343 ": free\n", ioc->name, ioc->request)); 2344 ioc->request = NULL; 2345 } 2346 2347 if (ioc->sense) { 2348 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 2349 if (ioc->sense_dma_pool) 2350 pci_pool_destroy(ioc->sense_dma_pool); 2351 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 2352 ": free\n", ioc->name, ioc->sense)); 2353 ioc->sense = NULL; 2354 } 2355 2356 if (ioc->reply) { 2357 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 2358 if (ioc->reply_dma_pool) 2359 pci_pool_destroy(ioc->reply_dma_pool); 2360 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 2361 ": free\n", ioc->name, ioc->reply)); 2362 ioc->reply = NULL; 2363 } 2364 2365 if (ioc->reply_free) { 2366 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 2367 ioc->reply_free_dma); 2368 if (ioc->reply_free_dma_pool) 2369 pci_pool_destroy(ioc->reply_free_dma_pool); 2370 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 2371 "(0x%p): free\n", ioc->name, ioc->reply_free)); 2372 ioc->reply_free = NULL; 2373 } 2374 2375 if (ioc->reply_post_free) { 2376 pci_pool_free(ioc->reply_post_free_dma_pool, 2377 ioc->reply_post_free, ioc->reply_post_free_dma); 2378 if (ioc->reply_post_free_dma_pool) 2379 pci_pool_destroy(ioc->reply_post_free_dma_pool); 2380 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 2381 "reply_post_free_pool(0x%p): free\n", ioc->name, 2382 ioc->reply_post_free)); 2383 ioc->reply_post_free = NULL; 2384 } 2385 2386 if (ioc->config_page) { 2387 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 2388 "config_page(0x%p): free\n", ioc->name, 2389 ioc->config_page)); 2390 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 2391 ioc->config_page, ioc->config_page_dma); 2392 } 2393 2394 if (ioc->scsi_lookup) { 2395 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages); 2396 ioc->scsi_lookup = NULL; 2397 } 2398 kfree(ioc->hpr_lookup); 2399 kfree(ioc->internal_lookup); 2400 if (ioc->chain_lookup) { 2401 for (i = 0; i < ioc->chain_depth; i++) { 2402 if (ioc->chain_lookup[i].chain_buffer) 2403 pci_pool_free(ioc->chain_dma_pool, 2404 ioc->chain_lookup[i].chain_buffer, 2405 ioc->chain_lookup[i].chain_buffer_dma); 2406 } 2407 if (ioc->chain_dma_pool) 2408 pci_pool_destroy(ioc->chain_dma_pool); 2409 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages); 2410 ioc->chain_lookup = NULL; 2411 } 2412} 2413 2414 2415/** 2416 * _base_allocate_memory_pools - allocate start of day memory pools 2417 * @ioc: per adapter object 2418 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2419 * 2420 * Returns 0 success, anything else error 2421 */ 2422static int 2423_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2424{ 2425 struct mpt2sas_facts *facts; 2426 u16 max_sge_elements; 2427 u16 chains_needed_per_io; 2428 u32 sz, total_sz, reply_post_free_sz; 2429 u32 retry_sz; 2430 u16 max_request_credit; 2431 int i; 2432 2433 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 2434 __func__)); 2435 2436 retry_sz = 0; 2437 facts = &ioc->facts; 2438 2439 /* command line tunables for max sgl entries */ 2440 if (max_sgl_entries != -1) { 2441 ioc->shost->sg_tablesize = (max_sgl_entries < 2442 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 2443 MPT2SAS_SG_DEPTH; 2444 } else { 2445 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 2446 } 2447 2448 /* command line tunables for max controller queue depth */ 2449 if (max_queue_depth != -1 && max_queue_depth != 0) { 2450 max_request_credit = min_t(u16, max_queue_depth + 2451 ioc->hi_priority_depth + ioc->internal_depth, 2452 facts->RequestCredit); 2453 if (max_request_credit > MAX_HBA_QUEUE_DEPTH) 2454 max_request_credit = MAX_HBA_QUEUE_DEPTH; 2455 } else 2456 max_request_credit = min_t(u16, facts->RequestCredit, 2457 MAX_HBA_QUEUE_DEPTH); 2458 2459 ioc->hba_queue_depth = max_request_credit; 2460 ioc->hi_priority_depth = facts->HighPriorityCredit; 2461 ioc->internal_depth = ioc->hi_priority_depth + 5; 2462 2463 /* request frame size */ 2464 ioc->request_sz = facts->IOCRequestFrameSize * 4; 2465 2466 /* reply frame size */ 2467 ioc->reply_sz = facts->ReplyFrameSize * 4; 2468 2469 retry_allocation: 2470 total_sz = 0; 2471 /* calculate number of sg elements left over in the 1st frame */ 2472 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 2473 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 2474 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 2475 2476 /* now do the same for a chain buffer */ 2477 max_sge_elements = ioc->request_sz - ioc->sge_size; 2478 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 2479 2480 ioc->chain_offset_value_for_main_message = 2481 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 2482 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 2483 2484 /* 2485 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 2486 */ 2487 chains_needed_per_io = ((ioc->shost->sg_tablesize - 2488 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 2489 + 1; 2490 if (chains_needed_per_io > facts->MaxChainDepth) { 2491 chains_needed_per_io = facts->MaxChainDepth; 2492 ioc->shost->sg_tablesize = min_t(u16, 2493 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 2494 * chains_needed_per_io), ioc->shost->sg_tablesize); 2495 } 2496 ioc->chains_needed_per_io = chains_needed_per_io; 2497 2498 /* reply free queue sizing - taking into account for 64 FW events */ 2499 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; 2500 2501 /* calculate reply descriptor post queue depth */ 2502 ioc->reply_post_queue_depth = ioc->hba_queue_depth + 2503 ioc->reply_free_queue_depth + 1; 2504 /* align the reply post queue on the next 16 count boundary */ 2505 if (ioc->reply_post_queue_depth % 16) 2506 ioc->reply_post_queue_depth += 16 - 2507 (ioc->reply_post_queue_depth % 16); 2508 2509 2510 if (ioc->reply_post_queue_depth > 2511 facts->MaxReplyDescriptorPostQueueDepth) { 2512 ioc->reply_post_queue_depth = 2513 facts->MaxReplyDescriptorPostQueueDepth - 2514 (facts->MaxReplyDescriptorPostQueueDepth % 16); 2515 ioc->hba_queue_depth = 2516 ((ioc->reply_post_queue_depth - 64) / 2) - 1; 2517 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64; 2518 } 2519 2520 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 2521 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 2522 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 2523 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 2524 ioc->chains_needed_per_io)); 2525 2526 ioc->scsiio_depth = ioc->hba_queue_depth - 2527 ioc->hi_priority_depth - ioc->internal_depth; 2528 2529 /* set the scsi host can_queue depth 2530 * with some internal commands that could be outstanding 2531 */ 2532 ioc->shost->can_queue = ioc->scsiio_depth; 2533 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: " 2534 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue)); 2535 2536 /* contiguous pool for request and chains, 16 byte align, one extra " 2537 * "frame for smid=0 2538 */ 2539 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; 2540 sz = ((ioc->scsiio_depth + 1) * ioc->request_sz); 2541 2542 /* hi-priority queue */ 2543 sz += (ioc->hi_priority_depth * ioc->request_sz); 2544 2545 /* internal queue */ 2546 sz += (ioc->internal_depth * ioc->request_sz); 2547 2548 ioc->request_dma_sz = sz; 2549 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 2550 if (!ioc->request) { 2551 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2552 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2553 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth, 2554 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2555 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH) 2556 goto out; 2557 retry_sz += 64; 2558 ioc->hba_queue_depth = max_request_credit - retry_sz; 2559 goto retry_allocation; 2560 } 2561 2562 if (retry_sz) 2563 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2564 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2565 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth, 2566 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2567 2568 2569 /* hi-priority queue */ 2570 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * 2571 ioc->request_sz); 2572 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * 2573 ioc->request_sz); 2574 2575 /* internal queue */ 2576 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * 2577 ioc->request_sz); 2578 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * 2579 ioc->request_sz); 2580 2581 2582 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 2583 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2584 ioc->request, ioc->hba_queue_depth, ioc->request_sz, 2585 (ioc->hba_queue_depth * ioc->request_sz)/1024)); 2586 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 2587 ioc->name, (unsigned long long) ioc->request_dma)); 2588 total_sz += sz; 2589 2590 sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker); 2591 ioc->scsi_lookup_pages = get_order(sz); 2592 ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages( 2593 GFP_KERNEL, ioc->scsi_lookup_pages); 2594 if (!ioc->scsi_lookup) { 2595 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, " 2596 "sz(%d)\n", ioc->name, (int)sz); 2597 goto out; 2598 } 2599 2600 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): " 2601 "depth(%d)\n", ioc->name, ioc->request, 2602 ioc->scsiio_depth)); 2603 2604 ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH); 2605 sz = ioc->chain_depth * sizeof(struct chain_tracker); 2606 ioc->chain_pages = get_order(sz); 2607 2608 ioc->chain_lookup = (struct chain_tracker *)__get_free_pages( 2609 GFP_KERNEL, ioc->chain_pages); 2610 if (!ioc->chain_lookup) { 2611 printk(MPT2SAS_ERR_FMT "chain_lookup: get_free_pages failed, " 2612 "sz(%d)\n", ioc->name, (int)sz); 2613 goto out; 2614 } 2615 ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev, 2616 ioc->request_sz, 16, 0); 2617 if (!ioc->chain_dma_pool) { 2618 printk(MPT2SAS_ERR_FMT "chain_dma_pool: pci_pool_create " 2619 "failed\n", ioc->name); 2620 goto out; 2621 } 2622 for (i = 0; i < ioc->chain_depth; i++) { 2623 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc( 2624 ioc->chain_dma_pool , GFP_KERNEL, 2625 &ioc->chain_lookup[i].chain_buffer_dma); 2626 if (!ioc->chain_lookup[i].chain_buffer) { 2627 ioc->chain_depth = i; 2628 goto chain_done; 2629 } 2630 total_sz += ioc->request_sz; 2631 } 2632chain_done: 2633 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool depth" 2634 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2635 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 2636 ioc->request_sz))/1024)); 2637 2638 /* initialize hi-priority queue smid's */ 2639 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, 2640 sizeof(struct request_tracker), GFP_KERNEL); 2641 if (!ioc->hpr_lookup) { 2642 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n", 2643 ioc->name); 2644 goto out; 2645 } 2646 ioc->hi_priority_smid = ioc->scsiio_depth + 1; 2647 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): " 2648 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority, 2649 ioc->hi_priority_depth, ioc->hi_priority_smid)); 2650 2651 /* initialize internal queue smid's */ 2652 ioc->internal_lookup = kcalloc(ioc->internal_depth, 2653 sizeof(struct request_tracker), GFP_KERNEL); 2654 if (!ioc->internal_lookup) { 2655 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n", 2656 ioc->name); 2657 goto out; 2658 } 2659 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; 2660 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): " 2661 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal, 2662 ioc->internal_depth, ioc->internal_smid)); 2663 2664 /* sense buffers, 4 byte align */ 2665 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; 2666 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 2667 0); 2668 if (!ioc->sense_dma_pool) { 2669 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 2670 ioc->name); 2671 goto out; 2672 } 2673 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 2674 &ioc->sense_dma); 2675 if (!ioc->sense) { 2676 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 2677 ioc->name); 2678 goto out; 2679 } 2680 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2681 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 2682 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth, 2683 SCSI_SENSE_BUFFERSIZE, sz/1024)); 2684 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 2685 ioc->name, (unsigned long long)ioc->sense_dma)); 2686 total_sz += sz; 2687 2688 /* reply pool, 4 byte align */ 2689 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 2690 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 2691 0); 2692 if (!ioc->reply_dma_pool) { 2693 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 2694 ioc->name); 2695 goto out; 2696 } 2697 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 2698 &ioc->reply_dma); 2699 if (!ioc->reply) { 2700 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 2701 ioc->name); 2702 goto out; 2703 } 2704 ioc->reply_dma_min_address = (u32)(ioc->reply_dma); 2705 ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz; 2706 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 2707 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 2708 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 2709 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 2710 ioc->name, (unsigned long long)ioc->reply_dma)); 2711 total_sz += sz; 2712 2713 /* reply free queue, 16 byte align */ 2714 sz = ioc->reply_free_queue_depth * 4; 2715 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 2716 ioc->pdev, sz, 16, 0); 2717 if (!ioc->reply_free_dma_pool) { 2718 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 2719 "failed\n", ioc->name); 2720 goto out; 2721 } 2722 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 2723 &ioc->reply_free_dma); 2724 if (!ioc->reply_free) { 2725 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 2726 "failed\n", ioc->name); 2727 goto out; 2728 } 2729 memset(ioc->reply_free, 0, sz); 2730 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 2731 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 2732 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 2733 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 2734 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 2735 total_sz += sz; 2736 2737 /* reply post queue, 16 byte align */ 2738 reply_post_free_sz = ioc->reply_post_queue_depth * 2739 sizeof(Mpi2DefaultReplyDescriptor_t); 2740 if (_base_is_controller_msix_enabled(ioc)) 2741 sz = reply_post_free_sz * ioc->reply_queue_count; 2742 else 2743 sz = reply_post_free_sz; 2744 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 2745 ioc->pdev, sz, 16, 0); 2746 if (!ioc->reply_post_free_dma_pool) { 2747 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 2748 "failed\n", ioc->name); 2749 goto out; 2750 } 2751 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 2752 GFP_KERNEL, &ioc->reply_post_free_dma); 2753 if (!ioc->reply_post_free) { 2754 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2755 "failed\n", ioc->name); 2756 goto out; 2757 } 2758 memset(ioc->reply_post_free, 0, sz); 2759 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2760 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2761 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2762 sz/1024)); 2763 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2764 "(0x%llx)\n", ioc->name, (unsigned long long) 2765 ioc->reply_post_free_dma)); 2766 total_sz += sz; 2767 2768 ioc->config_page_sz = 512; 2769 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2770 ioc->config_page_sz, &ioc->config_page_dma); 2771 if (!ioc->config_page) { 2772 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2773 "failed\n", ioc->name); 2774 goto out; 2775 } 2776 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2777 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2778 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2779 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2780 total_sz += ioc->config_page_sz; 2781 2782 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2783 ioc->name, total_sz/1024); 2784 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2785 "Max Controller Queue Depth(%d)\n", 2786 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2787 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2788 ioc->name, ioc->shost->sg_tablesize); 2789 return 0; 2790 2791 out: 2792 return -ENOMEM; 2793} 2794 2795 2796/** 2797 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2798 * @ioc: Pointer to MPT_ADAPTER structure 2799 * @cooked: Request raw or cooked IOC state 2800 * 2801 * Returns all IOC Doorbell register bits if cooked==0, else just the 2802 * Doorbell bits in MPI_IOC_STATE_MASK. 2803 */ 2804u32 2805mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2806{ 2807 u32 s, sc; 2808 2809 s = readl(&ioc->chip->Doorbell); 2810 sc = s & MPI2_IOC_STATE_MASK; 2811 return cooked ? sc : s; 2812} 2813 2814/** 2815 * _base_wait_on_iocstate - waiting on a particular ioc state 2816 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2817 * @timeout: timeout in second 2818 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2819 * 2820 * Returns 0 for success, non-zero for failure. 2821 */ 2822static int 2823_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2824 int sleep_flag) 2825{ 2826 u32 count, cntdn; 2827 u32 current_state; 2828 2829 count = 0; 2830 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2831 do { 2832 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2833 if (current_state == ioc_state) 2834 return 0; 2835 if (count && current_state == MPI2_IOC_STATE_FAULT) 2836 break; 2837 if (sleep_flag == CAN_SLEEP) 2838 msleep(1); 2839 else 2840 udelay(500); 2841 count++; 2842 } while (--cntdn); 2843 2844 return current_state; 2845} 2846 2847/** 2848 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2849 * a write to the doorbell) 2850 * @ioc: per adapter object 2851 * @timeout: timeout in second 2852 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2853 * 2854 * Returns 0 for success, non-zero for failure. 2855 * 2856 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2857 */ 2858static int 2859_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2860 int sleep_flag) 2861{ 2862 u32 cntdn, count; 2863 u32 int_status; 2864 2865 count = 0; 2866 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2867 do { 2868 int_status = readl(&ioc->chip->HostInterruptStatus); 2869 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2870 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 2871 "successful count(%d), timeout(%d)\n", ioc->name, 2872 __func__, count, timeout)); 2873 return 0; 2874 } 2875 if (sleep_flag == CAN_SLEEP) 2876 msleep(1); 2877 else 2878 udelay(500); 2879 count++; 2880 } while (--cntdn); 2881 2882 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2883 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2884 return -EFAULT; 2885} 2886 2887/** 2888 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2889 * @ioc: per adapter object 2890 * @timeout: timeout in second 2891 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2892 * 2893 * Returns 0 for success, non-zero for failure. 2894 * 2895 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2896 * doorbell. 2897 */ 2898static int 2899_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2900 int sleep_flag) 2901{ 2902 u32 cntdn, count; 2903 u32 int_status; 2904 u32 doorbell; 2905 2906 count = 0; 2907 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2908 do { 2909 int_status = readl(&ioc->chip->HostInterruptStatus); 2910 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2911 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 2912 "successful count(%d), timeout(%d)\n", ioc->name, 2913 __func__, count, timeout)); 2914 return 0; 2915 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2916 doorbell = readl(&ioc->chip->Doorbell); 2917 if ((doorbell & MPI2_IOC_STATE_MASK) == 2918 MPI2_IOC_STATE_FAULT) { 2919 mpt2sas_base_fault_info(ioc , doorbell); 2920 return -EFAULT; 2921 } 2922 } else if (int_status == 0xFFFFFFFF) 2923 goto out; 2924 2925 if (sleep_flag == CAN_SLEEP) 2926 msleep(1); 2927 else 2928 udelay(500); 2929 count++; 2930 } while (--cntdn); 2931 2932 out: 2933 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2934 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2935 return -EFAULT; 2936} 2937 2938/** 2939 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2940 * @ioc: per adapter object 2941 * @timeout: timeout in second 2942 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2943 * 2944 * Returns 0 for success, non-zero for failure. 2945 * 2946 */ 2947static int 2948_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2949 int sleep_flag) 2950{ 2951 u32 cntdn, count; 2952 u32 doorbell_reg; 2953 2954 count = 0; 2955 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2956 do { 2957 doorbell_reg = readl(&ioc->chip->Doorbell); 2958 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2959 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 2960 "successful count(%d), timeout(%d)\n", ioc->name, 2961 __func__, count, timeout)); 2962 return 0; 2963 } 2964 if (sleep_flag == CAN_SLEEP) 2965 msleep(1); 2966 else 2967 udelay(500); 2968 count++; 2969 } while (--cntdn); 2970 2971 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2972 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2973 return -EFAULT; 2974} 2975 2976/** 2977 * _base_send_ioc_reset - send doorbell reset 2978 * @ioc: per adapter object 2979 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2980 * @timeout: timeout in second 2981 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2982 * 2983 * Returns 0 for success, non-zero for failure. 2984 */ 2985static int 2986_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2987 int sleep_flag) 2988{ 2989 u32 ioc_state; 2990 int r = 0; 2991 2992 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2993 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2994 ioc->name, __func__); 2995 return -EFAULT; 2996 } 2997 2998 if (!(ioc->facts.IOCCapabilities & 2999 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 3000 return -EFAULT; 3001 3002 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 3003 3004 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 3005 &ioc->chip->Doorbell); 3006 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 3007 r = -EFAULT; 3008 goto out; 3009 } 3010 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 3011 timeout, sleep_flag); 3012 if (ioc_state) { 3013 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3014 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3015 r = -EFAULT; 3016 goto out; 3017 } 3018 out: 3019 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 3020 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 3021 return r; 3022} 3023 3024/** 3025 * _base_handshake_req_reply_wait - send request thru doorbell interface 3026 * @ioc: per adapter object 3027 * @request_bytes: request length 3028 * @request: pointer having request payload 3029 * @reply_bytes: reply length 3030 * @reply: pointer to reply payload 3031 * @timeout: timeout in second 3032 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3033 * 3034 * Returns 0 for success, non-zero for failure. 3035 */ 3036static int 3037_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 3038 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 3039{ 3040 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 3041 int i; 3042 u8 failed; 3043 u16 dummy; 3044 __le32 *mfp; 3045 3046 /* make sure doorbell is not in use */ 3047 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 3048 printk(MPT2SAS_ERR_FMT "doorbell is in use " 3049 " (line=%d)\n", ioc->name, __LINE__); 3050 return -EFAULT; 3051 } 3052 3053 /* clear pending doorbell interrupts from previous state changes */ 3054 if (readl(&ioc->chip->HostInterruptStatus) & 3055 MPI2_HIS_IOC2SYS_DB_STATUS) 3056 writel(0, &ioc->chip->HostInterruptStatus); 3057 3058 /* send message to ioc */ 3059 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 3060 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 3061 &ioc->chip->Doorbell); 3062 3063 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) { 3064 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3065 "int failed (line=%d)\n", ioc->name, __LINE__); 3066 return -EFAULT; 3067 } 3068 writel(0, &ioc->chip->HostInterruptStatus); 3069 3070 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 3071 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3072 "ack failed (line=%d)\n", ioc->name, __LINE__); 3073 return -EFAULT; 3074 } 3075 3076 /* send message 32-bits at a time */ 3077 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 3078 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 3079 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 3080 failed = 1; 3081 } 3082 3083 if (failed) { 3084 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3085 "sending request failed (line=%d)\n", ioc->name, __LINE__); 3086 return -EFAULT; 3087 } 3088 3089 /* now wait for the reply */ 3090 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 3091 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3092 "int failed (line=%d)\n", ioc->name, __LINE__); 3093 return -EFAULT; 3094 } 3095 3096 /* read the first two 16-bits, it gives the total length of the reply */ 3097 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 3098 & MPI2_DOORBELL_DATA_MASK); 3099 writel(0, &ioc->chip->HostInterruptStatus); 3100 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 3101 printk(MPT2SAS_ERR_FMT "doorbell handshake " 3102 "int failed (line=%d)\n", ioc->name, __LINE__); 3103 return -EFAULT; 3104 } 3105 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 3106 & MPI2_DOORBELL_DATA_MASK); 3107 writel(0, &ioc->chip->HostInterruptStatus); 3108 3109 for (i = 2; i < default_reply->MsgLength * 2; i++) { 3110 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 3111 printk(MPT2SAS_ERR_FMT "doorbell " 3112 "handshake int failed (line=%d)\n", ioc->name, 3113 __LINE__); 3114 return -EFAULT; 3115 } 3116 if (i >= reply_bytes/2) /* overflow case */ 3117 dummy = readl(&ioc->chip->Doorbell); 3118 else 3119 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 3120 & MPI2_DOORBELL_DATA_MASK); 3121 writel(0, &ioc->chip->HostInterruptStatus); 3122 } 3123 3124 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 3125 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 3126 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 3127 " (line=%d)\n", ioc->name, __LINE__)); 3128 } 3129 writel(0, &ioc->chip->HostInterruptStatus); 3130 3131 if (ioc->logging_level & MPT_DEBUG_INIT) { 3132 mfp = (__le32 *)reply; 3133 printk(KERN_INFO "\toffset:data\n"); 3134 for (i = 0; i < reply_bytes/4; i++) 3135 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4, 3136 le32_to_cpu(mfp[i])); 3137 } 3138 return 0; 3139} 3140 3141/** 3142 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 3143 * @ioc: per adapter object 3144 * @mpi_reply: the reply payload from FW 3145 * @mpi_request: the request payload sent to FW 3146 * 3147 * The SAS IO Unit Control Request message allows the host to perform low-level 3148 * operations, such as resets on the PHYs of the IO Unit, also allows the host 3149 * to obtain the IOC assigned device handles for a device if it has other 3150 * identifying information about the device, in addition allows the host to 3151 * remove IOC resources associated with the device. 3152 * 3153 * Returns 0 for success, non-zero for failure. 3154 */ 3155int 3156mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 3157 Mpi2SasIoUnitControlReply_t *mpi_reply, 3158 Mpi2SasIoUnitControlRequest_t *mpi_request) 3159{ 3160 u16 smid; 3161 u32 ioc_state; 3162 unsigned long timeleft; 3163 u8 issue_reset; 3164 int rc; 3165 void *request; 3166 u16 wait_state_count; 3167 3168 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3169 __func__)); 3170 3171 mutex_lock(&ioc->base_cmds.mutex); 3172 3173 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 3174 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 3175 ioc->name, __func__); 3176 rc = -EAGAIN; 3177 goto out; 3178 } 3179 3180 wait_state_count = 0; 3181 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3182 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 3183 if (wait_state_count++ == 10) { 3184 printk(MPT2SAS_ERR_FMT 3185 "%s: failed due to ioc not operational\n", 3186 ioc->name, __func__); 3187 rc = -EFAULT; 3188 goto out; 3189 } 3190 ssleep(1); 3191 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3192 printk(MPT2SAS_INFO_FMT "%s: waiting for " 3193 "operational state(count=%d)\n", ioc->name, 3194 __func__, wait_state_count); 3195 } 3196 3197 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3198 if (!smid) { 3199 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3200 ioc->name, __func__); 3201 rc = -EAGAIN; 3202 goto out; 3203 } 3204 3205 rc = 0; 3206 ioc->base_cmds.status = MPT2_CMD_PENDING; 3207 request = mpt2sas_base_get_msg_frame(ioc, smid); 3208 ioc->base_cmds.smid = smid; 3209 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 3210 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 3211 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 3212 ioc->ioc_link_reset_in_progress = 1; 3213 init_completion(&ioc->base_cmds.done); 3214 mpt2sas_base_put_smid_default(ioc, smid); 3215 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 3216 msecs_to_jiffies(10000)); 3217 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 3218 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 3219 ioc->ioc_link_reset_in_progress) 3220 ioc->ioc_link_reset_in_progress = 0; 3221 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3222 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3223 ioc->name, __func__); 3224 _debug_dump_mf(mpi_request, 3225 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 3226 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 3227 issue_reset = 1; 3228 goto issue_host_reset; 3229 } 3230 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 3231 memcpy(mpi_reply, ioc->base_cmds.reply, 3232 sizeof(Mpi2SasIoUnitControlReply_t)); 3233 else 3234 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 3235 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3236 goto out; 3237 3238 issue_host_reset: 3239 if (issue_reset) 3240 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 3241 FORCE_BIG_HAMMER); 3242 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3243 rc = -EFAULT; 3244 out: 3245 mutex_unlock(&ioc->base_cmds.mutex); 3246 return rc; 3247} 3248 3249 3250/** 3251 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 3252 * @ioc: per adapter object 3253 * @mpi_reply: the reply payload from FW 3254 * @mpi_request: the request payload sent to FW 3255 * 3256 * The SCSI Enclosure Processor request message causes the IOC to 3257 * communicate with SES devices to control LED status signals. 3258 * 3259 * Returns 0 for success, non-zero for failure. 3260 */ 3261int 3262mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 3263 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 3264{ 3265 u16 smid; 3266 u32 ioc_state; 3267 unsigned long timeleft; 3268 u8 issue_reset; 3269 int rc; 3270 void *request; 3271 u16 wait_state_count; 3272 3273 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3274 __func__)); 3275 3276 mutex_lock(&ioc->base_cmds.mutex); 3277 3278 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 3279 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 3280 ioc->name, __func__); 3281 rc = -EAGAIN; 3282 goto out; 3283 } 3284 3285 wait_state_count = 0; 3286 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3287 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 3288 if (wait_state_count++ == 10) { 3289 printk(MPT2SAS_ERR_FMT 3290 "%s: failed due to ioc not operational\n", 3291 ioc->name, __func__); 3292 rc = -EFAULT; 3293 goto out; 3294 } 3295 ssleep(1); 3296 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 3297 printk(MPT2SAS_INFO_FMT "%s: waiting for " 3298 "operational state(count=%d)\n", ioc->name, 3299 __func__, wait_state_count); 3300 } 3301 3302 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3303 if (!smid) { 3304 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3305 ioc->name, __func__); 3306 rc = -EAGAIN; 3307 goto out; 3308 } 3309 3310 rc = 0; 3311 ioc->base_cmds.status = MPT2_CMD_PENDING; 3312 request = mpt2sas_base_get_msg_frame(ioc, smid); 3313 ioc->base_cmds.smid = smid; 3314 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 3315 init_completion(&ioc->base_cmds.done); 3316 mpt2sas_base_put_smid_default(ioc, smid); 3317 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 3318 msecs_to_jiffies(10000)); 3319 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3320 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3321 ioc->name, __func__); 3322 _debug_dump_mf(mpi_request, 3323 sizeof(Mpi2SepRequest_t)/4); 3324 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 3325 issue_reset = 1; 3326 goto issue_host_reset; 3327 } 3328 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 3329 memcpy(mpi_reply, ioc->base_cmds.reply, 3330 sizeof(Mpi2SepReply_t)); 3331 else 3332 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 3333 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3334 goto out; 3335 3336 issue_host_reset: 3337 if (issue_reset) 3338 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 3339 FORCE_BIG_HAMMER); 3340 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3341 rc = -EFAULT; 3342 out: 3343 mutex_unlock(&ioc->base_cmds.mutex); 3344 return rc; 3345} 3346 3347/** 3348 * _base_get_port_facts - obtain port facts reply and save in ioc 3349 * @ioc: per adapter object 3350 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3351 * 3352 * Returns 0 for success, non-zero for failure. 3353 */ 3354static int 3355_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 3356{ 3357 Mpi2PortFactsRequest_t mpi_request; 3358 Mpi2PortFactsReply_t mpi_reply; 3359 struct mpt2sas_port_facts *pfacts; 3360 int mpi_reply_sz, mpi_request_sz, r; 3361 3362 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3363 __func__)); 3364 3365 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 3366 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 3367 memset(&mpi_request, 0, mpi_request_sz); 3368 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 3369 mpi_request.PortNumber = port; 3370 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 3371 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 3372 3373 if (r != 0) { 3374 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3375 ioc->name, __func__, r); 3376 return r; 3377 } 3378 3379 pfacts = &ioc->pfacts[port]; 3380 memset(pfacts, 0, sizeof(struct mpt2sas_port_facts)); 3381 pfacts->PortNumber = mpi_reply.PortNumber; 3382 pfacts->VP_ID = mpi_reply.VP_ID; 3383 pfacts->VF_ID = mpi_reply.VF_ID; 3384 pfacts->MaxPostedCmdBuffers = 3385 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 3386 3387 return 0; 3388} 3389 3390/** 3391 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 3392 * @ioc: per adapter object 3393 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3394 * 3395 * Returns 0 for success, non-zero for failure. 3396 */ 3397static int 3398_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3399{ 3400 Mpi2IOCFactsRequest_t mpi_request; 3401 Mpi2IOCFactsReply_t mpi_reply; 3402 struct mpt2sas_facts *facts; 3403 int mpi_reply_sz, mpi_request_sz, r; 3404 3405 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3406 __func__)); 3407 3408 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 3409 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 3410 memset(&mpi_request, 0, mpi_request_sz); 3411 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 3412 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 3413 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 3414 3415 if (r != 0) { 3416 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3417 ioc->name, __func__, r); 3418 return r; 3419 } 3420 3421 facts = &ioc->facts; 3422 memset(facts, 0, sizeof(struct mpt2sas_facts)); 3423 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 3424 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 3425 facts->VP_ID = mpi_reply.VP_ID; 3426 facts->VF_ID = mpi_reply.VF_ID; 3427 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 3428 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 3429 facts->WhoInit = mpi_reply.WhoInit; 3430 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 3431 facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors; 3432 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 3433 facts->MaxReplyDescriptorPostQueueDepth = 3434 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 3435 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 3436 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 3437 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 3438 ioc->ir_firmware = 1; 3439 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 3440 facts->IOCRequestFrameSize = 3441 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 3442 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 3443 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 3444 ioc->shost->max_id = -1; 3445 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 3446 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 3447 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 3448 facts->HighPriorityCredit = 3449 le16_to_cpu(mpi_reply.HighPriorityCredit); 3450 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 3451 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 3452 3453 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 3454 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 3455 facts->MaxChainDepth)); 3456 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 3457 "reply frame size(%d)\n", ioc->name, 3458 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 3459 return 0; 3460} 3461 3462/** 3463 * _base_send_ioc_init - send ioc_init to firmware 3464 * @ioc: per adapter object 3465 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3466 * 3467 * Returns 0 for success, non-zero for failure. 3468 */ 3469static int 3470_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3471{ 3472 Mpi2IOCInitRequest_t mpi_request; 3473 Mpi2IOCInitReply_t mpi_reply; 3474 int r; 3475 struct timeval current_time; 3476 u16 ioc_status; 3477 3478 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3479 __func__)); 3480 3481 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 3482 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 3483 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 3484 mpi_request.VF_ID = 0; /* TODO */ 3485 mpi_request.VP_ID = 0; 3486 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 3487 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 3488 3489 if (_base_is_controller_msix_enabled(ioc)) 3490 mpi_request.HostMSIxVectors = ioc->reply_queue_count; 3491 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 3492 mpi_request.ReplyDescriptorPostQueueDepth = 3493 cpu_to_le16(ioc->reply_post_queue_depth); 3494 mpi_request.ReplyFreeQueueDepth = 3495 cpu_to_le16(ioc->reply_free_queue_depth); 3496 3497 mpi_request.SenseBufferAddressHigh = 3498 cpu_to_le32((u64)ioc->sense_dma >> 32); 3499 mpi_request.SystemReplyAddressHigh = 3500 cpu_to_le32((u64)ioc->reply_dma >> 32); 3501 mpi_request.SystemRequestFrameBaseAddress = 3502 cpu_to_le64((u64)ioc->request_dma); 3503 mpi_request.ReplyFreeQueueAddress = 3504 cpu_to_le64((u64)ioc->reply_free_dma); 3505 mpi_request.ReplyDescriptorPostQueueAddress = 3506 cpu_to_le64((u64)ioc->reply_post_free_dma); 3507 3508 3509 /* This time stamp specifies number of milliseconds 3510 * since epoch ~ midnight January 1, 1970. 3511 */ 3512 do_gettimeofday(¤t_time); 3513 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 + 3514 (current_time.tv_usec / 1000)); 3515 3516 if (ioc->logging_level & MPT_DEBUG_INIT) { 3517 __le32 *mfp; 3518 int i; 3519 3520 mfp = (__le32 *)&mpi_request; 3521 printk(KERN_INFO "\toffset:data\n"); 3522 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 3523 printk(KERN_INFO "\t[0x%02x]:%08x\n", i*4, 3524 le32_to_cpu(mfp[i])); 3525 } 3526 3527 r = _base_handshake_req_reply_wait(ioc, 3528 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 3529 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 3530 sleep_flag); 3531 3532 if (r != 0) { 3533 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3534 ioc->name, __func__, r); 3535 return r; 3536 } 3537 3538 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK; 3539 if (ioc_status != MPI2_IOCSTATUS_SUCCESS || 3540 mpi_reply.IOCLogInfo) { 3541 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 3542 r = -EIO; 3543 } 3544 3545 return 0; 3546} 3547 3548/** 3549 * mpt2sas_port_enable_done - command completion routine for port enable 3550 * @ioc: per adapter object 3551 * @smid: system request message index 3552 * @msix_index: MSIX table index supplied by the OS 3553 * @reply: reply message frame(lower 32bit addr) 3554 * 3555 * Return 1 meaning mf should be freed from _base_interrupt 3556 * 0 means the mf is freed from this function. 3557 */ 3558u8 3559mpt2sas_port_enable_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 3560 u32 reply) 3561{ 3562 MPI2DefaultReply_t *mpi_reply; 3563 u16 ioc_status; 3564 3565 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 3566 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 3567 return 1; 3568 3569 if (ioc->port_enable_cmds.status == MPT2_CMD_NOT_USED) 3570 return 1; 3571 3572 ioc->port_enable_cmds.status |= MPT2_CMD_COMPLETE; 3573 if (mpi_reply) { 3574 ioc->port_enable_cmds.status |= MPT2_CMD_REPLY_VALID; 3575 memcpy(ioc->port_enable_cmds.reply, mpi_reply, 3576 mpi_reply->MsgLength*4); 3577 } 3578 ioc->port_enable_cmds.status &= ~MPT2_CMD_PENDING; 3579 3580 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; 3581 3582 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) 3583 ioc->port_enable_failed = 1; 3584 3585 if (ioc->is_driver_loading) { 3586 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) { 3587 mpt2sas_port_enable_complete(ioc); 3588 return 1; 3589 } else { 3590 ioc->start_scan_failed = ioc_status; 3591 ioc->start_scan = 0; 3592 return 1; 3593 } 3594 } 3595 complete(&ioc->port_enable_cmds.done); 3596 return 1; 3597} 3598 3599 3600/** 3601 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 3602 * @ioc: per adapter object 3603 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3604 * 3605 * Returns 0 for success, non-zero for failure. 3606 */ 3607static int 3608_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3609{ 3610 Mpi2PortEnableRequest_t *mpi_request; 3611 Mpi2PortEnableReply_t *mpi_reply; 3612 unsigned long timeleft; 3613 int r = 0; 3614 u16 smid; 3615 u16 ioc_status; 3616 3617 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 3618 3619 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) { 3620 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3621 ioc->name, __func__); 3622 return -EAGAIN; 3623 } 3624 3625 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx); 3626 if (!smid) { 3627 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3628 ioc->name, __func__); 3629 return -EAGAIN; 3630 } 3631 3632 ioc->port_enable_cmds.status = MPT2_CMD_PENDING; 3633 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3634 ioc->port_enable_cmds.smid = smid; 3635 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 3636 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 3637 3638 init_completion(&ioc->port_enable_cmds.done); 3639 mpt2sas_base_put_smid_default(ioc, smid); 3640 timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done, 3641 300*HZ); 3642 if (!(ioc->port_enable_cmds.status & MPT2_CMD_COMPLETE)) { 3643 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3644 ioc->name, __func__); 3645 _debug_dump_mf(mpi_request, 3646 sizeof(Mpi2PortEnableRequest_t)/4); 3647 if (ioc->port_enable_cmds.status & MPT2_CMD_RESET) 3648 r = -EFAULT; 3649 else 3650 r = -ETIME; 3651 goto out; 3652 } 3653 mpi_reply = ioc->port_enable_cmds.reply; 3654 3655 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK; 3656 if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { 3657 printk(MPT2SAS_ERR_FMT "%s: failed with (ioc_status=0x%08x)\n", 3658 ioc->name, __func__, ioc_status); 3659 r = -EFAULT; 3660 goto out; 3661 } 3662 out: 3663 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED; 3664 printk(MPT2SAS_INFO_FMT "port enable: %s\n", ioc->name, ((r == 0) ? 3665 "SUCCESS" : "FAILED")); 3666 return r; 3667} 3668 3669/** 3670 * mpt2sas_port_enable - initiate firmware discovery (don't wait for reply) 3671 * @ioc: per adapter object 3672 * 3673 * Returns 0 for success, non-zero for failure. 3674 */ 3675int 3676mpt2sas_port_enable(struct MPT2SAS_ADAPTER *ioc) 3677{ 3678 Mpi2PortEnableRequest_t *mpi_request; 3679 u16 smid; 3680 3681 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 3682 3683 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) { 3684 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3685 ioc->name, __func__); 3686 return -EAGAIN; 3687 } 3688 3689 smid = mpt2sas_base_get_smid(ioc, ioc->port_enable_cb_idx); 3690 if (!smid) { 3691 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3692 ioc->name, __func__); 3693 return -EAGAIN; 3694 } 3695 3696 ioc->port_enable_cmds.status = MPT2_CMD_PENDING; 3697 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3698 ioc->port_enable_cmds.smid = smid; 3699 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 3700 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 3701 3702 mpt2sas_base_put_smid_default(ioc, smid); 3703 return 0; 3704} 3705 3706/** 3707 * _base_determine_wait_on_discovery - desposition 3708 * @ioc: per adapter object 3709 * 3710 * Decide whether to wait on discovery to complete. Used to either 3711 * locate boot device, or report volumes ahead of physical devices. 3712 * 3713 * Returns 1 for wait, 0 for don't wait 3714 */ 3715static int 3716_base_determine_wait_on_discovery(struct MPT2SAS_ADAPTER *ioc) 3717{ 3718 /* We wait for discovery to complete if IR firmware is loaded. 3719 * The sas topology events arrive before PD events, so we need time to 3720 * turn on the bit in ioc->pd_handles to indicate PD 3721 * Also, it maybe required to report Volumes ahead of physical 3722 * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set. 3723 */ 3724 if (ioc->ir_firmware) 3725 return 1; 3726 3727 /* if no Bios, then we don't need to wait */ 3728 if (!ioc->bios_pg3.BiosVersion) 3729 return 0; 3730 3731 /* Bios is present, then we drop down here. 3732 * 3733 * If there any entries in the Bios Page 2, then we wait 3734 * for discovery to complete. 3735 */ 3736 3737 /* Current Boot Device */ 3738 if ((ioc->bios_pg2.CurrentBootDeviceForm & 3739 MPI2_BIOSPAGE2_FORM_MASK) == 3740 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED && 3741 /* Request Boot Device */ 3742 (ioc->bios_pg2.ReqBootDeviceForm & 3743 MPI2_BIOSPAGE2_FORM_MASK) == 3744 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED && 3745 /* Alternate Request Boot Device */ 3746 (ioc->bios_pg2.ReqAltBootDeviceForm & 3747 MPI2_BIOSPAGE2_FORM_MASK) == 3748 MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED) 3749 return 0; 3750 3751 return 1; 3752} 3753 3754 3755/** 3756 * _base_unmask_events - turn on notification for this event 3757 * @ioc: per adapter object 3758 * @event: firmware event 3759 * 3760 * The mask is stored in ioc->event_masks. 3761 */ 3762static void 3763_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 3764{ 3765 u32 desired_event; 3766 3767 if (event >= 128) 3768 return; 3769 3770 desired_event = (1 << (event % 32)); 3771 3772 if (event < 32) 3773 ioc->event_masks[0] &= ~desired_event; 3774 else if (event < 64) 3775 ioc->event_masks[1] &= ~desired_event; 3776 else if (event < 96) 3777 ioc->event_masks[2] &= ~desired_event; 3778 else if (event < 128) 3779 ioc->event_masks[3] &= ~desired_event; 3780} 3781 3782/** 3783 * _base_event_notification - send event notification 3784 * @ioc: per adapter object 3785 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3786 * 3787 * Returns 0 for success, non-zero for failure. 3788 */ 3789static int 3790_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3791{ 3792 Mpi2EventNotificationRequest_t *mpi_request; 3793 unsigned long timeleft; 3794 u16 smid; 3795 int r = 0; 3796 int i; 3797 3798 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 3799 __func__)); 3800 3801 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3802 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3803 ioc->name, __func__); 3804 return -EAGAIN; 3805 } 3806 3807 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3808 if (!smid) { 3809 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3810 ioc->name, __func__); 3811 return -EAGAIN; 3812 } 3813 ioc->base_cmds.status = MPT2_CMD_PENDING; 3814 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3815 ioc->base_cmds.smid = smid; 3816 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 3817 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 3818 mpi_request->VF_ID = 0; /* TODO */ 3819 mpi_request->VP_ID = 0; 3820 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3821 mpi_request->EventMasks[i] = 3822 cpu_to_le32(ioc->event_masks[i]); 3823 init_completion(&ioc->base_cmds.done); 3824 mpt2sas_base_put_smid_default(ioc, smid); 3825 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 3826 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3827 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3828 ioc->name, __func__); 3829 _debug_dump_mf(mpi_request, 3830 sizeof(Mpi2EventNotificationRequest_t)/4); 3831 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3832 r = -EFAULT; 3833 else 3834 r = -ETIME; 3835 } else 3836 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: complete\n", 3837 ioc->name, __func__)); 3838 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3839 return r; 3840} 3841 3842/** 3843 * mpt2sas_base_validate_event_type - validating event types 3844 * @ioc: per adapter object 3845 * @event: firmware event 3846 * 3847 * This will turn on firmware event notification when application 3848 * ask for that event. We don't mask events that are already enabled. 3849 */ 3850void 3851mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 3852{ 3853 int i, j; 3854 u32 event_mask, desired_event; 3855 u8 send_update_to_fw; 3856 3857 for (i = 0, send_update_to_fw = 0; i < 3858 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 3859 event_mask = ~event_type[i]; 3860 desired_event = 1; 3861 for (j = 0; j < 32; j++) { 3862 if (!(event_mask & desired_event) && 3863 (ioc->event_masks[i] & desired_event)) { 3864 ioc->event_masks[i] &= ~desired_event; 3865 send_update_to_fw = 1; 3866 } 3867 desired_event = (desired_event << 1); 3868 } 3869 } 3870 3871 if (!send_update_to_fw) 3872 return; 3873 3874 mutex_lock(&ioc->base_cmds.mutex); 3875 _base_event_notification(ioc, CAN_SLEEP); 3876 mutex_unlock(&ioc->base_cmds.mutex); 3877} 3878 3879/** 3880 * _base_diag_reset - the "big hammer" start of day reset 3881 * @ioc: per adapter object 3882 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3883 * 3884 * Returns 0 for success, non-zero for failure. 3885 */ 3886static int 3887_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3888{ 3889 u32 host_diagnostic; 3890 u32 ioc_state; 3891 u32 count; 3892 u32 hcb_size; 3893 3894 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3895 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "clear interrupts\n", 3896 ioc->name)); 3897 3898 count = 0; 3899 do { 3900 /* Write magic sequence to WriteSequence register 3901 * Loop until in diagnostic mode 3902 */ 3903 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "write magic " 3904 "sequence\n", ioc->name)); 3905 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3906 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3907 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3908 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3909 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3910 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3911 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3912 3913 /* wait 100 msec */ 3914 if (sleep_flag == CAN_SLEEP) 3915 msleep(100); 3916 else 3917 mdelay(100); 3918 3919 if (count++ > 20) 3920 goto out; 3921 3922 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3923 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "wrote magic " 3924 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3925 ioc->name, count, host_diagnostic)); 3926 3927 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3928 3929 hcb_size = readl(&ioc->chip->HCBSize); 3930 3931 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "diag reset: issued\n", 3932 ioc->name)); 3933 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3934 &ioc->chip->HostDiagnostic); 3935 3936 /* This delay allows the chip PCIe hardware time to finish reset tasks*/ 3937 if (sleep_flag == CAN_SLEEP) 3938 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000); 3939 else 3940 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000); 3941 3942 /* Approximately 300 second max wait */ 3943 for (count = 0; count < (300000000 / 3944 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) { 3945 3946 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3947 3948 if (host_diagnostic == 0xFFFFFFFF) 3949 goto out; 3950 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3951 break; 3952 3953 /* Wait to pass the second read delay window */ 3954 if (sleep_flag == CAN_SLEEP) 3955 msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC 3956 /1000); 3957 else 3958 mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC 3959 /1000); 3960 } 3961 3962 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3963 3964 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter " 3965 "assuming the HCB Address points to good F/W\n", 3966 ioc->name)); 3967 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3968 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3969 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3970 3971 drsprintk(ioc, printk(MPT2SAS_INFO_FMT 3972 "re-enable the HCDW\n", ioc->name)); 3973 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3974 &ioc->chip->HCBSize); 3975 } 3976 3977 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "restart the adapter\n", 3978 ioc->name)); 3979 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3980 &ioc->chip->HostDiagnostic); 3981 3982 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "disable writes to the " 3983 "diagnostic register\n", ioc->name)); 3984 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3985 3986 drsprintk(ioc, printk(MPT2SAS_INFO_FMT "Wait for FW to go to the " 3987 "READY state\n", ioc->name)); 3988 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3989 sleep_flag); 3990 if (ioc_state) { 3991 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3992 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3993 goto out; 3994 } 3995 3996 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3997 return 0; 3998 3999 out: 4000 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 4001 return -EFAULT; 4002} 4003 4004/** 4005 * _base_make_ioc_ready - put controller in READY state 4006 * @ioc: per adapter object 4007 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4008 * @type: FORCE_BIG_HAMMER or SOFT_RESET 4009 * 4010 * Returns 0 for success, non-zero for failure. 4011 */ 4012static int 4013_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 4014 enum reset_type type) 4015{ 4016 u32 ioc_state; 4017 int rc; 4018 4019 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4020 __func__)); 4021 4022 if (ioc->pci_error_recovery) 4023 return 0; 4024 4025 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 4026 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: ioc_state(0x%08x)\n", 4027 ioc->name, __func__, ioc_state)); 4028 4029 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 4030 return 0; 4031 4032 if (ioc_state & MPI2_DOORBELL_USED) { 4033 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "unexpected doorbell " 4034 "active!\n", ioc->name)); 4035 goto issue_diag_reset; 4036 } 4037 4038 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 4039 mpt2sas_base_fault_info(ioc, ioc_state & 4040 MPI2_DOORBELL_DATA_MASK); 4041 goto issue_diag_reset; 4042 } 4043 4044 if (type == FORCE_BIG_HAMMER) 4045 goto issue_diag_reset; 4046 4047 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 4048 if (!(_base_send_ioc_reset(ioc, 4049 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) { 4050 ioc->ioc_reset_count++; 4051 return 0; 4052 } 4053 4054 issue_diag_reset: 4055 rc = _base_diag_reset(ioc, CAN_SLEEP); 4056 ioc->ioc_reset_count++; 4057 return rc; 4058} 4059 4060/** 4061 * _base_make_ioc_operational - put controller in OPERATIONAL state 4062 * @ioc: per adapter object 4063 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4064 * 4065 * Returns 0 for success, non-zero for failure. 4066 */ 4067static int 4068_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 4069{ 4070 int r, i; 4071 unsigned long flags; 4072 u32 reply_address; 4073 u16 smid; 4074 struct _tr_list *delayed_tr, *delayed_tr_next; 4075 u8 hide_flag; 4076 struct adapter_reply_queue *reply_q; 4077 long reply_post_free; 4078 u32 reply_post_free_sz; 4079 4080 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4081 __func__)); 4082 4083 /* clean the delayed target reset list */ 4084 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 4085 &ioc->delayed_tr_list, list) { 4086 list_del(&delayed_tr->list); 4087 kfree(delayed_tr); 4088 } 4089 4090 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 4091 &ioc->delayed_tr_volume_list, list) { 4092 list_del(&delayed_tr->list); 4093 kfree(delayed_tr); 4094 } 4095 4096 /* initialize the scsi lookup free list */ 4097 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 4098 INIT_LIST_HEAD(&ioc->free_list); 4099 smid = 1; 4100 for (i = 0; i < ioc->scsiio_depth; i++, smid++) { 4101 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list); 4102 ioc->scsi_lookup[i].cb_idx = 0xFF; 4103 ioc->scsi_lookup[i].smid = smid; 4104 ioc->scsi_lookup[i].scmd = NULL; 4105 ioc->scsi_lookup[i].direct_io = 0; 4106 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 4107 &ioc->free_list); 4108 } 4109 4110 /* hi-priority queue */ 4111 INIT_LIST_HEAD(&ioc->hpr_free_list); 4112 smid = ioc->hi_priority_smid; 4113 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { 4114 ioc->hpr_lookup[i].cb_idx = 0xFF; 4115 ioc->hpr_lookup[i].smid = smid; 4116 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 4117 &ioc->hpr_free_list); 4118 } 4119 4120 /* internal queue */ 4121 INIT_LIST_HEAD(&ioc->internal_free_list); 4122 smid = ioc->internal_smid; 4123 for (i = 0; i < ioc->internal_depth; i++, smid++) { 4124 ioc->internal_lookup[i].cb_idx = 0xFF; 4125 ioc->internal_lookup[i].smid = smid; 4126 list_add_tail(&ioc->internal_lookup[i].tracker_list, 4127 &ioc->internal_free_list); 4128 } 4129 4130 /* chain pool */ 4131 INIT_LIST_HEAD(&ioc->free_chain_list); 4132 for (i = 0; i < ioc->chain_depth; i++) 4133 list_add_tail(&ioc->chain_lookup[i].tracker_list, 4134 &ioc->free_chain_list); 4135 4136 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 4137 4138 /* initialize Reply Free Queue */ 4139 for (i = 0, reply_address = (u32)ioc->reply_dma ; 4140 i < ioc->reply_free_queue_depth ; i++, reply_address += 4141 ioc->reply_sz) 4142 ioc->reply_free[i] = cpu_to_le32(reply_address); 4143 4144 /* initialize reply queues */ 4145 if (ioc->is_driver_loading) 4146 _base_assign_reply_queues(ioc); 4147 4148 /* initialize Reply Post Free Queue */ 4149 reply_post_free = (long)ioc->reply_post_free; 4150 reply_post_free_sz = ioc->reply_post_queue_depth * 4151 sizeof(Mpi2DefaultReplyDescriptor_t); 4152 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { 4153 reply_q->reply_post_host_index = 0; 4154 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *) 4155 reply_post_free; 4156 for (i = 0; i < ioc->reply_post_queue_depth; i++) 4157 reply_q->reply_post_free[i].Words = 4158 cpu_to_le64(ULLONG_MAX); 4159 if (!_base_is_controller_msix_enabled(ioc)) 4160 goto skip_init_reply_post_free_queue; 4161 reply_post_free += reply_post_free_sz; 4162 } 4163 skip_init_reply_post_free_queue: 4164 4165 r = _base_send_ioc_init(ioc, sleep_flag); 4166 if (r) 4167 return r; 4168 4169 /* initialize reply free host index */ 4170 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 4171 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 4172 4173 /* initialize reply post host index */ 4174 list_for_each_entry(reply_q, &ioc->reply_queue_list, list) { 4175 writel(reply_q->msix_index << MPI2_RPHI_MSIX_INDEX_SHIFT, 4176 &ioc->chip->ReplyPostHostIndex); 4177 if (!_base_is_controller_msix_enabled(ioc)) 4178 goto skip_init_reply_post_host_index; 4179 } 4180 4181 skip_init_reply_post_host_index: 4182 4183 _base_unmask_interrupts(ioc); 4184 4185 r = _base_event_notification(ioc, sleep_flag); 4186 if (r) 4187 return r; 4188 4189 if (sleep_flag == CAN_SLEEP) 4190 _base_static_config_pages(ioc); 4191 4192 4193 if (ioc->is_driver_loading) { 4194 if (ioc->is_warpdrive && ioc->manu_pg10.OEMIdentifier 4195 == 0x80) { 4196 hide_flag = (u8) ( 4197 le32_to_cpu(ioc->manu_pg10.OEMSpecificFlags0) & 4198 MFG_PAGE10_HIDE_SSDS_MASK); 4199 if (hide_flag != MFG_PAGE10_HIDE_SSDS_MASK) 4200 ioc->mfg_pg10_hide_flag = hide_flag; 4201 } 4202 ioc->wait_for_discovery_to_complete = 4203 _base_determine_wait_on_discovery(ioc); 4204 return r; /* scan_start and scan_finished support */ 4205 } 4206 r = _base_send_port_enable(ioc, sleep_flag); 4207 if (r) 4208 return r; 4209 4210 return r; 4211} 4212 4213/** 4214 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 4215 * @ioc: per adapter object 4216 * 4217 * Return nothing. 4218 */ 4219void 4220mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 4221{ 4222 struct pci_dev *pdev = ioc->pdev; 4223 4224 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4225 __func__)); 4226 4227 if (ioc->chip_phys && ioc->chip) { 4228 _base_mask_interrupts(ioc); 4229 ioc->shost_recovery = 1; 4230 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 4231 ioc->shost_recovery = 0; 4232 } 4233 4234 _base_free_irq(ioc); 4235 _base_disable_msix(ioc); 4236 4237 if (ioc->chip_phys && ioc->chip) 4238 iounmap(ioc->chip); 4239 ioc->chip_phys = 0; 4240 4241 if (pci_is_enabled(pdev)) { 4242 pci_release_selected_regions(ioc->pdev, ioc->bars); 4243 pci_disable_pcie_error_reporting(pdev); 4244 pci_disable_device(pdev); 4245 } 4246 return; 4247} 4248 4249/** 4250 * mpt2sas_base_attach - attach controller instance 4251 * @ioc: per adapter object 4252 * 4253 * Returns 0 for success, non-zero for failure. 4254 */ 4255int 4256mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 4257{ 4258 int r, i; 4259 int cpu_id, last_cpu_id = 0; 4260 4261 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4262 __func__)); 4263 4264 /* setup cpu_msix_table */ 4265 ioc->cpu_count = num_online_cpus(); 4266 for_each_online_cpu(cpu_id) 4267 last_cpu_id = cpu_id; 4268 ioc->cpu_msix_table_sz = last_cpu_id + 1; 4269 ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL); 4270 ioc->reply_queue_count = 1; 4271 if (!ioc->cpu_msix_table) { 4272 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 4273 "cpu_msix_table failed!!!\n", ioc->name)); 4274 r = -ENOMEM; 4275 goto out_free_resources; 4276 } 4277 4278 if (ioc->is_warpdrive) { 4279 ioc->reply_post_host_index = kcalloc(ioc->cpu_msix_table_sz, 4280 sizeof(resource_size_t *), GFP_KERNEL); 4281 if (!ioc->reply_post_host_index) { 4282 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation " 4283 "for cpu_msix_table failed!!!\n", ioc->name)); 4284 r = -ENOMEM; 4285 goto out_free_resources; 4286 } 4287 } 4288 4289 r = mpt2sas_base_map_resources(ioc); 4290 if (r) 4291 goto out_free_resources; 4292 4293 if (ioc->is_warpdrive) { 4294 ioc->reply_post_host_index[0] = (resource_size_t __iomem *) 4295 &ioc->chip->ReplyPostHostIndex; 4296 4297 for (i = 1; i < ioc->cpu_msix_table_sz; i++) 4298 ioc->reply_post_host_index[i] = 4299 (resource_size_t __iomem *) 4300 ((u8 __iomem *)&ioc->chip->Doorbell + (0x4000 + ((i - 1) 4301 * 4))); 4302 } 4303 4304 pci_set_drvdata(ioc->pdev, ioc->shost); 4305 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 4306 if (r) 4307 goto out_free_resources; 4308 4309 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 4310 if (r) 4311 goto out_free_resources; 4312 4313 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 4314 sizeof(struct mpt2sas_port_facts), GFP_KERNEL); 4315 if (!ioc->pfacts) { 4316 r = -ENOMEM; 4317 goto out_free_resources; 4318 } 4319 4320 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 4321 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 4322 if (r) 4323 goto out_free_resources; 4324 } 4325 4326 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 4327 if (r) 4328 goto out_free_resources; 4329 4330 init_waitqueue_head(&ioc->reset_wq); 4331 /* allocate memory pd handle bitmask list */ 4332 ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8); 4333 if (ioc->facts.MaxDevHandle % 8) 4334 ioc->pd_handles_sz++; 4335 ioc->pd_handles = kzalloc(ioc->pd_handles_sz, 4336 GFP_KERNEL); 4337 if (!ioc->pd_handles) { 4338 r = -ENOMEM; 4339 goto out_free_resources; 4340 } 4341 ioc->blocking_handles = kzalloc(ioc->pd_handles_sz, 4342 GFP_KERNEL); 4343 if (!ioc->blocking_handles) { 4344 r = -ENOMEM; 4345 goto out_free_resources; 4346 } 4347 ioc->fwfault_debug = mpt2sas_fwfault_debug; 4348 4349 /* base internal command bits */ 4350 mutex_init(&ioc->base_cmds.mutex); 4351 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4352 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 4353 4354 /* port_enable command bits */ 4355 ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4356 ioc->port_enable_cmds.status = MPT2_CMD_NOT_USED; 4357 4358 /* transport internal command bits */ 4359 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4360 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 4361 mutex_init(&ioc->transport_cmds.mutex); 4362 4363 /* scsih internal command bits */ 4364 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4365 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED; 4366 mutex_init(&ioc->scsih_cmds.mutex); 4367 4368 /* task management internal command bits */ 4369 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4370 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 4371 mutex_init(&ioc->tm_cmds.mutex); 4372 4373 /* config page internal command bits */ 4374 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4375 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 4376 mutex_init(&ioc->config_cmds.mutex); 4377 4378 /* ctl module internal command bits */ 4379 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 4380 ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL); 4381 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 4382 mutex_init(&ioc->ctl_cmds.mutex); 4383 4384 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply || 4385 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply || 4386 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply || 4387 !ioc->ctl_cmds.sense) { 4388 r = -ENOMEM; 4389 goto out_free_resources; 4390 } 4391 4392 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply || 4393 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply || 4394 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) { 4395 r = -ENOMEM; 4396 goto out_free_resources; 4397 } 4398 4399 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 4400 ioc->event_masks[i] = -1; 4401 4402 /* here we enable the events we care about */ 4403 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 4404 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 4405 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 4406 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 4407 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 4408 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 4409 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 4410 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 4411 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 4412 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 4413 r = _base_make_ioc_operational(ioc, CAN_SLEEP); 4414 if (r) 4415 goto out_free_resources; 4416 4417 ioc->non_operational_loop = 0; 4418 4419 return 0; 4420 4421 out_free_resources: 4422 4423 ioc->remove_host = 1; 4424 mpt2sas_base_free_resources(ioc); 4425 _base_release_memory_pools(ioc); 4426 pci_set_drvdata(ioc->pdev, NULL); 4427 kfree(ioc->cpu_msix_table); 4428 if (ioc->is_warpdrive) 4429 kfree(ioc->reply_post_host_index); 4430 kfree(ioc->pd_handles); 4431 kfree(ioc->blocking_handles); 4432 kfree(ioc->tm_cmds.reply); 4433 kfree(ioc->transport_cmds.reply); 4434 kfree(ioc->scsih_cmds.reply); 4435 kfree(ioc->config_cmds.reply); 4436 kfree(ioc->base_cmds.reply); 4437 kfree(ioc->port_enable_cmds.reply); 4438 kfree(ioc->ctl_cmds.reply); 4439 kfree(ioc->ctl_cmds.sense); 4440 kfree(ioc->pfacts); 4441 ioc->ctl_cmds.reply = NULL; 4442 ioc->base_cmds.reply = NULL; 4443 ioc->tm_cmds.reply = NULL; 4444 ioc->scsih_cmds.reply = NULL; 4445 ioc->transport_cmds.reply = NULL; 4446 ioc->config_cmds.reply = NULL; 4447 ioc->pfacts = NULL; 4448 return r; 4449} 4450 4451 4452/** 4453 * mpt2sas_base_detach - remove controller instance 4454 * @ioc: per adapter object 4455 * 4456 * Return nothing. 4457 */ 4458void 4459mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 4460{ 4461 4462 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, 4463 __func__)); 4464 4465 mpt2sas_base_stop_watchdog(ioc); 4466 mpt2sas_base_free_resources(ioc); 4467 _base_release_memory_pools(ioc); 4468 pci_set_drvdata(ioc->pdev, NULL); 4469 kfree(ioc->cpu_msix_table); 4470 if (ioc->is_warpdrive) 4471 kfree(ioc->reply_post_host_index); 4472 kfree(ioc->pd_handles); 4473 kfree(ioc->blocking_handles); 4474 kfree(ioc->pfacts); 4475 kfree(ioc->ctl_cmds.reply); 4476 kfree(ioc->ctl_cmds.sense); 4477 kfree(ioc->base_cmds.reply); 4478 kfree(ioc->port_enable_cmds.reply); 4479 kfree(ioc->tm_cmds.reply); 4480 kfree(ioc->transport_cmds.reply); 4481 kfree(ioc->scsih_cmds.reply); 4482 kfree(ioc->config_cmds.reply); 4483} 4484 4485/** 4486 * _base_reset_handler - reset callback handler (for base) 4487 * @ioc: per adapter object 4488 * @reset_phase: phase 4489 * 4490 * The handler for doing any required cleanup or initialization. 4491 * 4492 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 4493 * MPT2_IOC_DONE_RESET 4494 * 4495 * Return nothing. 4496 */ 4497static void 4498_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 4499{ 4500 mpt2sas_scsih_reset_handler(ioc, reset_phase); 4501 mpt2sas_ctl_reset_handler(ioc, reset_phase); 4502 switch (reset_phase) { 4503 case MPT2_IOC_PRE_RESET: 4504 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 4505 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 4506 break; 4507 case MPT2_IOC_AFTER_RESET: 4508 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 4509 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 4510 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 4511 ioc->transport_cmds.status |= MPT2_CMD_RESET; 4512 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 4513 complete(&ioc->transport_cmds.done); 4514 } 4515 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 4516 ioc->base_cmds.status |= MPT2_CMD_RESET; 4517 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 4518 complete(&ioc->base_cmds.done); 4519 } 4520 if (ioc->port_enable_cmds.status & MPT2_CMD_PENDING) { 4521 ioc->port_enable_failed = 1; 4522 ioc->port_enable_cmds.status |= MPT2_CMD_RESET; 4523 mpt2sas_base_free_smid(ioc, ioc->port_enable_cmds.smid); 4524 if (ioc->is_driver_loading) { 4525 ioc->start_scan_failed = 4526 MPI2_IOCSTATUS_INTERNAL_ERROR; 4527 ioc->start_scan = 0; 4528 ioc->port_enable_cmds.status = 4529 MPT2_CMD_NOT_USED; 4530 } else 4531 complete(&ioc->port_enable_cmds.done); 4532 4533 } 4534 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 4535 ioc->config_cmds.status |= MPT2_CMD_RESET; 4536 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 4537 ioc->config_cmds.smid = USHRT_MAX; 4538 complete(&ioc->config_cmds.done); 4539 } 4540 break; 4541 case MPT2_IOC_DONE_RESET: 4542 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " 4543 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 4544 break; 4545 } 4546} 4547 4548/** 4549 * _wait_for_commands_to_complete - reset controller 4550 * @ioc: Pointer to MPT_ADAPTER structure 4551 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4552 * 4553 * This function waiting(3s) for all pending commands to complete 4554 * prior to putting controller in reset. 4555 */ 4556static void 4557_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 4558{ 4559 u32 ioc_state; 4560 unsigned long flags; 4561 u16 i; 4562 4563 ioc->pending_io_count = 0; 4564 if (sleep_flag != CAN_SLEEP) 4565 return; 4566 4567 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 4568 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 4569 return; 4570 4571 /* pending command count */ 4572 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 4573 for (i = 0; i < ioc->scsiio_depth; i++) 4574 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 4575 ioc->pending_io_count++; 4576 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 4577 4578 if (!ioc->pending_io_count) 4579 return; 4580 4581 /* wait for pending commands to complete */ 4582 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ); 4583} 4584 4585/** 4586 * mpt2sas_base_hard_reset_handler - reset controller 4587 * @ioc: Pointer to MPT_ADAPTER structure 4588 * @sleep_flag: CAN_SLEEP or NO_SLEEP 4589 * @type: FORCE_BIG_HAMMER or SOFT_RESET 4590 * 4591 * Returns 0 for success, non-zero for failure. 4592 */ 4593int 4594mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 4595 enum reset_type type) 4596{ 4597 int r; 4598 unsigned long flags; 4599 4600 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name, 4601 __func__)); 4602 4603 if (ioc->pci_error_recovery) { 4604 printk(MPT2SAS_ERR_FMT "%s: pci error recovery reset\n", 4605 ioc->name, __func__); 4606 r = 0; 4607 goto out_unlocked; 4608 } 4609 4610 if (mpt2sas_fwfault_debug) 4611 mpt2sas_halt_firmware(ioc); 4612 4613 /* TODO - What we really should be doing is pulling 4614 * out all the code associated with NO_SLEEP; its never used. 4615 * That is legacy code from mpt fusion driver, ported over. 4616 * I will leave this BUG_ON here for now till its been resolved. 4617 */ 4618 BUG_ON(sleep_flag == NO_SLEEP); 4619 4620 /* wait for an active reset in progress to complete */ 4621 if (!mutex_trylock(&ioc->reset_in_progress_mutex)) { 4622 do { 4623 ssleep(1); 4624 } while (ioc->shost_recovery == 1); 4625 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name, 4626 __func__)); 4627 return ioc->ioc_reset_in_progress_status; 4628 } 4629 4630 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 4631 ioc->shost_recovery = 1; 4632 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 4633 4634 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 4635 _wait_for_commands_to_complete(ioc, sleep_flag); 4636 _base_mask_interrupts(ioc); 4637 r = _base_make_ioc_ready(ioc, sleep_flag, type); 4638 if (r) 4639 goto out; 4640 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 4641 4642 /* If this hard reset is called while port enable is active, then 4643 * there is no reason to call make_ioc_operational 4644 */ 4645 if (ioc->is_driver_loading && ioc->port_enable_failed) { 4646 ioc->remove_host = 1; 4647 r = -EFAULT; 4648 goto out; 4649 } 4650 r = _base_make_ioc_operational(ioc, sleep_flag); 4651 if (!r) 4652 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 4653 out: 4654 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: %s\n", 4655 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 4656 4657 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 4658 ioc->ioc_reset_in_progress_status = r; 4659 ioc->shost_recovery = 0; 4660 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 4661 mutex_unlock(&ioc->reset_in_progress_mutex); 4662 4663 out_unlocked: 4664 dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: exit\n", ioc->name, 4665 __func__)); 4666 return r; 4667} 4668