mpt2sas_base.c revision ef7c80c1f18f2c5eea2dabd214f12e0c93ac29cf
1/* 2 * This is the Fusion MPT base driver providing common API layer interface 3 * for access to MPT (Message Passing Technology) firmware. 4 * 5 * This code is based on drivers/scsi/mpt2sas/mpt2_base.c 6 * Copyright (C) 2007-2010 LSI Corporation 7 * (mailto:DL-MPTFusionLinux@lsi.com) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 2 12 * of the License, or (at your option) any later version. 13 * 14 * This program is distributed in the hope that it will be useful, 15 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * GNU General Public License for more details. 18 * 19 * NO WARRANTY 20 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 21 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 22 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 23 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 24 * solely responsible for determining the appropriateness of using and 25 * distributing the Program and assumes all risks associated with its 26 * exercise of rights under this Agreement, including but not limited to 27 * the risks and costs of program errors, damage to or loss of data, 28 * programs or equipment, and unavailability or interruption of operations. 29 30 * DISCLAIMER OF LIABILITY 31 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 32 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 34 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 35 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 36 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 37 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 38 39 * You should have received a copy of the GNU General Public License 40 * along with this program; if not, write to the Free Software 41 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 42 * USA. 43 */ 44 45#include <linux/version.h> 46#include <linux/kernel.h> 47#include <linux/module.h> 48#include <linux/errno.h> 49#include <linux/init.h> 50#include <linux/slab.h> 51#include <linux/types.h> 52#include <linux/pci.h> 53#include <linux/kdev_t.h> 54#include <linux/blkdev.h> 55#include <linux/delay.h> 56#include <linux/interrupt.h> 57#include <linux/dma-mapping.h> 58#include <linux/sort.h> 59#include <linux/io.h> 60#include <linux/time.h> 61#include <linux/aer.h> 62 63#include "mpt2sas_base.h" 64 65static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS]; 66 67#define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */ 68#define MPT2SAS_MAX_REQUEST_QUEUE 600 /* maximum controller queue depth */ 69 70static int max_queue_depth = -1; 71module_param(max_queue_depth, int, 0); 72MODULE_PARM_DESC(max_queue_depth, " max controller queue depth "); 73 74static int max_sgl_entries = -1; 75module_param(max_sgl_entries, int, 0); 76MODULE_PARM_DESC(max_sgl_entries, " max sg entries "); 77 78static int msix_disable = -1; 79module_param(msix_disable, int, 0); 80MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)"); 81 82/* diag_buffer_enable is bitwise 83 * bit 0 set = TRACE 84 * bit 1 set = SNAPSHOT 85 * bit 2 set = EXTENDED 86 * 87 * Either bit can be set, or both 88 */ 89static int diag_buffer_enable; 90module_param(diag_buffer_enable, int, 0); 91MODULE_PARM_DESC(diag_buffer_enable, " post diag buffers " 92 "(TRACE=1/SNAPSHOT=2/EXTENDED=4/default=0)"); 93 94int mpt2sas_fwfault_debug; 95MODULE_PARM_DESC(mpt2sas_fwfault_debug, " enable detection of firmware fault " 96 "and halt firmware - (default=0)"); 97 98/** 99 * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug. 100 * 101 */ 102static int 103_scsih_set_fwfault_debug(const char *val, struct kernel_param *kp) 104{ 105 int ret = param_set_int(val, kp); 106 struct MPT2SAS_ADAPTER *ioc; 107 108 if (ret) 109 return ret; 110 111 printk(KERN_INFO "setting fwfault_debug(%d)\n", mpt2sas_fwfault_debug); 112 list_for_each_entry(ioc, &mpt2sas_ioc_list, list) 113 ioc->fwfault_debug = mpt2sas_fwfault_debug; 114 return 0; 115} 116module_param_call(mpt2sas_fwfault_debug, _scsih_set_fwfault_debug, 117 param_get_int, &mpt2sas_fwfault_debug, 0644); 118 119/** 120 * _base_fault_reset_work - workq handling ioc fault conditions 121 * @work: input argument, used to derive ioc 122 * Context: sleep. 123 * 124 * Return nothing. 125 */ 126static void 127_base_fault_reset_work(struct work_struct *work) 128{ 129 struct MPT2SAS_ADAPTER *ioc = 130 container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work); 131 unsigned long flags; 132 u32 doorbell; 133 int rc; 134 135 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 136 if (ioc->shost_recovery) 137 goto rearm_timer; 138 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 139 140 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 141 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 142 rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 143 FORCE_BIG_HAMMER); 144 printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name, 145 __func__, (rc == 0) ? "success" : "failed"); 146 doorbell = mpt2sas_base_get_iocstate(ioc, 0); 147 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 148 mpt2sas_base_fault_info(ioc, doorbell & 149 MPI2_DOORBELL_DATA_MASK); 150 } 151 152 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 153 rearm_timer: 154 if (ioc->fault_reset_work_q) 155 queue_delayed_work(ioc->fault_reset_work_q, 156 &ioc->fault_reset_work, 157 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 158 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 159} 160 161/** 162 * mpt2sas_base_start_watchdog - start the fault_reset_work_q 163 * @ioc: per adapter object 164 * Context: sleep. 165 * 166 * Return nothing. 167 */ 168void 169mpt2sas_base_start_watchdog(struct MPT2SAS_ADAPTER *ioc) 170{ 171 unsigned long flags; 172 173 if (ioc->fault_reset_work_q) 174 return; 175 176 /* initialize fault polling */ 177 INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work); 178 snprintf(ioc->fault_reset_work_q_name, 179 sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id); 180 ioc->fault_reset_work_q = 181 create_singlethread_workqueue(ioc->fault_reset_work_q_name); 182 if (!ioc->fault_reset_work_q) { 183 printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n", 184 ioc->name, __func__, __LINE__); 185 return; 186 } 187 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 188 if (ioc->fault_reset_work_q) 189 queue_delayed_work(ioc->fault_reset_work_q, 190 &ioc->fault_reset_work, 191 msecs_to_jiffies(FAULT_POLLING_INTERVAL)); 192 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 193} 194 195/** 196 * mpt2sas_base_stop_watchdog - stop the fault_reset_work_q 197 * @ioc: per adapter object 198 * Context: sleep. 199 * 200 * Return nothing. 201 */ 202void 203mpt2sas_base_stop_watchdog(struct MPT2SAS_ADAPTER *ioc) 204{ 205 unsigned long flags; 206 struct workqueue_struct *wq; 207 208 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 209 wq = ioc->fault_reset_work_q; 210 ioc->fault_reset_work_q = NULL; 211 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 212 if (wq) { 213 if (!cancel_delayed_work(&ioc->fault_reset_work)) 214 flush_workqueue(wq); 215 destroy_workqueue(wq); 216 } 217} 218 219/** 220 * mpt2sas_base_fault_info - verbose translation of firmware FAULT code 221 * @ioc: per adapter object 222 * @fault_code: fault code 223 * 224 * Return nothing. 225 */ 226void 227mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code) 228{ 229 printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n", 230 ioc->name, fault_code); 231} 232 233/** 234 * mpt2sas_halt_firmware - halt's mpt controller firmware 235 * @ioc: per adapter object 236 * 237 * For debugging timeout related issues. Writing 0xCOFFEE00 238 * to the doorbell register will halt controller firmware. With 239 * the purpose to stop both driver and firmware, the enduser can 240 * obtain a ring buffer from controller UART. 241 */ 242void 243mpt2sas_halt_firmware(struct MPT2SAS_ADAPTER *ioc) 244{ 245 u32 doorbell; 246 247 if (!ioc->fwfault_debug) 248 return; 249 250 dump_stack(); 251 252 doorbell = readl(&ioc->chip->Doorbell); 253 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) 254 mpt2sas_base_fault_info(ioc , doorbell); 255 else { 256 writel(0xC0FFEE00, &ioc->chip->Doorbell); 257 printk(MPT2SAS_ERR_FMT "Firmware is halted due to command " 258 "timeout\n", ioc->name); 259 } 260 261 panic("panic in %s\n", __func__); 262} 263 264#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 265/** 266 * _base_sas_ioc_info - verbose translation of the ioc status 267 * @ioc: per adapter object 268 * @mpi_reply: reply mf payload returned from firmware 269 * @request_hdr: request mf 270 * 271 * Return nothing. 272 */ 273static void 274_base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply, 275 MPI2RequestHeader_t *request_hdr) 276{ 277 u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & 278 MPI2_IOCSTATUS_MASK; 279 char *desc = NULL; 280 u16 frame_sz; 281 char *func_str = NULL; 282 283 /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */ 284 if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST || 285 request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH || 286 request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION) 287 return; 288 289 if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE) 290 return; 291 292 switch (ioc_status) { 293 294/**************************************************************************** 295* Common IOCStatus values for all replies 296****************************************************************************/ 297 298 case MPI2_IOCSTATUS_INVALID_FUNCTION: 299 desc = "invalid function"; 300 break; 301 case MPI2_IOCSTATUS_BUSY: 302 desc = "busy"; 303 break; 304 case MPI2_IOCSTATUS_INVALID_SGL: 305 desc = "invalid sgl"; 306 break; 307 case MPI2_IOCSTATUS_INTERNAL_ERROR: 308 desc = "internal error"; 309 break; 310 case MPI2_IOCSTATUS_INVALID_VPID: 311 desc = "invalid vpid"; 312 break; 313 case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES: 314 desc = "insufficient resources"; 315 break; 316 case MPI2_IOCSTATUS_INVALID_FIELD: 317 desc = "invalid field"; 318 break; 319 case MPI2_IOCSTATUS_INVALID_STATE: 320 desc = "invalid state"; 321 break; 322 case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED: 323 desc = "op state not supported"; 324 break; 325 326/**************************************************************************** 327* Config IOCStatus values 328****************************************************************************/ 329 330 case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION: 331 desc = "config invalid action"; 332 break; 333 case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE: 334 desc = "config invalid type"; 335 break; 336 case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE: 337 desc = "config invalid page"; 338 break; 339 case MPI2_IOCSTATUS_CONFIG_INVALID_DATA: 340 desc = "config invalid data"; 341 break; 342 case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS: 343 desc = "config no defaults"; 344 break; 345 case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT: 346 desc = "config cant commit"; 347 break; 348 349/**************************************************************************** 350* SCSI IO Reply 351****************************************************************************/ 352 353 case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR: 354 case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE: 355 case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE: 356 case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN: 357 case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN: 358 case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR: 359 case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR: 360 case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED: 361 case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH: 362 case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED: 363 case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED: 364 case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED: 365 break; 366 367/**************************************************************************** 368* For use by SCSI Initiator and SCSI Target end-to-end data protection 369****************************************************************************/ 370 371 case MPI2_IOCSTATUS_EEDP_GUARD_ERROR: 372 desc = "eedp guard error"; 373 break; 374 case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR: 375 desc = "eedp ref tag error"; 376 break; 377 case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR: 378 desc = "eedp app tag error"; 379 break; 380 381/**************************************************************************** 382* SCSI Target values 383****************************************************************************/ 384 385 case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX: 386 desc = "target invalid io index"; 387 break; 388 case MPI2_IOCSTATUS_TARGET_ABORTED: 389 desc = "target aborted"; 390 break; 391 case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE: 392 desc = "target no conn retryable"; 393 break; 394 case MPI2_IOCSTATUS_TARGET_NO_CONNECTION: 395 desc = "target no connection"; 396 break; 397 case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH: 398 desc = "target xfer count mismatch"; 399 break; 400 case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR: 401 desc = "target data offset error"; 402 break; 403 case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA: 404 desc = "target too much write data"; 405 break; 406 case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT: 407 desc = "target iu too short"; 408 break; 409 case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT: 410 desc = "target ack nak timeout"; 411 break; 412 case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED: 413 desc = "target nak received"; 414 break; 415 416/**************************************************************************** 417* Serial Attached SCSI values 418****************************************************************************/ 419 420 case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED: 421 desc = "smp request failed"; 422 break; 423 case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN: 424 desc = "smp data overrun"; 425 break; 426 427/**************************************************************************** 428* Diagnostic Buffer Post / Diagnostic Release values 429****************************************************************************/ 430 431 case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED: 432 desc = "diagnostic released"; 433 break; 434 default: 435 break; 436 } 437 438 if (!desc) 439 return; 440 441 switch (request_hdr->Function) { 442 case MPI2_FUNCTION_CONFIG: 443 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size; 444 func_str = "config_page"; 445 break; 446 case MPI2_FUNCTION_SCSI_TASK_MGMT: 447 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t); 448 func_str = "task_mgmt"; 449 break; 450 case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL: 451 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t); 452 func_str = "sas_iounit_ctl"; 453 break; 454 case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR: 455 frame_sz = sizeof(Mpi2SepRequest_t); 456 func_str = "enclosure"; 457 break; 458 case MPI2_FUNCTION_IOC_INIT: 459 frame_sz = sizeof(Mpi2IOCInitRequest_t); 460 func_str = "ioc_init"; 461 break; 462 case MPI2_FUNCTION_PORT_ENABLE: 463 frame_sz = sizeof(Mpi2PortEnableRequest_t); 464 func_str = "port_enable"; 465 break; 466 case MPI2_FUNCTION_SMP_PASSTHROUGH: 467 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size; 468 func_str = "smp_passthru"; 469 break; 470 default: 471 frame_sz = 32; 472 func_str = "unknown"; 473 break; 474 } 475 476 printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p)," 477 " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str); 478 479 _debug_dump_mf(request_hdr, frame_sz/4); 480} 481 482/** 483 * _base_display_event_data - verbose translation of firmware asyn events 484 * @ioc: per adapter object 485 * @mpi_reply: reply mf payload returned from firmware 486 * 487 * Return nothing. 488 */ 489static void 490_base_display_event_data(struct MPT2SAS_ADAPTER *ioc, 491 Mpi2EventNotificationReply_t *mpi_reply) 492{ 493 char *desc = NULL; 494 u16 event; 495 496 if (!(ioc->logging_level & MPT_DEBUG_EVENTS)) 497 return; 498 499 event = le16_to_cpu(mpi_reply->Event); 500 501 switch (event) { 502 case MPI2_EVENT_LOG_DATA: 503 desc = "Log Data"; 504 break; 505 case MPI2_EVENT_STATE_CHANGE: 506 desc = "Status Change"; 507 break; 508 case MPI2_EVENT_HARD_RESET_RECEIVED: 509 desc = "Hard Reset Received"; 510 break; 511 case MPI2_EVENT_EVENT_CHANGE: 512 desc = "Event Change"; 513 break; 514 case MPI2_EVENT_TASK_SET_FULL: 515 desc = "Task Set Full"; 516 break; 517 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 518 desc = "Device Status Change"; 519 break; 520 case MPI2_EVENT_IR_OPERATION_STATUS: 521 desc = "IR Operation Status"; 522 break; 523 case MPI2_EVENT_SAS_DISCOVERY: 524 { 525 Mpi2EventDataSasDiscovery_t *event_data = 526 (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData; 527 printk(MPT2SAS_INFO_FMT "Discovery: (%s)", ioc->name, 528 (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ? 529 "start" : "stop"); 530 if (event_data->DiscoveryStatus) 531 printk("discovery_status(0x%08x)", 532 le32_to_cpu(event_data->DiscoveryStatus)); 533 printk("\n"); 534 return; 535 } 536 case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE: 537 desc = "SAS Broadcast Primitive"; 538 break; 539 case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE: 540 desc = "SAS Init Device Status Change"; 541 break; 542 case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW: 543 desc = "SAS Init Table Overflow"; 544 break; 545 case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST: 546 desc = "SAS Topology Change List"; 547 break; 548 case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE: 549 desc = "SAS Enclosure Device Status Change"; 550 break; 551 case MPI2_EVENT_IR_VOLUME: 552 desc = "IR Volume"; 553 break; 554 case MPI2_EVENT_IR_PHYSICAL_DISK: 555 desc = "IR Physical Disk"; 556 break; 557 case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST: 558 desc = "IR Configuration Change List"; 559 break; 560 case MPI2_EVENT_LOG_ENTRY_ADDED: 561 desc = "Log Entry Added"; 562 break; 563 } 564 565 if (!desc) 566 return; 567 568 printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc); 569} 570#endif 571 572/** 573 * _base_sas_log_info - verbose translation of firmware log info 574 * @ioc: per adapter object 575 * @log_info: log info 576 * 577 * Return nothing. 578 */ 579static void 580_base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info) 581{ 582 union loginfo_type { 583 u32 loginfo; 584 struct { 585 u32 subcode:16; 586 u32 code:8; 587 u32 originator:4; 588 u32 bus_type:4; 589 } dw; 590 }; 591 union loginfo_type sas_loginfo; 592 char *originator_str = NULL; 593 594 sas_loginfo.loginfo = log_info; 595 if (sas_loginfo.dw.bus_type != 3 /*SAS*/) 596 return; 597 598 /* each nexus loss loginfo */ 599 if (log_info == 0x31170000) 600 return; 601 602 /* eat the loginfos associated with task aborts */ 603 if (ioc->ignore_loginfos && (log_info == 30050000 || log_info == 604 0x31140000 || log_info == 0x31130000)) 605 return; 606 607 switch (sas_loginfo.dw.originator) { 608 case 0: 609 originator_str = "IOP"; 610 break; 611 case 1: 612 originator_str = "PL"; 613 break; 614 case 2: 615 originator_str = "IR"; 616 break; 617 } 618 619 printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), " 620 "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info, 621 originator_str, sas_loginfo.dw.code, 622 sas_loginfo.dw.subcode); 623} 624 625/** 626 * _base_display_reply_info - 627 * @ioc: per adapter object 628 * @smid: system request message index 629 * @msix_index: MSIX table index supplied by the OS 630 * @reply: reply message frame(lower 32bit addr) 631 * 632 * Return nothing. 633 */ 634static void 635_base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 636 u32 reply) 637{ 638 MPI2DefaultReply_t *mpi_reply; 639 u16 ioc_status; 640 641 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 642 ioc_status = le16_to_cpu(mpi_reply->IOCStatus); 643#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 644 if ((ioc_status & MPI2_IOCSTATUS_MASK) && 645 (ioc->logging_level & MPT_DEBUG_REPLY)) { 646 _base_sas_ioc_info(ioc , mpi_reply, 647 mpt2sas_base_get_msg_frame(ioc, smid)); 648 } 649#endif 650 if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) 651 _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo)); 652} 653 654/** 655 * mpt2sas_base_done - base internal command completion routine 656 * @ioc: per adapter object 657 * @smid: system request message index 658 * @msix_index: MSIX table index supplied by the OS 659 * @reply: reply message frame(lower 32bit addr) 660 * 661 * Return 1 meaning mf should be freed from _base_interrupt 662 * 0 means the mf is freed from this function. 663 */ 664u8 665mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 666 u32 reply) 667{ 668 MPI2DefaultReply_t *mpi_reply; 669 670 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 671 if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK) 672 return 1; 673 674 if (ioc->base_cmds.status == MPT2_CMD_NOT_USED) 675 return 1; 676 677 ioc->base_cmds.status |= MPT2_CMD_COMPLETE; 678 if (mpi_reply) { 679 ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID; 680 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4); 681 } 682 ioc->base_cmds.status &= ~MPT2_CMD_PENDING; 683 complete(&ioc->base_cmds.done); 684 return 1; 685} 686 687/** 688 * _base_async_event - main callback handler for firmware asyn events 689 * @ioc: per adapter object 690 * @msix_index: MSIX table index supplied by the OS 691 * @reply: reply message frame(lower 32bit addr) 692 * 693 * Return 1 meaning mf should be freed from _base_interrupt 694 * 0 means the mf is freed from this function. 695 */ 696static u8 697_base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 msix_index, u32 reply) 698{ 699 Mpi2EventNotificationReply_t *mpi_reply; 700 Mpi2EventAckRequest_t *ack_request; 701 u16 smid; 702 703 mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); 704 if (!mpi_reply) 705 return 1; 706 if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION) 707 return 1; 708#ifdef CONFIG_SCSI_MPT2SAS_LOGGING 709 _base_display_event_data(ioc, mpi_reply); 710#endif 711 if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED)) 712 goto out; 713 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 714 if (!smid) { 715 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 716 ioc->name, __func__); 717 goto out; 718 } 719 720 ack_request = mpt2sas_base_get_msg_frame(ioc, smid); 721 memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t)); 722 ack_request->Function = MPI2_FUNCTION_EVENT_ACK; 723 ack_request->Event = mpi_reply->Event; 724 ack_request->EventContext = mpi_reply->EventContext; 725 ack_request->VF_ID = 0; /* TODO */ 726 ack_request->VP_ID = 0; 727 mpt2sas_base_put_smid_default(ioc, smid); 728 729 out: 730 731 /* scsih callback handler */ 732 mpt2sas_scsih_event_callback(ioc, msix_index, reply); 733 734 /* ctl callback handler */ 735 mpt2sas_ctl_event_callback(ioc, msix_index, reply); 736 737 return 1; 738} 739 740/** 741 * _base_get_cb_idx - obtain the callback index 742 * @ioc: per adapter object 743 * @smid: system request message index 744 * 745 * Return callback index. 746 */ 747static u8 748_base_get_cb_idx(struct MPT2SAS_ADAPTER *ioc, u16 smid) 749{ 750 int i; 751 u8 cb_idx = 0xFF; 752 753 if (smid >= ioc->hi_priority_smid) { 754 if (smid < ioc->internal_smid) { 755 i = smid - ioc->hi_priority_smid; 756 cb_idx = ioc->hpr_lookup[i].cb_idx; 757 } else { 758 i = smid - ioc->internal_smid; 759 cb_idx = ioc->internal_lookup[i].cb_idx; 760 } 761 } else { 762 i = smid - 1; 763 cb_idx = ioc->scsi_lookup[i].cb_idx; 764 } 765 return cb_idx; 766} 767 768/** 769 * _base_mask_interrupts - disable interrupts 770 * @ioc: per adapter object 771 * 772 * Disabling ResetIRQ, Reply and Doorbell Interrupts 773 * 774 * Return nothing. 775 */ 776static void 777_base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc) 778{ 779 u32 him_register; 780 781 ioc->mask_interrupts = 1; 782 him_register = readl(&ioc->chip->HostInterruptMask); 783 him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK; 784 writel(him_register, &ioc->chip->HostInterruptMask); 785 readl(&ioc->chip->HostInterruptMask); 786} 787 788/** 789 * _base_unmask_interrupts - enable interrupts 790 * @ioc: per adapter object 791 * 792 * Enabling only Reply Interrupts 793 * 794 * Return nothing. 795 */ 796static void 797_base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc) 798{ 799 u32 him_register; 800 801 him_register = readl(&ioc->chip->HostInterruptMask); 802 him_register &= ~MPI2_HIM_RIM; 803 writel(him_register, &ioc->chip->HostInterruptMask); 804 ioc->mask_interrupts = 0; 805} 806 807union reply_descriptor { 808 u64 word; 809 struct { 810 u32 low; 811 u32 high; 812 } u; 813}; 814 815/** 816 * _base_interrupt - MPT adapter (IOC) specific interrupt handler. 817 * @irq: irq number (not used) 818 * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure 819 * @r: pt_regs pointer (not used) 820 * 821 * Return IRQ_HANDLE if processed, else IRQ_NONE. 822 */ 823static irqreturn_t 824_base_interrupt(int irq, void *bus_id) 825{ 826 union reply_descriptor rd; 827 u32 completed_cmds; 828 u8 request_desript_type; 829 u16 smid; 830 u8 cb_idx; 831 u32 reply; 832 u8 msix_index; 833 struct MPT2SAS_ADAPTER *ioc = bus_id; 834 Mpi2ReplyDescriptorsUnion_t *rpf; 835 u8 rc; 836 837 if (ioc->mask_interrupts) 838 return IRQ_NONE; 839 840 rpf = &ioc->reply_post_free[ioc->reply_post_host_index]; 841 request_desript_type = rpf->Default.ReplyFlags 842 & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 843 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 844 return IRQ_NONE; 845 846 completed_cmds = 0; 847 do { 848 rd.word = rpf->Words; 849 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX) 850 goto out; 851 reply = 0; 852 cb_idx = 0xFF; 853 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1); 854 msix_index = rpf->Default.MSIxIndex; 855 if (request_desript_type == 856 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) { 857 reply = le32_to_cpu 858 (rpf->AddressReply.ReplyFrameAddress); 859 } else if (request_desript_type == 860 MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER) 861 goto next; 862 else if (request_desript_type == 863 MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS) 864 goto next; 865 if (smid) 866 cb_idx = _base_get_cb_idx(ioc, smid); 867 if (smid && cb_idx != 0xFF) { 868 rc = mpt_callbacks[cb_idx](ioc, smid, msix_index, 869 reply); 870 if (reply) 871 _base_display_reply_info(ioc, smid, msix_index, 872 reply); 873 if (rc) 874 mpt2sas_base_free_smid(ioc, smid); 875 } 876 if (!smid) 877 _base_async_event(ioc, msix_index, reply); 878 879 /* reply free queue handling */ 880 if (reply) { 881 ioc->reply_free_host_index = 882 (ioc->reply_free_host_index == 883 (ioc->reply_free_queue_depth - 1)) ? 884 0 : ioc->reply_free_host_index + 1; 885 ioc->reply_free[ioc->reply_free_host_index] = 886 cpu_to_le32(reply); 887 wmb(); 888 writel(ioc->reply_free_host_index, 889 &ioc->chip->ReplyFreeHostIndex); 890 } 891 892 next: 893 894 rpf->Words = ULLONG_MAX; 895 ioc->reply_post_host_index = (ioc->reply_post_host_index == 896 (ioc->reply_post_queue_depth - 1)) ? 0 : 897 ioc->reply_post_host_index + 1; 898 request_desript_type = 899 ioc->reply_post_free[ioc->reply_post_host_index].Default. 900 ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK; 901 completed_cmds++; 902 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) 903 goto out; 904 if (!ioc->reply_post_host_index) 905 rpf = ioc->reply_post_free; 906 else 907 rpf++; 908 } while (1); 909 910 out: 911 912 if (!completed_cmds) 913 return IRQ_NONE; 914 915 wmb(); 916 writel(ioc->reply_post_host_index, &ioc->chip->ReplyPostHostIndex); 917 return IRQ_HANDLED; 918} 919 920/** 921 * mpt2sas_base_release_callback_handler - clear interupt callback handler 922 * @cb_idx: callback index 923 * 924 * Return nothing. 925 */ 926void 927mpt2sas_base_release_callback_handler(u8 cb_idx) 928{ 929 mpt_callbacks[cb_idx] = NULL; 930} 931 932/** 933 * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler 934 * @cb_func: callback function 935 * 936 * Returns cb_func. 937 */ 938u8 939mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func) 940{ 941 u8 cb_idx; 942 943 for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--) 944 if (mpt_callbacks[cb_idx] == NULL) 945 break; 946 947 mpt_callbacks[cb_idx] = cb_func; 948 return cb_idx; 949} 950 951/** 952 * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler 953 * 954 * Return nothing. 955 */ 956void 957mpt2sas_base_initialize_callback_handler(void) 958{ 959 u8 cb_idx; 960 961 for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++) 962 mpt2sas_base_release_callback_handler(cb_idx); 963} 964 965/** 966 * mpt2sas_base_build_zero_len_sge - build zero length sg entry 967 * @ioc: per adapter object 968 * @paddr: virtual address for SGE 969 * 970 * Create a zero length scatter gather entry to insure the IOCs hardware has 971 * something to use if the target device goes brain dead and tries 972 * to send data even when none is asked for. 973 * 974 * Return nothing. 975 */ 976void 977mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr) 978{ 979 u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT | 980 MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST | 981 MPI2_SGE_FLAGS_SIMPLE_ELEMENT) << 982 MPI2_SGE_FLAGS_SHIFT); 983 ioc->base_add_sg_single(paddr, flags_length, -1); 984} 985 986/** 987 * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr. 988 * @paddr: virtual address for SGE 989 * @flags_length: SGE flags and data transfer length 990 * @dma_addr: Physical address 991 * 992 * Return nothing. 993 */ 994static void 995_base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr) 996{ 997 Mpi2SGESimple32_t *sgel = paddr; 998 999 flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING | 1000 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1001 sgel->FlagsLength = cpu_to_le32(flags_length); 1002 sgel->Address = cpu_to_le32(dma_addr); 1003} 1004 1005 1006/** 1007 * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr. 1008 * @paddr: virtual address for SGE 1009 * @flags_length: SGE flags and data transfer length 1010 * @dma_addr: Physical address 1011 * 1012 * Return nothing. 1013 */ 1014static void 1015_base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr) 1016{ 1017 Mpi2SGESimple64_t *sgel = paddr; 1018 1019 flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING | 1020 MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT; 1021 sgel->FlagsLength = cpu_to_le32(flags_length); 1022 sgel->Address = cpu_to_le64(dma_addr); 1023} 1024 1025#define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10)) 1026 1027/** 1028 * _base_config_dma_addressing - set dma addressing 1029 * @ioc: per adapter object 1030 * @pdev: PCI device struct 1031 * 1032 * Returns 0 for success, non-zero for failure. 1033 */ 1034static int 1035_base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev) 1036{ 1037 struct sysinfo s; 1038 char *desc = NULL; 1039 1040 if (sizeof(dma_addr_t) > 4) { 1041 const uint64_t required_mask = 1042 dma_get_required_mask(&pdev->dev); 1043 if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev, 1044 DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev, 1045 DMA_BIT_MASK(64))) { 1046 ioc->base_add_sg_single = &_base_add_sg_single_64; 1047 ioc->sge_size = sizeof(Mpi2SGESimple64_t); 1048 desc = "64"; 1049 goto out; 1050 } 1051 } 1052 1053 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) 1054 && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) { 1055 ioc->base_add_sg_single = &_base_add_sg_single_32; 1056 ioc->sge_size = sizeof(Mpi2SGESimple32_t); 1057 desc = "32"; 1058 } else 1059 return -ENODEV; 1060 1061 out: 1062 si_meminfo(&s); 1063 printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, " 1064 "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram)); 1065 1066 return 0; 1067} 1068 1069/** 1070 * _base_save_msix_table - backup msix vector table 1071 * @ioc: per adapter object 1072 * 1073 * This address an errata where diag reset clears out the table 1074 */ 1075static void 1076_base_save_msix_table(struct MPT2SAS_ADAPTER *ioc) 1077{ 1078 int i; 1079 1080 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1081 return; 1082 1083 for (i = 0; i < ioc->msix_vector_count; i++) 1084 ioc->msix_table_backup[i] = ioc->msix_table[i]; 1085} 1086 1087/** 1088 * _base_restore_msix_table - this restores the msix vector table 1089 * @ioc: per adapter object 1090 * 1091 */ 1092static void 1093_base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc) 1094{ 1095 int i; 1096 1097 if (!ioc->msix_enable || ioc->msix_table_backup == NULL) 1098 return; 1099 1100 for (i = 0; i < ioc->msix_vector_count; i++) 1101 ioc->msix_table[i] = ioc->msix_table_backup[i]; 1102} 1103 1104/** 1105 * _base_check_enable_msix - checks MSIX capabable. 1106 * @ioc: per adapter object 1107 * 1108 * Check to see if card is capable of MSIX, and set number 1109 * of avaliable msix vectors 1110 */ 1111static int 1112_base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1113{ 1114 int base; 1115 u16 message_control; 1116 u32 msix_table_offset; 1117 1118 base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX); 1119 if (!base) { 1120 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not " 1121 "supported\n", ioc->name)); 1122 return -EINVAL; 1123 } 1124 1125 /* get msix vector count */ 1126 pci_read_config_word(ioc->pdev, base + 2, &message_control); 1127 ioc->msix_vector_count = (message_control & 0x3FF) + 1; 1128 1129 /* get msix table */ 1130 pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset); 1131 msix_table_offset &= 0xFFFFFFF8; 1132 ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset); 1133 1134 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, " 1135 "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name, 1136 ioc->msix_vector_count, msix_table_offset, ioc->msix_table)); 1137 return 0; 1138} 1139 1140/** 1141 * _base_disable_msix - disables msix 1142 * @ioc: per adapter object 1143 * 1144 */ 1145static void 1146_base_disable_msix(struct MPT2SAS_ADAPTER *ioc) 1147{ 1148 if (ioc->msix_enable) { 1149 pci_disable_msix(ioc->pdev); 1150 kfree(ioc->msix_table_backup); 1151 ioc->msix_table_backup = NULL; 1152 ioc->msix_enable = 0; 1153 } 1154} 1155 1156/** 1157 * _base_enable_msix - enables msix, failback to io_apic 1158 * @ioc: per adapter object 1159 * 1160 */ 1161static int 1162_base_enable_msix(struct MPT2SAS_ADAPTER *ioc) 1163{ 1164 struct msix_entry entries; 1165 int r; 1166 u8 try_msix = 0; 1167 1168 if (msix_disable == -1 || msix_disable == 0) 1169 try_msix = 1; 1170 1171 if (!try_msix) 1172 goto try_ioapic; 1173 1174 if (_base_check_enable_msix(ioc) != 0) 1175 goto try_ioapic; 1176 1177 ioc->msix_table_backup = kcalloc(ioc->msix_vector_count, 1178 sizeof(u32), GFP_KERNEL); 1179 if (!ioc->msix_table_backup) { 1180 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for " 1181 "msix_table_backup failed!!!\n", ioc->name)); 1182 goto try_ioapic; 1183 } 1184 1185 memset(&entries, 0, sizeof(struct msix_entry)); 1186 r = pci_enable_msix(ioc->pdev, &entries, 1); 1187 if (r) { 1188 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix " 1189 "failed (r=%d) !!!\n", ioc->name, r)); 1190 goto try_ioapic; 1191 } 1192 1193 r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED, 1194 ioc->name, ioc); 1195 if (r) { 1196 dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate " 1197 "interrupt %d !!!\n", ioc->name, entries.vector)); 1198 pci_disable_msix(ioc->pdev); 1199 goto try_ioapic; 1200 } 1201 1202 ioc->pci_irq = entries.vector; 1203 ioc->msix_enable = 1; 1204 return 0; 1205 1206/* failback to io_apic interrupt routing */ 1207 try_ioapic: 1208 1209 r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED, 1210 ioc->name, ioc); 1211 if (r) { 1212 printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n", 1213 ioc->name, ioc->pdev->irq); 1214 r = -EBUSY; 1215 goto out_fail; 1216 } 1217 1218 ioc->pci_irq = ioc->pdev->irq; 1219 return 0; 1220 1221 out_fail: 1222 return r; 1223} 1224 1225/** 1226 * mpt2sas_base_map_resources - map in controller resources (io/irq/memap) 1227 * @ioc: per adapter object 1228 * 1229 * Returns 0 for success, non-zero for failure. 1230 */ 1231int 1232mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc) 1233{ 1234 struct pci_dev *pdev = ioc->pdev; 1235 u32 memap_sz; 1236 u32 pio_sz; 1237 int i, r = 0; 1238 u64 pio_chip = 0; 1239 u64 chip_phys = 0; 1240 1241 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", 1242 ioc->name, __func__)); 1243 1244 ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM); 1245 if (pci_enable_device_mem(pdev)) { 1246 printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: " 1247 "failed\n", ioc->name); 1248 return -ENODEV; 1249 } 1250 1251 1252 if (pci_request_selected_regions(pdev, ioc->bars, 1253 MPT2SAS_DRIVER_NAME)) { 1254 printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: " 1255 "failed\n", ioc->name); 1256 r = -ENODEV; 1257 goto out_fail; 1258 } 1259 1260 /* AER (Advanced Error Reporting) hooks */ 1261 pci_enable_pcie_error_reporting(pdev); 1262 1263 pci_set_master(pdev); 1264 1265 if (_base_config_dma_addressing(ioc, pdev) != 0) { 1266 printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n", 1267 ioc->name, pci_name(pdev)); 1268 r = -ENODEV; 1269 goto out_fail; 1270 } 1271 1272 for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) { 1273 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) { 1274 if (pio_sz) 1275 continue; 1276 pio_chip = (u64)pci_resource_start(pdev, i); 1277 pio_sz = pci_resource_len(pdev, i); 1278 } else { 1279 if (memap_sz) 1280 continue; 1281 /* verify memory resource is valid before using */ 1282 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 1283 ioc->chip_phys = pci_resource_start(pdev, i); 1284 chip_phys = (u64)ioc->chip_phys; 1285 memap_sz = pci_resource_len(pdev, i); 1286 ioc->chip = ioremap(ioc->chip_phys, memap_sz); 1287 if (ioc->chip == NULL) { 1288 printk(MPT2SAS_ERR_FMT "unable to map " 1289 "adapter memory!\n", ioc->name); 1290 r = -EINVAL; 1291 goto out_fail; 1292 } 1293 } 1294 } 1295 } 1296 1297 _base_mask_interrupts(ioc); 1298 r = _base_enable_msix(ioc); 1299 if (r) 1300 goto out_fail; 1301 1302 printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n", 1303 ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" : 1304 "IO-APIC enabled"), ioc->pci_irq); 1305 printk(MPT2SAS_INFO_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n", 1306 ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz); 1307 printk(MPT2SAS_INFO_FMT "ioport(0x%016llx), size(%d)\n", 1308 ioc->name, (unsigned long long)pio_chip, pio_sz); 1309 1310 return 0; 1311 1312 out_fail: 1313 if (ioc->chip_phys) 1314 iounmap(ioc->chip); 1315 ioc->chip_phys = 0; 1316 ioc->pci_irq = -1; 1317 pci_release_selected_regions(ioc->pdev, ioc->bars); 1318 pci_disable_pcie_error_reporting(pdev); 1319 pci_disable_device(pdev); 1320 return r; 1321} 1322 1323/** 1324 * mpt2sas_base_get_msg_frame - obtain request mf pointer 1325 * @ioc: per adapter object 1326 * @smid: system request message index(smid zero is invalid) 1327 * 1328 * Returns virt pointer to message frame. 1329 */ 1330void * 1331mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1332{ 1333 return (void *)(ioc->request + (smid * ioc->request_sz)); 1334} 1335 1336/** 1337 * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request 1338 * @ioc: per adapter object 1339 * @smid: system request message index 1340 * 1341 * Returns virt pointer to sense buffer. 1342 */ 1343void * 1344mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1345{ 1346 return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1347} 1348 1349/** 1350 * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request 1351 * @ioc: per adapter object 1352 * @smid: system request message index 1353 * 1354 * Returns phys pointer to the low 32bit address of the sense buffer. 1355 */ 1356__le32 1357mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1358{ 1359 return cpu_to_le32(ioc->sense_dma + 1360 ((smid - 1) * SCSI_SENSE_BUFFERSIZE)); 1361} 1362 1363/** 1364 * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address 1365 * @ioc: per adapter object 1366 * @phys_addr: lower 32 physical addr of the reply 1367 * 1368 * Converts 32bit lower physical addr into a virt address. 1369 */ 1370void * 1371mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr) 1372{ 1373 if (!phys_addr) 1374 return NULL; 1375 return ioc->reply + (phys_addr - (u32)ioc->reply_dma); 1376} 1377 1378/** 1379 * mpt2sas_base_get_smid - obtain a free smid from internal queue 1380 * @ioc: per adapter object 1381 * @cb_idx: callback index 1382 * 1383 * Returns smid (zero is invalid) 1384 */ 1385u16 1386mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1387{ 1388 unsigned long flags; 1389 struct request_tracker *request; 1390 u16 smid; 1391 1392 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1393 if (list_empty(&ioc->internal_free_list)) { 1394 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1395 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1396 ioc->name, __func__); 1397 return 0; 1398 } 1399 1400 request = list_entry(ioc->internal_free_list.next, 1401 struct request_tracker, tracker_list); 1402 request->cb_idx = cb_idx; 1403 smid = request->smid; 1404 list_del(&request->tracker_list); 1405 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1406 return smid; 1407} 1408 1409/** 1410 * mpt2sas_base_get_smid_scsiio - obtain a free smid from scsiio queue 1411 * @ioc: per adapter object 1412 * @cb_idx: callback index 1413 * @scmd: pointer to scsi command object 1414 * 1415 * Returns smid (zero is invalid) 1416 */ 1417u16 1418mpt2sas_base_get_smid_scsiio(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx, 1419 struct scsi_cmnd *scmd) 1420{ 1421 unsigned long flags; 1422 struct request_tracker *request; 1423 u16 smid; 1424 1425 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1426 if (list_empty(&ioc->free_list)) { 1427 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1428 printk(MPT2SAS_ERR_FMT "%s: smid not available\n", 1429 ioc->name, __func__); 1430 return 0; 1431 } 1432 1433 request = list_entry(ioc->free_list.next, 1434 struct request_tracker, tracker_list); 1435 request->scmd = scmd; 1436 request->cb_idx = cb_idx; 1437 smid = request->smid; 1438 list_del(&request->tracker_list); 1439 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1440 return smid; 1441} 1442 1443/** 1444 * mpt2sas_base_get_smid_hpr - obtain a free smid from hi-priority queue 1445 * @ioc: per adapter object 1446 * @cb_idx: callback index 1447 * 1448 * Returns smid (zero is invalid) 1449 */ 1450u16 1451mpt2sas_base_get_smid_hpr(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx) 1452{ 1453 unsigned long flags; 1454 struct request_tracker *request; 1455 u16 smid; 1456 1457 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1458 if (list_empty(&ioc->hpr_free_list)) { 1459 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1460 return 0; 1461 } 1462 1463 request = list_entry(ioc->hpr_free_list.next, 1464 struct request_tracker, tracker_list); 1465 request->cb_idx = cb_idx; 1466 smid = request->smid; 1467 list_del(&request->tracker_list); 1468 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1469 return smid; 1470} 1471 1472 1473/** 1474 * mpt2sas_base_free_smid - put smid back on free_list 1475 * @ioc: per adapter object 1476 * @smid: system request message index 1477 * 1478 * Return nothing. 1479 */ 1480void 1481mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1482{ 1483 unsigned long flags; 1484 int i; 1485 1486 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 1487 if (smid >= ioc->hi_priority_smid) { 1488 if (smid < ioc->internal_smid) { 1489 /* hi-priority */ 1490 i = smid - ioc->hi_priority_smid; 1491 ioc->hpr_lookup[i].cb_idx = 0xFF; 1492 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 1493 &ioc->hpr_free_list); 1494 } else { 1495 /* internal queue */ 1496 i = smid - ioc->internal_smid; 1497 ioc->internal_lookup[i].cb_idx = 0xFF; 1498 list_add_tail(&ioc->internal_lookup[i].tracker_list, 1499 &ioc->internal_free_list); 1500 } 1501 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1502 return; 1503 } 1504 1505 /* scsiio queue */ 1506 i = smid - 1; 1507 ioc->scsi_lookup[i].cb_idx = 0xFF; 1508 ioc->scsi_lookup[i].scmd = NULL; 1509 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 1510 &ioc->free_list); 1511 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 1512 1513 /* 1514 * See _wait_for_commands_to_complete() call with regards to this code. 1515 */ 1516 if (ioc->shost_recovery && ioc->pending_io_count) { 1517 if (ioc->pending_io_count == 1) 1518 wake_up(&ioc->reset_wq); 1519 ioc->pending_io_count--; 1520 } 1521} 1522 1523/** 1524 * _base_writeq - 64 bit write to MMIO 1525 * @ioc: per adapter object 1526 * @b: data payload 1527 * @addr: address in MMIO space 1528 * @writeq_lock: spin lock 1529 * 1530 * Glue for handling an atomic 64 bit word to MMIO. This special handling takes 1531 * care of 32 bit environment where its not quarenteed to send the entire word 1532 * in one transfer. 1533 */ 1534#ifndef writeq 1535static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1536 spinlock_t *writeq_lock) 1537{ 1538 unsigned long flags; 1539 __u64 data_out = cpu_to_le64(b); 1540 1541 spin_lock_irqsave(writeq_lock, flags); 1542 writel((u32)(data_out), addr); 1543 writel((u32)(data_out >> 32), (addr + 4)); 1544 spin_unlock_irqrestore(writeq_lock, flags); 1545} 1546#else 1547static inline void _base_writeq(__u64 b, volatile void __iomem *addr, 1548 spinlock_t *writeq_lock) 1549{ 1550 writeq(cpu_to_le64(b), addr); 1551} 1552#endif 1553 1554/** 1555 * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware 1556 * @ioc: per adapter object 1557 * @smid: system request message index 1558 * @handle: device handle 1559 * 1560 * Return nothing. 1561 */ 1562void 1563mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u16 handle) 1564{ 1565 Mpi2RequestDescriptorUnion_t descriptor; 1566 u64 *request = (u64 *)&descriptor; 1567 1568 1569 descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO; 1570 descriptor.SCSIIO.MSIxIndex = 0; /* TODO */ 1571 descriptor.SCSIIO.SMID = cpu_to_le16(smid); 1572 descriptor.SCSIIO.DevHandle = cpu_to_le16(handle); 1573 descriptor.SCSIIO.LMID = 0; 1574 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1575 &ioc->scsi_lookup_lock); 1576} 1577 1578 1579/** 1580 * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware 1581 * @ioc: per adapter object 1582 * @smid: system request message index 1583 * 1584 * Return nothing. 1585 */ 1586void 1587mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1588{ 1589 Mpi2RequestDescriptorUnion_t descriptor; 1590 u64 *request = (u64 *)&descriptor; 1591 1592 descriptor.HighPriority.RequestFlags = 1593 MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY; 1594 descriptor.HighPriority.MSIxIndex = 0; /* TODO */ 1595 descriptor.HighPriority.SMID = cpu_to_le16(smid); 1596 descriptor.HighPriority.LMID = 0; 1597 descriptor.HighPriority.Reserved1 = 0; 1598 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1599 &ioc->scsi_lookup_lock); 1600} 1601 1602/** 1603 * mpt2sas_base_put_smid_default - Default, primarily used for config pages 1604 * @ioc: per adapter object 1605 * @smid: system request message index 1606 * 1607 * Return nothing. 1608 */ 1609void 1610mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid) 1611{ 1612 Mpi2RequestDescriptorUnion_t descriptor; 1613 u64 *request = (u64 *)&descriptor; 1614 1615 descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE; 1616 descriptor.Default.MSIxIndex = 0; /* TODO */ 1617 descriptor.Default.SMID = cpu_to_le16(smid); 1618 descriptor.Default.LMID = 0; 1619 descriptor.Default.DescriptorTypeDependent = 0; 1620 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1621 &ioc->scsi_lookup_lock); 1622} 1623 1624/** 1625 * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware 1626 * @ioc: per adapter object 1627 * @smid: system request message index 1628 * @io_index: value used to track the IO 1629 * 1630 * Return nothing. 1631 */ 1632void 1633mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid, 1634 u16 io_index) 1635{ 1636 Mpi2RequestDescriptorUnion_t descriptor; 1637 u64 *request = (u64 *)&descriptor; 1638 1639 descriptor.SCSITarget.RequestFlags = 1640 MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET; 1641 descriptor.SCSITarget.MSIxIndex = 0; /* TODO */ 1642 descriptor.SCSITarget.SMID = cpu_to_le16(smid); 1643 descriptor.SCSITarget.LMID = 0; 1644 descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index); 1645 _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow, 1646 &ioc->scsi_lookup_lock); 1647} 1648 1649/** 1650 * _base_display_dell_branding - Disply branding string 1651 * @ioc: per adapter object 1652 * 1653 * Return nothing. 1654 */ 1655static void 1656_base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc) 1657{ 1658 char dell_branding[MPT2SAS_DELL_BRANDING_SIZE]; 1659 1660 if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL) 1661 return; 1662 1663 memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE); 1664 switch (ioc->pdev->subsystem_device) { 1665 case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID: 1666 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING, 1667 MPT2SAS_DELL_BRANDING_SIZE - 1); 1668 break; 1669 case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID: 1670 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING, 1671 MPT2SAS_DELL_BRANDING_SIZE - 1); 1672 break; 1673 case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID: 1674 strncpy(dell_branding, 1675 MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING, 1676 MPT2SAS_DELL_BRANDING_SIZE - 1); 1677 break; 1678 case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID: 1679 strncpy(dell_branding, 1680 MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING, 1681 MPT2SAS_DELL_BRANDING_SIZE - 1); 1682 break; 1683 case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID: 1684 strncpy(dell_branding, 1685 MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING, 1686 MPT2SAS_DELL_BRANDING_SIZE - 1); 1687 break; 1688 case MPT2SAS_DELL_PERC_H200_SSDID: 1689 strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING, 1690 MPT2SAS_DELL_BRANDING_SIZE - 1); 1691 break; 1692 case MPT2SAS_DELL_6GBPS_SAS_SSDID: 1693 strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING, 1694 MPT2SAS_DELL_BRANDING_SIZE - 1); 1695 break; 1696 default: 1697 sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device); 1698 break; 1699 } 1700 1701 printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X)," 1702 " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding, 1703 ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor, 1704 ioc->pdev->subsystem_device); 1705} 1706 1707/** 1708 * _base_display_ioc_capabilities - Disply IOC's capabilities. 1709 * @ioc: per adapter object 1710 * 1711 * Return nothing. 1712 */ 1713static void 1714_base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc) 1715{ 1716 int i = 0; 1717 char desc[16]; 1718 u8 revision; 1719 u32 iounit_pg1_flags; 1720 1721 pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision); 1722 strncpy(desc, ioc->manu_pg0.ChipName, 16); 1723 printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), " 1724 "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n", 1725 ioc->name, desc, 1726 (ioc->facts.FWVersion.Word & 0xFF000000) >> 24, 1727 (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16, 1728 (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8, 1729 ioc->facts.FWVersion.Word & 0x000000FF, 1730 revision, 1731 (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24, 1732 (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16, 1733 (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8, 1734 ioc->bios_pg3.BiosVersion & 0x000000FF); 1735 1736 _base_display_dell_branding(ioc); 1737 1738 printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name); 1739 1740 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) { 1741 printk("Initiator"); 1742 i++; 1743 } 1744 1745 if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) { 1746 printk("%sTarget", i ? "," : ""); 1747 i++; 1748 } 1749 1750 i = 0; 1751 printk("), "); 1752 printk("Capabilities=("); 1753 1754 if (ioc->facts.IOCCapabilities & 1755 MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) { 1756 printk("Raid"); 1757 i++; 1758 } 1759 1760 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) { 1761 printk("%sTLR", i ? "," : ""); 1762 i++; 1763 } 1764 1765 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) { 1766 printk("%sMulticast", i ? "," : ""); 1767 i++; 1768 } 1769 1770 if (ioc->facts.IOCCapabilities & 1771 MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) { 1772 printk("%sBIDI Target", i ? "," : ""); 1773 i++; 1774 } 1775 1776 if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) { 1777 printk("%sEEDP", i ? "," : ""); 1778 i++; 1779 } 1780 1781 if (ioc->facts.IOCCapabilities & 1782 MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) { 1783 printk("%sSnapshot Buffer", i ? "," : ""); 1784 i++; 1785 } 1786 1787 if (ioc->facts.IOCCapabilities & 1788 MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) { 1789 printk("%sDiag Trace Buffer", i ? "," : ""); 1790 i++; 1791 } 1792 1793 if (ioc->facts.IOCCapabilities & 1794 MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) { 1795 printk(KERN_INFO "%sDiag Extended Buffer", i ? "," : ""); 1796 i++; 1797 } 1798 1799 if (ioc->facts.IOCCapabilities & 1800 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) { 1801 printk("%sTask Set Full", i ? "," : ""); 1802 i++; 1803 } 1804 1805 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1806 if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) { 1807 printk("%sNCQ", i ? "," : ""); 1808 i++; 1809 } 1810 1811 printk(")\n"); 1812} 1813 1814/** 1815 * _base_static_config_pages - static start of day config pages 1816 * @ioc: per adapter object 1817 * 1818 * Return nothing. 1819 */ 1820static void 1821_base_static_config_pages(struct MPT2SAS_ADAPTER *ioc) 1822{ 1823 Mpi2ConfigReply_t mpi_reply; 1824 u32 iounit_pg1_flags; 1825 1826 mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0); 1827 if (ioc->ir_firmware) 1828 mpt2sas_config_get_manufacturing_pg10(ioc, &mpi_reply, 1829 &ioc->manu_pg10); 1830 mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2); 1831 mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3); 1832 mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8); 1833 mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0); 1834 mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1835 _base_display_ioc_capabilities(ioc); 1836 1837 /* 1838 * Enable task_set_full handling in iounit_pg1 when the 1839 * facts capabilities indicate that its supported. 1840 */ 1841 iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags); 1842 if ((ioc->facts.IOCCapabilities & 1843 MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING)) 1844 iounit_pg1_flags &= 1845 ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1846 else 1847 iounit_pg1_flags |= 1848 MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING; 1849 ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags); 1850 mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1); 1851} 1852 1853/** 1854 * _base_release_memory_pools - release memory 1855 * @ioc: per adapter object 1856 * 1857 * Free memory allocated from _base_allocate_memory_pools. 1858 * 1859 * Return nothing. 1860 */ 1861static void 1862_base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc) 1863{ 1864 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1865 __func__)); 1866 1867 if (ioc->request) { 1868 pci_free_consistent(ioc->pdev, ioc->request_dma_sz, 1869 ioc->request, ioc->request_dma); 1870 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)" 1871 ": free\n", ioc->name, ioc->request)); 1872 ioc->request = NULL; 1873 } 1874 1875 if (ioc->sense) { 1876 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma); 1877 if (ioc->sense_dma_pool) 1878 pci_pool_destroy(ioc->sense_dma_pool); 1879 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)" 1880 ": free\n", ioc->name, ioc->sense)); 1881 ioc->sense = NULL; 1882 } 1883 1884 if (ioc->reply) { 1885 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma); 1886 if (ioc->reply_dma_pool) 1887 pci_pool_destroy(ioc->reply_dma_pool); 1888 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)" 1889 ": free\n", ioc->name, ioc->reply)); 1890 ioc->reply = NULL; 1891 } 1892 1893 if (ioc->reply_free) { 1894 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free, 1895 ioc->reply_free_dma); 1896 if (ioc->reply_free_dma_pool) 1897 pci_pool_destroy(ioc->reply_free_dma_pool); 1898 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool" 1899 "(0x%p): free\n", ioc->name, ioc->reply_free)); 1900 ioc->reply_free = NULL; 1901 } 1902 1903 if (ioc->reply_post_free) { 1904 pci_pool_free(ioc->reply_post_free_dma_pool, 1905 ioc->reply_post_free, ioc->reply_post_free_dma); 1906 if (ioc->reply_post_free_dma_pool) 1907 pci_pool_destroy(ioc->reply_post_free_dma_pool); 1908 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1909 "reply_post_free_pool(0x%p): free\n", ioc->name, 1910 ioc->reply_post_free)); 1911 ioc->reply_post_free = NULL; 1912 } 1913 1914 if (ioc->config_page) { 1915 dexitprintk(ioc, printk(MPT2SAS_INFO_FMT 1916 "config_page(0x%p): free\n", ioc->name, 1917 ioc->config_page)); 1918 pci_free_consistent(ioc->pdev, ioc->config_page_sz, 1919 ioc->config_page, ioc->config_page_dma); 1920 } 1921 1922 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages); 1923 kfree(ioc->hpr_lookup); 1924 kfree(ioc->internal_lookup); 1925} 1926 1927 1928/** 1929 * _base_allocate_memory_pools - allocate start of day memory pools 1930 * @ioc: per adapter object 1931 * @sleep_flag: CAN_SLEEP or NO_SLEEP 1932 * 1933 * Returns 0 success, anything else error 1934 */ 1935static int 1936_base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 1937{ 1938 Mpi2IOCFactsReply_t *facts; 1939 u32 queue_size, queue_diff; 1940 u16 max_sge_elements; 1941 u16 num_of_reply_frames; 1942 u16 chains_needed_per_io; 1943 u32 sz, total_sz; 1944 u32 retry_sz; 1945 u16 max_request_credit; 1946 1947 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 1948 __func__)); 1949 1950 retry_sz = 0; 1951 facts = &ioc->facts; 1952 1953 /* command line tunables for max sgl entries */ 1954 if (max_sgl_entries != -1) { 1955 ioc->shost->sg_tablesize = (max_sgl_entries < 1956 MPT2SAS_SG_DEPTH) ? max_sgl_entries : 1957 MPT2SAS_SG_DEPTH; 1958 } else { 1959 ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH; 1960 } 1961 1962 /* command line tunables for max controller queue depth */ 1963 if (max_queue_depth != -1) { 1964 max_request_credit = (max_queue_depth < facts->RequestCredit) 1965 ? max_queue_depth : facts->RequestCredit; 1966 } else { 1967 max_request_credit = (facts->RequestCredit > 1968 MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE : 1969 facts->RequestCredit; 1970 } 1971 1972 ioc->hba_queue_depth = max_request_credit; 1973 ioc->hi_priority_depth = facts->HighPriorityCredit; 1974 ioc->internal_depth = ioc->hi_priority_depth + 5; 1975 1976 /* request frame size */ 1977 ioc->request_sz = facts->IOCRequestFrameSize * 4; 1978 1979 /* reply frame size */ 1980 ioc->reply_sz = facts->ReplyFrameSize * 4; 1981 1982 retry_allocation: 1983 total_sz = 0; 1984 /* calculate number of sg elements left over in the 1st frame */ 1985 max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) - 1986 sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size); 1987 ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size; 1988 1989 /* now do the same for a chain buffer */ 1990 max_sge_elements = ioc->request_sz - ioc->sge_size; 1991 ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size; 1992 1993 ioc->chain_offset_value_for_main_message = 1994 ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) + 1995 (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4; 1996 1997 /* 1998 * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE 1999 */ 2000 chains_needed_per_io = ((ioc->shost->sg_tablesize - 2001 ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message) 2002 + 1; 2003 if (chains_needed_per_io > facts->MaxChainDepth) { 2004 chains_needed_per_io = facts->MaxChainDepth; 2005 ioc->shost->sg_tablesize = min_t(u16, 2006 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message 2007 * chains_needed_per_io), ioc->shost->sg_tablesize); 2008 } 2009 ioc->chains_needed_per_io = chains_needed_per_io; 2010 2011 /* reply free queue sizing - taking into account for events */ 2012 num_of_reply_frames = ioc->hba_queue_depth + 32; 2013 2014 /* number of replies frames can't be a multiple of 16 */ 2015 /* decrease number of reply frames by 1 */ 2016 if (!(num_of_reply_frames % 16)) 2017 num_of_reply_frames--; 2018 2019 /* calculate number of reply free queue entries 2020 * (must be multiple of 16) 2021 */ 2022 2023 /* (we know reply_free_queue_depth is not a multiple of 16) */ 2024 queue_size = num_of_reply_frames; 2025 queue_size += 16 - (queue_size % 16); 2026 ioc->reply_free_queue_depth = queue_size; 2027 2028 /* reply descriptor post queue sizing */ 2029 /* this size should be the number of request frames + number of reply 2030 * frames 2031 */ 2032 2033 queue_size = ioc->hba_queue_depth + num_of_reply_frames + 1; 2034 /* round up to 16 byte boundary */ 2035 if (queue_size % 16) 2036 queue_size += 16 - (queue_size % 16); 2037 2038 /* check against IOC maximum reply post queue depth */ 2039 if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) { 2040 queue_diff = queue_size - 2041 facts->MaxReplyDescriptorPostQueueDepth; 2042 2043 /* round queue_diff up to multiple of 16 */ 2044 if (queue_diff % 16) 2045 queue_diff += 16 - (queue_diff % 16); 2046 2047 /* adjust hba_queue_depth, reply_free_queue_depth, 2048 * and queue_size 2049 */ 2050 ioc->hba_queue_depth -= queue_diff; 2051 ioc->reply_free_queue_depth -= queue_diff; 2052 queue_size -= queue_diff; 2053 } 2054 ioc->reply_post_queue_depth = queue_size; 2055 2056 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: " 2057 "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), " 2058 "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message, 2059 ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize, 2060 ioc->chains_needed_per_io)); 2061 2062 ioc->scsiio_depth = ioc->hba_queue_depth - 2063 ioc->hi_priority_depth - ioc->internal_depth; 2064 2065 /* set the scsi host can_queue depth 2066 * with some internal commands that could be outstanding 2067 */ 2068 ioc->shost->can_queue = ioc->scsiio_depth - (2); 2069 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host: " 2070 "can_queue depth (%d)\n", ioc->name, ioc->shost->can_queue)); 2071 2072 /* contiguous pool for request and chains, 16 byte align, one extra " 2073 * "frame for smid=0 2074 */ 2075 ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth; 2076 sz = ((ioc->scsiio_depth + 1 + ioc->chain_depth) * ioc->request_sz); 2077 2078 /* hi-priority queue */ 2079 sz += (ioc->hi_priority_depth * ioc->request_sz); 2080 2081 /* internal queue */ 2082 sz += (ioc->internal_depth * ioc->request_sz); 2083 2084 ioc->request_dma_sz = sz; 2085 ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma); 2086 if (!ioc->request) { 2087 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2088 "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2089 "total(%d kB)\n", ioc->name, ioc->hba_queue_depth, 2090 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2091 if (ioc->scsiio_depth < MPT2SAS_SAS_QUEUE_DEPTH) 2092 goto out; 2093 retry_sz += 64; 2094 ioc->hba_queue_depth = max_request_credit - retry_sz; 2095 goto retry_allocation; 2096 } 2097 2098 if (retry_sz) 2099 printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent " 2100 "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), " 2101 "total(%d kb)\n", ioc->name, ioc->hba_queue_depth, 2102 ioc->chains_needed_per_io, ioc->request_sz, sz/1024); 2103 2104 2105 /* hi-priority queue */ 2106 ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) * 2107 ioc->request_sz); 2108 ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) * 2109 ioc->request_sz); 2110 2111 /* internal queue */ 2112 ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth * 2113 ioc->request_sz); 2114 ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth * 2115 ioc->request_sz); 2116 2117 ioc->chain = ioc->internal + (ioc->internal_depth * 2118 ioc->request_sz); 2119 ioc->chain_dma = ioc->internal_dma + (ioc->internal_depth * 2120 ioc->request_sz); 2121 2122 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): " 2123 "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, 2124 ioc->request, ioc->hba_queue_depth, ioc->request_sz, 2125 (ioc->hba_queue_depth * ioc->request_sz)/1024)); 2126 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth" 2127 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain, 2128 ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth * 2129 ioc->request_sz))/1024)); 2130 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n", 2131 ioc->name, (unsigned long long) ioc->request_dma)); 2132 total_sz += sz; 2133 2134 sz = ioc->scsiio_depth * sizeof(struct request_tracker); 2135 ioc->scsi_lookup_pages = get_order(sz); 2136 ioc->scsi_lookup = (struct request_tracker *)__get_free_pages( 2137 GFP_KERNEL, ioc->scsi_lookup_pages); 2138 if (!ioc->scsi_lookup) { 2139 printk(MPT2SAS_ERR_FMT "scsi_lookup: get_free_pages failed, " 2140 "sz(%d)\n", ioc->name, (int)sz); 2141 goto out; 2142 } 2143 2144 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsiio(0x%p): " 2145 "depth(%d)\n", ioc->name, ioc->request, 2146 ioc->scsiio_depth)); 2147 2148 /* initialize hi-priority queue smid's */ 2149 ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth, 2150 sizeof(struct request_tracker), GFP_KERNEL); 2151 if (!ioc->hpr_lookup) { 2152 printk(MPT2SAS_ERR_FMT "hpr_lookup: kcalloc failed\n", 2153 ioc->name); 2154 goto out; 2155 } 2156 ioc->hi_priority_smid = ioc->scsiio_depth + 1; 2157 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hi_priority(0x%p): " 2158 "depth(%d), start smid(%d)\n", ioc->name, ioc->hi_priority, 2159 ioc->hi_priority_depth, ioc->hi_priority_smid)); 2160 2161 /* initialize internal queue smid's */ 2162 ioc->internal_lookup = kcalloc(ioc->internal_depth, 2163 sizeof(struct request_tracker), GFP_KERNEL); 2164 if (!ioc->internal_lookup) { 2165 printk(MPT2SAS_ERR_FMT "internal_lookup: kcalloc failed\n", 2166 ioc->name); 2167 goto out; 2168 } 2169 ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth; 2170 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "internal(0x%p): " 2171 "depth(%d), start smid(%d)\n", ioc->name, ioc->internal, 2172 ioc->internal_depth, ioc->internal_smid)); 2173 2174 /* sense buffers, 4 byte align */ 2175 sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE; 2176 ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4, 2177 0); 2178 if (!ioc->sense_dma_pool) { 2179 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n", 2180 ioc->name); 2181 goto out; 2182 } 2183 ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL, 2184 &ioc->sense_dma); 2185 if (!ioc->sense) { 2186 printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n", 2187 ioc->name); 2188 goto out; 2189 } 2190 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT 2191 "sense pool(0x%p): depth(%d), element_size(%d), pool_size" 2192 "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth, 2193 SCSI_SENSE_BUFFERSIZE, sz/1024)); 2194 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n", 2195 ioc->name, (unsigned long long)ioc->sense_dma)); 2196 total_sz += sz; 2197 2198 /* reply pool, 4 byte align */ 2199 sz = ioc->reply_free_queue_depth * ioc->reply_sz; 2200 ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4, 2201 0); 2202 if (!ioc->reply_dma_pool) { 2203 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n", 2204 ioc->name); 2205 goto out; 2206 } 2207 ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL, 2208 &ioc->reply_dma); 2209 if (!ioc->reply) { 2210 printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n", 2211 ioc->name); 2212 goto out; 2213 } 2214 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth" 2215 "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply, 2216 ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024)); 2217 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n", 2218 ioc->name, (unsigned long long)ioc->reply_dma)); 2219 total_sz += sz; 2220 2221 /* reply free queue, 16 byte align */ 2222 sz = ioc->reply_free_queue_depth * 4; 2223 ioc->reply_free_dma_pool = pci_pool_create("reply_free pool", 2224 ioc->pdev, sz, 16, 0); 2225 if (!ioc->reply_free_dma_pool) { 2226 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create " 2227 "failed\n", ioc->name); 2228 goto out; 2229 } 2230 ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL, 2231 &ioc->reply_free_dma); 2232 if (!ioc->reply_free) { 2233 printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc " 2234 "failed\n", ioc->name); 2235 goto out; 2236 } 2237 memset(ioc->reply_free, 0, sz); 2238 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): " 2239 "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name, 2240 ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024)); 2241 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma" 2242 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma)); 2243 total_sz += sz; 2244 2245 /* reply post queue, 16 byte align */ 2246 sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t); 2247 ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool", 2248 ioc->pdev, sz, 16, 0); 2249 if (!ioc->reply_post_free_dma_pool) { 2250 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create " 2251 "failed\n", ioc->name); 2252 goto out; 2253 } 2254 ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool , 2255 GFP_KERNEL, &ioc->reply_post_free_dma); 2256 if (!ioc->reply_post_free) { 2257 printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc " 2258 "failed\n", ioc->name); 2259 goto out; 2260 } 2261 memset(ioc->reply_post_free, 0, sz); 2262 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool" 2263 "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n", 2264 ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8, 2265 sz/1024)); 2266 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = " 2267 "(0x%llx)\n", ioc->name, (unsigned long long) 2268 ioc->reply_post_free_dma)); 2269 total_sz += sz; 2270 2271 ioc->config_page_sz = 512; 2272 ioc->config_page = pci_alloc_consistent(ioc->pdev, 2273 ioc->config_page_sz, &ioc->config_page_dma); 2274 if (!ioc->config_page) { 2275 printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc " 2276 "failed\n", ioc->name); 2277 goto out; 2278 } 2279 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size" 2280 "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz)); 2281 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma" 2282 "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma)); 2283 total_sz += ioc->config_page_sz; 2284 2285 printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n", 2286 ioc->name, total_sz/1024); 2287 printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), " 2288 "Max Controller Queue Depth(%d)\n", 2289 ioc->name, ioc->shost->can_queue, facts->RequestCredit); 2290 printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n", 2291 ioc->name, ioc->shost->sg_tablesize); 2292 return 0; 2293 2294 out: 2295 _base_release_memory_pools(ioc); 2296 return -ENOMEM; 2297} 2298 2299 2300/** 2301 * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter. 2302 * @ioc: Pointer to MPT_ADAPTER structure 2303 * @cooked: Request raw or cooked IOC state 2304 * 2305 * Returns all IOC Doorbell register bits if cooked==0, else just the 2306 * Doorbell bits in MPI_IOC_STATE_MASK. 2307 */ 2308u32 2309mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked) 2310{ 2311 u32 s, sc; 2312 2313 s = readl(&ioc->chip->Doorbell); 2314 sc = s & MPI2_IOC_STATE_MASK; 2315 return cooked ? sc : s; 2316} 2317 2318/** 2319 * _base_wait_on_iocstate - waiting on a particular ioc state 2320 * @ioc_state: controller state { READY, OPERATIONAL, or RESET } 2321 * @timeout: timeout in second 2322 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2323 * 2324 * Returns 0 for success, non-zero for failure. 2325 */ 2326static int 2327_base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout, 2328 int sleep_flag) 2329{ 2330 u32 count, cntdn; 2331 u32 current_state; 2332 2333 count = 0; 2334 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2335 do { 2336 current_state = mpt2sas_base_get_iocstate(ioc, 1); 2337 if (current_state == ioc_state) 2338 return 0; 2339 if (count && current_state == MPI2_IOC_STATE_FAULT) 2340 break; 2341 if (sleep_flag == CAN_SLEEP) 2342 msleep(1); 2343 else 2344 udelay(500); 2345 count++; 2346 } while (--cntdn); 2347 2348 return current_state; 2349} 2350 2351/** 2352 * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by 2353 * a write to the doorbell) 2354 * @ioc: per adapter object 2355 * @timeout: timeout in second 2356 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2357 * 2358 * Returns 0 for success, non-zero for failure. 2359 * 2360 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 2361 */ 2362static int 2363_base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout, 2364 int sleep_flag) 2365{ 2366 u32 cntdn, count; 2367 u32 int_status; 2368 2369 count = 0; 2370 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2371 do { 2372 int_status = readl(&ioc->chip->HostInterruptStatus); 2373 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2374 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2375 "successfull count(%d), timeout(%d)\n", ioc->name, 2376 __func__, count, timeout)); 2377 return 0; 2378 } 2379 if (sleep_flag == CAN_SLEEP) 2380 msleep(1); 2381 else 2382 udelay(500); 2383 count++; 2384 } while (--cntdn); 2385 2386 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2387 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2388 return -EFAULT; 2389} 2390 2391/** 2392 * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell. 2393 * @ioc: per adapter object 2394 * @timeout: timeout in second 2395 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2396 * 2397 * Returns 0 for success, non-zero for failure. 2398 * 2399 * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to 2400 * doorbell. 2401 */ 2402static int 2403_base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout, 2404 int sleep_flag) 2405{ 2406 u32 cntdn, count; 2407 u32 int_status; 2408 u32 doorbell; 2409 2410 count = 0; 2411 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2412 do { 2413 int_status = readl(&ioc->chip->HostInterruptStatus); 2414 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) { 2415 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2416 "successfull count(%d), timeout(%d)\n", ioc->name, 2417 __func__, count, timeout)); 2418 return 0; 2419 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) { 2420 doorbell = readl(&ioc->chip->Doorbell); 2421 if ((doorbell & MPI2_IOC_STATE_MASK) == 2422 MPI2_IOC_STATE_FAULT) { 2423 mpt2sas_base_fault_info(ioc , doorbell); 2424 return -EFAULT; 2425 } 2426 } else if (int_status == 0xFFFFFFFF) 2427 goto out; 2428 2429 if (sleep_flag == CAN_SLEEP) 2430 msleep(1); 2431 else 2432 udelay(500); 2433 count++; 2434 } while (--cntdn); 2435 2436 out: 2437 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2438 "int_status(%x)!\n", ioc->name, __func__, count, int_status); 2439 return -EFAULT; 2440} 2441 2442/** 2443 * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use 2444 * @ioc: per adapter object 2445 * @timeout: timeout in second 2446 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2447 * 2448 * Returns 0 for success, non-zero for failure. 2449 * 2450 */ 2451static int 2452_base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout, 2453 int sleep_flag) 2454{ 2455 u32 cntdn, count; 2456 u32 doorbell_reg; 2457 2458 count = 0; 2459 cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout; 2460 do { 2461 doorbell_reg = readl(&ioc->chip->Doorbell); 2462 if (!(doorbell_reg & MPI2_DOORBELL_USED)) { 2463 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 2464 "successfull count(%d), timeout(%d)\n", ioc->name, 2465 __func__, count, timeout)); 2466 return 0; 2467 } 2468 if (sleep_flag == CAN_SLEEP) 2469 msleep(1); 2470 else 2471 udelay(500); 2472 count++; 2473 } while (--cntdn); 2474 2475 printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), " 2476 "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg); 2477 return -EFAULT; 2478} 2479 2480/** 2481 * _base_send_ioc_reset - send doorbell reset 2482 * @ioc: per adapter object 2483 * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET 2484 * @timeout: timeout in second 2485 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2486 * 2487 * Returns 0 for success, non-zero for failure. 2488 */ 2489static int 2490_base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout, 2491 int sleep_flag) 2492{ 2493 u32 ioc_state; 2494 int r = 0; 2495 2496 if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) { 2497 printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n", 2498 ioc->name, __func__); 2499 return -EFAULT; 2500 } 2501 2502 if (!(ioc->facts.IOCCapabilities & 2503 MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY)) 2504 return -EFAULT; 2505 2506 printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name); 2507 2508 writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT, 2509 &ioc->chip->Doorbell); 2510 if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) { 2511 r = -EFAULT; 2512 goto out; 2513 } 2514 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 2515 timeout, sleep_flag); 2516 if (ioc_state) { 2517 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 2518 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 2519 r = -EFAULT; 2520 goto out; 2521 } 2522 out: 2523 printk(MPT2SAS_INFO_FMT "message unit reset: %s\n", 2524 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 2525 return r; 2526} 2527 2528/** 2529 * _base_handshake_req_reply_wait - send request thru doorbell interface 2530 * @ioc: per adapter object 2531 * @request_bytes: request length 2532 * @request: pointer having request payload 2533 * @reply_bytes: reply length 2534 * @reply: pointer to reply payload 2535 * @timeout: timeout in second 2536 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2537 * 2538 * Returns 0 for success, non-zero for failure. 2539 */ 2540static int 2541_base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes, 2542 u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag) 2543{ 2544 MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply; 2545 int i; 2546 u8 failed; 2547 u16 dummy; 2548 u32 *mfp; 2549 2550 /* make sure doorbell is not in use */ 2551 if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) { 2552 printk(MPT2SAS_ERR_FMT "doorbell is in use " 2553 " (line=%d)\n", ioc->name, __LINE__); 2554 return -EFAULT; 2555 } 2556 2557 /* clear pending doorbell interrupts from previous state changes */ 2558 if (readl(&ioc->chip->HostInterruptStatus) & 2559 MPI2_HIS_IOC2SYS_DB_STATUS) 2560 writel(0, &ioc->chip->HostInterruptStatus); 2561 2562 /* send message to ioc */ 2563 writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) | 2564 ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)), 2565 &ioc->chip->Doorbell); 2566 2567 if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) { 2568 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2569 "int failed (line=%d)\n", ioc->name, __LINE__); 2570 return -EFAULT; 2571 } 2572 writel(0, &ioc->chip->HostInterruptStatus); 2573 2574 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) { 2575 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2576 "ack failed (line=%d)\n", ioc->name, __LINE__); 2577 return -EFAULT; 2578 } 2579 2580 /* send message 32-bits at a time */ 2581 for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) { 2582 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell); 2583 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) 2584 failed = 1; 2585 } 2586 2587 if (failed) { 2588 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2589 "sending request failed (line=%d)\n", ioc->name, __LINE__); 2590 return -EFAULT; 2591 } 2592 2593 /* now wait for the reply */ 2594 if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) { 2595 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2596 "int failed (line=%d)\n", ioc->name, __LINE__); 2597 return -EFAULT; 2598 } 2599 2600 /* read the first two 16-bits, it gives the total length of the reply */ 2601 reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2602 & MPI2_DOORBELL_DATA_MASK); 2603 writel(0, &ioc->chip->HostInterruptStatus); 2604 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2605 printk(MPT2SAS_ERR_FMT "doorbell handshake " 2606 "int failed (line=%d)\n", ioc->name, __LINE__); 2607 return -EFAULT; 2608 } 2609 reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2610 & MPI2_DOORBELL_DATA_MASK); 2611 writel(0, &ioc->chip->HostInterruptStatus); 2612 2613 for (i = 2; i < default_reply->MsgLength * 2; i++) { 2614 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) { 2615 printk(MPT2SAS_ERR_FMT "doorbell " 2616 "handshake int failed (line=%d)\n", ioc->name, 2617 __LINE__); 2618 return -EFAULT; 2619 } 2620 if (i >= reply_bytes/2) /* overflow case */ 2621 dummy = readl(&ioc->chip->Doorbell); 2622 else 2623 reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell) 2624 & MPI2_DOORBELL_DATA_MASK); 2625 writel(0, &ioc->chip->HostInterruptStatus); 2626 } 2627 2628 _base_wait_for_doorbell_int(ioc, 5, sleep_flag); 2629 if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) { 2630 dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use " 2631 " (line=%d)\n", ioc->name, __LINE__)); 2632 } 2633 writel(0, &ioc->chip->HostInterruptStatus); 2634 2635 if (ioc->logging_level & MPT_DEBUG_INIT) { 2636 mfp = (u32 *)reply; 2637 printk(KERN_DEBUG "\toffset:data\n"); 2638 for (i = 0; i < reply_bytes/4; i++) 2639 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 2640 le32_to_cpu(mfp[i])); 2641 } 2642 return 0; 2643} 2644 2645/** 2646 * mpt2sas_base_sas_iounit_control - send sas iounit control to FW 2647 * @ioc: per adapter object 2648 * @mpi_reply: the reply payload from FW 2649 * @mpi_request: the request payload sent to FW 2650 * 2651 * The SAS IO Unit Control Request message allows the host to perform low-level 2652 * operations, such as resets on the PHYs of the IO Unit, also allows the host 2653 * to obtain the IOC assigned device handles for a device if it has other 2654 * identifying information about the device, in addition allows the host to 2655 * remove IOC resources associated with the device. 2656 * 2657 * Returns 0 for success, non-zero for failure. 2658 */ 2659int 2660mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc, 2661 Mpi2SasIoUnitControlReply_t *mpi_reply, 2662 Mpi2SasIoUnitControlRequest_t *mpi_request) 2663{ 2664 u16 smid; 2665 u32 ioc_state; 2666 unsigned long timeleft; 2667 u8 issue_reset; 2668 int rc; 2669 void *request; 2670 u16 wait_state_count; 2671 2672 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2673 __func__)); 2674 2675 mutex_lock(&ioc->base_cmds.mutex); 2676 2677 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2678 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2679 ioc->name, __func__); 2680 rc = -EAGAIN; 2681 goto out; 2682 } 2683 2684 wait_state_count = 0; 2685 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2686 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2687 if (wait_state_count++ == 10) { 2688 printk(MPT2SAS_ERR_FMT 2689 "%s: failed due to ioc not operational\n", 2690 ioc->name, __func__); 2691 rc = -EFAULT; 2692 goto out; 2693 } 2694 ssleep(1); 2695 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2696 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2697 "operational state(count=%d)\n", ioc->name, 2698 __func__, wait_state_count); 2699 } 2700 2701 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2702 if (!smid) { 2703 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2704 ioc->name, __func__); 2705 rc = -EAGAIN; 2706 goto out; 2707 } 2708 2709 rc = 0; 2710 ioc->base_cmds.status = MPT2_CMD_PENDING; 2711 request = mpt2sas_base_get_msg_frame(ioc, smid); 2712 ioc->base_cmds.smid = smid; 2713 memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t)); 2714 if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2715 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) 2716 ioc->ioc_link_reset_in_progress = 1; 2717 mpt2sas_base_put_smid_default(ioc, smid); 2718 init_completion(&ioc->base_cmds.done); 2719 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2720 msecs_to_jiffies(10000)); 2721 if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET || 2722 mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) && 2723 ioc->ioc_link_reset_in_progress) 2724 ioc->ioc_link_reset_in_progress = 0; 2725 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2726 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2727 ioc->name, __func__); 2728 _debug_dump_mf(mpi_request, 2729 sizeof(Mpi2SasIoUnitControlRequest_t)/4); 2730 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2731 issue_reset = 1; 2732 goto issue_host_reset; 2733 } 2734 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2735 memcpy(mpi_reply, ioc->base_cmds.reply, 2736 sizeof(Mpi2SasIoUnitControlReply_t)); 2737 else 2738 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t)); 2739 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2740 goto out; 2741 2742 issue_host_reset: 2743 if (issue_reset) 2744 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2745 FORCE_BIG_HAMMER); 2746 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2747 rc = -EFAULT; 2748 out: 2749 mutex_unlock(&ioc->base_cmds.mutex); 2750 return rc; 2751} 2752 2753 2754/** 2755 * mpt2sas_base_scsi_enclosure_processor - sending request to sep device 2756 * @ioc: per adapter object 2757 * @mpi_reply: the reply payload from FW 2758 * @mpi_request: the request payload sent to FW 2759 * 2760 * The SCSI Enclosure Processor request message causes the IOC to 2761 * communicate with SES devices to control LED status signals. 2762 * 2763 * Returns 0 for success, non-zero for failure. 2764 */ 2765int 2766mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc, 2767 Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request) 2768{ 2769 u16 smid; 2770 u32 ioc_state; 2771 unsigned long timeleft; 2772 u8 issue_reset; 2773 int rc; 2774 void *request; 2775 u16 wait_state_count; 2776 2777 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2778 __func__)); 2779 2780 mutex_lock(&ioc->base_cmds.mutex); 2781 2782 if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) { 2783 printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n", 2784 ioc->name, __func__); 2785 rc = -EAGAIN; 2786 goto out; 2787 } 2788 2789 wait_state_count = 0; 2790 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2791 while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) { 2792 if (wait_state_count++ == 10) { 2793 printk(MPT2SAS_ERR_FMT 2794 "%s: failed due to ioc not operational\n", 2795 ioc->name, __func__); 2796 rc = -EFAULT; 2797 goto out; 2798 } 2799 ssleep(1); 2800 ioc_state = mpt2sas_base_get_iocstate(ioc, 1); 2801 printk(MPT2SAS_INFO_FMT "%s: waiting for " 2802 "operational state(count=%d)\n", ioc->name, 2803 __func__, wait_state_count); 2804 } 2805 2806 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 2807 if (!smid) { 2808 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 2809 ioc->name, __func__); 2810 rc = -EAGAIN; 2811 goto out; 2812 } 2813 2814 rc = 0; 2815 ioc->base_cmds.status = MPT2_CMD_PENDING; 2816 request = mpt2sas_base_get_msg_frame(ioc, smid); 2817 ioc->base_cmds.smid = smid; 2818 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 2819 mpt2sas_base_put_smid_default(ioc, smid); 2820 init_completion(&ioc->base_cmds.done); 2821 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 2822 msecs_to_jiffies(10000)); 2823 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 2824 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 2825 ioc->name, __func__); 2826 _debug_dump_mf(mpi_request, 2827 sizeof(Mpi2SepRequest_t)/4); 2828 if (!(ioc->base_cmds.status & MPT2_CMD_RESET)) 2829 issue_reset = 1; 2830 goto issue_host_reset; 2831 } 2832 if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID) 2833 memcpy(mpi_reply, ioc->base_cmds.reply, 2834 sizeof(Mpi2SepReply_t)); 2835 else 2836 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t)); 2837 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2838 goto out; 2839 2840 issue_host_reset: 2841 if (issue_reset) 2842 mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP, 2843 FORCE_BIG_HAMMER); 2844 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 2845 rc = -EFAULT; 2846 out: 2847 mutex_unlock(&ioc->base_cmds.mutex); 2848 return rc; 2849} 2850 2851/** 2852 * _base_get_port_facts - obtain port facts reply and save in ioc 2853 * @ioc: per adapter object 2854 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2855 * 2856 * Returns 0 for success, non-zero for failure. 2857 */ 2858static int 2859_base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag) 2860{ 2861 Mpi2PortFactsRequest_t mpi_request; 2862 Mpi2PortFactsReply_t mpi_reply, *pfacts; 2863 int mpi_reply_sz, mpi_request_sz, r; 2864 2865 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2866 __func__)); 2867 2868 mpi_reply_sz = sizeof(Mpi2PortFactsReply_t); 2869 mpi_request_sz = sizeof(Mpi2PortFactsRequest_t); 2870 memset(&mpi_request, 0, mpi_request_sz); 2871 mpi_request.Function = MPI2_FUNCTION_PORT_FACTS; 2872 mpi_request.PortNumber = port; 2873 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2874 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2875 2876 if (r != 0) { 2877 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2878 ioc->name, __func__, r); 2879 return r; 2880 } 2881 2882 pfacts = &ioc->pfacts[port]; 2883 memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t)); 2884 pfacts->PortNumber = mpi_reply.PortNumber; 2885 pfacts->VP_ID = mpi_reply.VP_ID; 2886 pfacts->VF_ID = mpi_reply.VF_ID; 2887 pfacts->MaxPostedCmdBuffers = 2888 le16_to_cpu(mpi_reply.MaxPostedCmdBuffers); 2889 2890 return 0; 2891} 2892 2893/** 2894 * _base_get_ioc_facts - obtain ioc facts reply and save in ioc 2895 * @ioc: per adapter object 2896 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2897 * 2898 * Returns 0 for success, non-zero for failure. 2899 */ 2900static int 2901_base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2902{ 2903 Mpi2IOCFactsRequest_t mpi_request; 2904 Mpi2IOCFactsReply_t mpi_reply, *facts; 2905 int mpi_reply_sz, mpi_request_sz, r; 2906 2907 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2908 __func__)); 2909 2910 mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t); 2911 mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t); 2912 memset(&mpi_request, 0, mpi_request_sz); 2913 mpi_request.Function = MPI2_FUNCTION_IOC_FACTS; 2914 r = _base_handshake_req_reply_wait(ioc, mpi_request_sz, 2915 (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP); 2916 2917 if (r != 0) { 2918 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 2919 ioc->name, __func__, r); 2920 return r; 2921 } 2922 2923 facts = &ioc->facts; 2924 memset(facts, 0, sizeof(Mpi2IOCFactsReply_t)); 2925 facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion); 2926 facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion); 2927 facts->VP_ID = mpi_reply.VP_ID; 2928 facts->VF_ID = mpi_reply.VF_ID; 2929 facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions); 2930 facts->MaxChainDepth = mpi_reply.MaxChainDepth; 2931 facts->WhoInit = mpi_reply.WhoInit; 2932 facts->NumberOfPorts = mpi_reply.NumberOfPorts; 2933 facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit); 2934 facts->MaxReplyDescriptorPostQueueDepth = 2935 le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth); 2936 facts->ProductID = le16_to_cpu(mpi_reply.ProductID); 2937 facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities); 2938 if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID)) 2939 ioc->ir_firmware = 1; 2940 facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word); 2941 facts->IOCRequestFrameSize = 2942 le16_to_cpu(mpi_reply.IOCRequestFrameSize); 2943 facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators); 2944 facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets); 2945 ioc->shost->max_id = -1; 2946 facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders); 2947 facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures); 2948 facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags); 2949 facts->HighPriorityCredit = 2950 le16_to_cpu(mpi_reply.HighPriorityCredit); 2951 facts->ReplyFrameSize = mpi_reply.ReplyFrameSize; 2952 facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle); 2953 2954 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), " 2955 "max chains per io(%d)\n", ioc->name, facts->RequestCredit, 2956 facts->MaxChainDepth)); 2957 dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), " 2958 "reply frame size(%d)\n", ioc->name, 2959 facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4)); 2960 return 0; 2961} 2962 2963/** 2964 * _base_send_ioc_init - send ioc_init to firmware 2965 * @ioc: per adapter object 2966 * @sleep_flag: CAN_SLEEP or NO_SLEEP 2967 * 2968 * Returns 0 for success, non-zero for failure. 2969 */ 2970static int 2971_base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 2972{ 2973 Mpi2IOCInitRequest_t mpi_request; 2974 Mpi2IOCInitReply_t mpi_reply; 2975 int r; 2976 struct timeval current_time; 2977 u16 ioc_status; 2978 2979 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 2980 __func__)); 2981 2982 memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t)); 2983 mpi_request.Function = MPI2_FUNCTION_IOC_INIT; 2984 mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER; 2985 mpi_request.VF_ID = 0; /* TODO */ 2986 mpi_request.VP_ID = 0; 2987 mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION); 2988 mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION); 2989 2990 /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was 2991 * removed and made reserved. For those with older firmware will need 2992 * this fix. It was decided that the Reply and Request frame sizes are 2993 * the same. 2994 */ 2995 if ((ioc->facts.HeaderVersion >> 8) < 0xA) { 2996 mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz); 2997/* mpi_request.SystemReplyFrameSize = 2998 * cpu_to_le16(ioc->reply_sz); 2999 */ 3000 } 3001 3002 mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4); 3003 mpi_request.ReplyDescriptorPostQueueDepth = 3004 cpu_to_le16(ioc->reply_post_queue_depth); 3005 mpi_request.ReplyFreeQueueDepth = 3006 cpu_to_le16(ioc->reply_free_queue_depth); 3007 3008#if BITS_PER_LONG > 32 3009 mpi_request.SenseBufferAddressHigh = 3010 cpu_to_le32(ioc->sense_dma >> 32); 3011 mpi_request.SystemReplyAddressHigh = 3012 cpu_to_le32(ioc->reply_dma >> 32); 3013 mpi_request.SystemRequestFrameBaseAddress = 3014 cpu_to_le64(ioc->request_dma); 3015 mpi_request.ReplyFreeQueueAddress = 3016 cpu_to_le64(ioc->reply_free_dma); 3017 mpi_request.ReplyDescriptorPostQueueAddress = 3018 cpu_to_le64(ioc->reply_post_free_dma); 3019#else 3020 mpi_request.SystemRequestFrameBaseAddress = 3021 cpu_to_le32(ioc->request_dma); 3022 mpi_request.ReplyFreeQueueAddress = 3023 cpu_to_le32(ioc->reply_free_dma); 3024 mpi_request.ReplyDescriptorPostQueueAddress = 3025 cpu_to_le32(ioc->reply_post_free_dma); 3026#endif 3027 3028 /* This time stamp specifies number of milliseconds 3029 * since epoch ~ midnight January 1, 1970. 3030 */ 3031 do_gettimeofday(¤t_time); 3032 mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 + 3033 (current_time.tv_usec / 1000)); 3034 3035 if (ioc->logging_level & MPT_DEBUG_INIT) { 3036 u32 *mfp; 3037 int i; 3038 3039 mfp = (u32 *)&mpi_request; 3040 printk(KERN_DEBUG "\toffset:data\n"); 3041 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++) 3042 printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4, 3043 le32_to_cpu(mfp[i])); 3044 } 3045 3046 r = _base_handshake_req_reply_wait(ioc, 3047 sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request, 3048 sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10, 3049 sleep_flag); 3050 3051 if (r != 0) { 3052 printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n", 3053 ioc->name, __func__, r); 3054 return r; 3055 } 3056 3057 ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK; 3058 if (ioc_status != MPI2_IOCSTATUS_SUCCESS || 3059 mpi_reply.IOCLogInfo) { 3060 printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__); 3061 r = -EIO; 3062 } 3063 3064 return 0; 3065} 3066 3067/** 3068 * _base_send_port_enable - send port_enable(discovery stuff) to firmware 3069 * @ioc: per adapter object 3070 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3071 * 3072 * Returns 0 for success, non-zero for failure. 3073 */ 3074static int 3075_base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3076{ 3077 Mpi2PortEnableRequest_t *mpi_request; 3078 u32 ioc_state; 3079 unsigned long timeleft; 3080 int r = 0; 3081 u16 smid; 3082 3083 printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name); 3084 3085 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3086 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3087 ioc->name, __func__); 3088 return -EAGAIN; 3089 } 3090 3091 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3092 if (!smid) { 3093 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3094 ioc->name, __func__); 3095 return -EAGAIN; 3096 } 3097 3098 ioc->base_cmds.status = MPT2_CMD_PENDING; 3099 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3100 ioc->base_cmds.smid = smid; 3101 memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t)); 3102 mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE; 3103 mpi_request->VF_ID = 0; /* TODO */ 3104 mpi_request->VP_ID = 0; 3105 3106 mpt2sas_base_put_smid_default(ioc, smid); 3107 init_completion(&ioc->base_cmds.done); 3108 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 3109 300*HZ); 3110 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3111 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3112 ioc->name, __func__); 3113 _debug_dump_mf(mpi_request, 3114 sizeof(Mpi2PortEnableRequest_t)/4); 3115 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3116 r = -EFAULT; 3117 else 3118 r = -ETIME; 3119 goto out; 3120 } else 3121 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3122 ioc->name, __func__)); 3123 3124 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL, 3125 60, sleep_flag); 3126 if (ioc_state) { 3127 printk(MPT2SAS_ERR_FMT "%s: failed going to operational state " 3128 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3129 r = -EFAULT; 3130 } 3131 out: 3132 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3133 printk(MPT2SAS_INFO_FMT "port enable: %s\n", 3134 ioc->name, ((r == 0) ? "SUCCESS" : "FAILED")); 3135 return r; 3136} 3137 3138/** 3139 * _base_unmask_events - turn on notification for this event 3140 * @ioc: per adapter object 3141 * @event: firmware event 3142 * 3143 * The mask is stored in ioc->event_masks. 3144 */ 3145static void 3146_base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event) 3147{ 3148 u32 desired_event; 3149 3150 if (event >= 128) 3151 return; 3152 3153 desired_event = (1 << (event % 32)); 3154 3155 if (event < 32) 3156 ioc->event_masks[0] &= ~desired_event; 3157 else if (event < 64) 3158 ioc->event_masks[1] &= ~desired_event; 3159 else if (event < 96) 3160 ioc->event_masks[2] &= ~desired_event; 3161 else if (event < 128) 3162 ioc->event_masks[3] &= ~desired_event; 3163} 3164 3165/** 3166 * _base_event_notification - send event notification 3167 * @ioc: per adapter object 3168 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3169 * 3170 * Returns 0 for success, non-zero for failure. 3171 */ 3172static int 3173_base_event_notification(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3174{ 3175 Mpi2EventNotificationRequest_t *mpi_request; 3176 unsigned long timeleft; 3177 u16 smid; 3178 int r = 0; 3179 int i; 3180 3181 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3182 __func__)); 3183 3184 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3185 printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n", 3186 ioc->name, __func__); 3187 return -EAGAIN; 3188 } 3189 3190 smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx); 3191 if (!smid) { 3192 printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n", 3193 ioc->name, __func__); 3194 return -EAGAIN; 3195 } 3196 ioc->base_cmds.status = MPT2_CMD_PENDING; 3197 mpi_request = mpt2sas_base_get_msg_frame(ioc, smid); 3198 ioc->base_cmds.smid = smid; 3199 memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t)); 3200 mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION; 3201 mpi_request->VF_ID = 0; /* TODO */ 3202 mpi_request->VP_ID = 0; 3203 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3204 mpi_request->EventMasks[i] = 3205 cpu_to_le32(ioc->event_masks[i]); 3206 mpt2sas_base_put_smid_default(ioc, smid); 3207 init_completion(&ioc->base_cmds.done); 3208 timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ); 3209 if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) { 3210 printk(MPT2SAS_ERR_FMT "%s: timeout\n", 3211 ioc->name, __func__); 3212 _debug_dump_mf(mpi_request, 3213 sizeof(Mpi2EventNotificationRequest_t)/4); 3214 if (ioc->base_cmds.status & MPT2_CMD_RESET) 3215 r = -EFAULT; 3216 else 3217 r = -ETIME; 3218 } else 3219 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n", 3220 ioc->name, __func__)); 3221 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3222 return r; 3223} 3224 3225/** 3226 * mpt2sas_base_validate_event_type - validating event types 3227 * @ioc: per adapter object 3228 * @event: firmware event 3229 * 3230 * This will turn on firmware event notification when application 3231 * ask for that event. We don't mask events that are already enabled. 3232 */ 3233void 3234mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type) 3235{ 3236 int i, j; 3237 u32 event_mask, desired_event; 3238 u8 send_update_to_fw; 3239 3240 for (i = 0, send_update_to_fw = 0; i < 3241 MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) { 3242 event_mask = ~event_type[i]; 3243 desired_event = 1; 3244 for (j = 0; j < 32; j++) { 3245 if (!(event_mask & desired_event) && 3246 (ioc->event_masks[i] & desired_event)) { 3247 ioc->event_masks[i] &= ~desired_event; 3248 send_update_to_fw = 1; 3249 } 3250 desired_event = (desired_event << 1); 3251 } 3252 } 3253 3254 if (!send_update_to_fw) 3255 return; 3256 3257 mutex_lock(&ioc->base_cmds.mutex); 3258 _base_event_notification(ioc, CAN_SLEEP); 3259 mutex_unlock(&ioc->base_cmds.mutex); 3260} 3261 3262/** 3263 * _base_diag_reset - the "big hammer" start of day reset 3264 * @ioc: per adapter object 3265 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3266 * 3267 * Returns 0 for success, non-zero for failure. 3268 */ 3269static int 3270_base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3271{ 3272 u32 host_diagnostic; 3273 u32 ioc_state; 3274 u32 count; 3275 u32 hcb_size; 3276 3277 printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name); 3278 3279 _base_save_msix_table(ioc); 3280 3281 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n", 3282 ioc->name)); 3283 3284 count = 0; 3285 do { 3286 /* Write magic sequence to WriteSequence register 3287 * Loop until in diagnostic mode 3288 */ 3289 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic " 3290 "sequence\n", ioc->name)); 3291 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3292 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence); 3293 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence); 3294 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence); 3295 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence); 3296 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence); 3297 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence); 3298 3299 /* wait 100 msec */ 3300 if (sleep_flag == CAN_SLEEP) 3301 msleep(100); 3302 else 3303 mdelay(100); 3304 3305 if (count++ > 20) 3306 goto out; 3307 3308 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3309 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic " 3310 "sequence: count(%d), host_diagnostic(0x%08x)\n", 3311 ioc->name, count, host_diagnostic)); 3312 3313 } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0); 3314 3315 hcb_size = readl(&ioc->chip->HCBSize); 3316 3317 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n", 3318 ioc->name)); 3319 writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER, 3320 &ioc->chip->HostDiagnostic); 3321 3322 /* don't access any registers for 50 milliseconds */ 3323 msleep(50); 3324 3325 /* 300 second max wait */ 3326 for (count = 0; count < 3000000 ; count++) { 3327 3328 host_diagnostic = readl(&ioc->chip->HostDiagnostic); 3329 3330 if (host_diagnostic == 0xFFFFFFFF) 3331 goto out; 3332 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER)) 3333 break; 3334 3335 /* wait 100 msec */ 3336 if (sleep_flag == CAN_SLEEP) 3337 msleep(1); 3338 else 3339 mdelay(1); 3340 } 3341 3342 if (host_diagnostic & MPI2_DIAG_HCB_MODE) { 3343 3344 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter " 3345 "assuming the HCB Address points to good F/W\n", 3346 ioc->name)); 3347 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK; 3348 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW; 3349 writel(host_diagnostic, &ioc->chip->HostDiagnostic); 3350 3351 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT 3352 "re-enable the HCDW\n", ioc->name)); 3353 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE, 3354 &ioc->chip->HCBSize); 3355 } 3356 3357 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n", 3358 ioc->name)); 3359 writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET, 3360 &ioc->chip->HostDiagnostic); 3361 3362 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the " 3363 "diagnostic register\n", ioc->name)); 3364 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence); 3365 3366 drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the " 3367 "READY state\n", ioc->name)); 3368 ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20, 3369 sleep_flag); 3370 if (ioc_state) { 3371 printk(MPT2SAS_ERR_FMT "%s: failed going to ready state " 3372 " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state); 3373 goto out; 3374 } 3375 3376 _base_restore_msix_table(ioc); 3377 printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name); 3378 return 0; 3379 3380 out: 3381 printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name); 3382 return -EFAULT; 3383} 3384 3385/** 3386 * _base_make_ioc_ready - put controller in READY state 3387 * @ioc: per adapter object 3388 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3389 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3390 * 3391 * Returns 0 for success, non-zero for failure. 3392 */ 3393static int 3394_base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3395 enum reset_type type) 3396{ 3397 u32 ioc_state; 3398 3399 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3400 __func__)); 3401 3402 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3403 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n", 3404 ioc->name, __func__, ioc_state)); 3405 3406 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) 3407 return 0; 3408 3409 if (ioc_state & MPI2_DOORBELL_USED) { 3410 dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell " 3411 "active!\n", ioc->name)); 3412 goto issue_diag_reset; 3413 } 3414 3415 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3416 mpt2sas_base_fault_info(ioc, ioc_state & 3417 MPI2_DOORBELL_DATA_MASK); 3418 goto issue_diag_reset; 3419 } 3420 3421 if (type == FORCE_BIG_HAMMER) 3422 goto issue_diag_reset; 3423 3424 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL) 3425 if (!(_base_send_ioc_reset(ioc, 3426 MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) 3427 return 0; 3428 3429 issue_diag_reset: 3430 return _base_diag_reset(ioc, CAN_SLEEP); 3431} 3432 3433/** 3434 * _base_make_ioc_operational - put controller in OPERATIONAL state 3435 * @ioc: per adapter object 3436 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3437 * 3438 * Returns 0 for success, non-zero for failure. 3439 */ 3440static int 3441_base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3442{ 3443 int r, i; 3444 unsigned long flags; 3445 u32 reply_address; 3446 u16 smid; 3447 struct _tr_list *delayed_tr, *delayed_tr_next; 3448 3449 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3450 __func__)); 3451 3452 /* clean the delayed target reset list */ 3453 list_for_each_entry_safe(delayed_tr, delayed_tr_next, 3454 &ioc->delayed_tr_list, list) { 3455 list_del(&delayed_tr->list); 3456 kfree(delayed_tr); 3457 } 3458 3459 /* initialize the scsi lookup free list */ 3460 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3461 INIT_LIST_HEAD(&ioc->free_list); 3462 smid = 1; 3463 for (i = 0; i < ioc->scsiio_depth; i++, smid++) { 3464 ioc->scsi_lookup[i].cb_idx = 0xFF; 3465 ioc->scsi_lookup[i].smid = smid; 3466 ioc->scsi_lookup[i].scmd = NULL; 3467 list_add_tail(&ioc->scsi_lookup[i].tracker_list, 3468 &ioc->free_list); 3469 } 3470 3471 /* hi-priority queue */ 3472 INIT_LIST_HEAD(&ioc->hpr_free_list); 3473 smid = ioc->hi_priority_smid; 3474 for (i = 0; i < ioc->hi_priority_depth; i++, smid++) { 3475 ioc->hpr_lookup[i].cb_idx = 0xFF; 3476 ioc->hpr_lookup[i].smid = smid; 3477 list_add_tail(&ioc->hpr_lookup[i].tracker_list, 3478 &ioc->hpr_free_list); 3479 } 3480 3481 /* internal queue */ 3482 INIT_LIST_HEAD(&ioc->internal_free_list); 3483 smid = ioc->internal_smid; 3484 for (i = 0; i < ioc->internal_depth; i++, smid++) { 3485 ioc->internal_lookup[i].cb_idx = 0xFF; 3486 ioc->internal_lookup[i].smid = smid; 3487 list_add_tail(&ioc->internal_lookup[i].tracker_list, 3488 &ioc->internal_free_list); 3489 } 3490 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3491 3492 /* initialize Reply Free Queue */ 3493 for (i = 0, reply_address = (u32)ioc->reply_dma ; 3494 i < ioc->reply_free_queue_depth ; i++, reply_address += 3495 ioc->reply_sz) 3496 ioc->reply_free[i] = cpu_to_le32(reply_address); 3497 3498 /* initialize Reply Post Free Queue */ 3499 for (i = 0; i < ioc->reply_post_queue_depth; i++) 3500 ioc->reply_post_free[i].Words = ULLONG_MAX; 3501 3502 r = _base_send_ioc_init(ioc, sleep_flag); 3503 if (r) 3504 return r; 3505 3506 /* initialize the index's */ 3507 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; 3508 ioc->reply_post_host_index = 0; 3509 writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex); 3510 writel(0, &ioc->chip->ReplyPostHostIndex); 3511 3512 _base_unmask_interrupts(ioc); 3513 r = _base_event_notification(ioc, sleep_flag); 3514 if (r) 3515 return r; 3516 3517 if (sleep_flag == CAN_SLEEP) 3518 _base_static_config_pages(ioc); 3519 3520 r = _base_send_port_enable(ioc, sleep_flag); 3521 if (r) 3522 return r; 3523 3524 return r; 3525} 3526 3527/** 3528 * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap) 3529 * @ioc: per adapter object 3530 * 3531 * Return nothing. 3532 */ 3533void 3534mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc) 3535{ 3536 struct pci_dev *pdev = ioc->pdev; 3537 3538 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3539 __func__)); 3540 3541 _base_mask_interrupts(ioc); 3542 ioc->shost_recovery = 1; 3543 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3544 ioc->shost_recovery = 0; 3545 if (ioc->pci_irq) { 3546 synchronize_irq(pdev->irq); 3547 free_irq(ioc->pci_irq, ioc); 3548 } 3549 _base_disable_msix(ioc); 3550 if (ioc->chip_phys) 3551 iounmap(ioc->chip); 3552 ioc->pci_irq = -1; 3553 ioc->chip_phys = 0; 3554 pci_release_selected_regions(ioc->pdev, ioc->bars); 3555 pci_disable_pcie_error_reporting(pdev); 3556 pci_disable_device(pdev); 3557 return; 3558} 3559 3560/** 3561 * mpt2sas_base_attach - attach controller instance 3562 * @ioc: per adapter object 3563 * 3564 * Returns 0 for success, non-zero for failure. 3565 */ 3566int 3567mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) 3568{ 3569 int r, i; 3570 3571 dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3572 __func__)); 3573 3574 r = mpt2sas_base_map_resources(ioc); 3575 if (r) 3576 return r; 3577 3578 pci_set_drvdata(ioc->pdev, ioc->shost); 3579 r = _base_get_ioc_facts(ioc, CAN_SLEEP); 3580 if (r) 3581 goto out_free_resources; 3582 3583 r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET); 3584 if (r) 3585 goto out_free_resources; 3586 3587 ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts, 3588 sizeof(Mpi2PortFactsReply_t), GFP_KERNEL); 3589 if (!ioc->pfacts) { 3590 r = -ENOMEM; 3591 goto out_free_resources; 3592 } 3593 3594 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 3595 r = _base_get_port_facts(ioc, i, CAN_SLEEP); 3596 if (r) 3597 goto out_free_resources; 3598 } 3599 3600 r = _base_allocate_memory_pools(ioc, CAN_SLEEP); 3601 if (r) 3602 goto out_free_resources; 3603 3604 init_waitqueue_head(&ioc->reset_wq); 3605 3606 ioc->fwfault_debug = mpt2sas_fwfault_debug; 3607 3608 /* base internal command bits */ 3609 mutex_init(&ioc->base_cmds.mutex); 3610 ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3611 ioc->base_cmds.status = MPT2_CMD_NOT_USED; 3612 3613 /* transport internal command bits */ 3614 ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3615 ioc->transport_cmds.status = MPT2_CMD_NOT_USED; 3616 mutex_init(&ioc->transport_cmds.mutex); 3617 3618 /* scsih internal command bits */ 3619 ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3620 ioc->scsih_cmds.status = MPT2_CMD_NOT_USED; 3621 mutex_init(&ioc->scsih_cmds.mutex); 3622 3623 /* task management internal command bits */ 3624 ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3625 ioc->tm_cmds.status = MPT2_CMD_NOT_USED; 3626 mutex_init(&ioc->tm_cmds.mutex); 3627 3628 /* config page internal command bits */ 3629 ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3630 ioc->config_cmds.status = MPT2_CMD_NOT_USED; 3631 mutex_init(&ioc->config_cmds.mutex); 3632 3633 /* ctl module internal command bits */ 3634 ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); 3635 ioc->ctl_cmds.status = MPT2_CMD_NOT_USED; 3636 mutex_init(&ioc->ctl_cmds.mutex); 3637 3638 if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply || 3639 !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply || 3640 !ioc->config_cmds.reply || !ioc->ctl_cmds.reply) { 3641 r = -ENOMEM; 3642 goto out_free_resources; 3643 } 3644 3645 init_completion(&ioc->shost_recovery_done); 3646 3647 for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) 3648 ioc->event_masks[i] = -1; 3649 3650 /* here we enable the events we care about */ 3651 _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY); 3652 _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE); 3653 _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST); 3654 _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE); 3655 _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE); 3656 _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST); 3657 _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME); 3658 _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK); 3659 _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS); 3660 _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL); 3661 _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED); 3662 r = _base_make_ioc_operational(ioc, CAN_SLEEP); 3663 if (r) 3664 goto out_free_resources; 3665 3666 mpt2sas_base_start_watchdog(ioc); 3667 if (diag_buffer_enable != 0) 3668 mpt2sas_enable_diag_buffer(ioc, diag_buffer_enable); 3669 return 0; 3670 3671 out_free_resources: 3672 3673 ioc->remove_host = 1; 3674 mpt2sas_base_free_resources(ioc); 3675 _base_release_memory_pools(ioc); 3676 pci_set_drvdata(ioc->pdev, NULL); 3677 kfree(ioc->tm_cmds.reply); 3678 kfree(ioc->transport_cmds.reply); 3679 kfree(ioc->scsih_cmds.reply); 3680 kfree(ioc->config_cmds.reply); 3681 kfree(ioc->base_cmds.reply); 3682 kfree(ioc->ctl_cmds.reply); 3683 kfree(ioc->pfacts); 3684 ioc->ctl_cmds.reply = NULL; 3685 ioc->base_cmds.reply = NULL; 3686 ioc->tm_cmds.reply = NULL; 3687 ioc->scsih_cmds.reply = NULL; 3688 ioc->transport_cmds.reply = NULL; 3689 ioc->config_cmds.reply = NULL; 3690 ioc->pfacts = NULL; 3691 return r; 3692} 3693 3694 3695/** 3696 * mpt2sas_base_detach - remove controller instance 3697 * @ioc: per adapter object 3698 * 3699 * Return nothing. 3700 */ 3701void 3702mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) 3703{ 3704 3705 dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name, 3706 __func__)); 3707 3708 mpt2sas_base_stop_watchdog(ioc); 3709 mpt2sas_base_free_resources(ioc); 3710 _base_release_memory_pools(ioc); 3711 pci_set_drvdata(ioc->pdev, NULL); 3712 kfree(ioc->pfacts); 3713 kfree(ioc->ctl_cmds.reply); 3714 kfree(ioc->base_cmds.reply); 3715 kfree(ioc->tm_cmds.reply); 3716 kfree(ioc->transport_cmds.reply); 3717 kfree(ioc->scsih_cmds.reply); 3718 kfree(ioc->config_cmds.reply); 3719} 3720 3721/** 3722 * _base_reset_handler - reset callback handler (for base) 3723 * @ioc: per adapter object 3724 * @reset_phase: phase 3725 * 3726 * The handler for doing any required cleanup or initialization. 3727 * 3728 * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET, 3729 * MPT2_IOC_DONE_RESET 3730 * 3731 * Return nothing. 3732 */ 3733static void 3734_base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) 3735{ 3736 switch (reset_phase) { 3737 case MPT2_IOC_PRE_RESET: 3738 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3739 "MPT2_IOC_PRE_RESET\n", ioc->name, __func__)); 3740 break; 3741 case MPT2_IOC_AFTER_RESET: 3742 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3743 "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__)); 3744 if (ioc->transport_cmds.status & MPT2_CMD_PENDING) { 3745 ioc->transport_cmds.status |= MPT2_CMD_RESET; 3746 mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid); 3747 complete(&ioc->transport_cmds.done); 3748 } 3749 if (ioc->base_cmds.status & MPT2_CMD_PENDING) { 3750 ioc->base_cmds.status |= MPT2_CMD_RESET; 3751 mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid); 3752 complete(&ioc->base_cmds.done); 3753 } 3754 if (ioc->config_cmds.status & MPT2_CMD_PENDING) { 3755 ioc->config_cmds.status |= MPT2_CMD_RESET; 3756 mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid); 3757 ioc->config_cmds.smid = USHORT_MAX; 3758 complete(&ioc->config_cmds.done); 3759 } 3760 break; 3761 case MPT2_IOC_DONE_RESET: 3762 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: " 3763 "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); 3764 break; 3765 } 3766 mpt2sas_scsih_reset_handler(ioc, reset_phase); 3767 mpt2sas_ctl_reset_handler(ioc, reset_phase); 3768} 3769 3770/** 3771 * _wait_for_commands_to_complete - reset controller 3772 * @ioc: Pointer to MPT_ADAPTER structure 3773 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3774 * 3775 * This function waiting(3s) for all pending commands to complete 3776 * prior to putting controller in reset. 3777 */ 3778static void 3779_wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) 3780{ 3781 u32 ioc_state; 3782 unsigned long flags; 3783 u16 i; 3784 3785 ioc->pending_io_count = 0; 3786 if (sleep_flag != CAN_SLEEP) 3787 return; 3788 3789 ioc_state = mpt2sas_base_get_iocstate(ioc, 0); 3790 if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) 3791 return; 3792 3793 /* pending command count */ 3794 spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); 3795 for (i = 0; i < ioc->scsiio_depth; i++) 3796 if (ioc->scsi_lookup[i].cb_idx != 0xFF) 3797 ioc->pending_io_count++; 3798 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); 3799 3800 if (!ioc->pending_io_count) 3801 return; 3802 3803 /* wait for pending commands to complete */ 3804 wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ); 3805} 3806 3807/** 3808 * mpt2sas_base_hard_reset_handler - reset controller 3809 * @ioc: Pointer to MPT_ADAPTER structure 3810 * @sleep_flag: CAN_SLEEP or NO_SLEEP 3811 * @type: FORCE_BIG_HAMMER or SOFT_RESET 3812 * 3813 * Returns 0 for success, non-zero for failure. 3814 */ 3815int 3816mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, 3817 enum reset_type type) 3818{ 3819 int r; 3820 unsigned long flags; 3821 3822 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name, 3823 __func__)); 3824 3825 if (mpt2sas_fwfault_debug) 3826 mpt2sas_halt_firmware(ioc); 3827 3828 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3829 if (ioc->shost_recovery) { 3830 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3831 printk(MPT2SAS_ERR_FMT "%s: busy\n", 3832 ioc->name, __func__); 3833 return -EBUSY; 3834 } 3835 ioc->shost_recovery = 1; 3836 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3837 3838 _base_reset_handler(ioc, MPT2_IOC_PRE_RESET); 3839 _wait_for_commands_to_complete(ioc, sleep_flag); 3840 _base_mask_interrupts(ioc); 3841 r = _base_make_ioc_ready(ioc, sleep_flag, type); 3842 if (r) 3843 goto out; 3844 _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); 3845 r = _base_make_ioc_operational(ioc, sleep_flag); 3846 if (!r) 3847 _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); 3848 out: 3849 dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n", 3850 ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED"))); 3851 3852 spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags); 3853 ioc->shost_recovery = 0; 3854 complete(&ioc->shost_recovery_done); 3855 spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags); 3856 3857 return r; 3858} 3859