13558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard/* 23558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Copyright (C) 2012 - 2014 Allwinner Tech 33558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Pan Nan <pannan@allwinnertech.com> 43558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * 53558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Copyright (C) 2014 Maxime Ripard 63558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Maxime Ripard <maxime.ripard@free-electrons.com> 73558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * 83558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * This program is free software; you can redistribute it and/or 93558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * modify it under the terms of the GNU General Public License as 103558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * published by the Free Software Foundation; either version 2 of 113558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * the License, or (at your option) any later version. 123558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard */ 133558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 143558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/clk.h> 153558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/delay.h> 163558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/device.h> 173558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/interrupt.h> 183558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/io.h> 193558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/module.h> 203558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/platform_device.h> 213558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/pm_runtime.h> 223558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/reset.h> 233558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 243558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#include <linux/spi/spi.h> 253558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 263558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_DEPTH 128 273558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 283558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_GBL_CTL_REG 0x04 293558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_GBL_CTL_BUS_ENABLE BIT(0) 303558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_GBL_CTL_MASTER BIT(1) 313558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_GBL_CTL_TP BIT(7) 323558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_GBL_CTL_RST BIT(31) 333558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 343558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_REG 0x08 353558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_CPHA BIT(0) 363558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_CPOL BIT(1) 373558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_SPOL BIT(2) 38d31ad46f58e89fdb9f5b902aa7cc29689e123ddeAxel Lin#define SUN6I_TFR_CTL_CS_MASK 0x30 39d31ad46f58e89fdb9f5b902aa7cc29689e123ddeAxel Lin#define SUN6I_TFR_CTL_CS(cs) (((cs) << 4) & SUN6I_TFR_CTL_CS_MASK) 403558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_CS_MANUAL BIT(6) 413558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_CS_LEVEL BIT(7) 423558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_DHB BIT(8) 433558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_FBS BIT(12) 443558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TFR_CTL_XCH BIT(31) 453558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 463558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_INT_CTL_REG 0x10 473558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_INT_CTL_RF_OVF BIT(8) 483558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_INT_CTL_TC BIT(12) 493558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 503558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_INT_STA_REG 0x14 513558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 523558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_CTL_REG 0x18 533558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_CTL_RF_RST BIT(15) 543558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_CTL_TF_RST BIT(31) 553558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 563558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_STA_REG 0x1c 573558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_STA_RF_CNT_MASK 0x7f 583558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_STA_RF_CNT_BITS 0 593558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_STA_TF_CNT_MASK 0x7f 603558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_FIFO_STA_TF_CNT_BITS 16 613558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 623558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_CLK_CTL_REG 0x24 633558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_CLK_CTL_CDR2_MASK 0xff 643558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_CLK_CTL_CDR2(div) (((div) & SUN6I_CLK_CTL_CDR2_MASK) << 0) 653558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_CLK_CTL_CDR1_MASK 0xf 663558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_CLK_CTL_CDR1(div) (((div) & SUN6I_CLK_CTL_CDR1_MASK) << 8) 673558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_CLK_CTL_DRS BIT(12) 683558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 693558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_BURST_CNT_REG 0x30 703558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_BURST_CNT(cnt) ((cnt) & 0xffffff) 713558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 723558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_XMIT_CNT_REG 0x34 733558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_XMIT_CNT(cnt) ((cnt) & 0xffffff) 743558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 753558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_BURST_CTL_CNT_REG 0x38 763558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_BURST_CTL_CNT_STC(cnt) ((cnt) & 0xffffff) 773558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 783558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_TXDATA_REG 0x200 793558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard#define SUN6I_RXDATA_REG 0x300 803558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 813558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstruct sun6i_spi { 823558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct spi_master *master; 833558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard void __iomem *base_addr; 843558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct clk *hclk; 853558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct clk *mclk; 863558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct reset_control *rstc; 873558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 883558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct completion done; 893558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 903558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard const u8 *tx_buf; 913558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard u8 *rx_buf; 923558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard int len; 933558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard}; 943558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 953558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg) 963558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 973558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return readl(sspi->base_addr + reg); 983558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 993558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1003558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic inline void sun6i_spi_write(struct sun6i_spi *sspi, u32 reg, u32 value) 1013558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 1023558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard writel(value, sspi->base_addr + reg); 1033558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 1043558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1053558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic inline void sun6i_spi_drain_fifo(struct sun6i_spi *sspi, int len) 1063558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 1073558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard u32 reg, cnt; 1083558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard u8 byte; 1093558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1103558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* See how much data is available */ 1113558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg = sun6i_spi_read(sspi, SUN6I_FIFO_STA_REG); 1123558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg &= SUN6I_FIFO_STA_RF_CNT_MASK; 1133558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard cnt = reg >> SUN6I_FIFO_STA_RF_CNT_BITS; 1143558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1153558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (len > cnt) 1163558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard len = cnt; 1173558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1183558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard while (len--) { 1193558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard byte = readb(sspi->base_addr + SUN6I_RXDATA_REG); 1203558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (sspi->rx_buf) 1213558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard *sspi->rx_buf++ = byte; 1223558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 1233558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 1243558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1253558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic inline void sun6i_spi_fill_fifo(struct sun6i_spi *sspi, int len) 1263558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 1273558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard u8 byte; 1283558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1293558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (len > sspi->len) 1303558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard len = sspi->len; 1313558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1323558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard while (len--) { 1333558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard byte = sspi->tx_buf ? *sspi->tx_buf++ : 0; 1343558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard writeb(byte, sspi->base_addr + SUN6I_TXDATA_REG); 1353558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->len--; 1363558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 1373558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 1383558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1393558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic void sun6i_spi_set_cs(struct spi_device *spi, bool enable) 1403558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 1413558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct sun6i_spi *sspi = spi_master_get_devdata(spi->master); 1423558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard u32 reg; 1433558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1443558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG); 1453558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg &= ~SUN6I_TFR_CTL_CS_MASK; 1463558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg |= SUN6I_TFR_CTL_CS(spi->chip_select); 1473558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1483558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (enable) 1493558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg |= SUN6I_TFR_CTL_CS_LEVEL; 1503558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard else 1513558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg &= ~SUN6I_TFR_CTL_CS_LEVEL; 1523558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1533558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg); 1543558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 1553558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1563558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1573558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic int sun6i_spi_transfer_one(struct spi_master *master, 1583558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct spi_device *spi, 1593558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct spi_transfer *tfr) 1603558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 1613558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct sun6i_spi *sspi = spi_master_get_devdata(master); 1623558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard unsigned int mclk_rate, div, timeout; 1633558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard unsigned int tx_len = 0; 1643558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard int ret = 0; 1653558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard u32 reg; 1663558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1673558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* We don't support transfer larger than the FIFO */ 1683558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (tfr->len > SUN6I_FIFO_DEPTH) 1693558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return -EINVAL; 1703558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1713558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reinit_completion(&sspi->done); 1723558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->tx_buf = tfr->tx_buf; 1733558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->rx_buf = tfr->rx_buf; 1743558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->len = tfr->len; 1753558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1763558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Clear pending interrupts */ 1773558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_INT_STA_REG, ~0); 1783558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1793558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Reset FIFO */ 1803558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_FIFO_CTL_REG, 1813558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard SUN6I_FIFO_CTL_RF_RST | SUN6I_FIFO_CTL_TF_RST); 1823558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1833558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* 1843558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Setup the transfer control register: Chip Select, 1853558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * polarities, etc. 1863558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard */ 1873558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG); 1883558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1893558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (spi->mode & SPI_CPOL) 1903558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg |= SUN6I_TFR_CTL_CPOL; 1913558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard else 1923558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg &= ~SUN6I_TFR_CTL_CPOL; 1933558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1943558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (spi->mode & SPI_CPHA) 1953558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg |= SUN6I_TFR_CTL_CPHA; 1963558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard else 1973558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg &= ~SUN6I_TFR_CTL_CPHA; 1983558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 1993558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (spi->mode & SPI_LSB_FIRST) 2003558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg |= SUN6I_TFR_CTL_FBS; 2013558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard else 2023558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg &= ~SUN6I_TFR_CTL_FBS; 2033558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2043558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* 2053558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * If it's a TX only transfer, we don't want to fill the RX 2063558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * FIFO with bogus data 2073558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard */ 2083558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (sspi->rx_buf) 2093558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg &= ~SUN6I_TFR_CTL_DHB; 2103558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard else 2113558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg |= SUN6I_TFR_CTL_DHB; 2123558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2133558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* We want to control the chip select manually */ 2143558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg |= SUN6I_TFR_CTL_CS_MANUAL; 2153558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2163558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg); 2173558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2183558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Ensure that we have a parent clock fast enough */ 2193558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard mclk_rate = clk_get_rate(sspi->mclk); 2203558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (mclk_rate < (2 * spi->max_speed_hz)) { 2213558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz); 2223558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard mclk_rate = clk_get_rate(sspi->mclk); 2233558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 2243558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2253558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* 2263558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Setup clock divider. 2273558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * 2283558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * We have two choices there. Either we can use the clock 2293558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * divide rate 1, which is calculated thanks to this formula: 2303558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * SPI_CLK = MOD_CLK / (2 ^ cdr) 2313558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Or we can use CDR2, which is calculated with the formula: 2323558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * SPI_CLK = MOD_CLK / (2 * (cdr + 1)) 2333558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * Wether we use the former or the latter is set through the 2343558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * DRS bit. 2353558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * 2363558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * First try CDR2, and if we can't reach the expected 2373558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * frequency, fall back to CDR1. 2383558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard */ 2393558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard div = mclk_rate / (2 * spi->max_speed_hz); 2403558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) { 2413558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (div > 0) 2423558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard div--; 2433558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2443558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS; 2453558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } else { 2463558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz); 2473558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg = SUN6I_CLK_CTL_CDR1(div); 2483558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 2493558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2503558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_CLK_CTL_REG, reg); 2513558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2523558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Setup the transfer now... */ 2533558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (sspi->tx_buf) 2543558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard tx_len = tfr->len; 2553558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2563558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Setup the counters */ 2573558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_BURST_CNT_REG, SUN6I_BURST_CNT(tfr->len)); 2583558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_XMIT_CNT_REG, SUN6I_XMIT_CNT(tx_len)); 2593558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_BURST_CTL_CNT_REG, 2603558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard SUN6I_BURST_CTL_CNT_STC(tx_len)); 2613558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2623558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Fill the TX FIFO */ 2633558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_fill_fifo(sspi, SUN6I_FIFO_DEPTH); 2643558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2653558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Enable the interrupts */ 2663558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, SUN6I_INT_CTL_TC); 2673558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2683558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Start the transfer */ 2693558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reg = sun6i_spi_read(sspi, SUN6I_TFR_CTL_REG); 2703558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_TFR_CTL_REG, reg | SUN6I_TFR_CTL_XCH); 2713558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2723558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard timeout = wait_for_completion_timeout(&sspi->done, 2733558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard msecs_to_jiffies(1000)); 2743558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (!timeout) { 2753558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = -ETIMEDOUT; 2763558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto out; 2773558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 2783558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2793558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_drain_fifo(sspi, SUN6I_FIFO_DEPTH); 2803558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2813558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardout: 2823558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0); 2833558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2843558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return ret; 2853558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 2863558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2873558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic irqreturn_t sun6i_spi_handler(int irq, void *dev_id) 2883558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 2893558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct sun6i_spi *sspi = dev_id; 2903558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard u32 status = sun6i_spi_read(sspi, SUN6I_INT_STA_REG); 2913558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2923558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* Transfer complete */ 2933558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (status & SUN6I_INT_CTL_TC) { 2943558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_INT_STA_REG, SUN6I_INT_CTL_TC); 2953558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard complete(&sspi->done); 2963558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return IRQ_HANDLED; 2973558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 2983558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 2993558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return IRQ_NONE; 3003558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 3013558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3023558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic int sun6i_spi_runtime_resume(struct device *dev) 3033558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 3043558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct spi_master *master = dev_get_drvdata(dev); 3053558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct sun6i_spi *sspi = spi_master_get_devdata(master); 3063558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard int ret; 3073558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3083558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = clk_prepare_enable(sspi->hclk); 3093558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (ret) { 3103558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(dev, "Couldn't enable AHB clock\n"); 3113558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto out; 3123558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 3133558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3143558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = clk_prepare_enable(sspi->mclk); 3153558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (ret) { 3163558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(dev, "Couldn't enable module clock\n"); 3173558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err; 3183558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 3193558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3203558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = reset_control_deassert(sspi->rstc); 3213558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (ret) { 3223558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(dev, "Couldn't deassert the device from reset\n"); 3233558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err2; 3243558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 3253558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3263558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_write(sspi, SUN6I_GBL_CTL_REG, 3273558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard SUN6I_GBL_CTL_BUS_ENABLE | SUN6I_GBL_CTL_MASTER | SUN6I_GBL_CTL_TP); 3283558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3293558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return 0; 3303558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3313558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Riparderr2: 3323558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard clk_disable_unprepare(sspi->mclk); 3333558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Riparderr: 3343558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard clk_disable_unprepare(sspi->hclk); 3353558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardout: 3363558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return ret; 3373558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 3383558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3393558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic int sun6i_spi_runtime_suspend(struct device *dev) 3403558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 3413558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct spi_master *master = dev_get_drvdata(dev); 3423558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct sun6i_spi *sspi = spi_master_get_devdata(master); 3433558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3443558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard reset_control_assert(sspi->rstc); 3453558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard clk_disable_unprepare(sspi->mclk); 3463558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard clk_disable_unprepare(sspi->hclk); 3473558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3483558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return 0; 3493558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 3503558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3513558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic int sun6i_spi_probe(struct platform_device *pdev) 3523558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 3533558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct spi_master *master; 3543558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct sun6i_spi *sspi; 3553558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard struct resource *res; 3563558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard int ret = 0, irq; 3573558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3583558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard master = spi_alloc_master(&pdev->dev, sizeof(struct sun6i_spi)); 3593558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (!master) { 3603558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "Unable to allocate SPI Master\n"); 3613558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return -ENOMEM; 3623558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 3633558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3643558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard platform_set_drvdata(pdev, master); 3653558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi = spi_master_get_devdata(master); 3663558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3673558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 3683558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->base_addr = devm_ioremap_resource(&pdev->dev, res); 3693558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (IS_ERR(sspi->base_addr)) { 3703558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = PTR_ERR(sspi->base_addr); 3713558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_free_master; 3723558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 3733558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3743558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard irq = platform_get_irq(pdev, 0); 3753558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (irq < 0) { 3763558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "No spi IRQ specified\n"); 3773558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = -ENXIO; 3783558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_free_master; 3793558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 3803558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3813558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = devm_request_irq(&pdev->dev, irq, sun6i_spi_handler, 3823558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 0, "sun6i-spi", sspi); 3833558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (ret) { 3843558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "Cannot request IRQ\n"); 3853558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_free_master; 3863558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 3873558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3883558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->master = master; 3893558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard master->set_cs = sun6i_spi_set_cs; 3903558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard master->transfer_one = sun6i_spi_transfer_one; 3913558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard master->num_chipselect = 4; 3923558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST; 393743a46b89a59abcc6566d9d90b1f28bfa666702eAxel Lin master->bits_per_word_mask = SPI_BPW_MASK(8); 3943558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard master->dev.of_node = pdev->dev.of_node; 3953558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard master->auto_runtime_pm = true; 3963558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 3973558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->hclk = devm_clk_get(&pdev->dev, "ahb"); 3983558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (IS_ERR(sspi->hclk)) { 3993558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "Unable to acquire AHB clock\n"); 4003558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = PTR_ERR(sspi->hclk); 4013558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_free_master; 4023558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 4033558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4043558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->mclk = devm_clk_get(&pdev->dev, "mod"); 4053558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (IS_ERR(sspi->mclk)) { 4063558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "Unable to acquire module clock\n"); 4073558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = PTR_ERR(sspi->mclk); 4083558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_free_master; 4093558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 4103558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4113558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard init_completion(&sspi->done); 4123558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4133558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sspi->rstc = devm_reset_control_get(&pdev->dev, NULL); 4143558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (IS_ERR(sspi->rstc)) { 4153558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "Couldn't get reset controller\n"); 4163558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = PTR_ERR(sspi->rstc); 4173558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_free_master; 4183558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 4193558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4203558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard /* 4213558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * This wake-up/shutdown pattern is to be able to have the 4223558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard * device woken up, even if runtime_pm is disabled 4233558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard */ 4243558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = sun6i_spi_runtime_resume(&pdev->dev); 4253558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (ret) { 4263558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "Couldn't resume the device\n"); 4273558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_free_master; 4283558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 4293558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4303558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard pm_runtime_set_active(&pdev->dev); 4313558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard pm_runtime_enable(&pdev->dev); 4323558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard pm_runtime_idle(&pdev->dev); 4333558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4343558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard ret = devm_spi_register_master(&pdev->dev, master); 4353558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard if (ret) { 4363558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard dev_err(&pdev->dev, "cannot register SPI master\n"); 4373558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard goto err_pm_disable; 4383558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard } 4393558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4403558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return 0; 4413558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4423558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Riparderr_pm_disable: 4433558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard pm_runtime_disable(&pdev->dev); 4443558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard sun6i_spi_runtime_suspend(&pdev->dev); 4453558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Riparderr_free_master: 4463558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard spi_master_put(master); 4473558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return ret; 4483558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 4493558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4503558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic int sun6i_spi_remove(struct platform_device *pdev) 4513558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard{ 4523558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard pm_runtime_disable(&pdev->dev); 4533558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4543558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard return 0; 4553558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard} 4563558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4573558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic const struct of_device_id sun6i_spi_match[] = { 4583558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard { .compatible = "allwinner,sun6i-a31-spi", }, 4593558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard {} 4603558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard}; 4613558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime RipardMODULE_DEVICE_TABLE(of, sun6i_spi_match); 4623558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4633558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic const struct dev_pm_ops sun6i_spi_pm_ops = { 4643558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .runtime_resume = sun6i_spi_runtime_resume, 4653558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .runtime_suspend = sun6i_spi_runtime_suspend, 4663558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard}; 4673558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4683558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardstatic struct platform_driver sun6i_spi_driver = { 4693558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .probe = sun6i_spi_probe, 4703558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .remove = sun6i_spi_remove, 4713558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .driver = { 4723558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .name = "sun6i-spi", 4733558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .owner = THIS_MODULE, 4743558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .of_match_table = sun6i_spi_match, 4753558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard .pm = &sun6i_spi_pm_ops, 4763558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard }, 4773558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard}; 4783558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripardmodule_platform_driver(sun6i_spi_driver); 4793558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime Ripard 4803558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime RipardMODULE_AUTHOR("Pan Nan <pannan@allwinnertech.com>"); 4813558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime RipardMODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); 4823558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime RipardMODULE_DESCRIPTION("Allwinner A31 SPI controller driver"); 4833558fe900e8af6c3bfadeff24a12ffb19ac9b108Maxime RipardMODULE_LICENSE("GPL"); 484