pcmuio.c revision 976fe5ab27e682d3dbfec26517a8a248638af07d
16baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
26baef150380d561a4d695a6be4fc509821c23611Calin Culianu    comedi/drivers/pcmuio.c
36baef150380d561a4d695a6be4fc509821c23611Calin Culianu    Driver for Winsystems PC-104 based 48-channel and 96-channel DIO boards.
46baef150380d561a4d695a6be4fc509821c23611Calin Culianu
56baef150380d561a4d695a6be4fc509821c23611Calin Culianu    COMEDI - Linux Control and Measurement Device Interface
66baef150380d561a4d695a6be4fc509821c23611Calin Culianu    Copyright (C) 2006 Calin A. Culianu <calin@ajvar.org>
76baef150380d561a4d695a6be4fc509821c23611Calin Culianu
86baef150380d561a4d695a6be4fc509821c23611Calin Culianu    This program is free software; you can redistribute it and/or modify
96baef150380d561a4d695a6be4fc509821c23611Calin Culianu    it under the terms of the GNU General Public License as published by
106baef150380d561a4d695a6be4fc509821c23611Calin Culianu    the Free Software Foundation; either version 2 of the License, or
116baef150380d561a4d695a6be4fc509821c23611Calin Culianu    (at your option) any later version.
126baef150380d561a4d695a6be4fc509821c23611Calin Culianu
136baef150380d561a4d695a6be4fc509821c23611Calin Culianu    This program is distributed in the hope that it will be useful,
146baef150380d561a4d695a6be4fc509821c23611Calin Culianu    but WITHOUT ANY WARRANTY; without even the implied warranty of
156baef150380d561a4d695a6be4fc509821c23611Calin Culianu    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
166baef150380d561a4d695a6be4fc509821c23611Calin Culianu    GNU General Public License for more details.
176baef150380d561a4d695a6be4fc509821c23611Calin Culianu
186baef150380d561a4d695a6be4fc509821c23611Calin Culianu    You should have received a copy of the GNU General Public License
196baef150380d561a4d695a6be4fc509821c23611Calin Culianu    along with this program; if not, write to the Free Software
206baef150380d561a4d695a6be4fc509821c23611Calin Culianu    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
216baef150380d561a4d695a6be4fc509821c23611Calin Culianu*/
226baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
236baef150380d561a4d695a6be4fc509821c23611Calin CulianuDriver: pcmuio
246baef150380d561a4d695a6be4fc509821c23611Calin CulianuDescription: A driver for the PCM-UIO48A and PCM-UIO96A boards from Winsystems.
256baef150380d561a4d695a6be4fc509821c23611Calin CulianuDevices: [Winsystems] PCM-UIO48A (pcmuio48), PCM-UIO96A (pcmuio96)
266baef150380d561a4d695a6be4fc509821c23611Calin CulianuAuthor: Calin Culianu <calin@ajvar.org>
276baef150380d561a4d695a6be4fc509821c23611Calin CulianuUpdated: Fri, 13 Jan 2006 12:01:01 -0500
286baef150380d561a4d695a6be4fc509821c23611Calin CulianuStatus: works
296baef150380d561a4d695a6be4fc509821c23611Calin Culianu
306baef150380d561a4d695a6be4fc509821c23611Calin CulianuA driver for the relatively straightforward-to-program PCM-UIO48A and
316baef150380d561a4d695a6be4fc509821c23611Calin CulianuPCM-UIO96A boards from Winsystems.  These boards use either one or two
326baef150380d561a4d695a6be4fc509821c23611Calin Culianu(in the 96-DIO version) WS16C48 ASIC HighDensity I/O Chips (HDIO).
336baef150380d561a4d695a6be4fc509821c23611Calin CulianuThis chip is interesting in that each I/O line is individually
346baef150380d561a4d695a6be4fc509821c23611Calin Culianuprogrammable for INPUT or OUTPUT (thus comedi_dio_config can be done
356baef150380d561a4d695a6be4fc509821c23611Calin Culianuon a per-channel basis).  Also, each chip supports edge-triggered
366baef150380d561a4d695a6be4fc509821c23611Calin Culianuinterrupts for the first 24 I/O lines.  Of course, since the
376baef150380d561a4d695a6be4fc509821c23611Calin Culianu96-channel version of the board has two ASICs, it can detect polarity
386baef150380d561a4d695a6be4fc509821c23611Calin Culianuchanges on up to 48 I/O lines.  Since this is essentially an (non-PnP)
396baef150380d561a4d695a6be4fc509821c23611Calin CulianuISA board, I/O Address and IRQ selection are done through jumpers on
406baef150380d561a4d695a6be4fc509821c23611Calin Culianuthe board.  You need to pass that information to this driver as the
416baef150380d561a4d695a6be4fc509821c23611Calin Culianufirst and second comedi_config option, respectively.  Note that the
426baef150380d561a4d695a6be4fc509821c23611Calin Culianu48-channel version uses 16 bytes of IO memory and the 96-channel
436baef150380d561a4d695a6be4fc509821c23611Calin Culianuversion uses 32-bytes (in case you are worried about conflicts).  The
446baef150380d561a4d695a6be4fc509821c23611Calin Culianu48-channel board is split into two 24-channel comedi subdevices.
456baef150380d561a4d695a6be4fc509821c23611Calin CulianuThe 96-channel board is split into 4 24-channel DIO subdevices.
466baef150380d561a4d695a6be4fc509821c23611Calin Culianu
476baef150380d561a4d695a6be4fc509821c23611Calin CulianuNote that IRQ support has been added, but it is untested.
486baef150380d561a4d695a6be4fc509821c23611Calin Culianu
496baef150380d561a4d695a6be4fc509821c23611Calin CulianuTo use edge-detection IRQ support, pass the IRQs of both ASICS
506baef150380d561a4d695a6be4fc509821c23611Calin Culianu(for the 96 channel version) or just 1 ASIC (for 48-channel version).
516baef150380d561a4d695a6be4fc509821c23611Calin CulianuThen, use use comedi_commands with TRIG_NOW.
526baef150380d561a4d695a6be4fc509821c23611Calin CulianuYour callback will be called each time an edge is triggered, and the data
536baef150380d561a4d695a6be4fc509821c23611Calin Culianuvalues will be two sample_t's, which should be concatenated to form one
546baef150380d561a4d695a6be4fc509821c23611Calin Culianu32-bit unsigned int.  This value is the mask of channels that had
556baef150380d561a4d695a6be4fc509821c23611Calin Culianuedges detected from your channel list.  Note that the bits positions
566baef150380d561a4d695a6be4fc509821c23611Calin Culianuin the mask correspond to positions in your chanlist when you specified
576baef150380d561a4d695a6be4fc509821c23611Calin Culianuthe command and *not* channel id's!
586baef150380d561a4d695a6be4fc509821c23611Calin Culianu
596baef150380d561a4d695a6be4fc509821c23611Calin CulianuTo set the polarity of the edge-detection interrupts pass a nonzero value for
606baef150380d561a4d695a6be4fc509821c23611Calin Culianueither CR_RANGE or CR_AREF for edge-up polarity, or a zero value for both
616baef150380d561a4d695a6be4fc509821c23611Calin CulianuCR_RANGE and CR_AREF if you want edge-down polarity.
626baef150380d561a4d695a6be4fc509821c23611Calin Culianu
636baef150380d561a4d695a6be4fc509821c23611Calin CulianuIn the 48-channel version:
646baef150380d561a4d695a6be4fc509821c23611Calin Culianu
656baef150380d561a4d695a6be4fc509821c23611Calin CulianuOn subdev 0, the first 24 channels channels are edge-detect channels.
666baef150380d561a4d695a6be4fc509821c23611Calin Culianu
676baef150380d561a4d695a6be4fc509821c23611Calin CulianuIn the 96-channel board you have the collowing channels that can do edge detection:
686baef150380d561a4d695a6be4fc509821c23611Calin Culianu
696baef150380d561a4d695a6be4fc509821c23611Calin Culianusubdev 0, channels 0-24  (first 24 channels of 1st ASIC)
706baef150380d561a4d695a6be4fc509821c23611Calin Culianusubdev 2, channels 0-24  (first 24 channels of 2nd ASIC)
716baef150380d561a4d695a6be4fc509821c23611Calin Culianu
726baef150380d561a4d695a6be4fc509821c23611Calin CulianuConfiguration Options:
736baef150380d561a4d695a6be4fc509821c23611Calin Culianu  [0] - I/O port base address
746baef150380d561a4d695a6be4fc509821c23611Calin Culianu  [1] - IRQ (for first ASIC, or first 24 channels)
756baef150380d561a4d695a6be4fc509821c23611Calin Culianu  [2] - IRQ for second ASIC (pcmuio96 only - IRQ for chans 48-72 .. can be the same as first irq!)
766baef150380d561a4d695a6be4fc509821c23611Calin Culianu*/
776baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7825436dc9d84f1be60ff549c9ab712bba2835f284Greg Kroah-Hartman#include <linux/interrupt.h>
795a0e3ad6af8660be21ca98a971cd00f331318c05Tejun Heo#include <linux/slab.h>
806baef150380d561a4d695a6be4fc509821c23611Calin Culianu#include "../comedidev.h"
810b8f754a6220158f2348bc6eae2772bc64bc98a2Bill Pemberton#include "pcm_common.h"
826baef150380d561a4d695a6be4fc509821c23611Calin Culianu
836baef150380d561a4d695a6be4fc509821c23611Calin Culianu#include <linux/pci.h>		/* for PCI devices */
846baef150380d561a4d695a6be4fc509821c23611Calin Culianu
856baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define CHANS_PER_PORT   8
866baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define PORTS_PER_ASIC   6
876baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define INTR_PORTS_PER_ASIC   3
886baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define MAX_CHANS_PER_SUBDEV 24	/* number of channels per comedi subdevice */
896baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define PORTS_PER_SUBDEV (MAX_CHANS_PER_SUBDEV/CHANS_PER_PORT)
906baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define CHANS_PER_ASIC (CHANS_PER_PORT*PORTS_PER_ASIC)
916baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define INTR_CHANS_PER_ASIC 24
926baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define INTR_PORTS_PER_SUBDEV (INTR_CHANS_PER_ASIC/CHANS_PER_PORT)
936baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define MAX_DIO_CHANS   (PORTS_PER_ASIC*2*CHANS_PER_PORT)
946baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define MAX_ASICS       (MAX_DIO_CHANS/CHANS_PER_ASIC)
956baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define SDEV_NO ((int)(s - dev->subdevices))
966baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define CALC_N_SUBDEVS(nchans) ((nchans)/MAX_CHANS_PER_SUBDEV + (!!((nchans)%MAX_CHANS_PER_SUBDEV)) /*+ (nchans > INTR_CHANS_PER_ASIC ? 2 : 1)*/)
976baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* IO Memory sizes */
986baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define ASIC_IOSIZE (0x10)
996baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define PCMUIO48_IOSIZE ASIC_IOSIZE
1006baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define PCMUIO96_IOSIZE (ASIC_IOSIZE*2)
1016baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1026baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* Some offsets - these are all in the 16byte IO memory offset from
1036baef150380d561a4d695a6be4fc509821c23611Calin Culianu   the base address.  Note that there is a paging scheme to swap out
1046baef150380d561a4d695a6be4fc509821c23611Calin Culianu   offsets 0x8-0xA using the PAGELOCK register.  See the table below.
1056baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1066baef150380d561a4d695a6be4fc509821c23611Calin Culianu  Register(s)       Pages        R/W?        Description
1076baef150380d561a4d695a6be4fc509821c23611Calin Culianu  --------------------------------------------------------------
1086baef150380d561a4d695a6be4fc509821c23611Calin Culianu  REG_PORTx         All          R/W         Read/Write/Configure IO
1096baef150380d561a4d695a6be4fc509821c23611Calin Culianu  REG_INT_PENDING   All          ReadOnly    Quickly see which INT_IDx has int.
1106baef150380d561a4d695a6be4fc509821c23611Calin Culianu  REG_PAGELOCK      All          WriteOnly   Select a page
1116baef150380d561a4d695a6be4fc509821c23611Calin Culianu  REG_POLx          Pg. 1 only   WriteOnly   Select edge-detection polarity
1126baef150380d561a4d695a6be4fc509821c23611Calin Culianu  REG_ENABx         Pg. 2 only   WriteOnly   Enable/Disable edge-detect. int.
1136baef150380d561a4d695a6be4fc509821c23611Calin Culianu  REG_INT_IDx       Pg. 3 only   R/W         See which ports/bits have ints.
1146baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
1156baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PORT0 0x0
1166baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PORT1 0x1
1176baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PORT2 0x2
1186baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PORT3 0x3
1196baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PORT4 0x4
1206baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PORT5 0x5
1216baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_INT_PENDING 0x6
1226baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PAGELOCK 0x7	/* page selector register, upper 2 bits select a page
1236baef150380d561a4d695a6be4fc509821c23611Calin Culianu				   and bits 0-5 are used to 'lock down' a particular
1246baef150380d561a4d695a6be4fc509821c23611Calin Culianu				   port above to make it readonly.  */
1256baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_POL0 0x8
1266baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_POL1 0x9
1276baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_POL2 0xA
1286baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_ENAB0 0x8
1296baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_ENAB1 0x9
1306baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_ENAB2 0xA
1316baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_INT_ID0 0x8
1326baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_INT_ID1 0x9
1336baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_INT_ID2 0xA
1346baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1356baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define NUM_PAGED_REGS 3
1366baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define NUM_PAGES 4
1376baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define FIRST_PAGED_REG 0x8
1386baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PAGE_BITOFFSET 6
1396baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_LOCK_BITOFFSET 0
1406baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_PAGE_MASK (~((0x1<<REG_PAGE_BITOFFSET)-1))
1416baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define REG_LOCK_MASK ~(REG_PAGE_MASK)
1426baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define PAGE_POL 1
1436baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define PAGE_ENAB 2
1446baef150380d561a4d695a6be4fc509821c23611Calin Culianu#define PAGE_INT_ID 3
1456baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1466baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
1476baef150380d561a4d695a6be4fc509821c23611Calin Culianu * Board descriptions for two imaginary boards.  Describing the
1486baef150380d561a4d695a6be4fc509821c23611Calin Culianu * boards in this way is optional, and completely driver-dependent.
1496baef150380d561a4d695a6be4fc509821c23611Calin Culianu * Some drivers use arrays such as this, other do not.
1506baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
15170a6001aeffeaa12f2a1c21470e8f3bdfb6ef8e7Bill Pembertonstruct pcmuio_board {
1526baef150380d561a4d695a6be4fc509821c23611Calin Culianu	const char *name;
1536baef150380d561a4d695a6be4fc509821c23611Calin Culianu	const int num_asics;
1546baef150380d561a4d695a6be4fc509821c23611Calin Culianu	const int num_channels_per_port;
1556baef150380d561a4d695a6be4fc509821c23611Calin Culianu	const int num_ports;
15670a6001aeffeaa12f2a1c21470e8f3bdfb6ef8e7Bill Pemberton};
1576baef150380d561a4d695a6be4fc509821c23611Calin Culianu
15870a6001aeffeaa12f2a1c21470e8f3bdfb6ef8e7Bill Pembertonstatic const struct pcmuio_board pcmuio_boards[] = {
1596baef150380d561a4d695a6be4fc509821c23611Calin Culianu	{
1600a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 .name = "pcmuio48",
1610a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 .num_asics = 1,
1620a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 .num_ports = 6,
1630a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 },
1646baef150380d561a4d695a6be4fc509821c23611Calin Culianu	{
1650a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 .name = "pcmuio96",
1660a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 .num_asics = 2,
1670a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 .num_ports = 12,
1680a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	 },
1696baef150380d561a4d695a6be4fc509821c23611Calin Culianu};
1706baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1716baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
1726baef150380d561a4d695a6be4fc509821c23611Calin Culianu * Useful for shorthand access to the particular board structure
1736baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
17470a6001aeffeaa12f2a1c21470e8f3bdfb6ef8e7Bill Pemberton#define thisboard ((const struct pcmuio_board *)dev->board_ptr)
1756baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1766baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* this structure is for data unique to this subdevice.  */
177e15849e54405152087cd343437747db8d931fcd7Bill Pembertonstruct pcmuio_subdev_private {
1786baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* mapping of halfwords (bytes) in port/chanarray to iobase */
1796baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned long iobases[PORTS_PER_SUBDEV];
1806baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1816baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* The below is only used for intr subdevices */
1826baef150380d561a4d695a6be4fc509821c23611Calin Culianu	struct {
1836baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int asic;	/* if non-negative, this subdev has an interrupt asic */
1846baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int first_chan;	/* if nonnegative, the first channel id for
1856baef150380d561a4d695a6be4fc509821c23611Calin Culianu				   interrupts. */
1866baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int num_asic_chans;	/* the number of asic channels in this subdev
1876baef150380d561a4d695a6be4fc509821c23611Calin Culianu					   that have interrutps */
1886baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int asic_chan;	/* if nonnegative, the first channel id with
1896baef150380d561a4d695a6be4fc509821c23611Calin Culianu				   respect to the asic that has interrupts */
1906baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int enabled_mask;	/* subdev-relative channel mask for channels
1916baef150380d561a4d695a6be4fc509821c23611Calin Culianu					   we are interested in */
1926baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int active;
1936baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int stop_count;
1946baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int continuous;
1956baef150380d561a4d695a6be4fc509821c23611Calin Culianu		spinlock_t spinlock;
1966baef150380d561a4d695a6be4fc509821c23611Calin Culianu	} intr;
197e15849e54405152087cd343437747db8d931fcd7Bill Pemberton};
1986baef150380d561a4d695a6be4fc509821c23611Calin Culianu
1996baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* this structure is for data unique to this hardware driver.  If
2006baef150380d561a4d695a6be4fc509821c23611Calin Culianu   several hardware drivers keep similar information in this structure,
20171b5f4f11971dea972832ad63a994c7e5b45db6bBill Pemberton   feel free to suggest moving the variable to the struct comedi_device struct.  */
202055f6636d9eb27bc13236e07739e019496c21221Bill Pembertonstruct pcmuio_private {
2036baef150380d561a4d695a6be4fc509821c23611Calin Culianu	struct {
2046baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned char pagelock;	/* current page and lock */
2056baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned char pol[NUM_PAGED_REGS];	/* shadow of POLx registers */
2066baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned char enab[NUM_PAGED_REGS];	/* shadow of ENABx registers */
2076baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int num;
2086baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned long iobase;
2096baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned int irq;
2106baef150380d561a4d695a6be4fc509821c23611Calin Culianu		spinlock_t spinlock;
2116baef150380d561a4d695a6be4fc509821c23611Calin Culianu	} asics[MAX_ASICS];
212e15849e54405152087cd343437747db8d931fcd7Bill Pemberton	struct pcmuio_subdev_private *sprivs;
213055f6636d9eb27bc13236e07739e019496c21221Bill Pemberton};
2146baef150380d561a4d695a6be4fc509821c23611Calin Culianu
2156baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
2166baef150380d561a4d695a6be4fc509821c23611Calin Culianu * most drivers define the following macro to make it easy to
2176baef150380d561a4d695a6be4fc509821c23611Calin Culianu * access the private structure.
2186baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
219055f6636d9eb27bc13236e07739e019496c21221Bill Pemberton#define devpriv ((struct pcmuio_private *)dev->private)
220e15849e54405152087cd343437747db8d931fcd7Bill Pemberton#define subpriv ((struct pcmuio_subdev_private *)s->private)
2216baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
222139dfbdfacb02e3ef3df936d2fabd1ad5f14ea88Bill Pemberton * The struct comedi_driver structure tells the Comedi core module
2236baef150380d561a4d695a6be4fc509821c23611Calin Culianu * which functions to call to configure/deconfigure (attach/detach)
2246baef150380d561a4d695a6be4fc509821c23611Calin Culianu * the board, and also about the kernel module that contains
2256baef150380d561a4d695a6be4fc509821c23611Calin Culianu * the device code.
2266baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
2270a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralstatic int pcmuio_attach(struct comedi_device *dev,
2280a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			 struct comedi_devconfig *it);
229da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic int pcmuio_detach(struct comedi_device *dev);
2306baef150380d561a4d695a6be4fc509821c23611Calin Culianu
231139dfbdfacb02e3ef3df936d2fabd1ad5f14ea88Bill Pembertonstatic struct comedi_driver driver = {
23268c3dbff9fc9f25872408d0e95980d41733d48d0Bill Pemberton	.driver_name = "pcmuio",
23368c3dbff9fc9f25872408d0e95980d41733d48d0Bill Pemberton	.module = THIS_MODULE,
23468c3dbff9fc9f25872408d0e95980d41733d48d0Bill Pemberton	.attach = pcmuio_attach,
23568c3dbff9fc9f25872408d0e95980d41733d48d0Bill Pemberton	.detach = pcmuio_detach,
2366baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* It is not necessary to implement the following members if you are
2376baef150380d561a4d695a6be4fc509821c23611Calin Culianu * writing a driver for a ISA PnP or PCI card */
2386baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* Most drivers will support multiple types of boards by
2396baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * having an array of board structures.  These were defined
2406baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * in pcmuio_boards[] above.  Note that the element 'name'
2416baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * was first in the structure -- Comedi uses this fact to
2426baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * extract the name of the board without knowing any details
2436baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * about the structure except for its length.
2446baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * When a device is attached (by comedi_config), the name
2456baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * of the device is given to Comedi, and Comedi tries to
2466baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * match it by going through the list of board names.  If
2476baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * there is a match, the address of the pointer is put
2486baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * into dev->board_ptr and driver->attach() is called.
2496baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 *
2506baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * Note that these are not necessary if you can determine
2516baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * the type of board in software.  ISA PnP, PCI, and PCMCIA
2526baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * devices are such boards.
2536baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 */
25468c3dbff9fc9f25872408d0e95980d41733d48d0Bill Pemberton	.board_name = &pcmuio_boards[0].name,
25568c3dbff9fc9f25872408d0e95980d41733d48d0Bill Pemberton	.offset = sizeof(struct pcmuio_board),
2568629efa4cbf6f89a54a85af4b8bc31762af01800Bill Pemberton	.num_names = ARRAY_SIZE(pcmuio_boards),
2576baef150380d561a4d695a6be4fc509821c23611Calin Culianu};
2586baef150380d561a4d695a6be4fc509821c23611Calin Culianu
2590a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralstatic int pcmuio_dio_insn_bits(struct comedi_device *dev,
2600a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				struct comedi_subdevice *s,
2610a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				struct comedi_insn *insn, unsigned int *data);
2620a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralstatic int pcmuio_dio_insn_config(struct comedi_device *dev,
2630a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				  struct comedi_subdevice *s,
2640a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				  struct comedi_insn *insn, unsigned int *data);
2656baef150380d561a4d695a6be4fc509821c23611Calin Culianu
26670265d24e3404fe798b6edd55a02016b1edb49d7Jiri Slabystatic irqreturn_t interrupt_pcmuio(int irq, void *d);
26734c43922e62708d45e9660eee4b4f1fb7b4bf2c7Bill Pembertonstatic void pcmuio_stop_intr(struct comedi_device *, struct comedi_subdevice *);
268814900c904140cfe7f3e48cabec06b3eec57e0eaBill Pembertonstatic int pcmuio_cancel(struct comedi_device *dev, struct comedi_subdevice *s);
269814900c904140cfe7f3e48cabec06b3eec57e0eaBill Pembertonstatic int pcmuio_cmd(struct comedi_device *dev, struct comedi_subdevice *s);
270814900c904140cfe7f3e48cabec06b3eec57e0eaBill Pembertonstatic int pcmuio_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
2710a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			  struct comedi_cmd *cmd);
2726baef150380d561a4d695a6be4fc509821c23611Calin Culianu
2736baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* some helper functions to deal with specifics of this device's registers */
274814900c904140cfe7f3e48cabec06b3eec57e0eaBill Pembertonstatic void init_asics(struct comedi_device *dev);	/* sets up/clears ASIC chips to defaults */
275814900c904140cfe7f3e48cabec06b3eec57e0eaBill Pembertonstatic void switch_page(struct comedi_device *dev, int asic, int page);
2766baef150380d561a4d695a6be4fc509821c23611Calin Culianu#ifdef notused
277814900c904140cfe7f3e48cabec06b3eec57e0eaBill Pembertonstatic void lock_port(struct comedi_device *dev, int asic, int port);
278814900c904140cfe7f3e48cabec06b3eec57e0eaBill Pembertonstatic void unlock_port(struct comedi_device *dev, int asic, int port);
2796baef150380d561a4d695a6be4fc509821c23611Calin Culianu#endif
2806baef150380d561a4d695a6be4fc509821c23611Calin Culianu
2816baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
2826baef150380d561a4d695a6be4fc509821c23611Calin Culianu * Attach is called by the Comedi core to configure the driver
2836baef150380d561a4d695a6be4fc509821c23611Calin Culianu * for a particular board.  If you specified a board_name array
2846baef150380d561a4d695a6be4fc509821c23611Calin Culianu * in the driver structure, dev->board_ptr contains that
2856baef150380d561a4d695a6be4fc509821c23611Calin Culianu * address.
2866baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
287da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic int pcmuio_attach(struct comedi_device *dev, struct comedi_devconfig *it)
2886baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
28934c43922e62708d45e9660eee4b4f1fb7b4bf2c7Bill Pemberton	struct comedi_subdevice *s;
2906baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int sdev_no, chans_left, n_subdevs, port, asic, thisasic_chanct = 0;
2916baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned long iobase;
2926baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned int irq[MAX_ASICS];
2936baef150380d561a4d695a6be4fc509821c23611Calin Culianu
2946baef150380d561a4d695a6be4fc509821c23611Calin Culianu	iobase = it->options[0];
2956baef150380d561a4d695a6be4fc509821c23611Calin Culianu	irq[0] = it->options[1];
2966baef150380d561a4d695a6be4fc509821c23611Calin Culianu	irq[1] = it->options[2];
2976baef150380d561a4d695a6be4fc509821c23611Calin Culianu
298de1201ea91d0453800ec68f959297de2b37a042eRavishankar karkala Mallikarjunayya	dev_dbg(dev->hw_dev, "comedi%d: %s: io: %lx attached\n", dev->minor,
299de1201ea91d0453800ec68f959297de2b37a042eRavishankar karkala Mallikarjunayya		driver.driver_name, iobase);
3006baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3016baef150380d561a4d695a6be4fc509821c23611Calin Culianu	dev->iobase = iobase;
3026baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3036baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (!iobase || !request_region(iobase,
3040a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				       thisboard->num_asics * ASIC_IOSIZE,
3050a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				       driver.driver_name)) {
306de1201ea91d0453800ec68f959297de2b37a042eRavishankar karkala Mallikarjunayya		dev_err(dev->hw_dev, "I/O port conflict\n");
3076baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return -EIO;
3086baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
3096baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3106baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
3116baef150380d561a4d695a6be4fc509821c23611Calin Culianu * Initialize dev->board_name.  Note that we can use the "thisboard"
3126baef150380d561a4d695a6be4fc509821c23611Calin Culianu * macro now, since we just initialized it in the last line.
3136baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
3146baef150380d561a4d695a6be4fc509821c23611Calin Culianu	dev->board_name = thisboard->name;
3156baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3166baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
3176baef150380d561a4d695a6be4fc509821c23611Calin Culianu * Allocate the private structure area.  alloc_private() is a
3186baef150380d561a4d695a6be4fc509821c23611Calin Culianu * convenient macro defined in comedidev.h.
3196baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
320055f6636d9eb27bc13236e07739e019496c21221Bill Pemberton	if (alloc_private(dev, sizeof(struct pcmuio_private)) < 0) {
321de1201ea91d0453800ec68f959297de2b37a042eRavishankar karkala Mallikarjunayya		dev_warn(dev->hw_dev, "cannot allocate private data structure\n");
3226baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return -ENOMEM;
3236baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
3246baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3256baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (asic = 0; asic < MAX_ASICS; ++asic) {
3266baef150380d561a4d695a6be4fc509821c23611Calin Culianu		devpriv->asics[asic].num = asic;
3276baef150380d561a4d695a6be4fc509821c23611Calin Culianu		devpriv->asics[asic].iobase = dev->iobase + asic * ASIC_IOSIZE;
3286baef150380d561a4d695a6be4fc509821c23611Calin Culianu		devpriv->asics[asic].irq = 0;	/* this gets actually set at the end of
3296baef150380d561a4d695a6be4fc509821c23611Calin Culianu						   this function when we
3305f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman						   request_irqs */
3316baef150380d561a4d695a6be4fc509821c23611Calin Culianu		spin_lock_init(&devpriv->asics[asic].spinlock);
3326baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
3336baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3346baef150380d561a4d695a6be4fc509821c23611Calin Culianu	chans_left = CHANS_PER_ASIC * thisboard->num_asics;
3356baef150380d561a4d695a6be4fc509821c23611Calin Culianu	n_subdevs = CALC_N_SUBDEVS(chans_left);
3366baef150380d561a4d695a6be4fc509821c23611Calin Culianu	devpriv->sprivs =
3370a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	    kcalloc(n_subdevs, sizeof(struct pcmuio_subdev_private),
3380a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    GFP_KERNEL);
3396baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (!devpriv->sprivs) {
340de1201ea91d0453800ec68f959297de2b37a042eRavishankar karkala Mallikarjunayya		dev_warn(dev->hw_dev, "cannot allocate subdevice private data structures\n");
3416baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return -ENOMEM;
3426baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
3436baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/*
3446baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * Allocate the subdevice structures.  alloc_subdevice() is a
3456baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * convenient macro defined in comedidev.h.
3466baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 *
3476baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * Allocate 2 subdevs (32 + 16 DIO lines) or 3 32 DIO subdevs for the
3486baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * 96-channel version of the board.
3496baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 */
3506baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (alloc_subdevices(dev, n_subdevs) < 0) {
351de1201ea91d0453800ec68f959297de2b37a042eRavishankar karkala Mallikarjunayya		dev_dbg(dev->hw_dev, "cannot allocate subdevice data structures\n");
3526baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return -ENOMEM;
3536baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
3546baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3556baef150380d561a4d695a6be4fc509821c23611Calin Culianu	port = 0;
3566baef150380d561a4d695a6be4fc509821c23611Calin Culianu	asic = 0;
3576baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (sdev_no = 0; sdev_no < (int)dev->n_subdevices; ++sdev_no) {
3586baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int byte_no;
3596baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3606baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s = dev->subdevices + sdev_no;
3616baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->private = devpriv->sprivs + sdev_no;
3626baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->maxdata = 1;
3636baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->range_table = &range_digital;
3646baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
3656baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->type = COMEDI_SUBD_DIO;
3666baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->insn_bits = pcmuio_dio_insn_bits;
3676baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->insn_config = pcmuio_dio_insn_config;
368214e7b5c8281bf41238f575128e4fec5652ed797Bill Pemberton		s->n_chan = min(chans_left, MAX_CHANS_PER_SUBDEV);
3696baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.asic = -1;
3706baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.first_chan = -1;
3716baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.asic_chan = -1;
3726baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.num_asic_chans = -1;
3736baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.active = 0;
3746baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->len_chanlist = 1;
3756baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3766baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* save the ioport address for each 'port' of 8 channels in the
3776baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   subdevice */
3786baef150380d561a4d695a6be4fc509821c23611Calin Culianu		for (byte_no = 0; byte_no < PORTS_PER_SUBDEV; ++byte_no, ++port) {
3796baef150380d561a4d695a6be4fc509821c23611Calin Culianu			if (port >= PORTS_PER_ASIC) {
3806baef150380d561a4d695a6be4fc509821c23611Calin Culianu				port = 0;
3816baef150380d561a4d695a6be4fc509821c23611Calin Culianu				++asic;
3826baef150380d561a4d695a6be4fc509821c23611Calin Culianu				thisasic_chanct = 0;
3836baef150380d561a4d695a6be4fc509821c23611Calin Culianu			}
3846baef150380d561a4d695a6be4fc509821c23611Calin Culianu			subpriv->iobases[byte_no] =
3850a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			    devpriv->asics[asic].iobase + port;
3866baef150380d561a4d695a6be4fc509821c23611Calin Culianu
3876baef150380d561a4d695a6be4fc509821c23611Calin Culianu			if (thisasic_chanct <
3880a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			    CHANS_PER_PORT * INTR_PORTS_PER_ASIC
3890a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			    && subpriv->intr.asic < 0) {
3906baef150380d561a4d695a6be4fc509821c23611Calin Culianu				/* this is an interrupt subdevice, so setup the struct */
3916baef150380d561a4d695a6be4fc509821c23611Calin Culianu				subpriv->intr.asic = asic;
3926baef150380d561a4d695a6be4fc509821c23611Calin Culianu				subpriv->intr.active = 0;
3936baef150380d561a4d695a6be4fc509821c23611Calin Culianu				subpriv->intr.stop_count = 0;
3946baef150380d561a4d695a6be4fc509821c23611Calin Culianu				subpriv->intr.first_chan = byte_no * 8;
3956baef150380d561a4d695a6be4fc509821c23611Calin Culianu				subpriv->intr.asic_chan = thisasic_chanct;
3966baef150380d561a4d695a6be4fc509821c23611Calin Culianu				subpriv->intr.num_asic_chans =
3970a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				    s->n_chan - subpriv->intr.first_chan;
3986baef150380d561a4d695a6be4fc509821c23611Calin Culianu				dev->read_subdev = s;
3996baef150380d561a4d695a6be4fc509821c23611Calin Culianu				s->subdev_flags |= SDF_CMD_READ;
4006baef150380d561a4d695a6be4fc509821c23611Calin Culianu				s->cancel = pcmuio_cancel;
4016baef150380d561a4d695a6be4fc509821c23611Calin Culianu				s->do_cmd = pcmuio_cmd;
4026baef150380d561a4d695a6be4fc509821c23611Calin Culianu				s->do_cmdtest = pcmuio_cmdtest;
4036baef150380d561a4d695a6be4fc509821c23611Calin Culianu				s->len_chanlist = subpriv->intr.num_asic_chans;
4046baef150380d561a4d695a6be4fc509821c23611Calin Culianu			}
4056baef150380d561a4d695a6be4fc509821c23611Calin Culianu			thisasic_chanct += CHANS_PER_PORT;
4066baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
4076baef150380d561a4d695a6be4fc509821c23611Calin Culianu		spin_lock_init(&subpriv->intr.spinlock);
4086baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4096baef150380d561a4d695a6be4fc509821c23611Calin Culianu		chans_left -= s->n_chan;
4106baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4116baef150380d561a4d695a6be4fc509821c23611Calin Culianu		if (!chans_left) {
4126baef150380d561a4d695a6be4fc509821c23611Calin Culianu			asic = 0;	/* reset the asic to our first asic, to do intr subdevs */
4136baef150380d561a4d695a6be4fc509821c23611Calin Culianu			port = 0;
4146baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
4156baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4166baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
4176baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4186baef150380d561a4d695a6be4fc509821c23611Calin Culianu	init_asics(dev);	/* clear out all the registers, basically */
4196baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4206baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (asic = 0; irq[0] && asic < MAX_ASICS; ++asic) {
4216baef150380d561a4d695a6be4fc509821c23611Calin Culianu		if (irq[asic]
4220a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    && request_irq(irq[asic], interrupt_pcmuio,
4230a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				   IRQF_SHARED, thisboard->name, dev)) {
4246baef150380d561a4d695a6be4fc509821c23611Calin Culianu			int i;
4256baef150380d561a4d695a6be4fc509821c23611Calin Culianu			/* unroll the allocated irqs.. */
4266baef150380d561a4d695a6be4fc509821c23611Calin Culianu			for (i = asic - 1; i >= 0; --i) {
4275f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman				free_irq(irq[i], dev);
4286baef150380d561a4d695a6be4fc509821c23611Calin Culianu				devpriv->asics[i].irq = irq[i] = 0;
4296baef150380d561a4d695a6be4fc509821c23611Calin Culianu			}
4306baef150380d561a4d695a6be4fc509821c23611Calin Culianu			irq[asic] = 0;
4316baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
4326baef150380d561a4d695a6be4fc509821c23611Calin Culianu		devpriv->asics[asic].irq = irq[asic];
4336baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
4346baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4356baef150380d561a4d695a6be4fc509821c23611Calin Culianu	dev->irq = irq[0];	/* grr.. wish comedi dev struct supported multiple
4366baef150380d561a4d695a6be4fc509821c23611Calin Culianu				   irqs.. */
4376baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4386baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (irq[0]) {
439deb04291a1eaa20c4565a64e894cdeb3e311d97bRavishankar karkala Mallikarjunayya		dev_dbg(dev->hw_dev, "irq: %u\n", irq[0]);
4406baef150380d561a4d695a6be4fc509821c23611Calin Culianu		if (irq[1] && thisboard->num_asics == 2)
441deb04291a1eaa20c4565a64e894cdeb3e311d97bRavishankar karkala Mallikarjunayya			dev_dbg(dev->hw_dev, "second ASIC irq: %u\n", irq[1]);
4426baef150380d561a4d695a6be4fc509821c23611Calin Culianu	} else {
443deb04291a1eaa20c4565a64e894cdeb3e311d97bRavishankar karkala Mallikarjunayya		dev_dbg(dev->hw_dev, "(IRQ mode disabled)\n");
4446baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
4456baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4466baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4476baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return 1;
4486baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
4496baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4506baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
4516baef150380d561a4d695a6be4fc509821c23611Calin Culianu * _detach is called to deconfigure a device.  It should deallocate
4526baef150380d561a4d695a6be4fc509821c23611Calin Culianu * resources.
4536baef150380d561a4d695a6be4fc509821c23611Calin Culianu * This function is also called when _attach() fails, so it should be
4546baef150380d561a4d695a6be4fc509821c23611Calin Culianu * careful not to release resources that were not necessarily
4556baef150380d561a4d695a6be4fc509821c23611Calin Culianu * allocated by _attach().  dev->private and dev->subdevices are
4566baef150380d561a4d695a6be4fc509821c23611Calin Culianu * deallocated automatically by the core.
4576baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
458da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic int pcmuio_detach(struct comedi_device *dev)
4596baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
4606baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int i;
4616baef150380d561a4d695a6be4fc509821c23611Calin Culianu
462deb04291a1eaa20c4565a64e894cdeb3e311d97bRavishankar karkala Mallikarjunayya	dev_dbg(dev->hw_dev, "comedi%d: %s: remove\n", dev->minor,
463deb04291a1eaa20c4565a64e894cdeb3e311d97bRavishankar karkala Mallikarjunayya		driver.driver_name);
4646baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (dev->iobase)
4656baef150380d561a4d695a6be4fc509821c23611Calin Culianu		release_region(dev->iobase, ASIC_IOSIZE * thisboard->num_asics);
4666baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4676baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (i = 0; i < MAX_ASICS; ++i) {
4686baef150380d561a4d695a6be4fc509821c23611Calin Culianu		if (devpriv->asics[i].irq)
4695f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman			free_irq(devpriv->asics[i].irq, dev);
4706baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
4716baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4726baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (devpriv && devpriv->sprivs)
4736baef150380d561a4d695a6be4fc509821c23611Calin Culianu		kfree(devpriv->sprivs);
4746baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4756baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return 0;
4766baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
4776baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4786baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* DIO devices are slightly special.  Although it is possible to
4796baef150380d561a4d695a6be4fc509821c23611Calin Culianu * implement the insn_read/insn_write interface, it is much more
4806baef150380d561a4d695a6be4fc509821c23611Calin Culianu * useful to applications if you implement the insn_bits interface.
4816baef150380d561a4d695a6be4fc509821c23611Calin Culianu * This allows packed reading/writing of the DIO channels.  The
4826baef150380d561a4d695a6be4fc509821c23611Calin Culianu * comedi core can convert between insn_bits and insn_read/write */
4830a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralstatic int pcmuio_dio_insn_bits(struct comedi_device *dev,
4840a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				struct comedi_subdevice *s,
4850a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				struct comedi_insn *insn, unsigned int *data)
4866baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
4876baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int byte_no;
4886baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (insn->n != 2)
4896baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return -EINVAL;
4906baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4916baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* NOTE:
4926baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   reading a 0 means this channel was high
4936baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   writine a 0 sets the channel high
4946baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   reading a 1 means this channel was low
4956baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   writing a 1 means set this channel low
4966baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4976baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   Therefore everything is always inverted. */
4986baef150380d561a4d695a6be4fc509821c23611Calin Culianu
4996baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* The insn data is a mask in data[0] and the new data
5006baef150380d561a4d695a6be4fc509821c23611Calin Culianu	 * in data[1], each channel cooresponding to a bit. */
5016baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5026baef150380d561a4d695a6be4fc509821c23611Calin Culianu#ifdef DAMMIT_ITS_BROKEN
5036baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* DEBUG */
504976fe5ab27e682d3dbfec26517a8a248638af07dRavishankar karkala Mallikarjunayya	dev_dbg(dev->hw_dev, "write mask: %08x  data: %08x\n", data[0],
505976fe5ab27e682d3dbfec26517a8a248638af07dRavishankar karkala Mallikarjunayya		data[1]);
5066baef150380d561a4d695a6be4fc509821c23611Calin Culianu#endif
5076baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5086baef150380d561a4d695a6be4fc509821c23611Calin Culianu	s->state = 0;
5096baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5106baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (byte_no = 0; byte_no < s->n_chan / CHANS_PER_PORT; ++byte_no) {
5116baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* address of 8-bit port */
5126baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned long ioaddr = subpriv->iobases[byte_no],
5130a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    /* bit offset of port in 32-bit doubleword */
5140a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    offset = byte_no * 8;
5156baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* this 8-bit port's data */
5166baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned char byte = 0,
5170a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    /* The write mask for this port (if any) */
5180a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    write_mask_byte = (data[0] >> offset) & 0xff,
5190a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    /* The data byte for this port */
5200a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    data_byte = (data[1] >> offset) & 0xff;
5216baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5226baef150380d561a4d695a6be4fc509821c23611Calin Culianu		byte = inb(ioaddr);	/* read all 8-bits for this port */
5236baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5246baef150380d561a4d695a6be4fc509821c23611Calin Culianu#ifdef DAMMIT_ITS_BROKEN
5256baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* DEBUG */
5260a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		printk
5270a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    ("byte %d wmb %02x db %02x offset %02d io %04x, data_in %02x ",
5280a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		     byte_no, (unsigned)write_mask_byte, (unsigned)data_byte,
5290a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		     offset, ioaddr, (unsigned)byte);
5306baef150380d561a4d695a6be4fc509821c23611Calin Culianu#endif
5316baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5326baef150380d561a4d695a6be4fc509821c23611Calin Culianu		if (write_mask_byte) {
5336baef150380d561a4d695a6be4fc509821c23611Calin Culianu			/* this byte has some write_bits -- so set the output lines */
5346baef150380d561a4d695a6be4fc509821c23611Calin Culianu			byte &= ~write_mask_byte;	/* clear bits for write mask */
5356baef150380d561a4d695a6be4fc509821c23611Calin Culianu			byte |= ~data_byte & write_mask_byte;	/* set to inverted data_byte */
5366baef150380d561a4d695a6be4fc509821c23611Calin Culianu			/* Write out the new digital output state */
5376baef150380d561a4d695a6be4fc509821c23611Calin Culianu			outb(byte, ioaddr);
5386baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
5396baef150380d561a4d695a6be4fc509821c23611Calin Culianu#ifdef DAMMIT_ITS_BROKEN
5406baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* DEBUG */
541976fe5ab27e682d3dbfec26517a8a248638af07dRavishankar karkala Mallikarjunayya		dev_dbg(dev->hw_dev, "data_out_byte %02x\n", (unsigned)byte);
5426baef150380d561a4d695a6be4fc509821c23611Calin Culianu#endif
5436baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* save the digital input lines for this byte.. */
5446baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->state |= ((unsigned int)byte) << offset;
5456baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
5466baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5476baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* now return the DIO lines to data[1] - note they came inverted! */
5486baef150380d561a4d695a6be4fc509821c23611Calin Culianu	data[1] = ~s->state;
5496baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5506baef150380d561a4d695a6be4fc509821c23611Calin Culianu#ifdef DAMMIT_ITS_BROKEN
5516baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* DEBUG */
552976fe5ab27e682d3dbfec26517a8a248638af07dRavishankar karkala Mallikarjunayya	dev_dbg(dev->hw_dev, "s->state %08x data_out %08x\n", s->state,
553976fe5ab27e682d3dbfec26517a8a248638af07dRavishankar karkala Mallikarjunayya		data[1]);
5546baef150380d561a4d695a6be4fc509821c23611Calin Culianu#endif
5556baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5566baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return 2;
5576baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
5586baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5596baef150380d561a4d695a6be4fc509821c23611Calin Culianu/* The input or output configuration of each digital line is
5606baef150380d561a4d695a6be4fc509821c23611Calin Culianu * configured by a special insn_config instruction.  chanspec
5616baef150380d561a4d695a6be4fc509821c23611Calin Culianu * contains the channel to be changed, and data[0] contains the
5626baef150380d561a4d695a6be4fc509821c23611Calin Culianu * value COMEDI_INPUT or COMEDI_OUTPUT. */
5630a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralstatic int pcmuio_dio_insn_config(struct comedi_device *dev,
5640a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				  struct comedi_subdevice *s,
5650a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				  struct comedi_insn *insn, unsigned int *data)
5666baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
5676baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int chan = CR_CHAN(insn->chanspec), byte_no = chan / 8, bit_no =
5680a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	    chan % 8;
5696baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned long ioaddr;
5706baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned char byte;
5716baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5726baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* Compute ioaddr for this channel */
5736baef150380d561a4d695a6be4fc509821c23611Calin Culianu	ioaddr = subpriv->iobases[byte_no];
5746baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5756baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* NOTE:
5766baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   writing a 0 an IO channel's bit sets the channel to INPUT
5776baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   and pulls the line high as well
5786baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5796baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   writing a 1 to an IO channel's  bit pulls the line low
5806baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5816baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   All channels are implicitly always in OUTPUT mode -- but when
5826baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   they are high they can be considered to be in INPUT mode..
5836baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5846baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   Thus, we only force channels low if the config request was INPUT,
5856baef150380d561a4d695a6be4fc509821c23611Calin Culianu	   otherwise we do nothing to the hardware.    */
5866baef150380d561a4d695a6be4fc509821c23611Calin Culianu
5876baef150380d561a4d695a6be4fc509821c23611Calin Culianu	switch (data[0]) {
5886baef150380d561a4d695a6be4fc509821c23611Calin Culianu	case INSN_CONFIG_DIO_OUTPUT:
5896baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* save to io_bits -- don't actually do anything since
5906baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   all input channels are also output channels... */
5916baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->io_bits |= 1 << chan;
5926baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
5936baef150380d561a4d695a6be4fc509821c23611Calin Culianu	case INSN_CONFIG_DIO_INPUT:
5946baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* write a 0 to the actual register representing the channel
5956baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   to set it to 'input'.  0 means "float high". */
5966baef150380d561a4d695a6be4fc509821c23611Calin Culianu		byte = inb(ioaddr);
5976baef150380d561a4d695a6be4fc509821c23611Calin Culianu		byte &= ~(1 << bit_no);
5986baef150380d561a4d695a6be4fc509821c23611Calin Culianu				/**< set input channel to '0' */
5996baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6006baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* write out byte -- this is the only time we actually affect the
6016baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   hardware as all channels are implicitly output -- but input
6026baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   channels are set to float-high */
6036baef150380d561a4d695a6be4fc509821c23611Calin Culianu		outb(byte, ioaddr);
6046baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6056baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* save to io_bits */
6066baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->io_bits &= ~(1 << chan);
6076baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
6086baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6096baef150380d561a4d695a6be4fc509821c23611Calin Culianu	case INSN_CONFIG_DIO_QUERY:
61025985edcedea6396277003854657b5f3cb31a628Lucas De Marchi		/* retrieve from shadow register */
6116baef150380d561a4d695a6be4fc509821c23611Calin Culianu		data[1] =
6120a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral		    (s->io_bits & (1 << chan)) ? COMEDI_OUTPUT : COMEDI_INPUT;
6136baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return insn->n;
6146baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
6156baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6166baef150380d561a4d695a6be4fc509821c23611Calin Culianu	default:
6176baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return -EINVAL;
6186baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
6196baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
6206baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6216baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return insn->n;
6226baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
6236baef150380d561a4d695a6be4fc509821c23611Calin Culianu
624da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic void init_asics(struct comedi_device *dev)
6256baef150380d561a4d695a6be4fc509821c23611Calin Culianu{				/* sets up an
6266baef150380d561a4d695a6be4fc509821c23611Calin Culianu				   ASIC chip to defaults */
6276baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int asic;
6286baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6296baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (asic = 0; asic < thisboard->num_asics; ++asic) {
6306baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int port, page;
6316baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned long baseaddr = dev->iobase + asic * ASIC_IOSIZE;
6326baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6336baef150380d561a4d695a6be4fc509821c23611Calin Culianu		switch_page(dev, asic, 0);	/* switch back to page 0 */
6346baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6356baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* first, clear all the DIO port bits */
6366baef150380d561a4d695a6be4fc509821c23611Calin Culianu		for (port = 0; port < PORTS_PER_ASIC; ++port)
6376baef150380d561a4d695a6be4fc509821c23611Calin Culianu			outb(0, baseaddr + REG_PORT0 + port);
6386baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6396baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* Next, clear all the paged registers for each page */
6406baef150380d561a4d695a6be4fc509821c23611Calin Culianu		for (page = 1; page < NUM_PAGES; ++page) {
6416baef150380d561a4d695a6be4fc509821c23611Calin Culianu			int reg;
6426baef150380d561a4d695a6be4fc509821c23611Calin Culianu			/* now clear all the paged registers */
6436baef150380d561a4d695a6be4fc509821c23611Calin Culianu			switch_page(dev, asic, page);
6446baef150380d561a4d695a6be4fc509821c23611Calin Culianu			for (reg = FIRST_PAGED_REG;
6450a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			     reg < FIRST_PAGED_REG + NUM_PAGED_REGS; ++reg)
6466baef150380d561a4d695a6be4fc509821c23611Calin Culianu				outb(0, baseaddr + reg);
6476baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
6486baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6496baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* DEBUG  set rising edge interrupts on port0 of both asics */
6506baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/*switch_page(dev, asic, PAGE_POL);
6516baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   outb(0xff, baseaddr + REG_POL0);
6526baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   switch_page(dev, asic, PAGE_ENAB);
6536baef150380d561a4d695a6be4fc509821c23611Calin Culianu		   outb(0xff, baseaddr + REG_ENAB0); */
6546baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* END DEBUG */
6556baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6566baef150380d561a4d695a6be4fc509821c23611Calin Culianu		switch_page(dev, asic, 0);	/* switch back to default page 0 */
6576baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6586baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
6596baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
6606baef150380d561a4d695a6be4fc509821c23611Calin Culianu
661da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic void switch_page(struct comedi_device *dev, int asic, int page)
6626baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
6636baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (asic < 0 || asic >= thisboard->num_asics)
6646baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return;		/* paranoia */
6656baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (page < 0 || page >= NUM_PAGES)
6666baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return;		/* more paranoia */
6676baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6686baef150380d561a4d695a6be4fc509821c23611Calin Culianu	devpriv->asics[asic].pagelock &= ~REG_PAGE_MASK;
6696baef150380d561a4d695a6be4fc509821c23611Calin Culianu	devpriv->asics[asic].pagelock |= page << REG_PAGE_BITOFFSET;
6706baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6716baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* now write out the shadow register */
6726baef150380d561a4d695a6be4fc509821c23611Calin Culianu	outb(devpriv->asics[asic].pagelock,
6730a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	     dev->iobase + ASIC_IOSIZE * asic + REG_PAGELOCK);
6746baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
6756baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6766baef150380d561a4d695a6be4fc509821c23611Calin Culianu#ifdef notused
677da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic void lock_port(struct comedi_device *dev, int asic, int port)
6786baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
6796baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (asic < 0 || asic >= thisboard->num_asics)
6806baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return;		/* paranoia */
6816baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (port < 0 || port >= PORTS_PER_ASIC)
6826baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return;		/* more paranoia */
6836baef150380d561a4d695a6be4fc509821c23611Calin Culianu
6846baef150380d561a4d695a6be4fc509821c23611Calin Culianu	devpriv->asics[asic].pagelock |= 0x1 << port;
6856baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* now write out the shadow register */
6866baef150380d561a4d695a6be4fc509821c23611Calin Culianu	outb(devpriv->asics[asic].pagelock,
6870a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	     dev->iobase + ASIC_IOSIZE * asic + REG_PAGELOCK);
6886baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
6896baef150380d561a4d695a6be4fc509821c23611Calin Culianu
690da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic void unlock_port(struct comedi_device *dev, int asic, int port)
6916baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
6926baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (asic < 0 || asic >= thisboard->num_asics)
6936baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return;		/* paranoia */
6946baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (port < 0 || port >= PORTS_PER_ASIC)
6956baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return;		/* more paranoia */
6966baef150380d561a4d695a6be4fc509821c23611Calin Culianu	devpriv->asics[asic].pagelock &= ~(0x1 << port) | REG_LOCK_MASK;
6976baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* now write out the shadow register */
6986baef150380d561a4d695a6be4fc509821c23611Calin Culianu	outb(devpriv->asics[asic].pagelock,
6990a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	     dev->iobase + ASIC_IOSIZE * asic + REG_PAGELOCK);
7006baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
7016baef150380d561a4d695a6be4fc509821c23611Calin Culianu#endif /* notused */
7026baef150380d561a4d695a6be4fc509821c23611Calin Culianu
70370265d24e3404fe798b6edd55a02016b1edb49d7Jiri Slabystatic irqreturn_t interrupt_pcmuio(int irq, void *d)
7046baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
7056baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int asic, got1 = 0;
7060a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	struct comedi_device *dev = (struct comedi_device *)d;
7076baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7086baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (asic = 0; asic < MAX_ASICS; ++asic) {
7096baef150380d561a4d695a6be4fc509821c23611Calin Culianu		if (irq == devpriv->asics[asic].irq) {
7106baef150380d561a4d695a6be4fc509821c23611Calin Culianu			unsigned long flags;
7116baef150380d561a4d695a6be4fc509821c23611Calin Culianu			unsigned triggered = 0;
7126baef150380d561a4d695a6be4fc509821c23611Calin Culianu			unsigned long iobase = devpriv->asics[asic].iobase;
7136baef150380d561a4d695a6be4fc509821c23611Calin Culianu			/* it is an interrupt for ASIC #asic */
7146baef150380d561a4d695a6be4fc509821c23611Calin Culianu			unsigned char int_pend;
7156baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7160a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			spin_lock_irqsave(&devpriv->asics[asic].spinlock,
7170a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral					  flags);
7186baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7196baef150380d561a4d695a6be4fc509821c23611Calin Culianu			int_pend = inb(iobase + REG_INT_PENDING) & 0x07;
7206baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7216baef150380d561a4d695a6be4fc509821c23611Calin Culianu			if (int_pend) {
7226baef150380d561a4d695a6be4fc509821c23611Calin Culianu				int port;
7236baef150380d561a4d695a6be4fc509821c23611Calin Culianu				for (port = 0; port < INTR_PORTS_PER_ASIC;
7240a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				     ++port) {
7256baef150380d561a4d695a6be4fc509821c23611Calin Culianu					if (int_pend & (0x1 << port)) {
7266baef150380d561a4d695a6be4fc509821c23611Calin Culianu						unsigned char
7270a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						    io_lines_with_edges = 0;
7286baef150380d561a4d695a6be4fc509821c23611Calin Culianu						switch_page(dev, asic,
7290a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							    PAGE_INT_ID);
7306baef150380d561a4d695a6be4fc509821c23611Calin Culianu						io_lines_with_edges =
7310a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						    inb(iobase +
7326baef150380d561a4d695a6be4fc509821c23611Calin Culianu							REG_INT_ID0 + port);
7336baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7346baef150380d561a4d695a6be4fc509821c23611Calin Culianu						if (io_lines_with_edges)
7356baef150380d561a4d695a6be4fc509821c23611Calin Culianu							/* clear pending interrupt */
7366baef150380d561a4d695a6be4fc509821c23611Calin Culianu							outb(0, iobase +
7370a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							     REG_INT_ID0 +
7380a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							     port);
7396baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7406baef150380d561a4d695a6be4fc509821c23611Calin Culianu						triggered |=
7410a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						    io_lines_with_edges <<
7420a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						    port * 8;
7436baef150380d561a4d695a6be4fc509821c23611Calin Culianu					}
7446baef150380d561a4d695a6be4fc509821c23611Calin Culianu				}
7456baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7466baef150380d561a4d695a6be4fc509821c23611Calin Culianu				++got1;
7476baef150380d561a4d695a6be4fc509821c23611Calin Culianu			}
7486baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7490a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			spin_unlock_irqrestore(&devpriv->asics[asic].spinlock,
7500a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral					       flags);
7516baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7526baef150380d561a4d695a6be4fc509821c23611Calin Culianu			if (triggered) {
75334c43922e62708d45e9660eee4b4f1fb7b4bf2c7Bill Pemberton				struct comedi_subdevice *s;
7546baef150380d561a4d695a6be4fc509821c23611Calin Culianu				/* TODO here: dispatch io lines to subdevs with commands.. */
7550a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				printk
7560a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				    ("PCMUIO DEBUG: got edge detect interrupt %d asic %d which_chans: %06x\n",
7570a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				     irq, asic, triggered);
7586baef150380d561a4d695a6be4fc509821c23611Calin Culianu				for (s = dev->subdevices;
7590a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				     s < dev->subdevices + dev->n_subdevices;
7600a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				     ++s) {
7616baef150380d561a4d695a6be4fc509821c23611Calin Culianu					if (subpriv->intr.asic == asic) {	/* this is an interrupt subdev, and it matches this asic! */
7626baef150380d561a4d695a6be4fc509821c23611Calin Culianu						unsigned long flags;
7636baef150380d561a4d695a6be4fc509821c23611Calin Culianu						unsigned oldevents;
7646baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7650a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						spin_lock_irqsave(&subpriv->
7660a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								  intr.spinlock,
7670a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								  flags);
7686baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7696baef150380d561a4d695a6be4fc509821c23611Calin Culianu						oldevents = s->async->events;
7706baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7716baef150380d561a4d695a6be4fc509821c23611Calin Culianu						if (subpriv->intr.active) {
7726baef150380d561a4d695a6be4fc509821c23611Calin Culianu							unsigned mytrig =
7730a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							    ((triggered >>
7740a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							      subpriv->intr.asic_chan)
7750a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							     &
7760a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							     ((0x1 << subpriv->
7770a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							       intr.
7780a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							       num_asic_chans) -
7790a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							      1)) << subpriv->
7800a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							    intr.first_chan;
7810a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							if (mytrig &
7820a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							    subpriv->intr.enabled_mask)
7830a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							{
7840a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								unsigned int val
7850a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								    = 0;
7866baef150380d561a4d695a6be4fc509821c23611Calin Culianu								unsigned int n,
7870a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								    ch, len;
7886baef150380d561a4d695a6be4fc509821c23611Calin Culianu
7890a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								len =
7900a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								    s->
7910a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								    async->cmd.chanlist_len;
7926baef150380d561a4d695a6be4fc509821c23611Calin Culianu								for (n = 0;
7930a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								     n < len;
7940a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								     n++) {
7956baef150380d561a4d695a6be4fc509821c23611Calin Culianu									ch = CR_CHAN(s->async->cmd.chanlist[n]);
7966baef150380d561a4d695a6be4fc509821c23611Calin Culianu									if (mytrig & (1U << ch)) {
7976baef150380d561a4d695a6be4fc509821c23611Calin Culianu										val |= (1U << n);
7986baef150380d561a4d695a6be4fc509821c23611Calin Culianu									}
7996baef150380d561a4d695a6be4fc509821c23611Calin Culianu								}
8006baef150380d561a4d695a6be4fc509821c23611Calin Culianu								/* Write the scan to the buffer. */
8010a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								if (comedi_buf_put(s->async, ((short *)&val)[0])
8020a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								    &&
8030a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								    comedi_buf_put
8040a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								    (s->async,
8050a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								     ((short *)
8060a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								      &val)[1]))
8070a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								{
8086baef150380d561a4d695a6be4fc509821c23611Calin Culianu									s->async->events |= (COMEDI_CB_BLOCK | COMEDI_CB_EOS);
8096baef150380d561a4d695a6be4fc509821c23611Calin Culianu								} else {
8106baef150380d561a4d695a6be4fc509821c23611Calin Culianu									/* Overflow! Stop acquisition!! */
8116baef150380d561a4d695a6be4fc509821c23611Calin Culianu									/* TODO: STOP_ACQUISITION_CALL_HERE!! */
8126baef150380d561a4d695a6be4fc509821c23611Calin Culianu									pcmuio_stop_intr
8130a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral									    (dev,
8140a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral									     s);
8156baef150380d561a4d695a6be4fc509821c23611Calin Culianu								}
8166baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8176baef150380d561a4d695a6be4fc509821c23611Calin Culianu								/* Check for end of acquisition. */
8180a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								if (!subpriv->intr.continuous) {
8196baef150380d561a4d695a6be4fc509821c23611Calin Culianu									/* stop_src == TRIG_COUNT */
8206baef150380d561a4d695a6be4fc509821c23611Calin Culianu									if (subpriv->intr.stop_count > 0) {
8210a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral										subpriv->intr.stop_count--;
8226baef150380d561a4d695a6be4fc509821c23611Calin Culianu										if (subpriv->intr.stop_count == 0) {
8236baef150380d561a4d695a6be4fc509821c23611Calin Culianu											s->async->events |= COMEDI_CB_EOA;
8246baef150380d561a4d695a6be4fc509821c23611Calin Culianu											/* TODO: STOP_ACQUISITION_CALL_HERE!! */
8256baef150380d561a4d695a6be4fc509821c23611Calin Culianu											pcmuio_stop_intr
8260a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral											    (dev,
8270a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral											     s);
8286baef150380d561a4d695a6be4fc509821c23611Calin Culianu										}
8296baef150380d561a4d695a6be4fc509821c23611Calin Culianu									}
8306baef150380d561a4d695a6be4fc509821c23611Calin Culianu								}
8316baef150380d561a4d695a6be4fc509821c23611Calin Culianu							}
8326baef150380d561a4d695a6be4fc509821c23611Calin Culianu						}
8336baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8340a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						spin_unlock_irqrestore
8350a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						    (&subpriv->intr.spinlock,
8360a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						     flags);
8376baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8386baef150380d561a4d695a6be4fc509821c23611Calin Culianu						if (oldevents !=
8390a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral						    s->async->events) {
8406baef150380d561a4d695a6be4fc509821c23611Calin Culianu							comedi_event(dev, s);
8416baef150380d561a4d695a6be4fc509821c23611Calin Culianu						}
8426baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8436baef150380d561a4d695a6be4fc509821c23611Calin Culianu					}
8446baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8456baef150380d561a4d695a6be4fc509821c23611Calin Culianu				}
8466baef150380d561a4d695a6be4fc509821c23611Calin Culianu			}
8476baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8486baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
8496baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
8506baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (!got1)
8516baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return IRQ_NONE;	/* interrupt from other source */
8526baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return IRQ_HANDLED;
8536baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
8546baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8550a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralstatic void pcmuio_stop_intr(struct comedi_device *dev,
8560a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			     struct comedi_subdevice *s)
8576baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
8586baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int nports, firstport, asic, port;
8596baef150380d561a4d695a6be4fc509821c23611Calin Culianu
860c3744138715045adb316284ee7a1e608f0278f6cBill Pemberton	asic = subpriv->intr.asic;
861c3744138715045adb316284ee7a1e608f0278f6cBill Pemberton	if (asic < 0)
8626baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return;		/* not an interrupt subdev */
8636baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8646baef150380d561a4d695a6be4fc509821c23611Calin Culianu	subpriv->intr.enabled_mask = 0;
8656baef150380d561a4d695a6be4fc509821c23611Calin Culianu	subpriv->intr.active = 0;
8666baef150380d561a4d695a6be4fc509821c23611Calin Culianu	s->async->inttrig = 0;
8676baef150380d561a4d695a6be4fc509821c23611Calin Culianu	nports = subpriv->intr.num_asic_chans / CHANS_PER_PORT;
8686baef150380d561a4d695a6be4fc509821c23611Calin Culianu	firstport = subpriv->intr.asic_chan / CHANS_PER_PORT;
8696baef150380d561a4d695a6be4fc509821c23611Calin Culianu	switch_page(dev, asic, PAGE_ENAB);
8706baef150380d561a4d695a6be4fc509821c23611Calin Culianu	for (port = firstport; port < firstport + nports; ++port) {
8716baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* disable all intrs for this subdev.. */
8726baef150380d561a4d695a6be4fc509821c23611Calin Culianu		outb(0, devpriv->asics[asic].iobase + REG_ENAB0 + port);
8736baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
8746baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
8756baef150380d561a4d695a6be4fc509821c23611Calin Culianu
8760a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralstatic int pcmuio_start_intr(struct comedi_device *dev,
8770a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			     struct comedi_subdevice *s)
8786baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
8796baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (!subpriv->intr.continuous && subpriv->intr.stop_count == 0) {
8806baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* An empty acquisition! */
8816baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->async->events |= COMEDI_CB_EOA;
8826baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.active = 0;
8836baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return 1;
8846baef150380d561a4d695a6be4fc509821c23611Calin Culianu	} else {
8856baef150380d561a4d695a6be4fc509821c23611Calin Culianu		unsigned bits = 0, pol_bits = 0, n;
8866baef150380d561a4d695a6be4fc509821c23611Calin Culianu		int nports, firstport, asic, port;
887ea6d0d4cab4f4f2d6a88f3bce4707fe92696fd3fBill Pemberton		struct comedi_cmd *cmd = &s->async->cmd;
8886baef150380d561a4d695a6be4fc509821c23611Calin Culianu
889c3744138715045adb316284ee7a1e608f0278f6cBill Pemberton		asic = subpriv->intr.asic;
890c3744138715045adb316284ee7a1e608f0278f6cBill Pemberton		if (asic < 0)
8916baef150380d561a4d695a6be4fc509821c23611Calin Culianu			return 1;	/* not an interrupt
8926baef150380d561a4d695a6be4fc509821c23611Calin Culianu					   subdev */
8936baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.enabled_mask = 0;
8946baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.active = 1;
8956baef150380d561a4d695a6be4fc509821c23611Calin Culianu		nports = subpriv->intr.num_asic_chans / CHANS_PER_PORT;
8966baef150380d561a4d695a6be4fc509821c23611Calin Culianu		firstport = subpriv->intr.asic_chan / CHANS_PER_PORT;
8976baef150380d561a4d695a6be4fc509821c23611Calin Culianu		if (cmd->chanlist) {
8986baef150380d561a4d695a6be4fc509821c23611Calin Culianu			for (n = 0; n < cmd->chanlist_len; n++) {
8996baef150380d561a4d695a6be4fc509821c23611Calin Culianu				bits |= (1U << CR_CHAN(cmd->chanlist[n]));
9006baef150380d561a4d695a6be4fc509821c23611Calin Culianu				pol_bits |= (CR_AREF(cmd->chanlist[n])
9010a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral					     || CR_RANGE(cmd->
9020a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral							 chanlist[n]) ? 1U : 0U)
9030a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				    << CR_CHAN(cmd->chanlist[n]);
9046baef150380d561a4d695a6be4fc509821c23611Calin Culianu			}
9056baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
9066baef150380d561a4d695a6be4fc509821c23611Calin Culianu		bits &= ((0x1 << subpriv->intr.num_asic_chans) -
9070a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			 1) << subpriv->intr.first_chan;
9086baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.enabled_mask = bits;
9096baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9106baef150380d561a4d695a6be4fc509821c23611Calin Culianu		switch_page(dev, asic, PAGE_ENAB);
9116baef150380d561a4d695a6be4fc509821c23611Calin Culianu		for (port = firstport; port < firstport + nports; ++port) {
9126baef150380d561a4d695a6be4fc509821c23611Calin Culianu			unsigned enab =
9130a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			    bits >> (subpriv->intr.first_chan + (port -
9140a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral								 firstport) *
9150a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral				     8) & 0xff, pol =
9160a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			    pol_bits >> (subpriv->intr.first_chan +
9170a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral					 (port - firstport) * 8) & 0xff;
9186baef150380d561a4d695a6be4fc509821c23611Calin Culianu			/* set enab intrs for this subdev.. */
9196baef150380d561a4d695a6be4fc509821c23611Calin Culianu			outb(enab,
9200a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			     devpriv->asics[asic].iobase + REG_ENAB0 + port);
9216baef150380d561a4d695a6be4fc509821c23611Calin Culianu			switch_page(dev, asic, PAGE_POL);
9226baef150380d561a4d695a6be4fc509821c23611Calin Culianu			outb(pol,
9230a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			     devpriv->asics[asic].iobase + REG_ENAB0 + port);
9246baef150380d561a4d695a6be4fc509821c23611Calin Culianu		}
9256baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
9266baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return 0;
9276baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
9286baef150380d561a4d695a6be4fc509821c23611Calin Culianu
929da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic int pcmuio_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
9306baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
9316baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned long flags;
9326baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9335f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman	spin_lock_irqsave(&subpriv->intr.spinlock, flags);
9346baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (subpriv->intr.active)
9356baef150380d561a4d695a6be4fc509821c23611Calin Culianu		pcmuio_stop_intr(dev, s);
9365f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman	spin_unlock_irqrestore(&subpriv->intr.spinlock, flags);
9376baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9386baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return 0;
9396baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
9406baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9416baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
9426baef150380d561a4d695a6be4fc509821c23611Calin Culianu * Internal trigger function to start acquisition for an 'INTERRUPT' subdevice.
9436baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
9446baef150380d561a4d695a6be4fc509821c23611Calin Culianustatic int
945da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonpcmuio_inttrig_start_intr(struct comedi_device *dev, struct comedi_subdevice *s,
9460a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral			  unsigned int trignum)
9476baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
9486baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned long flags;
9496baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int event = 0;
9506baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9516baef150380d561a4d695a6be4fc509821c23611Calin Culianu	if (trignum != 0)
9526baef150380d561a4d695a6be4fc509821c23611Calin Culianu		return -EINVAL;
9536baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9545f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman	spin_lock_irqsave(&subpriv->intr.spinlock, flags);
9556baef150380d561a4d695a6be4fc509821c23611Calin Culianu	s->async->inttrig = 0;
9560389245f0c5692111c0dc8d997fc4af72d789472Ravishankar karkala Mallikarjunayya	if (subpriv->intr.active)
9576baef150380d561a4d695a6be4fc509821c23611Calin Culianu		event = pcmuio_start_intr(dev, s);
9580389245f0c5692111c0dc8d997fc4af72d789472Ravishankar karkala Mallikarjunayya
9595f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman	spin_unlock_irqrestore(&subpriv->intr.spinlock, flags);
9606baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9610389245f0c5692111c0dc8d997fc4af72d789472Ravishankar karkala Mallikarjunayya	if (event)
9626baef150380d561a4d695a6be4fc509821c23611Calin Culianu		comedi_event(dev, s);
9636baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9646baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return 1;
9656baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
9666baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9676baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
9686baef150380d561a4d695a6be4fc509821c23611Calin Culianu * 'do_cmd' function for an 'INTERRUPT' subdevice.
9696baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
970da91b2692e0939b307f9047192d2b9fe07793e7aBill Pembertonstatic int pcmuio_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
9716baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
972ea6d0d4cab4f4f2d6a88f3bce4707fe92696fd3fBill Pemberton	struct comedi_cmd *cmd = &s->async->cmd;
9736baef150380d561a4d695a6be4fc509821c23611Calin Culianu	unsigned long flags;
9746baef150380d561a4d695a6be4fc509821c23611Calin Culianu	int event = 0;
9756baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9765f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman	spin_lock_irqsave(&subpriv->intr.spinlock, flags);
9776baef150380d561a4d695a6be4fc509821c23611Calin Culianu	subpriv->intr.active = 1;
9786baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9796baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* Set up end of acquisition. */
9806baef150380d561a4d695a6be4fc509821c23611Calin Culianu	switch (cmd->stop_src) {
9816baef150380d561a4d695a6be4fc509821c23611Calin Culianu	case TRIG_COUNT:
9826baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.continuous = 0;
9836baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.stop_count = cmd->stop_arg;
9846baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
9856baef150380d561a4d695a6be4fc509821c23611Calin Culianu	default:
9866baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* TRIG_NONE */
9876baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.continuous = 1;
9886baef150380d561a4d695a6be4fc509821c23611Calin Culianu		subpriv->intr.stop_count = 0;
9896baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
9906baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
9916baef150380d561a4d695a6be4fc509821c23611Calin Culianu
9926baef150380d561a4d695a6be4fc509821c23611Calin Culianu	/* Set up start of acquisition. */
9936baef150380d561a4d695a6be4fc509821c23611Calin Culianu	switch (cmd->start_src) {
9946baef150380d561a4d695a6be4fc509821c23611Calin Culianu	case TRIG_INT:
9956baef150380d561a4d695a6be4fc509821c23611Calin Culianu		s->async->inttrig = pcmuio_inttrig_start_intr;
9966baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
9976baef150380d561a4d695a6be4fc509821c23611Calin Culianu	default:
9986baef150380d561a4d695a6be4fc509821c23611Calin Culianu		/* TRIG_NOW */
9996baef150380d561a4d695a6be4fc509821c23611Calin Culianu		event = pcmuio_start_intr(dev, s);
10006baef150380d561a4d695a6be4fc509821c23611Calin Culianu		break;
10016baef150380d561a4d695a6be4fc509821c23611Calin Culianu	}
10025f74ea14c07fee91d3bdbaad88bff6264c6200e6Greg Kroah-Hartman	spin_unlock_irqrestore(&subpriv->intr.spinlock, flags);
10036baef150380d561a4d695a6be4fc509821c23611Calin Culianu
10040389245f0c5692111c0dc8d997fc4af72d789472Ravishankar karkala Mallikarjunayya	if (event)
10056baef150380d561a4d695a6be4fc509821c23611Calin Culianu		comedi_event(dev, s);
10066baef150380d561a4d695a6be4fc509821c23611Calin Culianu
10076baef150380d561a4d695a6be4fc509821c23611Calin Culianu	return 0;
10086baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
10096baef150380d561a4d695a6be4fc509821c23611Calin Culianu
10106baef150380d561a4d695a6be4fc509821c23611Calin Culianustatic int
10110a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukralpcmuio_cmdtest(struct comedi_device *dev, struct comedi_subdevice *s,
10120a85b6f0ab0d2edb0d41b32697111ce0e4f43496Mithlesh Thukral	       struct comedi_cmd *cmd)
10136baef150380d561a4d695a6be4fc509821c23611Calin Culianu{
10140b8f754a6220158f2348bc6eae2772bc64bc98a2Bill Pemberton	return comedi_pcm_cmdtest(dev, s, cmd);
10156baef150380d561a4d695a6be4fc509821c23611Calin Culianu}
10166baef150380d561a4d695a6be4fc509821c23611Calin Culianu
10176baef150380d561a4d695a6be4fc509821c23611Calin Culianu/*
10186baef150380d561a4d695a6be4fc509821c23611Calin Culianu * A convenient macro that defines init_module() and cleanup_module(),
10196baef150380d561a4d695a6be4fc509821c23611Calin Culianu * as necessary.
10206baef150380d561a4d695a6be4fc509821c23611Calin Culianu */
10217114a28011f9d5f3d981731ad341177c21f9d948Arun Thomasstatic int __init driver_init_module(void)
10227114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas{
10237114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas	return comedi_driver_register(&driver);
10247114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas}
10257114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas
10267114a28011f9d5f3d981731ad341177c21f9d948Arun Thomasstatic void __exit driver_cleanup_module(void)
10277114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas{
10287114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas	comedi_driver_unregister(&driver);
10297114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas}
10307114a28011f9d5f3d981731ad341177c21f9d948Arun Thomas
10317114a28011f9d5f3d981731ad341177c21f9d948Arun Thomasmodule_init(driver_init_module);
10327114a28011f9d5f3d981731ad341177c21f9d948Arun Thomasmodule_exit(driver_cleanup_module);
103390f703d30dd3e0c16ff80f35e34e511385a05ad5Arun Thomas
103490f703d30dd3e0c16ff80f35e34e511385a05ad5Arun ThomasMODULE_AUTHOR("Comedi http://www.comedi.org");
103590f703d30dd3e0c16ff80f35e34e511385a05ad5Arun ThomasMODULE_DESCRIPTION("Comedi low-level driver");
103690f703d30dd3e0c16ff80f35e34e511385a05ad5Arun ThomasMODULE_LICENSE("GPL");
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