1/* 2 * ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface 3 * 4 * Copyright 2010 Analog Devices Inc. 5 * 6 * Licensed under the GPL-2 or later. 7 */ 8 9#include <linux/interrupt.h> 10#include <linux/irq.h> 11#include <linux/delay.h> 12#include <linux/mutex.h> 13#include <linux/device.h> 14#include <linux/kernel.h> 15#include <linux/spi/spi.h> 16#include <linux/slab.h> 17#include <linux/sysfs.h> 18#include <linux/list.h> 19#include <linux/module.h> 20 21#include <linux/iio/iio.h> 22#include <linux/iio/sysfs.h> 23#include "meter.h" 24#include "ade7753.h" 25 26static int ade7753_spi_write_reg_8(struct device *dev, 27 u8 reg_address, 28 u8 val) 29{ 30 int ret; 31 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 32 struct ade7753_state *st = iio_priv(indio_dev); 33 34 mutex_lock(&st->buf_lock); 35 st->tx[0] = ADE7753_WRITE_REG(reg_address); 36 st->tx[1] = val; 37 38 ret = spi_write(st->us, st->tx, 2); 39 mutex_unlock(&st->buf_lock); 40 41 return ret; 42} 43 44static int ade7753_spi_write_reg_16(struct device *dev, 45 u8 reg_address, 46 u16 value) 47{ 48 int ret; 49 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 50 struct ade7753_state *st = iio_priv(indio_dev); 51 52 mutex_lock(&st->buf_lock); 53 st->tx[0] = ADE7753_WRITE_REG(reg_address); 54 st->tx[1] = (value >> 8) & 0xFF; 55 st->tx[2] = value & 0xFF; 56 ret = spi_write(st->us, st->tx, 3); 57 mutex_unlock(&st->buf_lock); 58 59 return ret; 60} 61 62static int ade7753_spi_read_reg_8(struct device *dev, 63 u8 reg_address, 64 u8 *val) 65{ 66 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 67 struct ade7753_state *st = iio_priv(indio_dev); 68 ssize_t ret; 69 70 ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address)); 71 if (ret < 0) { 72 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X", 73 reg_address); 74 return ret; 75 } 76 *val = ret; 77 78 return 0; 79} 80 81static int ade7753_spi_read_reg_16(struct device *dev, 82 u8 reg_address, 83 u16 *val) 84{ 85 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 86 struct ade7753_state *st = iio_priv(indio_dev); 87 ssize_t ret; 88 89 ret = spi_w8r16be(st->us, ADE7753_READ_REG(reg_address)); 90 if (ret < 0) { 91 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X", 92 reg_address); 93 return ret; 94 } 95 96 *val = ret; 97 98 return 0; 99} 100 101static int ade7753_spi_read_reg_24(struct device *dev, 102 u8 reg_address, 103 u32 *val) 104{ 105 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 106 struct ade7753_state *st = iio_priv(indio_dev); 107 int ret; 108 struct spi_transfer xfers[] = { 109 { 110 .tx_buf = st->tx, 111 .bits_per_word = 8, 112 .len = 1, 113 }, { 114 .rx_buf = st->tx, 115 .bits_per_word = 8, 116 .len = 3, 117 } 118 }; 119 120 mutex_lock(&st->buf_lock); 121 st->tx[0] = ADE7753_READ_REG(reg_address); 122 123 ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers)); 124 if (ret) { 125 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X", 126 reg_address); 127 goto error_ret; 128 } 129 *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2]; 130 131error_ret: 132 mutex_unlock(&st->buf_lock); 133 return ret; 134} 135 136static ssize_t ade7753_read_8bit(struct device *dev, 137 struct device_attribute *attr, 138 char *buf) 139{ 140 int ret; 141 u8 val; 142 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 143 144 ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val); 145 if (ret) 146 return ret; 147 148 return sprintf(buf, "%u\n", val); 149} 150 151static ssize_t ade7753_read_16bit(struct device *dev, 152 struct device_attribute *attr, 153 char *buf) 154{ 155 int ret; 156 u16 val; 157 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 158 159 ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val); 160 if (ret) 161 return ret; 162 163 return sprintf(buf, "%u\n", val); 164} 165 166static ssize_t ade7753_read_24bit(struct device *dev, 167 struct device_attribute *attr, 168 char *buf) 169{ 170 int ret; 171 u32 val; 172 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 173 174 ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val); 175 if (ret) 176 return ret; 177 178 return sprintf(buf, "%u\n", val); 179} 180 181static ssize_t ade7753_write_8bit(struct device *dev, 182 struct device_attribute *attr, 183 const char *buf, 184 size_t len) 185{ 186 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 187 int ret; 188 u8 val; 189 190 ret = kstrtou8(buf, 10, &val); 191 if (ret) 192 goto error_ret; 193 ret = ade7753_spi_write_reg_8(dev, this_attr->address, val); 194 195error_ret: 196 return ret ? ret : len; 197} 198 199static ssize_t ade7753_write_16bit(struct device *dev, 200 struct device_attribute *attr, 201 const char *buf, 202 size_t len) 203{ 204 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); 205 int ret; 206 u16 val; 207 208 ret = kstrtou16(buf, 10, &val); 209 if (ret) 210 goto error_ret; 211 ret = ade7753_spi_write_reg_16(dev, this_attr->address, val); 212 213error_ret: 214 return ret ? ret : len; 215} 216 217static int ade7753_reset(struct device *dev) 218{ 219 u16 val; 220 221 ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val); 222 val |= 1 << 6; /* Software Chip Reset */ 223 224 return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val); 225} 226 227static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY); 228static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY); 229static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY); 230static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY); 231static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO, 232 ade7753_read_16bit, 233 ade7753_write_16bit, 234 ADE7753_CFDEN); 235static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO, 236 ade7753_read_8bit, 237 ade7753_write_8bit, 238 ADE7753_CFNUM); 239static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM); 240static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO, 241 ade7753_read_16bit, 242 ade7753_write_16bit, 243 ADE7753_PHCAL); 244static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO, 245 ade7753_read_16bit, 246 ade7753_write_16bit, 247 ADE7753_APOS); 248static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO, 249 ade7753_read_8bit, 250 ade7753_write_8bit, 251 ADE7753_SAGCYC); 252static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO, 253 ade7753_read_8bit, 254 ade7753_write_8bit, 255 ADE7753_SAGLVL); 256static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO, 257 ade7753_read_8bit, 258 ade7753_write_8bit, 259 ADE7753_LINECYC); 260static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO, 261 ade7753_read_8bit, 262 ade7753_write_8bit, 263 ADE7753_WDIV); 264static IIO_DEV_ATTR_IRMS(S_IWUSR | S_IRUGO, 265 ade7753_read_24bit, 266 NULL, 267 ADE7753_IRMS); 268static IIO_DEV_ATTR_VRMS(S_IRUGO, 269 ade7753_read_24bit, 270 NULL, 271 ADE7753_VRMS); 272static IIO_DEV_ATTR_IRMSOS(S_IWUSR | S_IRUGO, 273 ade7753_read_16bit, 274 ade7753_write_16bit, 275 ADE7753_IRMSOS); 276static IIO_DEV_ATTR_VRMSOS(S_IWUSR | S_IRUGO, 277 ade7753_read_16bit, 278 ade7753_write_16bit, 279 ADE7753_VRMSOS); 280static IIO_DEV_ATTR_WGAIN(S_IWUSR | S_IRUGO, 281 ade7753_read_16bit, 282 ade7753_write_16bit, 283 ADE7753_WGAIN); 284static IIO_DEV_ATTR_VAGAIN(S_IWUSR | S_IRUGO, 285 ade7753_read_16bit, 286 ade7753_write_16bit, 287 ADE7753_VAGAIN); 288static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO, 289 ade7753_read_16bit, 290 ade7753_write_16bit, 291 ADE7753_GAIN); 292static IIO_DEV_ATTR_IPKLVL(S_IWUSR | S_IRUGO, 293 ade7753_read_8bit, 294 ade7753_write_8bit, 295 ADE7753_IPKLVL); 296static IIO_DEV_ATTR_VPKLVL(S_IWUSR | S_IRUGO, 297 ade7753_read_8bit, 298 ade7753_write_8bit, 299 ADE7753_VPKLVL); 300static IIO_DEV_ATTR_IPEAK(S_IRUGO, 301 ade7753_read_24bit, 302 NULL, 303 ADE7753_IPEAK); 304static IIO_DEV_ATTR_VPEAK(S_IRUGO, 305 ade7753_read_24bit, 306 NULL, 307 ADE7753_VPEAK); 308static IIO_DEV_ATTR_VPERIOD(S_IRUGO, 309 ade7753_read_16bit, 310 NULL, 311 ADE7753_PERIOD); 312static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO, 313 ade7753_read_8bit, 314 ade7753_write_8bit, 315 ADE7753_CH1OS); 316static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO, 317 ade7753_read_8bit, 318 ade7753_write_8bit, 319 ADE7753_CH2OS); 320 321static int ade7753_set_irq(struct device *dev, bool enable) 322{ 323 int ret; 324 u8 irqen; 325 326 ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen); 327 if (ret) 328 goto error_ret; 329 330 if (enable) 331 irqen |= 1 << 3; /* Enables an interrupt when a data is 332 present in the waveform register */ 333 else 334 irqen &= ~(1 << 3); 335 336 ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen); 337 338error_ret: 339 return ret; 340} 341 342/* Power down the device */ 343static int ade7753_stop_device(struct device *dev) 344{ 345 u16 val; 346 347 ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val); 348 val |= 1 << 4; /* AD converters can be turned off */ 349 350 return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val); 351} 352 353static int ade7753_initial_setup(struct iio_dev *indio_dev) 354{ 355 int ret; 356 struct device *dev = &indio_dev->dev; 357 struct ade7753_state *st = iio_priv(indio_dev); 358 359 /* use low spi speed for init */ 360 st->us->mode = SPI_MODE_3; 361 spi_setup(st->us); 362 363 /* Disable IRQ */ 364 ret = ade7753_set_irq(dev, false); 365 if (ret) { 366 dev_err(dev, "disable irq failed"); 367 goto err_ret; 368 } 369 370 ade7753_reset(dev); 371 msleep(ADE7753_STARTUP_DELAY); 372 373err_ret: 374 return ret; 375} 376 377static ssize_t ade7753_read_frequency(struct device *dev, 378 struct device_attribute *attr, 379 char *buf) 380{ 381 int ret; 382 u16 t; 383 int sps; 384 385 ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t); 386 if (ret) 387 return ret; 388 389 t = (t >> 11) & 0x3; 390 sps = 27900 / (1 + t); 391 392 return sprintf(buf, "%d\n", sps); 393} 394 395static ssize_t ade7753_write_frequency(struct device *dev, 396 struct device_attribute *attr, 397 const char *buf, 398 size_t len) 399{ 400 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 401 struct ade7753_state *st = iio_priv(indio_dev); 402 u16 val; 403 int ret; 404 u16 reg, t; 405 406 ret = kstrtou16(buf, 10, &val); 407 if (ret) 408 return ret; 409 if (val == 0) 410 return -EINVAL; 411 412 mutex_lock(&indio_dev->mlock); 413 414 t = (27900 / val); 415 if (t > 0) 416 t--; 417 418 if (t > 1) 419 st->us->max_speed_hz = ADE7753_SPI_SLOW; 420 else 421 st->us->max_speed_hz = ADE7753_SPI_FAST; 422 423 ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, ®); 424 if (ret) 425 goto out; 426 427 reg &= ~(3 << 11); 428 reg |= t << 11; 429 430 ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg); 431 432out: 433 mutex_unlock(&indio_dev->mlock); 434 435 return ret ? ret : len; 436} 437 438static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit); 439static IIO_CONST_ATTR(in_temp_offset, "-25 C"); 440static IIO_CONST_ATTR(in_temp_scale, "0.67 C"); 441 442static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO, 443 ade7753_read_frequency, 444 ade7753_write_frequency); 445 446static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500"); 447 448static struct attribute *ade7753_attributes[] = { 449 &iio_dev_attr_in_temp_raw.dev_attr.attr, 450 &iio_const_attr_in_temp_offset.dev_attr.attr, 451 &iio_const_attr_in_temp_scale.dev_attr.attr, 452 &iio_dev_attr_sampling_frequency.dev_attr.attr, 453 &iio_const_attr_sampling_frequency_available.dev_attr.attr, 454 &iio_dev_attr_phcal.dev_attr.attr, 455 &iio_dev_attr_cfden.dev_attr.attr, 456 &iio_dev_attr_aenergy.dev_attr.attr, 457 &iio_dev_attr_laenergy.dev_attr.attr, 458 &iio_dev_attr_vaenergy.dev_attr.attr, 459 &iio_dev_attr_lvaenergy.dev_attr.attr, 460 &iio_dev_attr_cfnum.dev_attr.attr, 461 &iio_dev_attr_apos.dev_attr.attr, 462 &iio_dev_attr_sagcyc.dev_attr.attr, 463 &iio_dev_attr_saglvl.dev_attr.attr, 464 &iio_dev_attr_linecyc.dev_attr.attr, 465 &iio_dev_attr_chksum.dev_attr.attr, 466 &iio_dev_attr_pga_gain.dev_attr.attr, 467 &iio_dev_attr_wgain.dev_attr.attr, 468 &iio_dev_attr_choff_1.dev_attr.attr, 469 &iio_dev_attr_choff_2.dev_attr.attr, 470 &iio_dev_attr_wdiv.dev_attr.attr, 471 &iio_dev_attr_irms.dev_attr.attr, 472 &iio_dev_attr_vrms.dev_attr.attr, 473 &iio_dev_attr_irmsos.dev_attr.attr, 474 &iio_dev_attr_vrmsos.dev_attr.attr, 475 &iio_dev_attr_vagain.dev_attr.attr, 476 &iio_dev_attr_ipklvl.dev_attr.attr, 477 &iio_dev_attr_vpklvl.dev_attr.attr, 478 &iio_dev_attr_ipeak.dev_attr.attr, 479 &iio_dev_attr_vpeak.dev_attr.attr, 480 &iio_dev_attr_vperiod.dev_attr.attr, 481 NULL, 482}; 483 484static const struct attribute_group ade7753_attribute_group = { 485 .attrs = ade7753_attributes, 486}; 487 488static const struct iio_info ade7753_info = { 489 .attrs = &ade7753_attribute_group, 490 .driver_module = THIS_MODULE, 491}; 492 493static int ade7753_probe(struct spi_device *spi) 494{ 495 int ret; 496 struct ade7753_state *st; 497 struct iio_dev *indio_dev; 498 499 /* setup the industrialio driver allocated elements */ 500 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); 501 if (!indio_dev) 502 return -ENOMEM; 503 /* this is only used for removal purposes */ 504 spi_set_drvdata(spi, indio_dev); 505 506 st = iio_priv(indio_dev); 507 st->us = spi; 508 mutex_init(&st->buf_lock); 509 510 indio_dev->name = spi->dev.driver->name; 511 indio_dev->dev.parent = &spi->dev; 512 indio_dev->info = &ade7753_info; 513 indio_dev->modes = INDIO_DIRECT_MODE; 514 515 /* Get the device into a sane initial state */ 516 ret = ade7753_initial_setup(indio_dev); 517 if (ret) 518 return ret; 519 520 ret = iio_device_register(indio_dev); 521 if (ret) 522 return ret; 523 524 return 0; 525} 526 527/* fixme, confirm ordering in this function */ 528static int ade7753_remove(struct spi_device *spi) 529{ 530 struct iio_dev *indio_dev = spi_get_drvdata(spi); 531 532 iio_device_unregister(indio_dev); 533 ade7753_stop_device(&indio_dev->dev); 534 535 return 0; 536} 537 538static struct spi_driver ade7753_driver = { 539 .driver = { 540 .name = "ade7753", 541 .owner = THIS_MODULE, 542 }, 543 .probe = ade7753_probe, 544 .remove = ade7753_remove, 545}; 546module_spi_driver(ade7753_driver); 547 548MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>"); 549MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter"); 550MODULE_LICENSE("GPL v2"); 551MODULE_ALIAS("spi:ade7753"); 552