odm.c revision 4bdfb1ce1b71079e1238b8c344e073d66b644a64
1/****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 21/* include files */ 22 23#include "odm_precomp.h" 24 25static const u16 dB_Invert_Table[8][12] = { 26 {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, 27 {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, 28 {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, 29 {71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251}, 30 {282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000}, 31 {1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, 32 {4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849}, 33 {17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} 34}; 35 36/* avoid to warn in FreeBSD ==> To DO modify */ 37static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { 38 /* UL DL */ 39 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */ 40 {0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */ 41 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 2:unknown AP => realtek_92SE */ 42 {0x5ea32b, 0x5ea42b, 0x5e4322}, /* 3:broadcom AP */ 43 {0x5ea422, 0x00a44f, 0x00a44f}, /* 4:ralink AP */ 44 {0x5ea322, 0x00a630, 0x00a44f}, /* 5:atheros AP */ 45 {0x5e4322, 0x5e4322, 0x5e4322},/* 6:cisco AP */ 46 {0x5ea44f, 0x00a44f, 0x5ea42b}, /* 8:marvell AP */ 47 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 10:unknown AP=> 92U AP */ 48 {0x5ea42b, 0xa630, 0x5e431c}, /* 11:airgocap AP */ 49}; 50 51/* Global var */ 52u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { 53 0x7f8001fe, /* 0, +6.0dB */ 54 0x788001e2, /* 1, +5.5dB */ 55 0x71c001c7, /* 2, +5.0dB */ 56 0x6b8001ae, /* 3, +4.5dB */ 57 0x65400195, /* 4, +4.0dB */ 58 0x5fc0017f, /* 5, +3.5dB */ 59 0x5a400169, /* 6, +3.0dB */ 60 0x55400155, /* 7, +2.5dB */ 61 0x50800142, /* 8, +2.0dB */ 62 0x4c000130, /* 9, +1.5dB */ 63 0x47c0011f, /* 10, +1.0dB */ 64 0x43c0010f, /* 11, +0.5dB */ 65 0x40000100, /* 12, +0dB */ 66 0x3c8000f2, /* 13, -0.5dB */ 67 0x390000e4, /* 14, -1.0dB */ 68 0x35c000d7, /* 15, -1.5dB */ 69 0x32c000cb, /* 16, -2.0dB */ 70 0x300000c0, /* 17, -2.5dB */ 71 0x2d4000b5, /* 18, -3.0dB */ 72 0x2ac000ab, /* 19, -3.5dB */ 73 0x288000a2, /* 20, -4.0dB */ 74 0x26000098, /* 21, -4.5dB */ 75 0x24000090, /* 22, -5.0dB */ 76 0x22000088, /* 23, -5.5dB */ 77 0x20000080, /* 24, -6.0dB */ 78 0x1e400079, /* 25, -6.5dB */ 79 0x1c800072, /* 26, -7.0dB */ 80 0x1b00006c, /* 27. -7.5dB */ 81 0x19800066, /* 28, -8.0dB */ 82 0x18000060, /* 29, -8.5dB */ 83 0x16c0005b, /* 30, -9.0dB */ 84 0x15800056, /* 31, -9.5dB */ 85 0x14400051, /* 32, -10.0dB */ 86 0x1300004c, /* 33, -10.5dB */ 87 0x12000048, /* 34, -11.0dB */ 88 0x11000044, /* 35, -11.5dB */ 89 0x10000040, /* 36, -12.0dB */ 90 0x0f00003c,/* 37, -12.5dB */ 91 0x0e400039,/* 38, -13.0dB */ 92 0x0d800036,/* 39, -13.5dB */ 93 0x0cc00033,/* 40, -14.0dB */ 94 0x0c000030,/* 41, -14.5dB */ 95 0x0b40002d,/* 42, -15.0dB */ 96}; 97 98u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { 99 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ 100 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ 101 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ 102 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ 103 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ 104 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ 105 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ 106 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ 107 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ 108 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ 109 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ 110 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ 111 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */ 112 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ 113 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ 114 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ 115 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ 116 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ 117 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ 118 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ 119 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ 120 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ 121 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ 122 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ 123 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ 124 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ 125 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ 126 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ 127 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ 128 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ 129 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ 130 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ 131 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ 132}; 133 134u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { 135 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ 136 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ 137 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ 138 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ 139 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ 140 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ 141 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ 142 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ 143 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ 144 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ 145 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ 146 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ 147 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */ 148 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ 149 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ 150 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ 151 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ 152 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ 153 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ 154 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ 155 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ 156 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ 157 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ 158 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ 159 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ 160 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ 161 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ 162 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ 163 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ 164 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ 165 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ 166 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ 167 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ 168}; 169 170 171#define RxDefaultAnt1 0x65a9 172#define RxDefaultAnt2 0x569a 173 174/* 3 Export Interface */ 175 176/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */ 177void ODM_DMInit(struct odm_dm_struct *pDM_Odm) 178{ 179 /* 2012.05.03 Luke: For all IC series */ 180 odm_CommonInfoSelfInit(pDM_Odm); 181 odm_CmnInfoInit_Debug(pDM_Odm); 182 odm_DIGInit(pDM_Odm); 183 odm_RateAdaptiveMaskInit(pDM_Odm); 184 185 odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ 186 odm_DynamicTxPowerInit(pDM_Odm); 187 odm_TXPowerTrackingInit(pDM_Odm); 188 ODM_EdcaTurboInit(pDM_Odm); 189 ODM_RAInfo_Init_all(pDM_Odm); 190 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || 191 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || 192 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) 193 odm_InitHybridAntDiv(pDM_Odm); 194} 195 196/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ 197/* You can not add any dummy function here, be care, you can only use DM structure */ 198/* to perform any new ODM_DM. */ 199void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) 200{ 201 /* 2012.05.03 Luke: For all IC series */ 202 odm_CmnInfoHook_Debug(pDM_Odm); 203 odm_CmnInfoUpdate_Debug(pDM_Odm); 204 odm_CommonInfoSelfUpdate(pDM_Odm); 205 odm_FalseAlarmCounterStatistics(pDM_Odm); 206 odm_RSSIMonitorCheck(pDM_Odm); 207 208 /* Fix Leave LPS issue */ 209 odm_DIG(pDM_Odm); 210 odm_CCKPacketDetectionThresh(pDM_Odm); 211 212 if (*(pDM_Odm->pbPowerSaving)) 213 return; 214 215 odm_RefreshRateAdaptiveMask(pDM_Odm); 216 217 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || 218 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || 219 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) 220 odm_HwAntDiv(pDM_Odm); 221 222 ODM_TXPowerTrackingCheck(pDM_Odm); 223 odm_EdcaTurboCheck(pDM_Odm); 224 odm_DynamicTxPower(pDM_Odm); 225} 226 227/* Init /.. Fixed HW value. Only init time. */ 228void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value) 229{ 230 /* This section is used for init value */ 231 switch (CmnInfo) { 232 /* Fixed ODM value. */ 233 case ODM_CMNINFO_ABILITY: 234 pDM_Odm->SupportAbility = (u32)Value; 235 break; 236 case ODM_CMNINFO_PLATFORM: 237 pDM_Odm->SupportPlatform = (u8)Value; 238 break; 239 case ODM_CMNINFO_INTERFACE: 240 pDM_Odm->SupportInterface = (u8)Value; 241 break; 242 case ODM_CMNINFO_MP_TEST_CHIP: 243 pDM_Odm->bIsMPChip = (u8)Value; 244 break; 245 case ODM_CMNINFO_IC_TYPE: 246 pDM_Odm->SupportICType = Value; 247 break; 248 case ODM_CMNINFO_CUT_VER: 249 pDM_Odm->CutVersion = (u8)Value; 250 break; 251 case ODM_CMNINFO_FAB_VER: 252 pDM_Odm->FabVersion = (u8)Value; 253 break; 254 case ODM_CMNINFO_RF_TYPE: 255 pDM_Odm->RFType = (u8)Value; 256 break; 257 case ODM_CMNINFO_RF_ANTENNA_TYPE: 258 pDM_Odm->AntDivType = (u8)Value; 259 break; 260 case ODM_CMNINFO_BOARD_TYPE: 261 pDM_Odm->BoardType = (u8)Value; 262 break; 263 case ODM_CMNINFO_EXT_LNA: 264 pDM_Odm->ExtLNA = (u8)Value; 265 break; 266 case ODM_CMNINFO_EXT_PA: 267 pDM_Odm->ExtPA = (u8)Value; 268 break; 269 case ODM_CMNINFO_EXT_TRSW: 270 pDM_Odm->ExtTRSW = (u8)Value; 271 break; 272 case ODM_CMNINFO_PATCH_ID: 273 pDM_Odm->PatchID = (u8)Value; 274 break; 275 case ODM_CMNINFO_BINHCT_TEST: 276 pDM_Odm->bInHctTest = (bool)Value; 277 break; 278 case ODM_CMNINFO_BWIFI_TEST: 279 pDM_Odm->bWIFITest = (bool)Value; 280 break; 281 case ODM_CMNINFO_SMART_CONCURRENT: 282 pDM_Odm->bDualMacSmartConcurrent = (bool)Value; 283 break; 284 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 285 default: 286 /* do nothing */ 287 break; 288 } 289 290 /* Tx power tracking BB swing table. */ 291 /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ 292 pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */ 293 pDM_Odm->BbSwingIdxOfdmCurrent = 12; 294 pDM_Odm->BbSwingFlagOfdm = false; 295} 296 297void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue) 298{ 299 /* */ 300 /* Hook call by reference pointer. */ 301 /* */ 302 switch (CmnInfo) { 303 /* Dynamic call by reference pointer. */ 304 case ODM_CMNINFO_MAC_PHY_MODE: 305 pDM_Odm->pMacPhyMode = (u8 *)pValue; 306 break; 307 case ODM_CMNINFO_TX_UNI: 308 pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue; 309 break; 310 case ODM_CMNINFO_RX_UNI: 311 pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue; 312 break; 313 case ODM_CMNINFO_WM_MODE: 314 pDM_Odm->pWirelessMode = (u8 *)pValue; 315 break; 316 case ODM_CMNINFO_BAND: 317 pDM_Odm->pBandType = (u8 *)pValue; 318 break; 319 case ODM_CMNINFO_SEC_CHNL_OFFSET: 320 pDM_Odm->pSecChOffset = (u8 *)pValue; 321 break; 322 case ODM_CMNINFO_SEC_MODE: 323 pDM_Odm->pSecurity = (u8 *)pValue; 324 break; 325 case ODM_CMNINFO_BW: 326 pDM_Odm->pBandWidth = (u8 *)pValue; 327 break; 328 case ODM_CMNINFO_CHNL: 329 pDM_Odm->pChannel = (u8 *)pValue; 330 break; 331 case ODM_CMNINFO_DMSP_GET_VALUE: 332 pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue; 333 break; 334 case ODM_CMNINFO_BUDDY_ADAPTOR: 335 pDM_Odm->pBuddyAdapter = (struct adapter **)pValue; 336 break; 337 case ODM_CMNINFO_DMSP_IS_MASTER: 338 pDM_Odm->pbMasterOfDMSP = (bool *)pValue; 339 break; 340 case ODM_CMNINFO_SCAN: 341 pDM_Odm->pbScanInProcess = (bool *)pValue; 342 break; 343 case ODM_CMNINFO_POWER_SAVING: 344 pDM_Odm->pbPowerSaving = (bool *)pValue; 345 break; 346 case ODM_CMNINFO_ONE_PATH_CCA: 347 pDM_Odm->pOnePathCCA = (u8 *)pValue; 348 break; 349 case ODM_CMNINFO_DRV_STOP: 350 pDM_Odm->pbDriverStopped = (bool *)pValue; 351 break; 352 case ODM_CMNINFO_PNP_IN: 353 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (bool *)pValue; 354 break; 355 case ODM_CMNINFO_INIT_ON: 356 pDM_Odm->pinit_adpt_in_progress = (bool *)pValue; 357 break; 358 case ODM_CMNINFO_ANT_TEST: 359 pDM_Odm->pAntennaTest = (u8 *)pValue; 360 break; 361 case ODM_CMNINFO_NET_CLOSED: 362 pDM_Odm->pbNet_closed = (bool *)pValue; 363 break; 364 case ODM_CMNINFO_MP_MODE: 365 pDM_Odm->mp_mode = (u8 *)pValue; 366 break; 367 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 368 default: 369 /* do nothing */ 370 break; 371 } 372} 373 374void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) 375{ 376 /* Hook call by reference pointer. */ 377 switch (CmnInfo) { 378 /* Dynamic call by reference pointer. */ 379 case ODM_CMNINFO_STA_STATUS: 380 pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue; 381 break; 382 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 383 default: 384 /* do nothing */ 385 break; 386 } 387} 388 389/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */ 390void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) 391{ 392 /* */ 393 /* This init variable may be changed in run time. */ 394 /* */ 395 switch (CmnInfo) { 396 case ODM_CMNINFO_ABILITY: 397 pDM_Odm->SupportAbility = (u32)Value; 398 break; 399 case ODM_CMNINFO_RF_TYPE: 400 pDM_Odm->RFType = (u8)Value; 401 break; 402 case ODM_CMNINFO_WIFI_DIRECT: 403 pDM_Odm->bWIFI_Direct = (bool)Value; 404 break; 405 case ODM_CMNINFO_WIFI_DISPLAY: 406 pDM_Odm->bWIFI_Display = (bool)Value; 407 break; 408 case ODM_CMNINFO_LINK: 409 pDM_Odm->bLinked = (bool)Value; 410 break; 411 case ODM_CMNINFO_RSSI_MIN: 412 pDM_Odm->RSSI_Min = (u8)Value; 413 break; 414 case ODM_CMNINFO_DBG_COMP: 415 pDM_Odm->DebugComponents = Value; 416 break; 417 case ODM_CMNINFO_DBG_LEVEL: 418 pDM_Odm->DebugLevel = (u32)Value; 419 break; 420 case ODM_CMNINFO_RA_THRESHOLD_HIGH: 421 pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value; 422 break; 423 case ODM_CMNINFO_RA_THRESHOLD_LOW: 424 pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value; 425 break; 426 } 427} 428 429void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) 430{ 431 struct adapter *adapter = pDM_Odm->Adapter; 432 433 pDM_Odm->bCckHighPower = (bool) PHY_QueryBBReg(adapter, 0x824, BIT9); 434 pDM_Odm->RFPathRxEnable = (u8) PHY_QueryBBReg(adapter, 0xc04, 0x0F); 435 436 ODM_InitDebugSetting(pDM_Odm); 437} 438 439void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) 440{ 441 u8 EntryCnt = 0; 442 u8 i; 443 struct sta_info *pEntry; 444 445 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { 446 if (*(pDM_Odm->pSecChOffset) == 1) 447 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; 448 else if (*(pDM_Odm->pSecChOffset) == 2) 449 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; 450 } else { 451 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); 452 } 453 454 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 455 pEntry = pDM_Odm->pODM_StaInfo[i]; 456 if (IS_STA_VALID(pEntry)) 457 EntryCnt++; 458 } 459 if (EntryCnt == 1) 460 pDM_Odm->bOneEntryOnly = true; 461 else 462 pDM_Odm->bOneEntryOnly = false; 463} 464 465void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm) 466{ 467 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n")); 468 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n", pDM_Odm->SupportPlatform)); 469 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n", pDM_Odm->SupportAbility)); 470 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n", pDM_Odm->SupportInterface)); 471 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n", pDM_Odm->SupportICType)); 472 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n", pDM_Odm->CutVersion)); 473 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n", pDM_Odm->FabVersion)); 474 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n", pDM_Odm->RFType)); 475 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n", pDM_Odm->BoardType)); 476 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n", pDM_Odm->ExtLNA)); 477 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n", pDM_Odm->ExtPA)); 478 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n", pDM_Odm->ExtTRSW)); 479 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n", pDM_Odm->PatchID)); 480 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n", pDM_Odm->bInHctTest)); 481 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n", pDM_Odm->bWIFITest)); 482 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n", pDM_Odm->bDualMacSmartConcurrent)); 483} 484 485void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm) 486{ 487 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n")); 488 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n", *(pDM_Odm->pNumTxBytesUnicast))); 489 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n", *(pDM_Odm->pNumRxBytesUnicast))); 490 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n", *(pDM_Odm->pWirelessMode))); 491 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n", *(pDM_Odm->pSecChOffset))); 492 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n", *(pDM_Odm->pSecurity))); 493 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n", *(pDM_Odm->pBandWidth))); 494 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n", *(pDM_Odm->pChannel))); 495 496 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess))); 497 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving))); 498} 499 500void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm) 501{ 502 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n")); 503 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n", pDM_Odm->bWIFI_Direct)); 504 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n", pDM_Odm->bWIFI_Display)); 505 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n", pDM_Odm->bLinked)); 506 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min)); 507} 508 509void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) 510{ 511 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 512 struct adapter *adapter = pDM_Odm->Adapter; 513 514 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 515 ("ODM_REG(IGI_A,pDM_Odm)=0x%x, ODM_BIT(IGI,pDM_Odm)=0x%x\n", 516 ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm))); 517 518 if (pDM_DigTable->CurIGValue != CurrentIGI) { 519 PHY_SetBBReg(adapter, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm), CurrentIGI); 520 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("CurrentIGI(0x%02x).\n", CurrentIGI)); 521 /* pDM_DigTable->PreIGValue = pDM_DigTable->CurIGValue; */ 522 pDM_DigTable->CurIGValue = CurrentIGI; 523 } 524 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("ODM_Write_DIG():CurrentIGI=0x%x\n", CurrentIGI)); 525 526/* Add by Neil Chen to enable edcca to MP Platform */ 527} 528 529void odm_DIGInit(struct odm_dm_struct *pDM_Odm) 530{ 531 struct adapter *adapter = pDM_Odm->Adapter; 532 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 533 534 pDM_DigTable->CurIGValue = (u8) PHY_QueryBBReg(adapter, ODM_REG(IGI_A, pDM_Odm), ODM_BIT(IGI, pDM_Odm)); 535 pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; 536 pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; 537 pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; 538 pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH; 539 if (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) { 540 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; 541 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; 542 } else { 543 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; 544 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; 545 } 546 pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; 547 pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; 548 pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; 549 pDM_DigTable->PreCCK_CCAThres = 0xFF; 550 pDM_DigTable->CurCCK_CCAThres = 0x83; 551 pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; 552 pDM_DigTable->LargeFAHit = 0; 553 pDM_DigTable->Recover_cnt = 0; 554 pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; 555 pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; 556 pDM_DigTable->bMediaConnect_0 = false; 557 pDM_DigTable->bMediaConnect_1 = false; 558 559 /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */ 560 pDM_Odm->bDMInitialGainEnable = true; 561} 562 563void odm_DIG(struct odm_dm_struct *pDM_Odm) 564{ 565 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 566 struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; 567 u8 DIG_Dynamic_MIN; 568 u8 DIG_MaxOfMin; 569 bool FirstConnect, FirstDisConnect; 570 u8 dm_dig_max, dm_dig_min; 571 u8 CurrentIGI = pDM_DigTable->CurIGValue; 572 573 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); 574 if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) { 575 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 576 ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); 577 return; 578 } 579 580 if (*(pDM_Odm->pbScanInProcess)) { 581 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n")); 582 return; 583 } 584 585 /* add by Neil Chen to avoid PSD is processing */ 586 if (pDM_Odm->bDMInitialGainEnable == false) { 587 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n")); 588 return; 589 } 590 591 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; 592 FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); 593 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); 594 595 /* 1 Boundary Decision */ 596 dm_dig_max = DM_DIG_MAX_NIC; 597 dm_dig_min = DM_DIG_MIN_NIC; 598 DIG_MaxOfMin = DM_DIG_MAX_AP; 599 600 if (pDM_Odm->bLinked) { 601 /* 2 Modify DIG upper bound */ 602 if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) 603 pDM_DigTable->rx_gain_range_max = dm_dig_max; 604 else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) 605 pDM_DigTable->rx_gain_range_max = dm_dig_min; 606 else 607 pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; 608 /* 2 Modify DIG lower bound */ 609 if (pDM_Odm->bOneEntryOnly) { 610 if (pDM_Odm->RSSI_Min < dm_dig_min) 611 DIG_Dynamic_MIN = dm_dig_min; 612 else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) 613 DIG_Dynamic_MIN = DIG_MaxOfMin; 614 else 615 DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; 616 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 617 ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n", 618 DIG_Dynamic_MIN)); 619 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 620 ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n", 621 pDM_Odm->RSSI_Min)); 622 } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { 623 /* 1 Lower Bound for 88E AntDiv */ 624 if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { 625 DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; 626 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 627 ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n", 628 pDM_DigTable->AntDiv_RSSI_max)); 629 } 630 } else { 631 DIG_Dynamic_MIN = dm_dig_min; 632 } 633 } else { 634 pDM_DigTable->rx_gain_range_max = dm_dig_max; 635 DIG_Dynamic_MIN = dm_dig_min; 636 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); 637 } 638 639 /* 1 Modify DIG lower bound, deal with abnormally large false alarm */ 640 if (pFalseAlmCnt->Cnt_all > 10000) { 641 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n")); 642 643 if (pDM_DigTable->LargeFAHit != 3) 644 pDM_DigTable->LargeFAHit++; 645 if (pDM_DigTable->ForbiddenIGI < CurrentIGI) { 646 pDM_DigTable->ForbiddenIGI = CurrentIGI; 647 pDM_DigTable->LargeFAHit = 1; 648 } 649 650 if (pDM_DigTable->LargeFAHit >= 3) { 651 if ((pDM_DigTable->ForbiddenIGI+1) > pDM_DigTable->rx_gain_range_max) 652 pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; 653 else 654 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); 655 pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */ 656 } 657 658 } else { 659 /* Recovery mechanism for IGI lower bound */ 660 if (pDM_DigTable->Recover_cnt != 0) { 661 pDM_DigTable->Recover_cnt--; 662 } else { 663 if (pDM_DigTable->LargeFAHit < 3) { 664 if ((pDM_DigTable->ForbiddenIGI-1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */ 665 pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 666 pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 667 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); 668 } else { 669 pDM_DigTable->ForbiddenIGI--; 670 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); 671 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); 672 } 673 } else { 674 pDM_DigTable->LargeFAHit = 0; 675 } 676 } 677 } 678 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 679 ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n", 680 pDM_DigTable->LargeFAHit)); 681 682 /* 1 Adjust initial gain by false alarm */ 683 if (pDM_Odm->bLinked) { 684 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); 685 if (FirstConnect) { 686 CurrentIGI = pDM_Odm->RSSI_Min; 687 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); 688 } else { 689 if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) 690 CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ 691 else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) 692 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ 693 else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) 694 CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ 695 } 696 } else { 697 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); 698 if (FirstDisConnect) { 699 CurrentIGI = pDM_DigTable->rx_gain_range_min; 700 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n")); 701 } else { 702 /* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */ 703 if (pFalseAlmCnt->Cnt_all > 10000) 704 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ 705 else if (pFalseAlmCnt->Cnt_all > 8000) 706 CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ 707 else if (pFalseAlmCnt->Cnt_all < 500) 708 CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ 709 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n")); 710 } 711 } 712 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); 713 /* 1 Check initial gain by upper/lower bound */ 714 if (CurrentIGI > pDM_DigTable->rx_gain_range_max) 715 CurrentIGI = pDM_DigTable->rx_gain_range_max; 716 if (CurrentIGI < pDM_DigTable->rx_gain_range_min) 717 CurrentIGI = pDM_DigTable->rx_gain_range_min; 718 719 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 720 ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", 721 pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); 722 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); 723 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); 724 725 /* 2 High power RSSI threshold */ 726 727 ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ 728 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; 729 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; 730} 731 732/* 3============================================================ */ 733/* 3 FASLE ALARM CHECK */ 734/* 3============================================================ */ 735 736void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) 737{ 738 struct adapter *adapter = pDM_Odm->Adapter; 739 u32 ret_value; 740 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); 741 742 if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) 743 return; 744 745 /* hold ofdm counter */ 746 PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */ 747 PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */ 748 749 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); 750 FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); 751 FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); 752 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); 753 FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); 754 FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); 755 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); 756 FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); 757 FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); 758 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); 759 FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); 760 761 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + 762 FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + 763 FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; 764 765 ret_value = PHY_QueryBBReg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord); 766 FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); 767 FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); 768 769 /* hold cck counter */ 770 PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1); 771 PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); 772 773 ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); 774 FalseAlmCnt->Cnt_Cck_fail = ret_value; 775 ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); 776 FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8; 777 778 ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); 779 FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); 780 781 FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + 782 FalseAlmCnt->Cnt_SB_Search_fail + 783 FalseAlmCnt->Cnt_Parity_Fail + 784 FalseAlmCnt->Cnt_Rate_Illegal + 785 FalseAlmCnt->Cnt_Crc8_fail + 786 FalseAlmCnt->Cnt_Mcs_fail + 787 FalseAlmCnt->Cnt_Cck_fail); 788 789 FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; 790 791 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); 792 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 793 ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", 794 FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); 795 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 796 ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", 797 FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); 798 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 799 ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", 800 FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); 801 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); 802 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); 803 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); 804} 805 806/* 3============================================================ */ 807/* 3 CCK Packet Detect Threshold */ 808/* 3============================================================ */ 809 810void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) 811{ 812 u8 CurCCK_CCAThres; 813 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); 814 815 if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) 816 return; 817 if (pDM_Odm->ExtLNA) 818 return; 819 if (pDM_Odm->bLinked) { 820 if (pDM_Odm->RSSI_Min > 25) { 821 CurCCK_CCAThres = 0xcd; 822 } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) { 823 CurCCK_CCAThres = 0x83; 824 } else { 825 if (FalseAlmCnt->Cnt_Cck_fail > 1000) 826 CurCCK_CCAThres = 0x83; 827 else 828 CurCCK_CCAThres = 0x40; 829 } 830 } else { 831 if (FalseAlmCnt->Cnt_Cck_fail > 1000) 832 CurCCK_CCAThres = 0x83; 833 else 834 CurCCK_CCAThres = 0x40; 835 } 836 ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); 837} 838 839void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) 840{ 841 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 842 struct adapter *adapt = pDM_Odm->Adapter; 843 844 if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ 845 rtw_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres); 846 pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; 847 pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; 848} 849 850void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) 851{ 852 struct adapter *adapter = pDM_Odm->Adapter; 853 struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; 854 u8 Rssi_Up_bound = 30; 855 u8 Rssi_Low_bound = 25; 856 857 if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ 858 Rssi_Up_bound = 50; 859 Rssi_Low_bound = 45; 860 } 861 if (pDM_PSTable->initialize == 0) { 862 pDM_PSTable->Reg874 = (PHY_QueryBBReg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14; 863 pDM_PSTable->RegC70 = (PHY_QueryBBReg(adapter, 0xc70, bMaskDWord)&BIT3)>>3; 864 pDM_PSTable->Reg85C = (PHY_QueryBBReg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24; 865 pDM_PSTable->RegA74 = (PHY_QueryBBReg(adapter, 0xa74, bMaskDWord)&0xF000)>>12; 866 pDM_PSTable->initialize = 1; 867 } 868 869 if (!bForceInNormal) { 870 if (pDM_Odm->RSSI_Min != 0xFF) { 871 if (pDM_PSTable->PreRFState == RF_Normal) { 872 if (pDM_Odm->RSSI_Min >= Rssi_Up_bound) 873 pDM_PSTable->CurRFState = RF_Save; 874 else 875 pDM_PSTable->CurRFState = RF_Normal; 876 } else { 877 if (pDM_Odm->RSSI_Min <= Rssi_Low_bound) 878 pDM_PSTable->CurRFState = RF_Normal; 879 else 880 pDM_PSTable->CurRFState = RF_Save; 881 } 882 } else { 883 pDM_PSTable->CurRFState = RF_MAX; 884 } 885 } else { 886 pDM_PSTable->CurRFState = RF_Normal; 887 } 888 889 if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { 890 if (pDM_PSTable->CurRFState == RF_Save) { 891 PHY_SetBBReg(adapter, 0x874 , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ 892 PHY_SetBBReg(adapter, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ 893 PHY_SetBBReg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ 894 PHY_SetBBReg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ 895 PHY_SetBBReg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ 896 PHY_SetBBReg(adapter, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */ 897 PHY_SetBBReg(adapter, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */ 898 } else { 899 PHY_SetBBReg(adapter, 0x874 , 0x1CC000, pDM_PSTable->Reg874); 900 PHY_SetBBReg(adapter, 0xc70, BIT3, pDM_PSTable->RegC70); 901 PHY_SetBBReg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); 902 PHY_SetBBReg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74); 903 PHY_SetBBReg(adapter, 0x818, BIT28, 0x0); 904 } 905 pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; 906 } 907} 908 909/* 3============================================================ */ 910/* 3 RATR MASK */ 911/* 3============================================================ */ 912/* 3============================================================ */ 913/* 3 Rate Adaptive */ 914/* 3============================================================ */ 915 916void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) 917{ 918 struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; 919 920 pOdmRA->Type = DM_Type_ByDriver; 921 if (pOdmRA->Type == DM_Type_ByDriver) 922 pDM_Odm->bUseRAMask = true; 923 else 924 pDM_Odm->bUseRAMask = false; 925 926 pOdmRA->RATRState = DM_RATR_STA_INIT; 927 pOdmRA->HighRSSIThresh = 50; 928 pOdmRA->LowRSSIThresh = 20; 929} 930 931u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) 932{ 933 struct sta_info *pEntry; 934 u32 rate_bitmap = 0x0fffffff; 935 u8 WirelessMode; 936 937 pEntry = pDM_Odm->pODM_StaInfo[macid]; 938 if (!IS_STA_VALID(pEntry)) 939 return ra_mask; 940 941 WirelessMode = pEntry->wireless_mode; 942 943 switch (WirelessMode) { 944 case ODM_WM_B: 945 if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */ 946 rate_bitmap = 0x0000000d; 947 else 948 rate_bitmap = 0x0000000f; 949 break; 950 case (ODM_WM_A|ODM_WM_G): 951 if (rssi_level == DM_RATR_STA_HIGH) 952 rate_bitmap = 0x00000f00; 953 else 954 rate_bitmap = 0x00000ff0; 955 break; 956 case (ODM_WM_B|ODM_WM_G): 957 if (rssi_level == DM_RATR_STA_HIGH) 958 rate_bitmap = 0x00000f00; 959 else if (rssi_level == DM_RATR_STA_MIDDLE) 960 rate_bitmap = 0x00000ff0; 961 else 962 rate_bitmap = 0x00000ff5; 963 break; 964 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): 965 case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G): 966 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { 967 if (rssi_level == DM_RATR_STA_HIGH) { 968 rate_bitmap = 0x000f0000; 969 } else if (rssi_level == DM_RATR_STA_MIDDLE) { 970 rate_bitmap = 0x000ff000; 971 } else { 972 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) 973 rate_bitmap = 0x000ff015; 974 else 975 rate_bitmap = 0x000ff005; 976 } 977 } else { 978 if (rssi_level == DM_RATR_STA_HIGH) { 979 rate_bitmap = 0x0f8f0000; 980 } else if (rssi_level == DM_RATR_STA_MIDDLE) { 981 rate_bitmap = 0x0f8ff000; 982 } else { 983 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) 984 rate_bitmap = 0x0f8ff015; 985 else 986 rate_bitmap = 0x0f8ff005; 987 } 988 } 989 break; 990 default: 991 /* case WIRELESS_11_24N: */ 992 /* case WIRELESS_11_5N: */ 993 if (pDM_Odm->RFType == RF_1T2R) 994 rate_bitmap = 0x000fffff; 995 else 996 rate_bitmap = 0x0fffffff; 997 break; 998 } 999 1000 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, 1001 (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", 1002 rssi_level, WirelessMode, rate_bitmap)); 1003 1004 return rate_bitmap; 1005} 1006 1007/*----------------------------------------------------------------------------- 1008 * Function: odm_RefreshRateAdaptiveMask() 1009 * 1010 * Overview: Update rate table mask according to rssi 1011 * 1012 * Input: NONE 1013 * 1014 * Output: NONE 1015 * 1016 * Return: NONE 1017 * 1018 * Revised History: 1019 * When Who Remark 1020 * 05/27/2009 hpfan Create Version 0. 1021 * 1022 *---------------------------------------------------------------------------*/ 1023void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) 1024{ 1025 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) 1026 return; 1027 /* */ 1028 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1029 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1030 /* HW dynamic mechanism. */ 1031 /* */ 1032 odm_RefreshRateAdaptiveMaskCE(pDM_Odm); 1033} 1034 1035void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) 1036{ 1037 u8 i; 1038 struct adapter *pAdapter = pDM_Odm->Adapter; 1039 1040 if (pAdapter->bDriverStopped) { 1041 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); 1042 return; 1043 } 1044 1045 if (!pDM_Odm->bUseRAMask) { 1046 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); 1047 return; 1048 } 1049 1050 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 1051 struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; 1052 if (IS_STA_VALID(pstat)) { 1053 if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false , &pstat->rssi_level)) { 1054 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, 1055 ("RSSI:%d, RSSI_LEVEL:%d\n", 1056 pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); 1057 rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level); 1058 } 1059 } 1060 } 1061} 1062 1063/* Return Value: bool */ 1064/* - true: RATRState is changed. */ 1065bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) 1066{ 1067 struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; 1068 const u8 GoUpGap = 5; 1069 u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; 1070 u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; 1071 u8 RATRState; 1072 1073 /* Threshold Adjustment: */ 1074 /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ 1075 /* Here GoUpGap is added to solve the boundary's level alternation issue. */ 1076 switch (*pRATRState) { 1077 case DM_RATR_STA_INIT: 1078 case DM_RATR_STA_HIGH: 1079 break; 1080 case DM_RATR_STA_MIDDLE: 1081 HighRSSIThreshForRA += GoUpGap; 1082 break; 1083 case DM_RATR_STA_LOW: 1084 HighRSSIThreshForRA += GoUpGap; 1085 LowRSSIThreshForRA += GoUpGap; 1086 break; 1087 default: 1088 ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState)); 1089 break; 1090 } 1091 1092 /* Decide RATRState by RSSI. */ 1093 if (RSSI > HighRSSIThreshForRA) 1094 RATRState = DM_RATR_STA_HIGH; 1095 else if (RSSI > LowRSSIThreshForRA) 1096 RATRState = DM_RATR_STA_MIDDLE; 1097 else 1098 RATRState = DM_RATR_STA_LOW; 1099 1100 if (*pRATRState != RATRState || bForceUpdate) { 1101 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState)); 1102 *pRATRState = RATRState; 1103 return true; 1104 } 1105 return false; 1106} 1107 1108/* 3============================================================ */ 1109/* 3 Dynamic Tx Power */ 1110/* 3============================================================ */ 1111 1112void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm) 1113{ 1114 struct adapter *Adapter = pDM_Odm->Adapter; 1115 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1116 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1117 pdmpriv->bDynamicTxPowerEnable = false; 1118 pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; 1119 pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; 1120} 1121 1122void odm_DynamicTxPower(struct odm_dm_struct *pDM_Odm) 1123{ 1124 /* For AP/ADSL use struct rtl8192cd_priv * */ 1125 /* For CE/NIC use struct adapter * */ 1126 1127 if (!(pDM_Odm->SupportAbility & ODM_BB_DYNAMIC_TXPWR)) 1128 return; 1129 1130 /* 2012/01/12 MH According to Luke's suggestion, only high power will support the feature. */ 1131 if (!pDM_Odm->ExtPA) 1132 return; 1133} 1134 1135/* 3============================================================ */ 1136/* 3 RSSI Monitor */ 1137/* 3============================================================ */ 1138 1139void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) 1140{ 1141 if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) 1142 return; 1143 1144 /* */ 1145 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1146 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1147 /* HW dynamic mechanism. */ 1148 /* */ 1149 odm_RSSIMonitorCheckCE(pDM_Odm); 1150} /* odm_RSSIMonitorCheck */ 1151 1152static void FindMinimumRSSI(struct adapter *pAdapter) 1153{ 1154 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); 1155 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1156 struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; 1157 1158 /* 1 1.Determine the minimum RSSI */ 1159 if ((check_fwstate(pmlmepriv, _FW_LINKED) == false) && 1160 (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) 1161 pdmpriv->MinUndecoratedPWDBForDM = 0; 1162 if (check_fwstate(pmlmepriv, _FW_LINKED) == true) /* Default port */ 1163 pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; 1164 else /* associated entry pwdb */ 1165 pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; 1166} 1167 1168void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) 1169{ 1170 struct adapter *Adapter = pDM_Odm->Adapter; 1171 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1172 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1173 int i; 1174 int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; 1175 u8 sta_cnt = 0; 1176 u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */ 1177 struct sta_info *psta; 1178 u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1179 1180 if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) 1181 return; 1182 1183 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 1184 psta = pDM_Odm->pODM_StaInfo[i]; 1185 if (IS_STA_VALID(psta) && 1186 (psta->state & WIFI_ASOC_STATE) && 1187 memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) && 1188 memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) { 1189 if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) 1190 tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; 1191 1192 if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) 1193 tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; 1194 if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) 1195 PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); 1196 } 1197 } 1198 1199 for (i = 0; i < sta_cnt; i++) { 1200 if (PWDB_rssi[i] != (0)) { 1201 if (pHalData->fw_ractrl) { 1202 /* Report every sta's RSSI to FW */ 1203 } else { 1204 ODM_RA_SetRSSI_8188E( 1205 &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); 1206 } 1207 } 1208 } 1209 1210 if (tmpEntryMaxPWDB != 0) /* If associated entry is found */ 1211 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; 1212 else 1213 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; 1214 1215 if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */ 1216 pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; 1217 else 1218 pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; 1219 1220 FindMinimumRSSI(Adapter); 1221 ODM_CmnInfoUpdate(&pHalData->odmpriv , ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); 1222} 1223 1224/* 3============================================================ */ 1225/* 3 Tx Power Tracking */ 1226/* 3============================================================ */ 1227 1228void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm) 1229{ 1230 odm_TXPowerTrackingThermalMeterInit(pDM_Odm); 1231} 1232 1233void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) 1234{ 1235 pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; 1236 pDM_Odm->RFCalibrateInfo.TXPowercount = 0; 1237 pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; 1238 if (*(pDM_Odm->mp_mode) != 1) 1239 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; 1240 MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); 1241 1242 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; 1243} 1244 1245void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) 1246{ 1247 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1248 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1249 /* HW dynamic mechanism. */ 1250 odm_TXPowerTrackingCheckCE(pDM_Odm); 1251} 1252 1253void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) 1254{ 1255 struct adapter *Adapter = pDM_Odm->Adapter; 1256 1257 if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) 1258 return; 1259 1260 if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ 1261 PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); 1262 1263 pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; 1264 return; 1265 } else { 1266 odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); 1267 pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; 1268 } 1269} 1270 1271/* 3============================================================ */ 1272/* 3 SW Antenna Diversity */ 1273/* 3============================================================ */ 1274 1275void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) 1276{ 1277 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { 1278 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); 1279 return; 1280 } 1281 1282 ODM_AntennaDiversityInit_88E(pDM_Odm); 1283} 1284 1285void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) 1286{ 1287 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { 1288 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); 1289 return; 1290 } 1291 1292 ODM_AntennaDiversity_88E(pDM_Odm); 1293} 1294 1295/* EDCA Turbo */ 1296void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) 1297{ 1298 struct adapter *Adapter = pDM_Odm->Adapter; 1299 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; 1300 pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; 1301 Adapter->recvpriv.bIsAnyNonBEPkts = false; 1302 1303 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_VO_PARAM))); 1304 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_VI_PARAM))); 1305 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_BE_PARAM))); 1306 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", rtw_read32(Adapter, ODM_EDCA_BK_PARAM))); 1307} /* ODM_InitEdcaTurbo */ 1308 1309void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) 1310{ 1311 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1312 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1313 /* HW dynamic mechanism. */ 1314 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_EdcaTurboCheck========================>\n")); 1315 1316 if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) 1317 return; 1318 1319 odm_EdcaTurboCheckCE(pDM_Odm); 1320 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n")); 1321} /* odm_CheckEdcaTurbo */ 1322 1323void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) 1324{ 1325 struct adapter *Adapter = pDM_Odm->Adapter; 1326 u32 trafficIndex; 1327 u32 edca_param; 1328 u64 cur_tx_bytes = 0; 1329 u64 cur_rx_bytes = 0; 1330 u8 bbtchange = false; 1331 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1332 struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); 1333 struct recv_priv *precvpriv = &(Adapter->recvpriv); 1334 struct registry_priv *pregpriv = &Adapter->registrypriv; 1335 struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); 1336 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); 1337 1338 if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */ 1339 goto dm_CheckEdcaTurbo_EXIT; 1340 1341 if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX) 1342 goto dm_CheckEdcaTurbo_EXIT; 1343 1344 /* Check if the status needs to be changed. */ 1345 if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) { 1346 cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; 1347 cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; 1348 1349 /* traffic, TX or RX */ 1350 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) || 1351 (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) { 1352 if (cur_tx_bytes > (cur_rx_bytes << 2)) { 1353 /* Uplink TP is present. */ 1354 trafficIndex = UP_LINK; 1355 } else { 1356 /* Balance TP is present. */ 1357 trafficIndex = DOWN_LINK; 1358 } 1359 } else { 1360 if (cur_rx_bytes > (cur_tx_bytes << 2)) { 1361 /* Downlink TP is present. */ 1362 trafficIndex = DOWN_LINK; 1363 } else { 1364 /* Balance TP is present. */ 1365 trafficIndex = UP_LINK; 1366 } 1367 } 1368 1369 if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) { 1370 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) 1371 edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; 1372 else 1373 edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex]; 1374 1375 rtw_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); 1376 1377 pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; 1378 } 1379 1380 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true; 1381 } else { 1382 /* Turn Off EDCA turbo here. */ 1383 /* Restore original EDCA according to the declaration of AP. */ 1384 if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { 1385 rtw_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); 1386 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; 1387 } 1388 } 1389 1390dm_CheckEdcaTurbo_EXIT: 1391 /* Set variables for next time. */ 1392 precvpriv->bIsAnyNonBEPkts = false; 1393 pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; 1394 precvpriv->last_rx_bytes = precvpriv->rx_bytes; 1395} 1396