odm.c revision 83f53fceec88eeb25575350b589f6f911b389b49
1/****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 21/* include files */ 22 23#include "odm_precomp.h" 24 25static const u16 dB_Invert_Table[8][12] = { 26 {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, 27 {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, 28 {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, 29 {71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251}, 30 {282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000}, 31 {1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, 32 {4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849}, 33 {17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} 34}; 35 36/* avoid to warn in FreeBSD ==> To DO modify */ 37static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { 38 /* UL DL */ 39 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */ 40 {0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */ 41 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 2:unknown AP => realtek_92SE */ 42 {0x5ea32b, 0x5ea42b, 0x5e4322}, /* 3:broadcom AP */ 43 {0x5ea422, 0x00a44f, 0x00a44f}, /* 4:ralink AP */ 44 {0x5ea322, 0x00a630, 0x00a44f}, /* 5:atheros AP */ 45 {0x5e4322, 0x5e4322, 0x5e4322},/* 6:cisco AP */ 46 {0x5ea44f, 0x00a44f, 0x5ea42b}, /* 8:marvell AP */ 47 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 10:unknown AP=> 92U AP */ 48 {0x5ea42b, 0xa630, 0x5e431c}, /* 11:airgocap AP */ 49}; 50 51/* Global var */ 52u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { 53 0x7f8001fe, /* 0, +6.0dB */ 54 0x788001e2, /* 1, +5.5dB */ 55 0x71c001c7, /* 2, +5.0dB */ 56 0x6b8001ae, /* 3, +4.5dB */ 57 0x65400195, /* 4, +4.0dB */ 58 0x5fc0017f, /* 5, +3.5dB */ 59 0x5a400169, /* 6, +3.0dB */ 60 0x55400155, /* 7, +2.5dB */ 61 0x50800142, /* 8, +2.0dB */ 62 0x4c000130, /* 9, +1.5dB */ 63 0x47c0011f, /* 10, +1.0dB */ 64 0x43c0010f, /* 11, +0.5dB */ 65 0x40000100, /* 12, +0dB */ 66 0x3c8000f2, /* 13, -0.5dB */ 67 0x390000e4, /* 14, -1.0dB */ 68 0x35c000d7, /* 15, -1.5dB */ 69 0x32c000cb, /* 16, -2.0dB */ 70 0x300000c0, /* 17, -2.5dB */ 71 0x2d4000b5, /* 18, -3.0dB */ 72 0x2ac000ab, /* 19, -3.5dB */ 73 0x288000a2, /* 20, -4.0dB */ 74 0x26000098, /* 21, -4.5dB */ 75 0x24000090, /* 22, -5.0dB */ 76 0x22000088, /* 23, -5.5dB */ 77 0x20000080, /* 24, -6.0dB */ 78 0x1e400079, /* 25, -6.5dB */ 79 0x1c800072, /* 26, -7.0dB */ 80 0x1b00006c, /* 27. -7.5dB */ 81 0x19800066, /* 28, -8.0dB */ 82 0x18000060, /* 29, -8.5dB */ 83 0x16c0005b, /* 30, -9.0dB */ 84 0x15800056, /* 31, -9.5dB */ 85 0x14400051, /* 32, -10.0dB */ 86 0x1300004c, /* 33, -10.5dB */ 87 0x12000048, /* 34, -11.0dB */ 88 0x11000044, /* 35, -11.5dB */ 89 0x10000040, /* 36, -12.0dB */ 90 0x0f00003c,/* 37, -12.5dB */ 91 0x0e400039,/* 38, -13.0dB */ 92 0x0d800036,/* 39, -13.5dB */ 93 0x0cc00033,/* 40, -14.0dB */ 94 0x0c000030,/* 41, -14.5dB */ 95 0x0b40002d,/* 42, -15.0dB */ 96}; 97 98u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { 99 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ 100 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ 101 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ 102 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ 103 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ 104 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ 105 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ 106 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ 107 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ 108 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ 109 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ 110 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ 111 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */ 112 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ 113 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ 114 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ 115 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ 116 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ 117 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ 118 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ 119 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ 120 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ 121 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ 122 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ 123 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ 124 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ 125 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ 126 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ 127 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ 128 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ 129 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ 130 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ 131 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ 132}; 133 134u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { 135 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ 136 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ 137 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ 138 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ 139 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ 140 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ 141 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ 142 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ 143 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ 144 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ 145 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ 146 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ 147 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */ 148 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ 149 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ 150 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ 151 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ 152 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ 153 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ 154 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ 155 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ 156 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ 157 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ 158 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ 159 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ 160 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ 161 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ 162 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ 163 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ 164 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ 165 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ 166 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ 167 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ 168}; 169 170 171#define RxDefaultAnt1 0x65a9 172#define RxDefaultAnt2 0x569a 173 174/* 3 Export Interface */ 175 176/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */ 177void ODM_DMInit(struct odm_dm_struct *pDM_Odm) 178{ 179 /* 2012.05.03 Luke: For all IC series */ 180 odm_CommonInfoSelfInit(pDM_Odm); 181 odm_CmnInfoInit_Debug(pDM_Odm); 182 odm_DIGInit(pDM_Odm); 183 odm_RateAdaptiveMaskInit(pDM_Odm); 184 185 odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ 186 odm_DynamicTxPowerInit(pDM_Odm); 187 odm_TXPowerTrackingInit(pDM_Odm); 188 ODM_EdcaTurboInit(pDM_Odm); 189 ODM_RAInfo_Init_all(pDM_Odm); 190 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || 191 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || 192 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) 193 odm_InitHybridAntDiv(pDM_Odm); 194} 195 196/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ 197/* You can not add any dummy function here, be care, you can only use DM structure */ 198/* to perform any new ODM_DM. */ 199void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) 200{ 201 /* 2012.05.03 Luke: For all IC series */ 202 odm_CmnInfoHook_Debug(pDM_Odm); 203 odm_CmnInfoUpdate_Debug(pDM_Odm); 204 odm_CommonInfoSelfUpdate(pDM_Odm); 205 odm_FalseAlarmCounterStatistics(pDM_Odm); 206 odm_RSSIMonitorCheck(pDM_Odm); 207 208 /* Fix Leave LPS issue */ 209 odm_DIG(pDM_Odm); 210 odm_CCKPacketDetectionThresh(pDM_Odm); 211 212 if (*(pDM_Odm->pbPowerSaving)) 213 return; 214 215 odm_RefreshRateAdaptiveMask(pDM_Odm); 216 217 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || 218 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || 219 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) 220 odm_HwAntDiv(pDM_Odm); 221 222 ODM_TXPowerTrackingCheck(pDM_Odm); 223 odm_EdcaTurboCheck(pDM_Odm); 224} 225 226/* Init /.. Fixed HW value. Only init time. */ 227void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value) 228{ 229 /* This section is used for init value */ 230 switch (CmnInfo) { 231 /* Fixed ODM value. */ 232 case ODM_CMNINFO_ABILITY: 233 pDM_Odm->SupportAbility = (u32)Value; 234 break; 235 case ODM_CMNINFO_PLATFORM: 236 pDM_Odm->SupportPlatform = (u8)Value; 237 break; 238 case ODM_CMNINFO_INTERFACE: 239 pDM_Odm->SupportInterface = (u8)Value; 240 break; 241 case ODM_CMNINFO_MP_TEST_CHIP: 242 pDM_Odm->bIsMPChip = (u8)Value; 243 break; 244 case ODM_CMNINFO_IC_TYPE: 245 pDM_Odm->SupportICType = Value; 246 break; 247 case ODM_CMNINFO_CUT_VER: 248 pDM_Odm->CutVersion = (u8)Value; 249 break; 250 case ODM_CMNINFO_FAB_VER: 251 pDM_Odm->FabVersion = (u8)Value; 252 break; 253 case ODM_CMNINFO_RF_TYPE: 254 pDM_Odm->RFType = (u8)Value; 255 break; 256 case ODM_CMNINFO_RF_ANTENNA_TYPE: 257 pDM_Odm->AntDivType = (u8)Value; 258 break; 259 case ODM_CMNINFO_BOARD_TYPE: 260 pDM_Odm->BoardType = (u8)Value; 261 break; 262 case ODM_CMNINFO_EXT_LNA: 263 pDM_Odm->ExtLNA = (u8)Value; 264 break; 265 case ODM_CMNINFO_EXT_PA: 266 pDM_Odm->ExtPA = (u8)Value; 267 break; 268 case ODM_CMNINFO_EXT_TRSW: 269 pDM_Odm->ExtTRSW = (u8)Value; 270 break; 271 case ODM_CMNINFO_PATCH_ID: 272 pDM_Odm->PatchID = (u8)Value; 273 break; 274 case ODM_CMNINFO_BINHCT_TEST: 275 pDM_Odm->bInHctTest = (bool)Value; 276 break; 277 case ODM_CMNINFO_BWIFI_TEST: 278 pDM_Odm->bWIFITest = (bool)Value; 279 break; 280 case ODM_CMNINFO_SMART_CONCURRENT: 281 pDM_Odm->bDualMacSmartConcurrent = (bool)Value; 282 break; 283 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 284 default: 285 /* do nothing */ 286 break; 287 } 288 289 /* Tx power tracking BB swing table. */ 290 /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ 291 pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */ 292 pDM_Odm->BbSwingIdxOfdmCurrent = 12; 293 pDM_Odm->BbSwingFlagOfdm = false; 294} 295 296void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue) 297{ 298 /* */ 299 /* Hook call by reference pointer. */ 300 /* */ 301 switch (CmnInfo) { 302 /* Dynamic call by reference pointer. */ 303 case ODM_CMNINFO_MAC_PHY_MODE: 304 pDM_Odm->pMacPhyMode = (u8 *)pValue; 305 break; 306 case ODM_CMNINFO_TX_UNI: 307 pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue; 308 break; 309 case ODM_CMNINFO_RX_UNI: 310 pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue; 311 break; 312 case ODM_CMNINFO_WM_MODE: 313 pDM_Odm->pWirelessMode = (u8 *)pValue; 314 break; 315 case ODM_CMNINFO_BAND: 316 pDM_Odm->pBandType = (u8 *)pValue; 317 break; 318 case ODM_CMNINFO_SEC_CHNL_OFFSET: 319 pDM_Odm->pSecChOffset = (u8 *)pValue; 320 break; 321 case ODM_CMNINFO_SEC_MODE: 322 pDM_Odm->pSecurity = (u8 *)pValue; 323 break; 324 case ODM_CMNINFO_BW: 325 pDM_Odm->pBandWidth = (u8 *)pValue; 326 break; 327 case ODM_CMNINFO_CHNL: 328 pDM_Odm->pChannel = (u8 *)pValue; 329 break; 330 case ODM_CMNINFO_DMSP_GET_VALUE: 331 pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue; 332 break; 333 case ODM_CMNINFO_BUDDY_ADAPTOR: 334 pDM_Odm->pBuddyAdapter = (struct adapter **)pValue; 335 break; 336 case ODM_CMNINFO_DMSP_IS_MASTER: 337 pDM_Odm->pbMasterOfDMSP = (bool *)pValue; 338 break; 339 case ODM_CMNINFO_SCAN: 340 pDM_Odm->pbScanInProcess = (bool *)pValue; 341 break; 342 case ODM_CMNINFO_POWER_SAVING: 343 pDM_Odm->pbPowerSaving = (bool *)pValue; 344 break; 345 case ODM_CMNINFO_ONE_PATH_CCA: 346 pDM_Odm->pOnePathCCA = (u8 *)pValue; 347 break; 348 case ODM_CMNINFO_DRV_STOP: 349 pDM_Odm->pbDriverStopped = (bool *)pValue; 350 break; 351 case ODM_CMNINFO_PNP_IN: 352 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (bool *)pValue; 353 break; 354 case ODM_CMNINFO_INIT_ON: 355 pDM_Odm->pinit_adpt_in_progress = (bool *)pValue; 356 break; 357 case ODM_CMNINFO_ANT_TEST: 358 pDM_Odm->pAntennaTest = (u8 *)pValue; 359 break; 360 case ODM_CMNINFO_NET_CLOSED: 361 pDM_Odm->pbNet_closed = (bool *)pValue; 362 break; 363 case ODM_CMNINFO_MP_MODE: 364 pDM_Odm->mp_mode = (u8 *)pValue; 365 break; 366 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 367 default: 368 /* do nothing */ 369 break; 370 } 371} 372 373void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) 374{ 375 /* Hook call by reference pointer. */ 376 switch (CmnInfo) { 377 /* Dynamic call by reference pointer. */ 378 case ODM_CMNINFO_STA_STATUS: 379 pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue; 380 break; 381 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 382 default: 383 /* do nothing */ 384 break; 385 } 386} 387 388/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */ 389void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) 390{ 391 /* */ 392 /* This init variable may be changed in run time. */ 393 /* */ 394 switch (CmnInfo) { 395 case ODM_CMNINFO_ABILITY: 396 pDM_Odm->SupportAbility = (u32)Value; 397 break; 398 case ODM_CMNINFO_RF_TYPE: 399 pDM_Odm->RFType = (u8)Value; 400 break; 401 case ODM_CMNINFO_WIFI_DIRECT: 402 pDM_Odm->bWIFI_Direct = (bool)Value; 403 break; 404 case ODM_CMNINFO_WIFI_DISPLAY: 405 pDM_Odm->bWIFI_Display = (bool)Value; 406 break; 407 case ODM_CMNINFO_LINK: 408 pDM_Odm->bLinked = (bool)Value; 409 break; 410 case ODM_CMNINFO_RSSI_MIN: 411 pDM_Odm->RSSI_Min = (u8)Value; 412 break; 413 case ODM_CMNINFO_DBG_COMP: 414 pDM_Odm->DebugComponents = Value; 415 break; 416 case ODM_CMNINFO_DBG_LEVEL: 417 pDM_Odm->DebugLevel = (u32)Value; 418 break; 419 case ODM_CMNINFO_RA_THRESHOLD_HIGH: 420 pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value; 421 break; 422 case ODM_CMNINFO_RA_THRESHOLD_LOW: 423 pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value; 424 break; 425 } 426} 427 428void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) 429{ 430 struct adapter *adapter = pDM_Odm->Adapter; 431 432 pDM_Odm->bCckHighPower = (bool) PHY_QueryBBReg(adapter, 0x824, BIT9); 433 pDM_Odm->RFPathRxEnable = (u8) PHY_QueryBBReg(adapter, 0xc04, 0x0F); 434 435 ODM_InitDebugSetting(pDM_Odm); 436} 437 438void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) 439{ 440 u8 EntryCnt = 0; 441 u8 i; 442 struct sta_info *pEntry; 443 444 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { 445 if (*(pDM_Odm->pSecChOffset) == 1) 446 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; 447 else if (*(pDM_Odm->pSecChOffset) == 2) 448 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; 449 } else { 450 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); 451 } 452 453 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 454 pEntry = pDM_Odm->pODM_StaInfo[i]; 455 if (IS_STA_VALID(pEntry)) 456 EntryCnt++; 457 } 458 if (EntryCnt == 1) 459 pDM_Odm->bOneEntryOnly = true; 460 else 461 pDM_Odm->bOneEntryOnly = false; 462} 463 464void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm) 465{ 466 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n")); 467 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n", pDM_Odm->SupportPlatform)); 468 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n", pDM_Odm->SupportAbility)); 469 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n", pDM_Odm->SupportInterface)); 470 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n", pDM_Odm->SupportICType)); 471 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n", pDM_Odm->CutVersion)); 472 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n", pDM_Odm->FabVersion)); 473 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n", pDM_Odm->RFType)); 474 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n", pDM_Odm->BoardType)); 475 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n", pDM_Odm->ExtLNA)); 476 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n", pDM_Odm->ExtPA)); 477 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n", pDM_Odm->ExtTRSW)); 478 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n", pDM_Odm->PatchID)); 479 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n", pDM_Odm->bInHctTest)); 480 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n", pDM_Odm->bWIFITest)); 481 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n", pDM_Odm->bDualMacSmartConcurrent)); 482} 483 484void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm) 485{ 486 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n")); 487 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n", *(pDM_Odm->pNumTxBytesUnicast))); 488 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n", *(pDM_Odm->pNumRxBytesUnicast))); 489 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n", *(pDM_Odm->pWirelessMode))); 490 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n", *(pDM_Odm->pSecChOffset))); 491 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n", *(pDM_Odm->pSecurity))); 492 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n", *(pDM_Odm->pBandWidth))); 493 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n", *(pDM_Odm->pChannel))); 494 495 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess))); 496 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving))); 497} 498 499void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm) 500{ 501 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n")); 502 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n", pDM_Odm->bWIFI_Direct)); 503 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n", pDM_Odm->bWIFI_Display)); 504 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n", pDM_Odm->bLinked)); 505 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min)); 506} 507 508void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) 509{ 510 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 511 struct adapter *adapter = pDM_Odm->Adapter; 512 513 if (pDM_DigTable->CurIGValue != CurrentIGI) { 514 PHY_SetBBReg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI); 515 pDM_DigTable->CurIGValue = CurrentIGI; 516 } 517} 518 519void odm_DIGInit(struct odm_dm_struct *pDM_Odm) 520{ 521 struct adapter *adapter = pDM_Odm->Adapter; 522 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 523 524 pDM_DigTable->CurIGValue = (u8) PHY_QueryBBReg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N); 525 pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; 526 pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; 527 pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; 528 pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH; 529 if (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) { 530 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; 531 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; 532 } else { 533 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; 534 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; 535 } 536 pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; 537 pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; 538 pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; 539 pDM_DigTable->PreCCK_CCAThres = 0xFF; 540 pDM_DigTable->CurCCK_CCAThres = 0x83; 541 pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; 542 pDM_DigTable->LargeFAHit = 0; 543 pDM_DigTable->Recover_cnt = 0; 544 pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; 545 pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; 546 pDM_DigTable->bMediaConnect_0 = false; 547 pDM_DigTable->bMediaConnect_1 = false; 548 549 /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */ 550 pDM_Odm->bDMInitialGainEnable = true; 551} 552 553void odm_DIG(struct odm_dm_struct *pDM_Odm) 554{ 555 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 556 struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; 557 u8 DIG_Dynamic_MIN; 558 u8 DIG_MaxOfMin; 559 bool FirstConnect, FirstDisConnect; 560 u8 dm_dig_max, dm_dig_min; 561 u8 CurrentIGI = pDM_DigTable->CurIGValue; 562 563 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); 564 if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) { 565 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 566 ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); 567 return; 568 } 569 570 if (*(pDM_Odm->pbScanInProcess)) { 571 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n")); 572 return; 573 } 574 575 /* add by Neil Chen to avoid PSD is processing */ 576 if (pDM_Odm->bDMInitialGainEnable == false) { 577 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n")); 578 return; 579 } 580 581 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; 582 FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); 583 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); 584 585 /* 1 Boundary Decision */ 586 dm_dig_max = DM_DIG_MAX_NIC; 587 dm_dig_min = DM_DIG_MIN_NIC; 588 DIG_MaxOfMin = DM_DIG_MAX_AP; 589 590 if (pDM_Odm->bLinked) { 591 /* 2 Modify DIG upper bound */ 592 if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) 593 pDM_DigTable->rx_gain_range_max = dm_dig_max; 594 else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) 595 pDM_DigTable->rx_gain_range_max = dm_dig_min; 596 else 597 pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; 598 /* 2 Modify DIG lower bound */ 599 if (pDM_Odm->bOneEntryOnly) { 600 if (pDM_Odm->RSSI_Min < dm_dig_min) 601 DIG_Dynamic_MIN = dm_dig_min; 602 else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) 603 DIG_Dynamic_MIN = DIG_MaxOfMin; 604 else 605 DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; 606 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 607 ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n", 608 DIG_Dynamic_MIN)); 609 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 610 ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n", 611 pDM_Odm->RSSI_Min)); 612 } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { 613 /* 1 Lower Bound for 88E AntDiv */ 614 if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { 615 DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; 616 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 617 ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n", 618 pDM_DigTable->AntDiv_RSSI_max)); 619 } 620 } else { 621 DIG_Dynamic_MIN = dm_dig_min; 622 } 623 } else { 624 pDM_DigTable->rx_gain_range_max = dm_dig_max; 625 DIG_Dynamic_MIN = dm_dig_min; 626 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); 627 } 628 629 /* 1 Modify DIG lower bound, deal with abnormally large false alarm */ 630 if (pFalseAlmCnt->Cnt_all > 10000) { 631 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n")); 632 633 if (pDM_DigTable->LargeFAHit != 3) 634 pDM_DigTable->LargeFAHit++; 635 if (pDM_DigTable->ForbiddenIGI < CurrentIGI) { 636 pDM_DigTable->ForbiddenIGI = CurrentIGI; 637 pDM_DigTable->LargeFAHit = 1; 638 } 639 640 if (pDM_DigTable->LargeFAHit >= 3) { 641 if ((pDM_DigTable->ForbiddenIGI+1) > pDM_DigTable->rx_gain_range_max) 642 pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; 643 else 644 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); 645 pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */ 646 } 647 648 } else { 649 /* Recovery mechanism for IGI lower bound */ 650 if (pDM_DigTable->Recover_cnt != 0) { 651 pDM_DigTable->Recover_cnt--; 652 } else { 653 if (pDM_DigTable->LargeFAHit < 3) { 654 if ((pDM_DigTable->ForbiddenIGI-1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */ 655 pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 656 pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 657 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); 658 } else { 659 pDM_DigTable->ForbiddenIGI--; 660 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); 661 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); 662 } 663 } else { 664 pDM_DigTable->LargeFAHit = 0; 665 } 666 } 667 } 668 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 669 ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n", 670 pDM_DigTable->LargeFAHit)); 671 672 /* 1 Adjust initial gain by false alarm */ 673 if (pDM_Odm->bLinked) { 674 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); 675 if (FirstConnect) { 676 CurrentIGI = pDM_Odm->RSSI_Min; 677 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); 678 } else { 679 if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) 680 CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ 681 else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) 682 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ 683 else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) 684 CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ 685 } 686 } else { 687 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); 688 if (FirstDisConnect) { 689 CurrentIGI = pDM_DigTable->rx_gain_range_min; 690 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n")); 691 } else { 692 /* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */ 693 if (pFalseAlmCnt->Cnt_all > 10000) 694 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ 695 else if (pFalseAlmCnt->Cnt_all > 8000) 696 CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ 697 else if (pFalseAlmCnt->Cnt_all < 500) 698 CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ 699 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n")); 700 } 701 } 702 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); 703 /* 1 Check initial gain by upper/lower bound */ 704 if (CurrentIGI > pDM_DigTable->rx_gain_range_max) 705 CurrentIGI = pDM_DigTable->rx_gain_range_max; 706 if (CurrentIGI < pDM_DigTable->rx_gain_range_min) 707 CurrentIGI = pDM_DigTable->rx_gain_range_min; 708 709 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 710 ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", 711 pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); 712 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); 713 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); 714 715 /* 2 High power RSSI threshold */ 716 717 ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ 718 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; 719 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; 720} 721 722/* 3============================================================ */ 723/* 3 FASLE ALARM CHECK */ 724/* 3============================================================ */ 725 726void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) 727{ 728 struct adapter *adapter = pDM_Odm->Adapter; 729 u32 ret_value; 730 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); 731 732 if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) 733 return; 734 735 /* hold ofdm counter */ 736 PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */ 737 PHY_SetBBReg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */ 738 739 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); 740 FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); 741 FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); 742 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); 743 FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); 744 FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); 745 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); 746 FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); 747 FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); 748 ret_value = PHY_QueryBBReg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); 749 FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); 750 751 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + 752 FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + 753 FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; 754 755 ret_value = PHY_QueryBBReg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord); 756 FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); 757 FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); 758 759 /* hold cck counter */ 760 PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1); 761 PHY_SetBBReg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); 762 763 ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); 764 FalseAlmCnt->Cnt_Cck_fail = ret_value; 765 ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); 766 FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8; 767 768 ret_value = PHY_QueryBBReg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); 769 FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); 770 771 FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + 772 FalseAlmCnt->Cnt_SB_Search_fail + 773 FalseAlmCnt->Cnt_Parity_Fail + 774 FalseAlmCnt->Cnt_Rate_Illegal + 775 FalseAlmCnt->Cnt_Crc8_fail + 776 FalseAlmCnt->Cnt_Mcs_fail + 777 FalseAlmCnt->Cnt_Cck_fail); 778 779 FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; 780 781 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); 782 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 783 ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", 784 FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); 785 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 786 ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", 787 FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); 788 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 789 ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", 790 FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); 791 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); 792 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); 793 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); 794} 795 796/* 3============================================================ */ 797/* 3 CCK Packet Detect Threshold */ 798/* 3============================================================ */ 799 800void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) 801{ 802 u8 CurCCK_CCAThres; 803 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); 804 805 if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) 806 return; 807 if (pDM_Odm->ExtLNA) 808 return; 809 if (pDM_Odm->bLinked) { 810 if (pDM_Odm->RSSI_Min > 25) { 811 CurCCK_CCAThres = 0xcd; 812 } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) { 813 CurCCK_CCAThres = 0x83; 814 } else { 815 if (FalseAlmCnt->Cnt_Cck_fail > 1000) 816 CurCCK_CCAThres = 0x83; 817 else 818 CurCCK_CCAThres = 0x40; 819 } 820 } else { 821 if (FalseAlmCnt->Cnt_Cck_fail > 1000) 822 CurCCK_CCAThres = 0x83; 823 else 824 CurCCK_CCAThres = 0x40; 825 } 826 ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); 827} 828 829void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) 830{ 831 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 832 struct adapter *adapt = pDM_Odm->Adapter; 833 834 if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ 835 usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres); 836 pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; 837 pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; 838} 839 840void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) 841{ 842 struct adapter *adapter = pDM_Odm->Adapter; 843 struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; 844 u8 Rssi_Up_bound = 30; 845 u8 Rssi_Low_bound = 25; 846 847 if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ 848 Rssi_Up_bound = 50; 849 Rssi_Low_bound = 45; 850 } 851 if (pDM_PSTable->initialize == 0) { 852 pDM_PSTable->Reg874 = (PHY_QueryBBReg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14; 853 pDM_PSTable->RegC70 = (PHY_QueryBBReg(adapter, 0xc70, bMaskDWord)&BIT3)>>3; 854 pDM_PSTable->Reg85C = (PHY_QueryBBReg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24; 855 pDM_PSTable->RegA74 = (PHY_QueryBBReg(adapter, 0xa74, bMaskDWord)&0xF000)>>12; 856 pDM_PSTable->initialize = 1; 857 } 858 859 if (!bForceInNormal) { 860 if (pDM_Odm->RSSI_Min != 0xFF) { 861 if (pDM_PSTable->PreRFState == RF_Normal) { 862 if (pDM_Odm->RSSI_Min >= Rssi_Up_bound) 863 pDM_PSTable->CurRFState = RF_Save; 864 else 865 pDM_PSTable->CurRFState = RF_Normal; 866 } else { 867 if (pDM_Odm->RSSI_Min <= Rssi_Low_bound) 868 pDM_PSTable->CurRFState = RF_Normal; 869 else 870 pDM_PSTable->CurRFState = RF_Save; 871 } 872 } else { 873 pDM_PSTable->CurRFState = RF_MAX; 874 } 875 } else { 876 pDM_PSTable->CurRFState = RF_Normal; 877 } 878 879 if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { 880 if (pDM_PSTable->CurRFState == RF_Save) { 881 PHY_SetBBReg(adapter, 0x874 , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ 882 PHY_SetBBReg(adapter, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ 883 PHY_SetBBReg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ 884 PHY_SetBBReg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ 885 PHY_SetBBReg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ 886 PHY_SetBBReg(adapter, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */ 887 PHY_SetBBReg(adapter, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */ 888 } else { 889 PHY_SetBBReg(adapter, 0x874 , 0x1CC000, pDM_PSTable->Reg874); 890 PHY_SetBBReg(adapter, 0xc70, BIT3, pDM_PSTable->RegC70); 891 PHY_SetBBReg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); 892 PHY_SetBBReg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74); 893 PHY_SetBBReg(adapter, 0x818, BIT28, 0x0); 894 } 895 pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; 896 } 897} 898 899/* 3============================================================ */ 900/* 3 RATR MASK */ 901/* 3============================================================ */ 902/* 3============================================================ */ 903/* 3 Rate Adaptive */ 904/* 3============================================================ */ 905 906void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) 907{ 908 struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; 909 910 pOdmRA->Type = DM_Type_ByDriver; 911 if (pOdmRA->Type == DM_Type_ByDriver) 912 pDM_Odm->bUseRAMask = true; 913 else 914 pDM_Odm->bUseRAMask = false; 915 916 pOdmRA->RATRState = DM_RATR_STA_INIT; 917 pOdmRA->HighRSSIThresh = 50; 918 pOdmRA->LowRSSIThresh = 20; 919} 920 921u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) 922{ 923 struct sta_info *pEntry; 924 u32 rate_bitmap = 0x0fffffff; 925 u8 WirelessMode; 926 927 pEntry = pDM_Odm->pODM_StaInfo[macid]; 928 if (!IS_STA_VALID(pEntry)) 929 return ra_mask; 930 931 WirelessMode = pEntry->wireless_mode; 932 933 switch (WirelessMode) { 934 case ODM_WM_B: 935 if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */ 936 rate_bitmap = 0x0000000d; 937 else 938 rate_bitmap = 0x0000000f; 939 break; 940 case (ODM_WM_A|ODM_WM_G): 941 if (rssi_level == DM_RATR_STA_HIGH) 942 rate_bitmap = 0x00000f00; 943 else 944 rate_bitmap = 0x00000ff0; 945 break; 946 case (ODM_WM_B|ODM_WM_G): 947 if (rssi_level == DM_RATR_STA_HIGH) 948 rate_bitmap = 0x00000f00; 949 else if (rssi_level == DM_RATR_STA_MIDDLE) 950 rate_bitmap = 0x00000ff0; 951 else 952 rate_bitmap = 0x00000ff5; 953 break; 954 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): 955 case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G): 956 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { 957 if (rssi_level == DM_RATR_STA_HIGH) { 958 rate_bitmap = 0x000f0000; 959 } else if (rssi_level == DM_RATR_STA_MIDDLE) { 960 rate_bitmap = 0x000ff000; 961 } else { 962 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) 963 rate_bitmap = 0x000ff015; 964 else 965 rate_bitmap = 0x000ff005; 966 } 967 } else { 968 if (rssi_level == DM_RATR_STA_HIGH) { 969 rate_bitmap = 0x0f8f0000; 970 } else if (rssi_level == DM_RATR_STA_MIDDLE) { 971 rate_bitmap = 0x0f8ff000; 972 } else { 973 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) 974 rate_bitmap = 0x0f8ff015; 975 else 976 rate_bitmap = 0x0f8ff005; 977 } 978 } 979 break; 980 default: 981 /* case WIRELESS_11_24N: */ 982 /* case WIRELESS_11_5N: */ 983 if (pDM_Odm->RFType == RF_1T2R) 984 rate_bitmap = 0x000fffff; 985 else 986 rate_bitmap = 0x0fffffff; 987 break; 988 } 989 990 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, 991 (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", 992 rssi_level, WirelessMode, rate_bitmap)); 993 994 return rate_bitmap; 995} 996 997/*----------------------------------------------------------------------------- 998 * Function: odm_RefreshRateAdaptiveMask() 999 * 1000 * Overview: Update rate table mask according to rssi 1001 * 1002 * Input: NONE 1003 * 1004 * Output: NONE 1005 * 1006 * Return: NONE 1007 * 1008 * Revised History: 1009 * When Who Remark 1010 * 05/27/2009 hpfan Create Version 0. 1011 * 1012 *---------------------------------------------------------------------------*/ 1013void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) 1014{ 1015 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) 1016 return; 1017 /* */ 1018 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1019 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1020 /* HW dynamic mechanism. */ 1021 /* */ 1022 odm_RefreshRateAdaptiveMaskCE(pDM_Odm); 1023} 1024 1025void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) 1026{ 1027 u8 i; 1028 struct adapter *pAdapter = pDM_Odm->Adapter; 1029 1030 if (pAdapter->bDriverStopped) { 1031 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); 1032 return; 1033 } 1034 1035 if (!pDM_Odm->bUseRAMask) { 1036 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); 1037 return; 1038 } 1039 1040 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 1041 struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; 1042 if (IS_STA_VALID(pstat)) { 1043 if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false , &pstat->rssi_level)) { 1044 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, 1045 ("RSSI:%d, RSSI_LEVEL:%d\n", 1046 pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); 1047 rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level); 1048 } 1049 } 1050 } 1051} 1052 1053/* Return Value: bool */ 1054/* - true: RATRState is changed. */ 1055bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) 1056{ 1057 struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; 1058 const u8 GoUpGap = 5; 1059 u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; 1060 u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; 1061 u8 RATRState; 1062 1063 /* Threshold Adjustment: */ 1064 /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ 1065 /* Here GoUpGap is added to solve the boundary's level alternation issue. */ 1066 switch (*pRATRState) { 1067 case DM_RATR_STA_INIT: 1068 case DM_RATR_STA_HIGH: 1069 break; 1070 case DM_RATR_STA_MIDDLE: 1071 HighRSSIThreshForRA += GoUpGap; 1072 break; 1073 case DM_RATR_STA_LOW: 1074 HighRSSIThreshForRA += GoUpGap; 1075 LowRSSIThreshForRA += GoUpGap; 1076 break; 1077 default: 1078 ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState)); 1079 break; 1080 } 1081 1082 /* Decide RATRState by RSSI. */ 1083 if (RSSI > HighRSSIThreshForRA) 1084 RATRState = DM_RATR_STA_HIGH; 1085 else if (RSSI > LowRSSIThreshForRA) 1086 RATRState = DM_RATR_STA_MIDDLE; 1087 else 1088 RATRState = DM_RATR_STA_LOW; 1089 1090 if (*pRATRState != RATRState || bForceUpdate) { 1091 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState)); 1092 *pRATRState = RATRState; 1093 return true; 1094 } 1095 return false; 1096} 1097 1098/* 3============================================================ */ 1099/* 3 Dynamic Tx Power */ 1100/* 3============================================================ */ 1101 1102void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm) 1103{ 1104 struct adapter *Adapter = pDM_Odm->Adapter; 1105 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1106 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1107 pdmpriv->bDynamicTxPowerEnable = false; 1108 pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; 1109 pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; 1110} 1111 1112/* 3============================================================ */ 1113/* 3 RSSI Monitor */ 1114/* 3============================================================ */ 1115 1116void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) 1117{ 1118 if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) 1119 return; 1120 1121 /* */ 1122 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1123 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1124 /* HW dynamic mechanism. */ 1125 /* */ 1126 odm_RSSIMonitorCheckCE(pDM_Odm); 1127} /* odm_RSSIMonitorCheck */ 1128 1129static void FindMinimumRSSI(struct adapter *pAdapter) 1130{ 1131 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); 1132 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1133 struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; 1134 1135 /* 1 1.Determine the minimum RSSI */ 1136 if ((check_fwstate(pmlmepriv, _FW_LINKED) == false) && 1137 (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) 1138 pdmpriv->MinUndecoratedPWDBForDM = 0; 1139 if (check_fwstate(pmlmepriv, _FW_LINKED) == true) /* Default port */ 1140 pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; 1141 else /* associated entry pwdb */ 1142 pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; 1143} 1144 1145void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) 1146{ 1147 struct adapter *Adapter = pDM_Odm->Adapter; 1148 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1149 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1150 int i; 1151 int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; 1152 u8 sta_cnt = 0; 1153 u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */ 1154 struct sta_info *psta; 1155 u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1156 1157 if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) 1158 return; 1159 1160 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 1161 psta = pDM_Odm->pODM_StaInfo[i]; 1162 if (IS_STA_VALID(psta) && 1163 (psta->state & WIFI_ASOC_STATE) && 1164 memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) && 1165 memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) { 1166 if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) 1167 tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; 1168 1169 if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) 1170 tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; 1171 if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) 1172 PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); 1173 } 1174 } 1175 1176 for (i = 0; i < sta_cnt; i++) { 1177 if (PWDB_rssi[i] != (0)) { 1178 if (pHalData->fw_ractrl) { 1179 /* Report every sta's RSSI to FW */ 1180 } else { 1181 ODM_RA_SetRSSI_8188E( 1182 &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); 1183 } 1184 } 1185 } 1186 1187 if (tmpEntryMaxPWDB != 0) /* If associated entry is found */ 1188 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; 1189 else 1190 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; 1191 1192 if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */ 1193 pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; 1194 else 1195 pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; 1196 1197 FindMinimumRSSI(Adapter); 1198 ODM_CmnInfoUpdate(&pHalData->odmpriv , ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); 1199} 1200 1201/* 3============================================================ */ 1202/* 3 Tx Power Tracking */ 1203/* 3============================================================ */ 1204 1205void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm) 1206{ 1207 odm_TXPowerTrackingThermalMeterInit(pDM_Odm); 1208} 1209 1210void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) 1211{ 1212 pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; 1213 pDM_Odm->RFCalibrateInfo.TXPowercount = 0; 1214 pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; 1215 if (*(pDM_Odm->mp_mode) != 1) 1216 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; 1217 MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); 1218 1219 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; 1220} 1221 1222void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) 1223{ 1224 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1225 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1226 /* HW dynamic mechanism. */ 1227 odm_TXPowerTrackingCheckCE(pDM_Odm); 1228} 1229 1230void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) 1231{ 1232 struct adapter *Adapter = pDM_Odm->Adapter; 1233 1234 if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) 1235 return; 1236 1237 if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ 1238 PHY_SetRFReg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); 1239 1240 pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; 1241 return; 1242 } else { 1243 odm_TXPowerTrackingCallback_ThermalMeter_8188E(Adapter); 1244 pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; 1245 } 1246} 1247 1248/* 3============================================================ */ 1249/* 3 SW Antenna Diversity */ 1250/* 3============================================================ */ 1251 1252void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) 1253{ 1254 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { 1255 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); 1256 return; 1257 } 1258 1259 ODM_AntennaDiversityInit_88E(pDM_Odm); 1260} 1261 1262void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) 1263{ 1264 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { 1265 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); 1266 return; 1267 } 1268 1269 ODM_AntennaDiversity_88E(pDM_Odm); 1270} 1271 1272/* EDCA Turbo */ 1273void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) 1274{ 1275 struct adapter *Adapter = pDM_Odm->Adapter; 1276 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; 1277 pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; 1278 Adapter->recvpriv.bIsAnyNonBEPkts = false; 1279 1280 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM))); 1281 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM))); 1282 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM))); 1283 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM))); 1284} /* ODM_InitEdcaTurbo */ 1285 1286void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) 1287{ 1288 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1289 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1290 /* HW dynamic mechanism. */ 1291 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_EdcaTurboCheck========================>\n")); 1292 1293 if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) 1294 return; 1295 1296 odm_EdcaTurboCheckCE(pDM_Odm); 1297 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n")); 1298} /* odm_CheckEdcaTurbo */ 1299 1300void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) 1301{ 1302 struct adapter *Adapter = pDM_Odm->Adapter; 1303 u32 trafficIndex; 1304 u32 edca_param; 1305 u64 cur_tx_bytes = 0; 1306 u64 cur_rx_bytes = 0; 1307 u8 bbtchange = false; 1308 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1309 struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); 1310 struct recv_priv *precvpriv = &(Adapter->recvpriv); 1311 struct registry_priv *pregpriv = &Adapter->registrypriv; 1312 struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); 1313 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); 1314 1315 if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */ 1316 goto dm_CheckEdcaTurbo_EXIT; 1317 1318 if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX) 1319 goto dm_CheckEdcaTurbo_EXIT; 1320 1321 /* Check if the status needs to be changed. */ 1322 if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) { 1323 cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; 1324 cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; 1325 1326 /* traffic, TX or RX */ 1327 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) || 1328 (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) { 1329 if (cur_tx_bytes > (cur_rx_bytes << 2)) { 1330 /* Uplink TP is present. */ 1331 trafficIndex = UP_LINK; 1332 } else { 1333 /* Balance TP is present. */ 1334 trafficIndex = DOWN_LINK; 1335 } 1336 } else { 1337 if (cur_rx_bytes > (cur_tx_bytes << 2)) { 1338 /* Downlink TP is present. */ 1339 trafficIndex = DOWN_LINK; 1340 } else { 1341 /* Balance TP is present. */ 1342 trafficIndex = UP_LINK; 1343 } 1344 } 1345 1346 if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) { 1347 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) 1348 edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; 1349 else 1350 edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex]; 1351 1352 usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); 1353 1354 pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; 1355 } 1356 1357 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true; 1358 } else { 1359 /* Turn Off EDCA turbo here. */ 1360 /* Restore original EDCA according to the declaration of AP. */ 1361 if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { 1362 usb_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); 1363 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; 1364 } 1365 } 1366 1367dm_CheckEdcaTurbo_EXIT: 1368 /* Set variables for next time. */ 1369 precvpriv->bIsAnyNonBEPkts = false; 1370 pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; 1371 precvpriv->last_rx_bytes = precvpriv->rx_bytes; 1372} 1373