odm.c revision db0ccdacd086343ee3672fa8abd659a5d8b18929
1/****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 21/* include files */ 22 23#include "odm_precomp.h" 24#include "phy.h" 25 26u32 GlobalDebugLevel; 27static const u16 dB_Invert_Table[8][12] = { 28 {1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4}, 29 {4, 5, 6, 6, 7, 8, 9, 10, 11, 13, 14, 16}, 30 {18, 20, 22, 25, 28, 32, 35, 40, 45, 50, 56, 63}, 31 {71, 79, 89, 100, 112, 126, 141, 158, 178, 200, 224, 251}, 32 {282, 316, 355, 398, 447, 501, 562, 631, 708, 794, 891, 1000}, 33 {1122, 1259, 1413, 1585, 1778, 1995, 2239, 2512, 2818, 3162, 3548, 3981}, 34 {4467, 5012, 5623, 6310, 7079, 7943, 8913, 10000, 11220, 12589, 14125, 15849}, 35 {17783, 19953, 22387, 25119, 28184, 31623, 35481, 39811, 44668, 50119, 56234, 65535} 36}; 37 38/* avoid to warn in FreeBSD ==> To DO modify */ 39static u32 EDCAParam[HT_IOT_PEER_MAX][3] = { 40 /* UL DL */ 41 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 0:unknown AP */ 42 {0xa44f, 0x5ea44f, 0x5e431c}, /* 1:realtek AP */ 43 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 2:unknown AP => realtek_92SE */ 44 {0x5ea32b, 0x5ea42b, 0x5e4322}, /* 3:broadcom AP */ 45 {0x5ea422, 0x00a44f, 0x00a44f}, /* 4:ralink AP */ 46 {0x5ea322, 0x00a630, 0x00a44f}, /* 5:atheros AP */ 47 {0x5e4322, 0x5e4322, 0x5e4322},/* 6:cisco AP */ 48 {0x5ea44f, 0x00a44f, 0x5ea42b}, /* 8:marvell AP */ 49 {0x5ea42b, 0x5ea42b, 0x5ea42b}, /* 10:unknown AP=> 92U AP */ 50 {0x5ea42b, 0xa630, 0x5e431c}, /* 11:airgocap AP */ 51}; 52 53/* Global var */ 54u32 OFDMSwingTable[OFDM_TABLE_SIZE_92D] = { 55 0x7f8001fe, /* 0, +6.0dB */ 56 0x788001e2, /* 1, +5.5dB */ 57 0x71c001c7, /* 2, +5.0dB */ 58 0x6b8001ae, /* 3, +4.5dB */ 59 0x65400195, /* 4, +4.0dB */ 60 0x5fc0017f, /* 5, +3.5dB */ 61 0x5a400169, /* 6, +3.0dB */ 62 0x55400155, /* 7, +2.5dB */ 63 0x50800142, /* 8, +2.0dB */ 64 0x4c000130, /* 9, +1.5dB */ 65 0x47c0011f, /* 10, +1.0dB */ 66 0x43c0010f, /* 11, +0.5dB */ 67 0x40000100, /* 12, +0dB */ 68 0x3c8000f2, /* 13, -0.5dB */ 69 0x390000e4, /* 14, -1.0dB */ 70 0x35c000d7, /* 15, -1.5dB */ 71 0x32c000cb, /* 16, -2.0dB */ 72 0x300000c0, /* 17, -2.5dB */ 73 0x2d4000b5, /* 18, -3.0dB */ 74 0x2ac000ab, /* 19, -3.5dB */ 75 0x288000a2, /* 20, -4.0dB */ 76 0x26000098, /* 21, -4.5dB */ 77 0x24000090, /* 22, -5.0dB */ 78 0x22000088, /* 23, -5.5dB */ 79 0x20000080, /* 24, -6.0dB */ 80 0x1e400079, /* 25, -6.5dB */ 81 0x1c800072, /* 26, -7.0dB */ 82 0x1b00006c, /* 27. -7.5dB */ 83 0x19800066, /* 28, -8.0dB */ 84 0x18000060, /* 29, -8.5dB */ 85 0x16c0005b, /* 30, -9.0dB */ 86 0x15800056, /* 31, -9.5dB */ 87 0x14400051, /* 32, -10.0dB */ 88 0x1300004c, /* 33, -10.5dB */ 89 0x12000048, /* 34, -11.0dB */ 90 0x11000044, /* 35, -11.5dB */ 91 0x10000040, /* 36, -12.0dB */ 92 0x0f00003c,/* 37, -12.5dB */ 93 0x0e400039,/* 38, -13.0dB */ 94 0x0d800036,/* 39, -13.5dB */ 95 0x0cc00033,/* 40, -14.0dB */ 96 0x0c000030,/* 41, -14.5dB */ 97 0x0b40002d,/* 42, -15.0dB */ 98}; 99 100u8 CCKSwingTable_Ch1_Ch13[CCK_TABLE_SIZE][8] = { 101 {0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04}, /* 0, +0dB */ 102 {0x33, 0x32, 0x2b, 0x23, 0x1a, 0x11, 0x08, 0x04}, /* 1, -0.5dB */ 103 {0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03}, /* 2, -1.0dB */ 104 {0x2d, 0x2d, 0x27, 0x1f, 0x18, 0x0f, 0x08, 0x03}, /* 3, -1.5dB */ 105 {0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03}, /* 4, -2.0dB */ 106 {0x28, 0x28, 0x22, 0x1c, 0x15, 0x0d, 0x07, 0x03}, /* 5, -2.5dB */ 107 {0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03}, /* 6, -3.0dB */ 108 {0x24, 0x23, 0x1f, 0x19, 0x13, 0x0c, 0x06, 0x03}, /* 7, -3.5dB */ 109 {0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02}, /* 8, -4.0dB */ 110 {0x20, 0x20, 0x1b, 0x16, 0x11, 0x08, 0x05, 0x02}, /* 9, -4.5dB */ 111 {0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02}, /* 10, -5.0dB */ 112 {0x1d, 0x1c, 0x18, 0x14, 0x0f, 0x0a, 0x05, 0x02}, /* 11, -5.5dB */ 113 {0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02}, /* 12, -6.0dB */ 114 {0x1a, 0x19, 0x16, 0x12, 0x0d, 0x09, 0x04, 0x02}, /* 13, -6.5dB */ 115 {0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02}, /* 14, -7.0dB */ 116 {0x17, 0x16, 0x13, 0x10, 0x0c, 0x08, 0x04, 0x02}, /* 15, -7.5dB */ 117 {0x16, 0x15, 0x12, 0x0f, 0x0b, 0x07, 0x04, 0x01}, /* 16, -8.0dB */ 118 {0x14, 0x14, 0x11, 0x0e, 0x0b, 0x07, 0x03, 0x02}, /* 17, -8.5dB */ 119 {0x13, 0x13, 0x10, 0x0d, 0x0a, 0x06, 0x03, 0x01}, /* 18, -9.0dB */ 120 {0x12, 0x12, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 19, -9.5dB */ 121 {0x11, 0x11, 0x0f, 0x0c, 0x09, 0x06, 0x03, 0x01}, /* 20, -10.0dB */ 122 {0x10, 0x10, 0x0e, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 21, -10.5dB */ 123 {0x0f, 0x0f, 0x0d, 0x0b, 0x08, 0x05, 0x03, 0x01}, /* 22, -11.0dB */ 124 {0x0e, 0x0e, 0x0c, 0x0a, 0x08, 0x05, 0x02, 0x01}, /* 23, -11.5dB */ 125 {0x0d, 0x0d, 0x0c, 0x0a, 0x07, 0x05, 0x02, 0x01}, /* 24, -12.0dB */ 126 {0x0d, 0x0c, 0x0b, 0x09, 0x07, 0x04, 0x02, 0x01}, /* 25, -12.5dB */ 127 {0x0c, 0x0c, 0x0a, 0x09, 0x06, 0x04, 0x02, 0x01}, /* 26, -13.0dB */ 128 {0x0b, 0x0b, 0x0a, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 27, -13.5dB */ 129 {0x0b, 0x0a, 0x09, 0x08, 0x06, 0x04, 0x02, 0x01}, /* 28, -14.0dB */ 130 {0x0a, 0x0a, 0x09, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 29, -14.5dB */ 131 {0x0a, 0x09, 0x08, 0x07, 0x05, 0x03, 0x02, 0x01}, /* 30, -15.0dB */ 132 {0x09, 0x09, 0x08, 0x06, 0x05, 0x03, 0x01, 0x01}, /* 31, -15.5dB */ 133 {0x09, 0x08, 0x07, 0x06, 0x04, 0x03, 0x01, 0x01} /* 32, -16.0dB */ 134}; 135 136u8 CCKSwingTable_Ch14[CCK_TABLE_SIZE][8] = { 137 {0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00}, /* 0, +0dB */ 138 {0x33, 0x32, 0x2b, 0x19, 0x00, 0x00, 0x00, 0x00}, /* 1, -0.5dB */ 139 {0x30, 0x2f, 0x29, 0x18, 0x00, 0x00, 0x00, 0x00}, /* 2, -1.0dB */ 140 {0x2d, 0x2d, 0x17, 0x17, 0x00, 0x00, 0x00, 0x00}, /* 3, -1.5dB */ 141 {0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00}, /* 4, -2.0dB */ 142 {0x28, 0x28, 0x24, 0x14, 0x00, 0x00, 0x00, 0x00}, /* 5, -2.5dB */ 143 {0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00}, /* 6, -3.0dB */ 144 {0x24, 0x23, 0x1f, 0x12, 0x00, 0x00, 0x00, 0x00}, /* 7, -3.5dB */ 145 {0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00}, /* 8, -4.0dB */ 146 {0x20, 0x20, 0x1b, 0x10, 0x00, 0x00, 0x00, 0x00}, /* 9, -4.5dB */ 147 {0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00}, /* 10, -5.0dB */ 148 {0x1d, 0x1c, 0x18, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 11, -5.5dB */ 149 {0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00}, /* 12, -6.0dB */ 150 {0x1a, 0x19, 0x16, 0x0d, 0x00, 0x00, 0x00, 0x00}, /* 13, -6.5dB */ 151 {0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00}, /* 14, -7.0dB */ 152 {0x17, 0x16, 0x13, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 15, -7.5dB */ 153 {0x16, 0x15, 0x12, 0x0b, 0x00, 0x00, 0x00, 0x00}, /* 16, -8.0dB */ 154 {0x14, 0x14, 0x11, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 17, -8.5dB */ 155 {0x13, 0x13, 0x10, 0x0a, 0x00, 0x00, 0x00, 0x00}, /* 18, -9.0dB */ 156 {0x12, 0x12, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 19, -9.5dB */ 157 {0x11, 0x11, 0x0f, 0x09, 0x00, 0x00, 0x00, 0x00}, /* 20, -10.0dB */ 158 {0x10, 0x10, 0x0e, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 21, -10.5dB */ 159 {0x0f, 0x0f, 0x0d, 0x08, 0x00, 0x00, 0x00, 0x00}, /* 22, -11.0dB */ 160 {0x0e, 0x0e, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 23, -11.5dB */ 161 {0x0d, 0x0d, 0x0c, 0x07, 0x00, 0x00, 0x00, 0x00}, /* 24, -12.0dB */ 162 {0x0d, 0x0c, 0x0b, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 25, -12.5dB */ 163 {0x0c, 0x0c, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 26, -13.0dB */ 164 {0x0b, 0x0b, 0x0a, 0x06, 0x00, 0x00, 0x00, 0x00}, /* 27, -13.5dB */ 165 {0x0b, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 28, -14.0dB */ 166 {0x0a, 0x0a, 0x09, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 29, -14.5dB */ 167 {0x0a, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 30, -15.0dB */ 168 {0x09, 0x09, 0x08, 0x05, 0x00, 0x00, 0x00, 0x00}, /* 31, -15.5dB */ 169 {0x09, 0x08, 0x07, 0x04, 0x00, 0x00, 0x00, 0x00} /* 32, -16.0dB */ 170}; 171 172 173#define RxDefaultAnt1 0x65a9 174#define RxDefaultAnt2 0x569a 175 176void ODM_InitDebugSetting(struct odm_dm_struct *pDM_Odm) 177{ 178 pDM_Odm->DebugLevel = ODM_DBG_TRACE; 179 180 pDM_Odm->DebugComponents = 0; 181} 182 183/* 3 Export Interface */ 184 185/* 2011/09/21 MH Add to describe different team necessary resource allocate?? */ 186void ODM_DMInit(struct odm_dm_struct *pDM_Odm) 187{ 188 /* 2012.05.03 Luke: For all IC series */ 189 odm_CommonInfoSelfInit(pDM_Odm); 190 odm_CmnInfoInit_Debug(pDM_Odm); 191 odm_DIGInit(pDM_Odm); 192 odm_RateAdaptiveMaskInit(pDM_Odm); 193 194 odm_PrimaryCCA_Init(pDM_Odm); /* Gary */ 195 odm_DynamicTxPowerInit(pDM_Odm); 196 odm_TXPowerTrackingInit(pDM_Odm); 197 ODM_EdcaTurboInit(pDM_Odm); 198 ODM_RAInfo_Init_all(pDM_Odm); 199 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || 200 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || 201 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) 202 odm_InitHybridAntDiv(pDM_Odm); 203} 204 205/* 2011/09/20 MH This is the entry pointer for all team to execute HW out source DM. */ 206/* You can not add any dummy function here, be care, you can only use DM structure */ 207/* to perform any new ODM_DM. */ 208void ODM_DMWatchdog(struct odm_dm_struct *pDM_Odm) 209{ 210 /* 2012.05.03 Luke: For all IC series */ 211 odm_CmnInfoHook_Debug(pDM_Odm); 212 odm_CmnInfoUpdate_Debug(pDM_Odm); 213 odm_CommonInfoSelfUpdate(pDM_Odm); 214 odm_FalseAlarmCounterStatistics(pDM_Odm); 215 odm_RSSIMonitorCheck(pDM_Odm); 216 217 /* Fix Leave LPS issue */ 218 odm_DIG(pDM_Odm); 219 odm_CCKPacketDetectionThresh(pDM_Odm); 220 221 if (*(pDM_Odm->pbPowerSaving)) 222 return; 223 224 odm_RefreshRateAdaptiveMask(pDM_Odm); 225 226 if ((pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) || 227 (pDM_Odm->AntDivType == CGCS_RX_HW_ANTDIV) || 228 (pDM_Odm->AntDivType == CG_TRX_SMART_ANTDIV)) 229 odm_HwAntDiv(pDM_Odm); 230 231 ODM_TXPowerTrackingCheck(pDM_Odm); 232 odm_EdcaTurboCheck(pDM_Odm); 233} 234 235/* Init /.. Fixed HW value. Only init time. */ 236void ODM_CmnInfoInit(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u32 Value) 237{ 238 /* This section is used for init value */ 239 switch (CmnInfo) { 240 /* Fixed ODM value. */ 241 case ODM_CMNINFO_ABILITY: 242 pDM_Odm->SupportAbility = (u32)Value; 243 break; 244 case ODM_CMNINFO_PLATFORM: 245 pDM_Odm->SupportPlatform = (u8)Value; 246 break; 247 case ODM_CMNINFO_INTERFACE: 248 pDM_Odm->SupportInterface = (u8)Value; 249 break; 250 case ODM_CMNINFO_MP_TEST_CHIP: 251 pDM_Odm->bIsMPChip = (u8)Value; 252 break; 253 case ODM_CMNINFO_IC_TYPE: 254 pDM_Odm->SupportICType = Value; 255 break; 256 case ODM_CMNINFO_CUT_VER: 257 pDM_Odm->CutVersion = (u8)Value; 258 break; 259 case ODM_CMNINFO_FAB_VER: 260 pDM_Odm->FabVersion = (u8)Value; 261 break; 262 case ODM_CMNINFO_RF_TYPE: 263 pDM_Odm->RFType = (u8)Value; 264 break; 265 case ODM_CMNINFO_RF_ANTENNA_TYPE: 266 pDM_Odm->AntDivType = (u8)Value; 267 break; 268 case ODM_CMNINFO_BOARD_TYPE: 269 pDM_Odm->BoardType = (u8)Value; 270 break; 271 case ODM_CMNINFO_EXT_LNA: 272 pDM_Odm->ExtLNA = (u8)Value; 273 break; 274 case ODM_CMNINFO_EXT_PA: 275 pDM_Odm->ExtPA = (u8)Value; 276 break; 277 case ODM_CMNINFO_EXT_TRSW: 278 pDM_Odm->ExtTRSW = (u8)Value; 279 break; 280 case ODM_CMNINFO_PATCH_ID: 281 pDM_Odm->PatchID = (u8)Value; 282 break; 283 case ODM_CMNINFO_BINHCT_TEST: 284 pDM_Odm->bInHctTest = (bool)Value; 285 break; 286 case ODM_CMNINFO_BWIFI_TEST: 287 pDM_Odm->bWIFITest = (bool)Value; 288 break; 289 case ODM_CMNINFO_SMART_CONCURRENT: 290 pDM_Odm->bDualMacSmartConcurrent = (bool)Value; 291 break; 292 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 293 default: 294 /* do nothing */ 295 break; 296 } 297 298 /* Tx power tracking BB swing table. */ 299 /* The base index = 12. +((12-n)/2)dB 13~?? = decrease tx pwr by -((n-12)/2)dB */ 300 pDM_Odm->BbSwingIdxOfdm = 12; /* Set defalut value as index 12. */ 301 pDM_Odm->BbSwingIdxOfdmCurrent = 12; 302 pDM_Odm->BbSwingFlagOfdm = false; 303} 304 305void ODM_CmnInfoHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, void *pValue) 306{ 307 /* */ 308 /* Hook call by reference pointer. */ 309 /* */ 310 switch (CmnInfo) { 311 /* Dynamic call by reference pointer. */ 312 case ODM_CMNINFO_MAC_PHY_MODE: 313 pDM_Odm->pMacPhyMode = (u8 *)pValue; 314 break; 315 case ODM_CMNINFO_TX_UNI: 316 pDM_Odm->pNumTxBytesUnicast = (u64 *)pValue; 317 break; 318 case ODM_CMNINFO_RX_UNI: 319 pDM_Odm->pNumRxBytesUnicast = (u64 *)pValue; 320 break; 321 case ODM_CMNINFO_WM_MODE: 322 pDM_Odm->pWirelessMode = (u8 *)pValue; 323 break; 324 case ODM_CMNINFO_BAND: 325 pDM_Odm->pBandType = (u8 *)pValue; 326 break; 327 case ODM_CMNINFO_SEC_CHNL_OFFSET: 328 pDM_Odm->pSecChOffset = (u8 *)pValue; 329 break; 330 case ODM_CMNINFO_SEC_MODE: 331 pDM_Odm->pSecurity = (u8 *)pValue; 332 break; 333 case ODM_CMNINFO_BW: 334 pDM_Odm->pBandWidth = (u8 *)pValue; 335 break; 336 case ODM_CMNINFO_CHNL: 337 pDM_Odm->pChannel = (u8 *)pValue; 338 break; 339 case ODM_CMNINFO_DMSP_GET_VALUE: 340 pDM_Odm->pbGetValueFromOtherMac = (bool *)pValue; 341 break; 342 case ODM_CMNINFO_BUDDY_ADAPTOR: 343 pDM_Odm->pBuddyAdapter = (struct adapter **)pValue; 344 break; 345 case ODM_CMNINFO_DMSP_IS_MASTER: 346 pDM_Odm->pbMasterOfDMSP = (bool *)pValue; 347 break; 348 case ODM_CMNINFO_SCAN: 349 pDM_Odm->pbScanInProcess = (bool *)pValue; 350 break; 351 case ODM_CMNINFO_POWER_SAVING: 352 pDM_Odm->pbPowerSaving = (bool *)pValue; 353 break; 354 case ODM_CMNINFO_ONE_PATH_CCA: 355 pDM_Odm->pOnePathCCA = (u8 *)pValue; 356 break; 357 case ODM_CMNINFO_DRV_STOP: 358 pDM_Odm->pbDriverStopped = (bool *)pValue; 359 break; 360 case ODM_CMNINFO_PNP_IN: 361 pDM_Odm->pbDriverIsGoingToPnpSetPowerSleep = (bool *)pValue; 362 break; 363 case ODM_CMNINFO_INIT_ON: 364 pDM_Odm->pinit_adpt_in_progress = (bool *)pValue; 365 break; 366 case ODM_CMNINFO_ANT_TEST: 367 pDM_Odm->pAntennaTest = (u8 *)pValue; 368 break; 369 case ODM_CMNINFO_NET_CLOSED: 370 pDM_Odm->pbNet_closed = (bool *)pValue; 371 break; 372 case ODM_CMNINFO_MP_MODE: 373 pDM_Odm->mp_mode = (u8 *)pValue; 374 break; 375 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 376 default: 377 /* do nothing */ 378 break; 379 } 380} 381 382void ODM_CmnInfoPtrArrayHook(struct odm_dm_struct *pDM_Odm, enum odm_common_info_def CmnInfo, u16 Index, void *pValue) 383{ 384 /* Hook call by reference pointer. */ 385 switch (CmnInfo) { 386 /* Dynamic call by reference pointer. */ 387 case ODM_CMNINFO_STA_STATUS: 388 pDM_Odm->pODM_StaInfo[Index] = (struct sta_info *)pValue; 389 break; 390 /* To remove the compiler warning, must add an empty default statement to handle the other values. */ 391 default: 392 /* do nothing */ 393 break; 394 } 395} 396 397/* Update Band/CHannel/.. The values are dynamic but non-per-packet. */ 398void ODM_CmnInfoUpdate(struct odm_dm_struct *pDM_Odm, u32 CmnInfo, u64 Value) 399{ 400 /* */ 401 /* This init variable may be changed in run time. */ 402 /* */ 403 switch (CmnInfo) { 404 case ODM_CMNINFO_ABILITY: 405 pDM_Odm->SupportAbility = (u32)Value; 406 break; 407 case ODM_CMNINFO_RF_TYPE: 408 pDM_Odm->RFType = (u8)Value; 409 break; 410 case ODM_CMNINFO_WIFI_DIRECT: 411 pDM_Odm->bWIFI_Direct = (bool)Value; 412 break; 413 case ODM_CMNINFO_WIFI_DISPLAY: 414 pDM_Odm->bWIFI_Display = (bool)Value; 415 break; 416 case ODM_CMNINFO_LINK: 417 pDM_Odm->bLinked = (bool)Value; 418 break; 419 case ODM_CMNINFO_RSSI_MIN: 420 pDM_Odm->RSSI_Min = (u8)Value; 421 break; 422 case ODM_CMNINFO_DBG_COMP: 423 pDM_Odm->DebugComponents = Value; 424 break; 425 case ODM_CMNINFO_DBG_LEVEL: 426 pDM_Odm->DebugLevel = (u32)Value; 427 break; 428 case ODM_CMNINFO_RA_THRESHOLD_HIGH: 429 pDM_Odm->RateAdaptive.HighRSSIThresh = (u8)Value; 430 break; 431 case ODM_CMNINFO_RA_THRESHOLD_LOW: 432 pDM_Odm->RateAdaptive.LowRSSIThresh = (u8)Value; 433 break; 434 } 435} 436 437void odm_CommonInfoSelfInit(struct odm_dm_struct *pDM_Odm) 438{ 439 struct adapter *adapter = pDM_Odm->Adapter; 440 441 pDM_Odm->bCckHighPower = (bool) phy_query_bb_reg(adapter, 0x824, BIT9); 442 pDM_Odm->RFPathRxEnable = (u8) phy_query_bb_reg(adapter, 0xc04, 0x0F); 443 444 ODM_InitDebugSetting(pDM_Odm); 445} 446 447void odm_CommonInfoSelfUpdate(struct odm_dm_struct *pDM_Odm) 448{ 449 u8 EntryCnt = 0; 450 u8 i; 451 struct sta_info *pEntry; 452 453 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) { 454 if (*(pDM_Odm->pSecChOffset) == 1) 455 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) - 2; 456 else if (*(pDM_Odm->pSecChOffset) == 2) 457 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel) + 2; 458 } else { 459 pDM_Odm->ControlChannel = *(pDM_Odm->pChannel); 460 } 461 462 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 463 pEntry = pDM_Odm->pODM_StaInfo[i]; 464 if (IS_STA_VALID(pEntry)) 465 EntryCnt++; 466 } 467 if (EntryCnt == 1) 468 pDM_Odm->bOneEntryOnly = true; 469 else 470 pDM_Odm->bOneEntryOnly = false; 471} 472 473void odm_CmnInfoInit_Debug(struct odm_dm_struct *pDM_Odm) 474{ 475 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoInit_Debug==>\n")); 476 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportPlatform=%d\n", pDM_Odm->SupportPlatform)); 477 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportAbility=0x%x\n", pDM_Odm->SupportAbility)); 478 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportInterface=%d\n", pDM_Odm->SupportInterface)); 479 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("SupportICType=0x%x\n", pDM_Odm->SupportICType)); 480 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("CutVersion=%d\n", pDM_Odm->CutVersion)); 481 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("FabVersion=%d\n", pDM_Odm->FabVersion)); 482 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RFType=%d\n", pDM_Odm->RFType)); 483 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("BoardType=%d\n", pDM_Odm->BoardType)); 484 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtLNA=%d\n", pDM_Odm->ExtLNA)); 485 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtPA=%d\n", pDM_Odm->ExtPA)); 486 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("ExtTRSW=%d\n", pDM_Odm->ExtTRSW)); 487 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("PatchID=%d\n", pDM_Odm->PatchID)); 488 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bInHctTest=%d\n", pDM_Odm->bInHctTest)); 489 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFITest=%d\n", pDM_Odm->bWIFITest)); 490 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bDualMacSmartConcurrent=%d\n", pDM_Odm->bDualMacSmartConcurrent)); 491} 492 493void odm_CmnInfoHook_Debug(struct odm_dm_struct *pDM_Odm) 494{ 495 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoHook_Debug==>\n")); 496 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumTxBytesUnicast=%llu\n", *(pDM_Odm->pNumTxBytesUnicast))); 497 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pNumRxBytesUnicast=%llu\n", *(pDM_Odm->pNumRxBytesUnicast))); 498 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pWirelessMode=0x%x\n", *(pDM_Odm->pWirelessMode))); 499 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecChOffset=%d\n", *(pDM_Odm->pSecChOffset))); 500 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pSecurity=%d\n", *(pDM_Odm->pSecurity))); 501 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pBandWidth=%d\n", *(pDM_Odm->pBandWidth))); 502 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pChannel=%d\n", *(pDM_Odm->pChannel))); 503 504 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbScanInProcess=%d\n", *(pDM_Odm->pbScanInProcess))); 505 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("pbPowerSaving=%d\n", *(pDM_Odm->pbPowerSaving))); 506} 507 508void odm_CmnInfoUpdate_Debug(struct odm_dm_struct *pDM_Odm) 509{ 510 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("odm_CmnInfoUpdate_Debug==>\n")); 511 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Direct=%d\n", pDM_Odm->bWIFI_Direct)); 512 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bWIFI_Display=%d\n", pDM_Odm->bWIFI_Display)); 513 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("bLinked=%d\n", pDM_Odm->bLinked)); 514 ODM_RT_TRACE(pDM_Odm, ODM_COMP_COMMON, ODM_DBG_LOUD, ("RSSI_Min=%d\n", pDM_Odm->RSSI_Min)); 515} 516 517void ODM_Write_DIG(struct odm_dm_struct *pDM_Odm, u8 CurrentIGI) 518{ 519 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 520 struct adapter *adapter = pDM_Odm->Adapter; 521 522 if (pDM_DigTable->CurIGValue != CurrentIGI) { 523 phy_set_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N, CurrentIGI); 524 pDM_DigTable->CurIGValue = CurrentIGI; 525 } 526} 527 528void odm_DIGInit(struct odm_dm_struct *pDM_Odm) 529{ 530 struct adapter *adapter = pDM_Odm->Adapter; 531 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 532 533 pDM_DigTable->CurIGValue = (u8) phy_query_bb_reg(adapter, ODM_REG_IGI_A_11N, ODM_BIT_IGI_11N); 534 pDM_DigTable->RssiLowThresh = DM_DIG_THRESH_LOW; 535 pDM_DigTable->RssiHighThresh = DM_DIG_THRESH_HIGH; 536 pDM_DigTable->FALowThresh = DM_false_ALARM_THRESH_LOW; 537 pDM_DigTable->FAHighThresh = DM_false_ALARM_THRESH_HIGH; 538 if (pDM_Odm->BoardType == ODM_BOARD_HIGHPWR) { 539 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; 540 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; 541 } else { 542 pDM_DigTable->rx_gain_range_max = DM_DIG_MAX_NIC; 543 pDM_DigTable->rx_gain_range_min = DM_DIG_MIN_NIC; 544 } 545 pDM_DigTable->BackoffVal = DM_DIG_BACKOFF_DEFAULT; 546 pDM_DigTable->BackoffVal_range_max = DM_DIG_BACKOFF_MAX; 547 pDM_DigTable->BackoffVal_range_min = DM_DIG_BACKOFF_MIN; 548 pDM_DigTable->PreCCK_CCAThres = 0xFF; 549 pDM_DigTable->CurCCK_CCAThres = 0x83; 550 pDM_DigTable->ForbiddenIGI = DM_DIG_MIN_NIC; 551 pDM_DigTable->LargeFAHit = 0; 552 pDM_DigTable->Recover_cnt = 0; 553 pDM_DigTable->DIG_Dynamic_MIN_0 = DM_DIG_MIN_NIC; 554 pDM_DigTable->DIG_Dynamic_MIN_1 = DM_DIG_MIN_NIC; 555 pDM_DigTable->bMediaConnect_0 = false; 556 pDM_DigTable->bMediaConnect_1 = false; 557 558 /* To Initialize pDM_Odm->bDMInitialGainEnable == false to avoid DIG error */ 559 pDM_Odm->bDMInitialGainEnable = true; 560} 561 562void odm_DIG(struct odm_dm_struct *pDM_Odm) 563{ 564 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 565 struct false_alarm_stats *pFalseAlmCnt = &pDM_Odm->FalseAlmCnt; 566 u8 DIG_Dynamic_MIN; 567 u8 DIG_MaxOfMin; 568 bool FirstConnect, FirstDisConnect; 569 u8 dm_dig_max, dm_dig_min; 570 u8 CurrentIGI = pDM_DigTable->CurIGValue; 571 572 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG()==>\n")); 573 if ((!(pDM_Odm->SupportAbility&ODM_BB_DIG)) || (!(pDM_Odm->SupportAbility&ODM_BB_FA_CNT))) { 574 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 575 ("odm_DIG() Return: SupportAbility ODM_BB_DIG or ODM_BB_FA_CNT is disabled\n")); 576 return; 577 } 578 579 if (*(pDM_Odm->pbScanInProcess)) { 580 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: In Scan Progress\n")); 581 return; 582 } 583 584 /* add by Neil Chen to avoid PSD is processing */ 585 if (pDM_Odm->bDMInitialGainEnable == false) { 586 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() Return: PSD is Processing\n")); 587 return; 588 } 589 590 DIG_Dynamic_MIN = pDM_DigTable->DIG_Dynamic_MIN_0; 591 FirstConnect = (pDM_Odm->bLinked) && (!pDM_DigTable->bMediaConnect_0); 592 FirstDisConnect = (!pDM_Odm->bLinked) && (pDM_DigTable->bMediaConnect_0); 593 594 /* 1 Boundary Decision */ 595 dm_dig_max = DM_DIG_MAX_NIC; 596 dm_dig_min = DM_DIG_MIN_NIC; 597 DIG_MaxOfMin = DM_DIG_MAX_AP; 598 599 if (pDM_Odm->bLinked) { 600 /* 2 Modify DIG upper bound */ 601 if ((pDM_Odm->RSSI_Min + 20) > dm_dig_max) 602 pDM_DigTable->rx_gain_range_max = dm_dig_max; 603 else if ((pDM_Odm->RSSI_Min + 20) < dm_dig_min) 604 pDM_DigTable->rx_gain_range_max = dm_dig_min; 605 else 606 pDM_DigTable->rx_gain_range_max = pDM_Odm->RSSI_Min + 20; 607 /* 2 Modify DIG lower bound */ 608 if (pDM_Odm->bOneEntryOnly) { 609 if (pDM_Odm->RSSI_Min < dm_dig_min) 610 DIG_Dynamic_MIN = dm_dig_min; 611 else if (pDM_Odm->RSSI_Min > DIG_MaxOfMin) 612 DIG_Dynamic_MIN = DIG_MaxOfMin; 613 else 614 DIG_Dynamic_MIN = pDM_Odm->RSSI_Min; 615 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 616 ("odm_DIG() : bOneEntryOnly=true, DIG_Dynamic_MIN=0x%x\n", 617 DIG_Dynamic_MIN)); 618 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 619 ("odm_DIG() : pDM_Odm->RSSI_Min=%d\n", 620 pDM_Odm->RSSI_Min)); 621 } else if (pDM_Odm->SupportAbility & ODM_BB_ANT_DIV) { 622 /* 1 Lower Bound for 88E AntDiv */ 623 if (pDM_Odm->AntDivType == CG_TRX_HW_ANTDIV) { 624 DIG_Dynamic_MIN = (u8) pDM_DigTable->AntDiv_RSSI_max; 625 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, 626 ("odm_DIG(): pDM_DigTable->AntDiv_RSSI_max=%d\n", 627 pDM_DigTable->AntDiv_RSSI_max)); 628 } 629 } else { 630 DIG_Dynamic_MIN = dm_dig_min; 631 } 632 } else { 633 pDM_DigTable->rx_gain_range_max = dm_dig_max; 634 DIG_Dynamic_MIN = dm_dig_min; 635 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG() : No Link\n")); 636 } 637 638 /* 1 Modify DIG lower bound, deal with abnormally large false alarm */ 639 if (pFalseAlmCnt->Cnt_all > 10000) { 640 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("dm_DIG(): Abnornally false alarm case.\n")); 641 642 if (pDM_DigTable->LargeFAHit != 3) 643 pDM_DigTable->LargeFAHit++; 644 if (pDM_DigTable->ForbiddenIGI < CurrentIGI) { 645 pDM_DigTable->ForbiddenIGI = CurrentIGI; 646 pDM_DigTable->LargeFAHit = 1; 647 } 648 649 if (pDM_DigTable->LargeFAHit >= 3) { 650 if ((pDM_DigTable->ForbiddenIGI+1) > pDM_DigTable->rx_gain_range_max) 651 pDM_DigTable->rx_gain_range_min = pDM_DigTable->rx_gain_range_max; 652 else 653 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); 654 pDM_DigTable->Recover_cnt = 3600; /* 3600=2hr */ 655 } 656 657 } else { 658 /* Recovery mechanism for IGI lower bound */ 659 if (pDM_DigTable->Recover_cnt != 0) { 660 pDM_DigTable->Recover_cnt--; 661 } else { 662 if (pDM_DigTable->LargeFAHit < 3) { 663 if ((pDM_DigTable->ForbiddenIGI-1) < DIG_Dynamic_MIN) { /* DM_DIG_MIN) */ 664 pDM_DigTable->ForbiddenIGI = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 665 pDM_DigTable->rx_gain_range_min = DIG_Dynamic_MIN; /* DM_DIG_MIN; */ 666 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: At Lower Bound\n")); 667 } else { 668 pDM_DigTable->ForbiddenIGI--; 669 pDM_DigTable->rx_gain_range_min = (pDM_DigTable->ForbiddenIGI + 1); 670 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): Normal Case: Approach Lower Bound\n")); 671 } 672 } else { 673 pDM_DigTable->LargeFAHit = 0; 674 } 675 } 676 } 677 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 678 ("odm_DIG(): pDM_DigTable->LargeFAHit=%d\n", 679 pDM_DigTable->LargeFAHit)); 680 681 /* 1 Adjust initial gain by false alarm */ 682 if (pDM_Odm->bLinked) { 683 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG AfterLink\n")); 684 if (FirstConnect) { 685 CurrentIGI = pDM_Odm->RSSI_Min; 686 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("DIG: First Connect\n")); 687 } else { 688 if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH2) 689 CurrentIGI = CurrentIGI + 4;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ 690 else if (pFalseAlmCnt->Cnt_all > DM_DIG_FA_TH1) 691 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ 692 else if (pFalseAlmCnt->Cnt_all < DM_DIG_FA_TH0) 693 CurrentIGI = CurrentIGI - 2;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ 694 } 695 } else { 696 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG BeforeLink\n")); 697 if (FirstDisConnect) { 698 CurrentIGI = pDM_DigTable->rx_gain_range_min; 699 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): First DisConnect\n")); 700 } else { 701 /* 2012.03.30 LukeLee: enable DIG before link but with very high thresholds */ 702 if (pFalseAlmCnt->Cnt_all > 10000) 703 CurrentIGI = CurrentIGI + 2;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+2; */ 704 else if (pFalseAlmCnt->Cnt_all > 8000) 705 CurrentIGI = CurrentIGI + 1;/* pDM_DigTable->CurIGValue = pDM_DigTable->PreIGValue+1; */ 706 else if (pFalseAlmCnt->Cnt_all < 500) 707 CurrentIGI = CurrentIGI - 1;/* pDM_DigTable->CurIGValue =pDM_DigTable->PreIGValue-1; */ 708 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): England DIG\n")); 709 } 710 } 711 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): DIG End Adjust IGI\n")); 712 /* 1 Check initial gain by upper/lower bound */ 713 if (CurrentIGI > pDM_DigTable->rx_gain_range_max) 714 CurrentIGI = pDM_DigTable->rx_gain_range_max; 715 if (CurrentIGI < pDM_DigTable->rx_gain_range_min) 716 CurrentIGI = pDM_DigTable->rx_gain_range_min; 717 718 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, 719 ("odm_DIG(): rx_gain_range_max=0x%x, rx_gain_range_min=0x%x\n", 720 pDM_DigTable->rx_gain_range_max, pDM_DigTable->rx_gain_range_min)); 721 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): TotalFA=%d\n", pFalseAlmCnt->Cnt_all)); 722 ODM_RT_TRACE(pDM_Odm, ODM_COMP_DIG, ODM_DBG_LOUD, ("odm_DIG(): CurIGValue=0x%x\n", CurrentIGI)); 723 724 /* 2 High power RSSI threshold */ 725 726 ODM_Write_DIG(pDM_Odm, CurrentIGI);/* ODM_Write_DIG(pDM_Odm, pDM_DigTable->CurIGValue); */ 727 pDM_DigTable->bMediaConnect_0 = pDM_Odm->bLinked; 728 pDM_DigTable->DIG_Dynamic_MIN_0 = DIG_Dynamic_MIN; 729} 730 731/* 3============================================================ */ 732/* 3 FASLE ALARM CHECK */ 733/* 3============================================================ */ 734 735void odm_FalseAlarmCounterStatistics(struct odm_dm_struct *pDM_Odm) 736{ 737 struct adapter *adapter = pDM_Odm->Adapter; 738 u32 ret_value; 739 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); 740 741 if (!(pDM_Odm->SupportAbility & ODM_BB_FA_CNT)) 742 return; 743 744 /* hold ofdm counter */ 745 phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_HOLDC_11N, BIT31, 1); /* hold page C counter */ 746 phy_set_bb_reg(adapter, ODM_REG_OFDM_FA_RSTD_11N, BIT31, 1); /* hold page D counter */ 747 748 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE1_11N, bMaskDWord); 749 FalseAlmCnt->Cnt_Fast_Fsync = (ret_value&0xffff); 750 FalseAlmCnt->Cnt_SB_Search_fail = ((ret_value&0xffff0000)>>16); 751 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE2_11N, bMaskDWord); 752 FalseAlmCnt->Cnt_OFDM_CCA = (ret_value&0xffff); 753 FalseAlmCnt->Cnt_Parity_Fail = ((ret_value&0xffff0000)>>16); 754 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE3_11N, bMaskDWord); 755 FalseAlmCnt->Cnt_Rate_Illegal = (ret_value&0xffff); 756 FalseAlmCnt->Cnt_Crc8_fail = ((ret_value&0xffff0000)>>16); 757 ret_value = phy_query_bb_reg(adapter, ODM_REG_OFDM_FA_TYPE4_11N, bMaskDWord); 758 FalseAlmCnt->Cnt_Mcs_fail = (ret_value&0xffff); 759 760 FalseAlmCnt->Cnt_Ofdm_fail = FalseAlmCnt->Cnt_Parity_Fail + FalseAlmCnt->Cnt_Rate_Illegal + 761 FalseAlmCnt->Cnt_Crc8_fail + FalseAlmCnt->Cnt_Mcs_fail + 762 FalseAlmCnt->Cnt_Fast_Fsync + FalseAlmCnt->Cnt_SB_Search_fail; 763 764 ret_value = phy_query_bb_reg(adapter, ODM_REG_SC_CNT_11N, bMaskDWord); 765 FalseAlmCnt->Cnt_BW_LSC = (ret_value&0xffff); 766 FalseAlmCnt->Cnt_BW_USC = ((ret_value&0xffff0000)>>16); 767 768 /* hold cck counter */ 769 phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT12, 1); 770 phy_set_bb_reg(adapter, ODM_REG_CCK_FA_RST_11N, BIT14, 1); 771 772 ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_LSB_11N, bMaskByte0); 773 FalseAlmCnt->Cnt_Cck_fail = ret_value; 774 ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_FA_MSB_11N, bMaskByte3); 775 FalseAlmCnt->Cnt_Cck_fail += (ret_value & 0xff)<<8; 776 777 ret_value = phy_query_bb_reg(adapter, ODM_REG_CCK_CCA_CNT_11N, bMaskDWord); 778 FalseAlmCnt->Cnt_CCK_CCA = ((ret_value&0xFF)<<8) | ((ret_value&0xFF00)>>8); 779 780 FalseAlmCnt->Cnt_all = (FalseAlmCnt->Cnt_Fast_Fsync + 781 FalseAlmCnt->Cnt_SB_Search_fail + 782 FalseAlmCnt->Cnt_Parity_Fail + 783 FalseAlmCnt->Cnt_Rate_Illegal + 784 FalseAlmCnt->Cnt_Crc8_fail + 785 FalseAlmCnt->Cnt_Mcs_fail + 786 FalseAlmCnt->Cnt_Cck_fail); 787 788 FalseAlmCnt->Cnt_CCA_all = FalseAlmCnt->Cnt_OFDM_CCA + FalseAlmCnt->Cnt_CCK_CCA; 789 790 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Enter odm_FalseAlarmCounterStatistics\n")); 791 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 792 ("Cnt_Fast_Fsync=%d, Cnt_SB_Search_fail=%d\n", 793 FalseAlmCnt->Cnt_Fast_Fsync, FalseAlmCnt->Cnt_SB_Search_fail)); 794 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 795 ("Cnt_Parity_Fail=%d, Cnt_Rate_Illegal=%d\n", 796 FalseAlmCnt->Cnt_Parity_Fail, FalseAlmCnt->Cnt_Rate_Illegal)); 797 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, 798 ("Cnt_Crc8_fail=%d, Cnt_Mcs_fail=%d\n", 799 FalseAlmCnt->Cnt_Crc8_fail, FalseAlmCnt->Cnt_Mcs_fail)); 800 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Cck_fail=%d\n", FalseAlmCnt->Cnt_Cck_fail)); 801 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Cnt_Ofdm_fail=%d\n", FalseAlmCnt->Cnt_Ofdm_fail)); 802 ODM_RT_TRACE(pDM_Odm, ODM_COMP_FA_CNT, ODM_DBG_LOUD, ("Total False Alarm=%d\n", FalseAlmCnt->Cnt_all)); 803} 804 805/* 3============================================================ */ 806/* 3 CCK Packet Detect Threshold */ 807/* 3============================================================ */ 808 809void odm_CCKPacketDetectionThresh(struct odm_dm_struct *pDM_Odm) 810{ 811 u8 CurCCK_CCAThres; 812 struct false_alarm_stats *FalseAlmCnt = &(pDM_Odm->FalseAlmCnt); 813 814 if (!(pDM_Odm->SupportAbility & (ODM_BB_CCK_PD|ODM_BB_FA_CNT))) 815 return; 816 if (pDM_Odm->ExtLNA) 817 return; 818 if (pDM_Odm->bLinked) { 819 if (pDM_Odm->RSSI_Min > 25) { 820 CurCCK_CCAThres = 0xcd; 821 } else if ((pDM_Odm->RSSI_Min <= 25) && (pDM_Odm->RSSI_Min > 10)) { 822 CurCCK_CCAThres = 0x83; 823 } else { 824 if (FalseAlmCnt->Cnt_Cck_fail > 1000) 825 CurCCK_CCAThres = 0x83; 826 else 827 CurCCK_CCAThres = 0x40; 828 } 829 } else { 830 if (FalseAlmCnt->Cnt_Cck_fail > 1000) 831 CurCCK_CCAThres = 0x83; 832 else 833 CurCCK_CCAThres = 0x40; 834 } 835 ODM_Write_CCK_CCA_Thres(pDM_Odm, CurCCK_CCAThres); 836} 837 838void ODM_Write_CCK_CCA_Thres(struct odm_dm_struct *pDM_Odm, u8 CurCCK_CCAThres) 839{ 840 struct rtw_dig *pDM_DigTable = &pDM_Odm->DM_DigTable; 841 struct adapter *adapt = pDM_Odm->Adapter; 842 843 if (pDM_DigTable->CurCCK_CCAThres != CurCCK_CCAThres) /* modify by Guo.Mingzhi 2012-01-03 */ 844 usb_write8(adapt, ODM_REG_CCK_CCA_11N, CurCCK_CCAThres); 845 pDM_DigTable->PreCCK_CCAThres = pDM_DigTable->CurCCK_CCAThres; 846 pDM_DigTable->CurCCK_CCAThres = CurCCK_CCAThres; 847} 848 849void ODM_RF_Saving(struct odm_dm_struct *pDM_Odm, u8 bForceInNormal) 850{ 851 struct adapter *adapter = pDM_Odm->Adapter; 852 struct rtl_ps *pDM_PSTable = &pDM_Odm->DM_PSTable; 853 u8 Rssi_Up_bound = 30; 854 u8 Rssi_Low_bound = 25; 855 856 if (pDM_Odm->PatchID == 40) { /* RT_CID_819x_FUNAI_TV */ 857 Rssi_Up_bound = 50; 858 Rssi_Low_bound = 45; 859 } 860 if (pDM_PSTable->initialize == 0) { 861 pDM_PSTable->Reg874 = (phy_query_bb_reg(adapter, 0x874, bMaskDWord)&0x1CC000)>>14; 862 pDM_PSTable->RegC70 = (phy_query_bb_reg(adapter, 0xc70, bMaskDWord)&BIT3)>>3; 863 pDM_PSTable->Reg85C = (phy_query_bb_reg(adapter, 0x85c, bMaskDWord)&0xFF000000)>>24; 864 pDM_PSTable->RegA74 = (phy_query_bb_reg(adapter, 0xa74, bMaskDWord)&0xF000)>>12; 865 pDM_PSTable->initialize = 1; 866 } 867 868 if (!bForceInNormal) { 869 if (pDM_Odm->RSSI_Min != 0xFF) { 870 if (pDM_PSTable->PreRFState == RF_Normal) { 871 if (pDM_Odm->RSSI_Min >= Rssi_Up_bound) 872 pDM_PSTable->CurRFState = RF_Save; 873 else 874 pDM_PSTable->CurRFState = RF_Normal; 875 } else { 876 if (pDM_Odm->RSSI_Min <= Rssi_Low_bound) 877 pDM_PSTable->CurRFState = RF_Normal; 878 else 879 pDM_PSTable->CurRFState = RF_Save; 880 } 881 } else { 882 pDM_PSTable->CurRFState = RF_MAX; 883 } 884 } else { 885 pDM_PSTable->CurRFState = RF_Normal; 886 } 887 888 if (pDM_PSTable->PreRFState != pDM_PSTable->CurRFState) { 889 if (pDM_PSTable->CurRFState == RF_Save) { 890 phy_set_bb_reg(adapter, 0x874 , 0x1C0000, 0x2); /* Reg874[20:18]=3'b010 */ 891 phy_set_bb_reg(adapter, 0xc70, BIT3, 0); /* RegC70[3]=1'b0 */ 892 phy_set_bb_reg(adapter, 0x85c, 0xFF000000, 0x63); /* Reg85C[31:24]=0x63 */ 893 phy_set_bb_reg(adapter, 0x874, 0xC000, 0x2); /* Reg874[15:14]=2'b10 */ 894 phy_set_bb_reg(adapter, 0xa74, 0xF000, 0x3); /* RegA75[7:4]=0x3 */ 895 phy_set_bb_reg(adapter, 0x818, BIT28, 0x0); /* Reg818[28]=1'b0 */ 896 phy_set_bb_reg(adapter, 0x818, BIT28, 0x1); /* Reg818[28]=1'b1 */ 897 } else { 898 phy_set_bb_reg(adapter, 0x874 , 0x1CC000, pDM_PSTable->Reg874); 899 phy_set_bb_reg(adapter, 0xc70, BIT3, pDM_PSTable->RegC70); 900 phy_set_bb_reg(adapter, 0x85c, 0xFF000000, pDM_PSTable->Reg85C); 901 phy_set_bb_reg(adapter, 0xa74, 0xF000, pDM_PSTable->RegA74); 902 phy_set_bb_reg(adapter, 0x818, BIT28, 0x0); 903 } 904 pDM_PSTable->PreRFState = pDM_PSTable->CurRFState; 905 } 906} 907 908/* 3============================================================ */ 909/* 3 RATR MASK */ 910/* 3============================================================ */ 911/* 3============================================================ */ 912/* 3 Rate Adaptive */ 913/* 3============================================================ */ 914 915void odm_RateAdaptiveMaskInit(struct odm_dm_struct *pDM_Odm) 916{ 917 struct odm_rate_adapt *pOdmRA = &pDM_Odm->RateAdaptive; 918 919 pOdmRA->Type = DM_Type_ByDriver; 920 if (pOdmRA->Type == DM_Type_ByDriver) 921 pDM_Odm->bUseRAMask = true; 922 else 923 pDM_Odm->bUseRAMask = false; 924 925 pOdmRA->RATRState = DM_RATR_STA_INIT; 926 pOdmRA->HighRSSIThresh = 50; 927 pOdmRA->LowRSSIThresh = 20; 928} 929 930u32 ODM_Get_Rate_Bitmap(struct odm_dm_struct *pDM_Odm, u32 macid, u32 ra_mask, u8 rssi_level) 931{ 932 struct sta_info *pEntry; 933 u32 rate_bitmap = 0x0fffffff; 934 u8 WirelessMode; 935 936 pEntry = pDM_Odm->pODM_StaInfo[macid]; 937 if (!IS_STA_VALID(pEntry)) 938 return ra_mask; 939 940 WirelessMode = pEntry->wireless_mode; 941 942 switch (WirelessMode) { 943 case ODM_WM_B: 944 if (ra_mask & 0x0000000c) /* 11M or 5.5M enable */ 945 rate_bitmap = 0x0000000d; 946 else 947 rate_bitmap = 0x0000000f; 948 break; 949 case (ODM_WM_A|ODM_WM_G): 950 if (rssi_level == DM_RATR_STA_HIGH) 951 rate_bitmap = 0x00000f00; 952 else 953 rate_bitmap = 0x00000ff0; 954 break; 955 case (ODM_WM_B|ODM_WM_G): 956 if (rssi_level == DM_RATR_STA_HIGH) 957 rate_bitmap = 0x00000f00; 958 else if (rssi_level == DM_RATR_STA_MIDDLE) 959 rate_bitmap = 0x00000ff0; 960 else 961 rate_bitmap = 0x00000ff5; 962 break; 963 case (ODM_WM_B|ODM_WM_G|ODM_WM_N24G): 964 case (ODM_WM_A|ODM_WM_B|ODM_WM_G|ODM_WM_N24G): 965 if (pDM_Odm->RFType == ODM_1T2R || pDM_Odm->RFType == ODM_1T1R) { 966 if (rssi_level == DM_RATR_STA_HIGH) { 967 rate_bitmap = 0x000f0000; 968 } else if (rssi_level == DM_RATR_STA_MIDDLE) { 969 rate_bitmap = 0x000ff000; 970 } else { 971 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) 972 rate_bitmap = 0x000ff015; 973 else 974 rate_bitmap = 0x000ff005; 975 } 976 } else { 977 if (rssi_level == DM_RATR_STA_HIGH) { 978 rate_bitmap = 0x0f8f0000; 979 } else if (rssi_level == DM_RATR_STA_MIDDLE) { 980 rate_bitmap = 0x0f8ff000; 981 } else { 982 if (*(pDM_Odm->pBandWidth) == ODM_BW40M) 983 rate_bitmap = 0x0f8ff015; 984 else 985 rate_bitmap = 0x0f8ff005; 986 } 987 } 988 break; 989 default: 990 /* case WIRELESS_11_24N: */ 991 /* case WIRELESS_11_5N: */ 992 if (pDM_Odm->RFType == RF_1T2R) 993 rate_bitmap = 0x000fffff; 994 else 995 rate_bitmap = 0x0fffffff; 996 break; 997 } 998 999 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, 1000 (" ==> rssi_level:0x%02x, WirelessMode:0x%02x, rate_bitmap:0x%08x\n", 1001 rssi_level, WirelessMode, rate_bitmap)); 1002 1003 return rate_bitmap; 1004} 1005 1006/*----------------------------------------------------------------------------- 1007 * Function: odm_RefreshRateAdaptiveMask() 1008 * 1009 * Overview: Update rate table mask according to rssi 1010 * 1011 * Input: NONE 1012 * 1013 * Output: NONE 1014 * 1015 * Return: NONE 1016 * 1017 * Revised History: 1018 * When Who Remark 1019 * 05/27/2009 hpfan Create Version 0. 1020 * 1021 *---------------------------------------------------------------------------*/ 1022void odm_RefreshRateAdaptiveMask(struct odm_dm_struct *pDM_Odm) 1023{ 1024 if (!(pDM_Odm->SupportAbility & ODM_BB_RA_MASK)) 1025 return; 1026 /* */ 1027 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1028 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1029 /* HW dynamic mechanism. */ 1030 /* */ 1031 odm_RefreshRateAdaptiveMaskCE(pDM_Odm); 1032} 1033 1034void odm_RefreshRateAdaptiveMaskCE(struct odm_dm_struct *pDM_Odm) 1035{ 1036 u8 i; 1037 struct adapter *pAdapter = pDM_Odm->Adapter; 1038 1039 if (pAdapter->bDriverStopped) { 1040 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_TRACE, ("<---- odm_RefreshRateAdaptiveMask(): driver is going to unload\n")); 1041 return; 1042 } 1043 1044 if (!pDM_Odm->bUseRAMask) { 1045 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("<---- odm_RefreshRateAdaptiveMask(): driver does not control rate adaptive mask\n")); 1046 return; 1047 } 1048 1049 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 1050 struct sta_info *pstat = pDM_Odm->pODM_StaInfo[i]; 1051 if (IS_STA_VALID(pstat)) { 1052 if (ODM_RAStateCheck(pDM_Odm, pstat->rssi_stat.UndecoratedSmoothedPWDB, false , &pstat->rssi_level)) { 1053 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, 1054 ("RSSI:%d, RSSI_LEVEL:%d\n", 1055 pstat->rssi_stat.UndecoratedSmoothedPWDB, pstat->rssi_level)); 1056 rtw_hal_update_ra_mask(pAdapter, i, pstat->rssi_level); 1057 } 1058 } 1059 } 1060} 1061 1062/* Return Value: bool */ 1063/* - true: RATRState is changed. */ 1064bool ODM_RAStateCheck(struct odm_dm_struct *pDM_Odm, s32 RSSI, bool bForceUpdate, u8 *pRATRState) 1065{ 1066 struct odm_rate_adapt *pRA = &pDM_Odm->RateAdaptive; 1067 const u8 GoUpGap = 5; 1068 u8 HighRSSIThreshForRA = pRA->HighRSSIThresh; 1069 u8 LowRSSIThreshForRA = pRA->LowRSSIThresh; 1070 u8 RATRState; 1071 1072 /* Threshold Adjustment: */ 1073 /* when RSSI state trends to go up one or two levels, make sure RSSI is high enough. */ 1074 /* Here GoUpGap is added to solve the boundary's level alternation issue. */ 1075 switch (*pRATRState) { 1076 case DM_RATR_STA_INIT: 1077 case DM_RATR_STA_HIGH: 1078 break; 1079 case DM_RATR_STA_MIDDLE: 1080 HighRSSIThreshForRA += GoUpGap; 1081 break; 1082 case DM_RATR_STA_LOW: 1083 HighRSSIThreshForRA += GoUpGap; 1084 LowRSSIThreshForRA += GoUpGap; 1085 break; 1086 default: 1087 ODM_RT_ASSERT(pDM_Odm, false, ("wrong rssi level setting %d !", *pRATRState)); 1088 break; 1089 } 1090 1091 /* Decide RATRState by RSSI. */ 1092 if (RSSI > HighRSSIThreshForRA) 1093 RATRState = DM_RATR_STA_HIGH; 1094 else if (RSSI > LowRSSIThreshForRA) 1095 RATRState = DM_RATR_STA_MIDDLE; 1096 else 1097 RATRState = DM_RATR_STA_LOW; 1098 1099 if (*pRATRState != RATRState || bForceUpdate) { 1100 ODM_RT_TRACE(pDM_Odm, ODM_COMP_RA_MASK, ODM_DBG_LOUD, ("RSSI Level %d -> %d\n", *pRATRState, RATRState)); 1101 *pRATRState = RATRState; 1102 return true; 1103 } 1104 return false; 1105} 1106 1107/* 3============================================================ */ 1108/* 3 Dynamic Tx Power */ 1109/* 3============================================================ */ 1110 1111void odm_DynamicTxPowerInit(struct odm_dm_struct *pDM_Odm) 1112{ 1113 struct adapter *Adapter = pDM_Odm->Adapter; 1114 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1115 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1116 pdmpriv->bDynamicTxPowerEnable = false; 1117 pdmpriv->LastDTPLvl = TxHighPwrLevel_Normal; 1118 pdmpriv->DynamicTxHighPowerLvl = TxHighPwrLevel_Normal; 1119} 1120 1121/* 3============================================================ */ 1122/* 3 RSSI Monitor */ 1123/* 3============================================================ */ 1124 1125void odm_RSSIMonitorCheck(struct odm_dm_struct *pDM_Odm) 1126{ 1127 if (!(pDM_Odm->SupportAbility & ODM_BB_RSSI_MONITOR)) 1128 return; 1129 1130 /* */ 1131 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1132 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1133 /* HW dynamic mechanism. */ 1134 /* */ 1135 odm_RSSIMonitorCheckCE(pDM_Odm); 1136} /* odm_RSSIMonitorCheck */ 1137 1138static void FindMinimumRSSI(struct adapter *pAdapter) 1139{ 1140 struct hal_data_8188e *pHalData = GET_HAL_DATA(pAdapter); 1141 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1142 struct mlme_priv *pmlmepriv = &pAdapter->mlmepriv; 1143 1144 /* 1 1.Determine the minimum RSSI */ 1145 if ((check_fwstate(pmlmepriv, _FW_LINKED) == false) && 1146 (pdmpriv->EntryMinUndecoratedSmoothedPWDB == 0)) 1147 pdmpriv->MinUndecoratedPWDBForDM = 0; 1148 if (check_fwstate(pmlmepriv, _FW_LINKED) == true) /* Default port */ 1149 pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; 1150 else /* associated entry pwdb */ 1151 pdmpriv->MinUndecoratedPWDBForDM = pdmpriv->EntryMinUndecoratedSmoothedPWDB; 1152} 1153 1154void odm_RSSIMonitorCheckCE(struct odm_dm_struct *pDM_Odm) 1155{ 1156 struct adapter *Adapter = pDM_Odm->Adapter; 1157 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1158 struct dm_priv *pdmpriv = &pHalData->dmpriv; 1159 int i; 1160 int tmpEntryMaxPWDB = 0, tmpEntryMinPWDB = 0xff; 1161 u8 sta_cnt = 0; 1162 u32 PWDB_rssi[NUM_STA] = {0};/* 0~15]:MACID, [16~31]:PWDB_rssi */ 1163 struct sta_info *psta; 1164 u8 bcast_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 1165 1166 if (!check_fwstate(&Adapter->mlmepriv, _FW_LINKED)) 1167 return; 1168 1169 for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++) { 1170 psta = pDM_Odm->pODM_StaInfo[i]; 1171 if (IS_STA_VALID(psta) && 1172 (psta->state & WIFI_ASOC_STATE) && 1173 memcmp(psta->hwaddr, bcast_addr, ETH_ALEN) && 1174 memcmp(psta->hwaddr, myid(&Adapter->eeprompriv), ETH_ALEN)) { 1175 if (psta->rssi_stat.UndecoratedSmoothedPWDB < tmpEntryMinPWDB) 1176 tmpEntryMinPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; 1177 1178 if (psta->rssi_stat.UndecoratedSmoothedPWDB > tmpEntryMaxPWDB) 1179 tmpEntryMaxPWDB = psta->rssi_stat.UndecoratedSmoothedPWDB; 1180 if (psta->rssi_stat.UndecoratedSmoothedPWDB != (-1)) 1181 PWDB_rssi[sta_cnt++] = (psta->mac_id | (psta->rssi_stat.UndecoratedSmoothedPWDB<<16)); 1182 } 1183 } 1184 1185 for (i = 0; i < sta_cnt; i++) { 1186 if (PWDB_rssi[i] != (0)) { 1187 if (pHalData->fw_ractrl) { 1188 /* Report every sta's RSSI to FW */ 1189 } else { 1190 ODM_RA_SetRSSI_8188E( 1191 &(pHalData->odmpriv), (PWDB_rssi[i]&0xFF), (u8)((PWDB_rssi[i]>>16) & 0xFF)); 1192 } 1193 } 1194 } 1195 1196 if (tmpEntryMaxPWDB != 0) /* If associated entry is found */ 1197 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = tmpEntryMaxPWDB; 1198 else 1199 pdmpriv->EntryMaxUndecoratedSmoothedPWDB = 0; 1200 1201 if (tmpEntryMinPWDB != 0xff) /* If associated entry is found */ 1202 pdmpriv->EntryMinUndecoratedSmoothedPWDB = tmpEntryMinPWDB; 1203 else 1204 pdmpriv->EntryMinUndecoratedSmoothedPWDB = 0; 1205 1206 FindMinimumRSSI(Adapter); 1207 ODM_CmnInfoUpdate(&pHalData->odmpriv , ODM_CMNINFO_RSSI_MIN, pdmpriv->MinUndecoratedPWDBForDM); 1208} 1209 1210/* 3============================================================ */ 1211/* 3 Tx Power Tracking */ 1212/* 3============================================================ */ 1213 1214void odm_TXPowerTrackingInit(struct odm_dm_struct *pDM_Odm) 1215{ 1216 odm_TXPowerTrackingThermalMeterInit(pDM_Odm); 1217} 1218 1219void odm_TXPowerTrackingThermalMeterInit(struct odm_dm_struct *pDM_Odm) 1220{ 1221 pDM_Odm->RFCalibrateInfo.bTXPowerTracking = true; 1222 pDM_Odm->RFCalibrateInfo.TXPowercount = 0; 1223 pDM_Odm->RFCalibrateInfo.bTXPowerTrackingInit = false; 1224 if (*(pDM_Odm->mp_mode) != 1) 1225 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; 1226 MSG_88E("pDM_Odm TxPowerTrackControl = %d\n", pDM_Odm->RFCalibrateInfo.TxPowerTrackControl); 1227 1228 pDM_Odm->RFCalibrateInfo.TxPowerTrackControl = true; 1229} 1230 1231void ODM_TXPowerTrackingCheck(struct odm_dm_struct *pDM_Odm) 1232{ 1233 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1234 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1235 /* HW dynamic mechanism. */ 1236 odm_TXPowerTrackingCheckCE(pDM_Odm); 1237} 1238 1239void odm_TXPowerTrackingCheckCE(struct odm_dm_struct *pDM_Odm) 1240{ 1241 struct adapter *Adapter = pDM_Odm->Adapter; 1242 1243 if (!(pDM_Odm->SupportAbility & ODM_RF_TX_PWR_TRACK)) 1244 return; 1245 1246 if (!pDM_Odm->RFCalibrateInfo.TM_Trigger) { /* at least delay 1 sec */ 1247 phy_set_rf_reg(Adapter, RF_PATH_A, RF_T_METER_88E, BIT17 | BIT16, 0x03); 1248 1249 pDM_Odm->RFCalibrateInfo.TM_Trigger = 1; 1250 return; 1251 } else { 1252 rtl88eu_dm_txpower_tracking_callback_thermalmeter(Adapter); 1253 pDM_Odm->RFCalibrateInfo.TM_Trigger = 0; 1254 } 1255} 1256 1257/* 3============================================================ */ 1258/* 3 SW Antenna Diversity */ 1259/* 3============================================================ */ 1260 1261void odm_InitHybridAntDiv(struct odm_dm_struct *pDM_Odm) 1262{ 1263 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { 1264 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); 1265 return; 1266 } 1267 1268 rtl88eu_dm_antenna_div_init(pDM_Odm); 1269} 1270 1271void odm_HwAntDiv(struct odm_dm_struct *pDM_Odm) 1272{ 1273 if (!(pDM_Odm->SupportAbility & ODM_BB_ANT_DIV)) { 1274 ODM_RT_TRACE(pDM_Odm, ODM_COMP_ANT_DIV, ODM_DBG_LOUD, ("Return: Not Support HW AntDiv\n")); 1275 return; 1276 } 1277 1278 ODM_AntennaDiversity_88E(pDM_Odm); 1279} 1280 1281/* EDCA Turbo */ 1282void ODM_EdcaTurboInit(struct odm_dm_struct *pDM_Odm) 1283{ 1284 struct adapter *Adapter = pDM_Odm->Adapter; 1285 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; 1286 pDM_Odm->DM_EDCA_Table.bIsCurRDLState = false; 1287 Adapter->recvpriv.bIsAnyNonBEPkts = false; 1288 1289 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VO PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VO_PARAM))); 1290 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial VI PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_VI_PARAM))); 1291 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BE PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BE_PARAM))); 1292 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("Orginial BK PARAM: 0x%x\n", usb_read32(Adapter, ODM_EDCA_BK_PARAM))); 1293} /* ODM_InitEdcaTurbo */ 1294 1295void odm_EdcaTurboCheck(struct odm_dm_struct *pDM_Odm) 1296{ 1297 /* 2011/09/29 MH In HW integration first stage, we provide 4 different handle to operate */ 1298 /* at the same time. In the stage2/3, we need to prive universal interface and merge all */ 1299 /* HW dynamic mechanism. */ 1300 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("odm_EdcaTurboCheck========================>\n")); 1301 1302 if (!(pDM_Odm->SupportAbility & ODM_MAC_EDCA_TURBO)) 1303 return; 1304 1305 odm_EdcaTurboCheckCE(pDM_Odm); 1306 ODM_RT_TRACE(pDM_Odm, ODM_COMP_EDCA_TURBO, ODM_DBG_LOUD, ("<========================odm_EdcaTurboCheck\n")); 1307} /* odm_CheckEdcaTurbo */ 1308 1309void odm_EdcaTurboCheckCE(struct odm_dm_struct *pDM_Odm) 1310{ 1311 struct adapter *Adapter = pDM_Odm->Adapter; 1312 u32 trafficIndex; 1313 u32 edca_param; 1314 u64 cur_tx_bytes = 0; 1315 u64 cur_rx_bytes = 0; 1316 u8 bbtchange = false; 1317 struct hal_data_8188e *pHalData = GET_HAL_DATA(Adapter); 1318 struct xmit_priv *pxmitpriv = &(Adapter->xmitpriv); 1319 struct recv_priv *precvpriv = &(Adapter->recvpriv); 1320 struct registry_priv *pregpriv = &Adapter->registrypriv; 1321 struct mlme_ext_priv *pmlmeext = &(Adapter->mlmeextpriv); 1322 struct mlme_ext_info *pmlmeinfo = &(pmlmeext->mlmext_info); 1323 1324 if ((pregpriv->wifi_spec == 1))/* (pmlmeinfo->HT_enable == 0)) */ 1325 goto dm_CheckEdcaTurbo_EXIT; 1326 1327 if (pmlmeinfo->assoc_AP_vendor >= HT_IOT_PEER_MAX) 1328 goto dm_CheckEdcaTurbo_EXIT; 1329 1330 /* Check if the status needs to be changed. */ 1331 if ((bbtchange) || (!precvpriv->bIsAnyNonBEPkts)) { 1332 cur_tx_bytes = pxmitpriv->tx_bytes - pxmitpriv->last_tx_bytes; 1333 cur_rx_bytes = precvpriv->rx_bytes - precvpriv->last_rx_bytes; 1334 1335 /* traffic, TX or RX */ 1336 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_RALINK) || 1337 (pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_ATHEROS)) { 1338 if (cur_tx_bytes > (cur_rx_bytes << 2)) { 1339 /* Uplink TP is present. */ 1340 trafficIndex = UP_LINK; 1341 } else { 1342 /* Balance TP is present. */ 1343 trafficIndex = DOWN_LINK; 1344 } 1345 } else { 1346 if (cur_rx_bytes > (cur_tx_bytes << 2)) { 1347 /* Downlink TP is present. */ 1348 trafficIndex = DOWN_LINK; 1349 } else { 1350 /* Balance TP is present. */ 1351 trafficIndex = UP_LINK; 1352 } 1353 } 1354 1355 if ((pDM_Odm->DM_EDCA_Table.prv_traffic_idx != trafficIndex) || (!pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA)) { 1356 if ((pmlmeinfo->assoc_AP_vendor == HT_IOT_PEER_CISCO) && (pmlmeext->cur_wireless_mode & WIRELESS_11_24N)) 1357 edca_param = EDCAParam[pmlmeinfo->assoc_AP_vendor][trafficIndex]; 1358 else 1359 edca_param = EDCAParam[HT_IOT_PEER_UNKNOWN][trafficIndex]; 1360 1361 usb_write32(Adapter, REG_EDCA_BE_PARAM, edca_param); 1362 1363 pDM_Odm->DM_EDCA_Table.prv_traffic_idx = trafficIndex; 1364 } 1365 1366 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = true; 1367 } else { 1368 /* Turn Off EDCA turbo here. */ 1369 /* Restore original EDCA according to the declaration of AP. */ 1370 if (pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA) { 1371 usb_write32(Adapter, REG_EDCA_BE_PARAM, pHalData->AcParam_BE); 1372 pDM_Odm->DM_EDCA_Table.bCurrentTurboEDCA = false; 1373 } 1374 } 1375 1376dm_CheckEdcaTurbo_EXIT: 1377 /* Set variables for next time. */ 1378 precvpriv->bIsAnyNonBEPkts = false; 1379 pxmitpriv->last_tx_bytes = pxmitpriv->tx_bytes; 1380 precvpriv->last_rx_bytes = precvpriv->rx_bytes; 1381} 1382