11da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* 21da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Driver for CPM (SCC/SMC) serial ports 31da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 41da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * Copyright (C) 2004 Freescale Semiconductor, Inc. 51da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds * 66e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug * 2006 (c) MontaVista Software, Inc. 70d8440657ef184907ac5add0b59c771ee8e8a77fKumar Gala * Vitaly Bordug <vbordug@ru.mvista.com> 86e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug * 96e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug * This file is licensed under the terms of the GNU General Public License 106e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug * version 2. This program is licensed "as is" without any warranty of any 116e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug * kind, whether express or implied. 126e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug * 131da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds */ 141da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#ifndef CPM_UART_H 151da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define CPM_UART_H 161da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 17e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#include <linux/platform_device.h> 18e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#include <linux/fs_uart_pd.h> 191da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 201da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#if defined(CONFIG_CPM2) 211da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "cpm_uart_cpm2.h" 221da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#elif defined(CONFIG_8xx) 231da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#include "cpm_uart_cpm1.h" 241da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif 251da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 261da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SERIAL_CPM_MAJOR 204 271da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define SERIAL_CPM_MINOR 46 281da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 290d8440657ef184907ac5add0b59c771ee8e8a77fKumar Gala#define IS_SMC(pinfo) (pinfo->flags & FLAG_SMC) 301da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define IS_DISCARDING(pinfo) (pinfo->flags & FLAG_DISCARDING) 311da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FLAG_DISCARDING 0x00000004 /* when set, don't discard */ 321da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FLAG_SMC 0x00000002 331da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define FLAG_CONSOLE 0x00000001 341da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 35e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#define UART_SMC1 fsid_smc1_uart 36e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#define UART_SMC2 fsid_smc2_uart 37e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#define UART_SCC1 fsid_scc1_uart 38e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#define UART_SCC2 fsid_scc2_uart 39e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#define UART_SCC3 fsid_scc3_uart 40e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#define UART_SCC4 fsid_scc4_uart 411da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 42e27987cddd8db3a72a0f4734b5d94d06c7677323Vitaly Bordug#define UART_NR fs_uart_nr 431da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 441da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RX_NUM_FIFO 4 451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define RX_BUF_SIZE 32 461da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_NUM_FIFO 4 471da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#define TX_BUF_SIZE 32 481da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 49311c46273f0e8b140d4cc68e13128cbc22114807Kumar Gala#define SCC_WAIT_CLOSING 100 50311c46273f0e8b140d4cc68e13128cbc22114807Kumar Gala 517485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart#define GPIO_CTS 0 527485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart#define GPIO_RTS 1 537485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart#define GPIO_DCD 2 547485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart#define GPIO_DSR 3 557485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart#define GPIO_DTR 4 567485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart#define GPIO_RI 5 577485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart 587485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart#define NUM_GPIOS (GPIO_RI+1) 597485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart 601da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsstruct uart_cpm_port { 611da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds struct uart_port port; 62311c46273f0e8b140d4cc68e13128cbc22114807Kumar Gala u16 rx_nrfifos; 631da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u16 rx_fifosize; 64311c46273f0e8b140d4cc68e13128cbc22114807Kumar Gala u16 tx_nrfifos; 651da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u16 tx_fifosize; 66c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood smc_t __iomem *smcp; 67c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood smc_uart_t __iomem *smcup; 68c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood scc_t __iomem *sccp; 69c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood scc_uart_t __iomem *sccup; 70c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood cbd_t __iomem *rx_bd_base; 71c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood cbd_t __iomem *rx_cur; 72c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood cbd_t __iomem *tx_bd_base; 73c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood cbd_t __iomem *tx_cur; 741da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char *tx_buf; 751da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds unsigned char *rx_buf; 761da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u32 flags; 7780776554b6c93cf828ddc702010c6a189aa0d0e9Laurent Pinchart struct clk *clk; 781da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds u8 brg; 791da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds uint dp_addr; 800d8440657ef184907ac5add0b59c771ee8e8a77fKumar Gala void *mem_addr; 811da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds dma_addr_t dma_addr; 8209b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug u32 mem_size; 83311c46273f0e8b140d4cc68e13128cbc22114807Kumar Gala /* wait on close if needed */ 840d8440657ef184907ac5add0b59c771ee8e8a77fKumar Gala int wait_closing; 857ae870368d198affa249ed3382a8a288167ce885Scott Wood /* value to combine with opcode to form cpm command */ 867ae870368d198affa249ed3382a8a288167ce885Scott Wood u32 command; 877485d26b7e13ee8ff82adb271ac90a996c1fe830Laurent Pinchart int gpios[NUM_GPIOS]; 881da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds}; 891da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 901da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern int cpm_uart_nr; 911da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsextern struct uart_cpm_port cpm_uart_ports[UART_NR]; 921da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 931da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds/* these are located in their respective files */ 947ae870368d198affa249ed3382a8a288167ce885Scott Woodvoid cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd); 95d464df2667cf181419604e656773f80996cf0470Laurent Pinchartvoid __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, 96d464df2667cf181419604e656773f80996cf0470Laurent Pinchart struct device_node *np); 97d464df2667cf181419604e656773f80996cf0470Laurent Pinchartvoid cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram); 9832a56ebb24f23da1bbaf24292acf85b6c04526abKumar Galaint cpm_uart_init_portdesc(void); 991da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsint cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con); 1001da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid cpm_uart_freebuf(struct uart_cpm_port *pinfo); 1011da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 1021da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid smc1_lineif(struct uart_cpm_port *pinfo); 1031da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid smc2_lineif(struct uart_cpm_port *pinfo); 1041da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid scc1_lineif(struct uart_cpm_port *pinfo); 1051da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid scc2_lineif(struct uart_cpm_port *pinfo); 1061da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid scc3_lineif(struct uart_cpm_port *pinfo); 1071da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvaldsvoid scc4_lineif(struct uart_cpm_port *pinfo); 1081da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds 10909b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug/* 11009b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug virtual to phys transtalion 11109b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug*/ 112c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Woodstatic inline unsigned long cpu2cpm_addr(void *addr, 113c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood struct uart_cpm_port *pinfo) 11409b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug{ 11509b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug int offset; 11609b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug u32 val = (u32)addr; 117c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood u32 mem = (u32)pinfo->mem_addr; 11809b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug /* sane check */ 119c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood if (likely(val >= mem && val < mem + pinfo->mem_size)) { 120c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood offset = val - mem; 121c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood return pinfo->dma_addr + offset; 12209b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug } 1236e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug /* something nasty happened */ 1246e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug BUG(); 12509b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug return 0; 12609b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug} 12709b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug 128c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Woodstatic inline void *cpm2cpu_addr(unsigned long addr, 129c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood struct uart_cpm_port *pinfo) 13009b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug{ 13109b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug int offset; 13209b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug u32 val = addr; 133c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood u32 dma = (u32)pinfo->dma_addr; 13409b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug /* sane check */ 135c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood if (likely(val >= dma && val < dma + pinfo->mem_size)) { 136c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood offset = val - dma; 137c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood return pinfo->mem_addr + offset; 13809b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug } 1396e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug /* something nasty happened */ 1406e1976961c9bd9a3dc368139fab1883961efc879Vitaly Bordug BUG(); 141c1dcfd9d199043ff0e8805484a736ad36d9dd04aScott Wood return NULL; 14209b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug} 14309b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug 14409b03b6c29638eb5c79b02e585cb1b20d91a8ea0Vitaly Bordug 1451da177e4c3f41524e886b7f1b8a0c1fc7321cacLinus Torvalds#endif /* CPM_UART_H */ 146