max3100.c revision d6c53c0e9bd0a83f9f9ddbc9fd80141a54d83896
1/*
2 *
3 *  Copyright (C) 2008 Christian Pellegrin <chripell@evolware.org>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 *
11 * Notes: the MAX3100 doesn't provide an interrupt on CTS so we have
12 * to use polling for flow control. TX empty IRQ is unusable, since
13 * writing conf clears FIFO buffer and we cannot have this interrupt
14 * always asking us for attention.
15 *
16 * Example platform data:
17
18 static struct plat_max3100 max3100_plat_data = {
19 .loopback = 0,
20 .crystal = 0,
21 .poll_time = 100,
22 };
23
24 static struct spi_board_info spi_board_info[] = {
25 {
26 .modalias	= "max3100",
27 .platform_data	= &max3100_plat_data,
28 .irq		= IRQ_EINT12,
29 .max_speed_hz	= 5*1000*1000,
30 .chip_select	= 0,
31 },
32 };
33
34 * The initial minor number is 209 in the low-density serial port:
35 * mknod /dev/ttyMAX0 c 204 209
36 */
37
38#define MAX3100_MAJOR 204
39#define MAX3100_MINOR 209
40/* 4 MAX3100s should be enough for everyone */
41#define MAX_MAX3100 4
42
43#include <linux/delay.h>
44#include <linux/slab.h>
45#include <linux/device.h>
46#include <linux/module.h>
47#include <linux/serial_core.h>
48#include <linux/serial.h>
49#include <linux/spi/spi.h>
50#include <linux/freezer.h>
51#include <linux/tty.h>
52#include <linux/tty_flip.h>
53
54#include <linux/serial_max3100.h>
55
56#define MAX3100_C    (1<<14)
57#define MAX3100_D    (0<<14)
58#define MAX3100_W    (1<<15)
59#define MAX3100_RX   (0<<15)
60
61#define MAX3100_WC   (MAX3100_W  | MAX3100_C)
62#define MAX3100_RC   (MAX3100_RX | MAX3100_C)
63#define MAX3100_WD   (MAX3100_W  | MAX3100_D)
64#define MAX3100_RD   (MAX3100_RX | MAX3100_D)
65#define MAX3100_CMD  (3 << 14)
66
67#define MAX3100_T    (1<<14)
68#define MAX3100_R    (1<<15)
69
70#define MAX3100_FEN  (1<<13)
71#define MAX3100_SHDN (1<<12)
72#define MAX3100_TM   (1<<11)
73#define MAX3100_RM   (1<<10)
74#define MAX3100_PM   (1<<9)
75#define MAX3100_RAM  (1<<8)
76#define MAX3100_IR   (1<<7)
77#define MAX3100_ST   (1<<6)
78#define MAX3100_PE   (1<<5)
79#define MAX3100_L    (1<<4)
80#define MAX3100_BAUD (0xf)
81
82#define MAX3100_TE   (1<<10)
83#define MAX3100_RAFE (1<<10)
84#define MAX3100_RTS  (1<<9)
85#define MAX3100_CTS  (1<<9)
86#define MAX3100_PT   (1<<8)
87#define MAX3100_DATA (0xff)
88
89#define MAX3100_RT   (MAX3100_R | MAX3100_T)
90#define MAX3100_RTC  (MAX3100_RT | MAX3100_CTS | MAX3100_RAFE)
91
92/* the following simulate a status reg for ignore_status_mask */
93#define MAX3100_STATUS_PE 1
94#define MAX3100_STATUS_FE 2
95#define MAX3100_STATUS_OE 4
96
97struct max3100_port {
98	struct uart_port port;
99	struct spi_device *spi;
100
101	int cts;	        /* last CTS received for flow ctrl */
102	int tx_empty;		/* last TX empty bit */
103
104	spinlock_t conf_lock;	/* shared data */
105	int conf_commit;	/* need to make changes */
106	int conf;		/* configuration for the MAX31000
107				 * (bits 0-7, bits 8-11 are irqs) */
108	int rts_commit;	        /* need to change rts */
109	int rts;		/* rts status */
110	int baud;		/* current baud rate */
111
112	int parity;		/* keeps track if we should send parity */
113#define MAX3100_PARITY_ON 1
114#define MAX3100_PARITY_ODD 2
115#define MAX3100_7BIT 4
116	int rx_enabled;	        /* if we should rx chars */
117
118	int irq;		/* irq assigned to the max3100 */
119
120	int minor;		/* minor number */
121	int crystal;		/* 1 if 3.6864Mhz crystal 0 for 1.8432 */
122	int loopback;		/* 1 if we are in loopback mode */
123
124	/* for handling irqs: need workqueue since we do spi_sync */
125	struct workqueue_struct *workqueue;
126	struct work_struct work;
127	/* set to 1 to make the workhandler exit as soon as possible */
128	int  force_end_work;
129	/* need to know we are suspending to avoid deadlock on workqueue */
130	int suspending;
131
132	/* hook for suspending MAX3100 via dedicated pin */
133	void (*max3100_hw_suspend) (int suspend);
134
135	/* poll time (in ms) for ctrl lines */
136	int poll_time;
137	/* and its timer */
138	struct timer_list	timer;
139};
140
141static struct max3100_port *max3100s[MAX_MAX3100]; /* the chips */
142static DEFINE_MUTEX(max3100s_lock);		   /* race on probe */
143
144static int max3100_do_parity(struct max3100_port *s, u16 c)
145{
146	int parity;
147
148	if (s->parity & MAX3100_PARITY_ODD)
149		parity = 1;
150	else
151		parity = 0;
152
153	if (s->parity & MAX3100_7BIT)
154		c &= 0x7f;
155	else
156		c &= 0xff;
157
158	parity = parity ^ (hweight8(c) & 1);
159	return parity;
160}
161
162static int max3100_check_parity(struct max3100_port *s, u16 c)
163{
164	return max3100_do_parity(s, c) == ((c >> 8) & 1);
165}
166
167static void max3100_calc_parity(struct max3100_port *s, u16 *c)
168{
169	if (s->parity & MAX3100_7BIT)
170		*c &= 0x7f;
171	else
172		*c &= 0xff;
173
174	if (s->parity & MAX3100_PARITY_ON)
175		*c |= max3100_do_parity(s, *c) << 8;
176}
177
178static void max3100_work(struct work_struct *w);
179
180static void max3100_dowork(struct max3100_port *s)
181{
182	if (!s->force_end_work && !work_pending(&s->work) &&
183	    !freezing(current) && !s->suspending)
184		queue_work(s->workqueue, &s->work);
185}
186
187static void max3100_timeout(unsigned long data)
188{
189	struct max3100_port *s = (struct max3100_port *)data;
190
191	if (s->port.state) {
192		max3100_dowork(s);
193		mod_timer(&s->timer, jiffies + s->poll_time);
194	}
195}
196
197static int max3100_sr(struct max3100_port *s, u16 tx, u16 *rx)
198{
199	struct spi_message message;
200	u16 etx, erx;
201	int status;
202	struct spi_transfer tran = {
203		.tx_buf = &etx,
204		.rx_buf = &erx,
205		.len = 2,
206	};
207
208	etx = cpu_to_be16(tx);
209	spi_message_init(&message);
210	spi_message_add_tail(&tran, &message);
211	status = spi_sync(s->spi, &message);
212	if (status) {
213		dev_warn(&s->spi->dev, "error while calling spi_sync\n");
214		return -EIO;
215	}
216	*rx = be16_to_cpu(erx);
217	s->tx_empty = (*rx & MAX3100_T) > 0;
218	dev_dbg(&s->spi->dev, "%04x - %04x\n", tx, *rx);
219	return 0;
220}
221
222static int max3100_handlerx(struct max3100_port *s, u16 rx)
223{
224	unsigned int ch, flg, status = 0;
225	int ret = 0, cts;
226
227	if (rx & MAX3100_R && s->rx_enabled) {
228		dev_dbg(&s->spi->dev, "%s\n", __func__);
229		ch = rx & (s->parity & MAX3100_7BIT ? 0x7f : 0xff);
230		if (rx & MAX3100_RAFE) {
231			s->port.icount.frame++;
232			flg = TTY_FRAME;
233			status |= MAX3100_STATUS_FE;
234		} else {
235			if (s->parity & MAX3100_PARITY_ON) {
236				if (max3100_check_parity(s, rx)) {
237					s->port.icount.rx++;
238					flg = TTY_NORMAL;
239				} else {
240					s->port.icount.parity++;
241					flg = TTY_PARITY;
242					status |= MAX3100_STATUS_PE;
243				}
244			} else {
245				s->port.icount.rx++;
246				flg = TTY_NORMAL;
247			}
248		}
249		uart_insert_char(&s->port, status, MAX3100_STATUS_OE, ch, flg);
250		ret = 1;
251	}
252
253	cts = (rx & MAX3100_CTS) > 0;
254	if (s->cts != cts) {
255		s->cts = cts;
256		uart_handle_cts_change(&s->port, cts ? TIOCM_CTS : 0);
257	}
258
259	return ret;
260}
261
262static void max3100_work(struct work_struct *w)
263{
264	struct max3100_port *s = container_of(w, struct max3100_port, work);
265	int rxchars;
266	u16 tx, rx;
267	int conf, cconf, rts, crts;
268	struct circ_buf *xmit = &s->port.state->xmit;
269
270	dev_dbg(&s->spi->dev, "%s\n", __func__);
271
272	rxchars = 0;
273	do {
274		spin_lock(&s->conf_lock);
275		conf = s->conf;
276		cconf = s->conf_commit;
277		s->conf_commit = 0;
278		rts = s->rts;
279		crts = s->rts_commit;
280		s->rts_commit = 0;
281		spin_unlock(&s->conf_lock);
282		if (cconf)
283			max3100_sr(s, MAX3100_WC | conf, &rx);
284		if (crts) {
285			max3100_sr(s, MAX3100_WD | MAX3100_TE |
286				   (s->rts ? MAX3100_RTS : 0), &rx);
287			rxchars += max3100_handlerx(s, rx);
288		}
289
290		max3100_sr(s, MAX3100_RD, &rx);
291		rxchars += max3100_handlerx(s, rx);
292
293		if (rx & MAX3100_T) {
294			tx = 0xffff;
295			if (s->port.x_char) {
296				tx = s->port.x_char;
297				s->port.icount.tx++;
298				s->port.x_char = 0;
299			} else if (!uart_circ_empty(xmit) &&
300				   !uart_tx_stopped(&s->port)) {
301				tx = xmit->buf[xmit->tail];
302				xmit->tail = (xmit->tail + 1) &
303					(UART_XMIT_SIZE - 1);
304				s->port.icount.tx++;
305			}
306			if (tx != 0xffff) {
307				max3100_calc_parity(s, &tx);
308				tx |= MAX3100_WD | (s->rts ? MAX3100_RTS : 0);
309				max3100_sr(s, tx, &rx);
310				rxchars += max3100_handlerx(s, rx);
311			}
312		}
313
314		if (rxchars > 16 && s->port.state->port.tty != NULL) {
315			tty_flip_buffer_push(s->port.state->port.tty);
316			rxchars = 0;
317		}
318		if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
319			uart_write_wakeup(&s->port);
320
321	} while (!s->force_end_work &&
322		 !freezing(current) &&
323		 ((rx & MAX3100_R) ||
324		  (!uart_circ_empty(xmit) &&
325		   !uart_tx_stopped(&s->port))));
326
327	if (rxchars > 0 && s->port.state->port.tty != NULL)
328		tty_flip_buffer_push(s->port.state->port.tty);
329}
330
331static irqreturn_t max3100_irq(int irqno, void *dev_id)
332{
333	struct max3100_port *s = dev_id;
334
335	dev_dbg(&s->spi->dev, "%s\n", __func__);
336
337	max3100_dowork(s);
338	return IRQ_HANDLED;
339}
340
341static void max3100_enable_ms(struct uart_port *port)
342{
343	struct max3100_port *s = container_of(port,
344					      struct max3100_port,
345					      port);
346
347	if (s->poll_time > 0)
348		mod_timer(&s->timer, jiffies);
349	dev_dbg(&s->spi->dev, "%s\n", __func__);
350}
351
352static void max3100_start_tx(struct uart_port *port)
353{
354	struct max3100_port *s = container_of(port,
355					      struct max3100_port,
356					      port);
357
358	dev_dbg(&s->spi->dev, "%s\n", __func__);
359
360	max3100_dowork(s);
361}
362
363static void max3100_stop_rx(struct uart_port *port)
364{
365	struct max3100_port *s = container_of(port,
366					      struct max3100_port,
367					      port);
368
369	dev_dbg(&s->spi->dev, "%s\n", __func__);
370
371	s->rx_enabled = 0;
372	spin_lock(&s->conf_lock);
373	s->conf &= ~MAX3100_RM;
374	s->conf_commit = 1;
375	spin_unlock(&s->conf_lock);
376	max3100_dowork(s);
377}
378
379static unsigned int max3100_tx_empty(struct uart_port *port)
380{
381	struct max3100_port *s = container_of(port,
382					      struct max3100_port,
383					      port);
384
385	dev_dbg(&s->spi->dev, "%s\n", __func__);
386
387	/* may not be truly up-to-date */
388	max3100_dowork(s);
389	return s->tx_empty;
390}
391
392static unsigned int max3100_get_mctrl(struct uart_port *port)
393{
394	struct max3100_port *s = container_of(port,
395					      struct max3100_port,
396					      port);
397
398	dev_dbg(&s->spi->dev, "%s\n", __func__);
399
400	/* may not be truly up-to-date */
401	max3100_dowork(s);
402	/* always assert DCD and DSR since these lines are not wired */
403	return (s->cts ? TIOCM_CTS : 0) | TIOCM_DSR | TIOCM_CAR;
404}
405
406static void max3100_set_mctrl(struct uart_port *port, unsigned int mctrl)
407{
408	struct max3100_port *s = container_of(port,
409					      struct max3100_port,
410					      port);
411	int rts;
412
413	dev_dbg(&s->spi->dev, "%s\n", __func__);
414
415	rts = (mctrl & TIOCM_RTS) > 0;
416
417	spin_lock(&s->conf_lock);
418	if (s->rts != rts) {
419		s->rts = rts;
420		s->rts_commit = 1;
421		max3100_dowork(s);
422	}
423	spin_unlock(&s->conf_lock);
424}
425
426static void
427max3100_set_termios(struct uart_port *port, struct ktermios *termios,
428		    struct ktermios *old)
429{
430	struct max3100_port *s = container_of(port,
431					      struct max3100_port,
432					      port);
433	int baud = 0;
434	unsigned cflag;
435	u32 param_new, param_mask, parity = 0;
436
437	dev_dbg(&s->spi->dev, "%s\n", __func__);
438
439	cflag = termios->c_cflag;
440	param_new = 0;
441	param_mask = 0;
442
443	baud = tty_termios_baud_rate(termios);
444	param_new = s->conf & MAX3100_BAUD;
445	switch (baud) {
446	case 300:
447		if (s->crystal)
448			baud = s->baud;
449		else
450			param_new = 15;
451		break;
452	case 600:
453		param_new = 14 + s->crystal;
454		break;
455	case 1200:
456		param_new = 13 + s->crystal;
457		break;
458	case 2400:
459		param_new = 12 + s->crystal;
460		break;
461	case 4800:
462		param_new = 11 + s->crystal;
463		break;
464	case 9600:
465		param_new = 10 + s->crystal;
466		break;
467	case 19200:
468		param_new = 9 + s->crystal;
469		break;
470	case 38400:
471		param_new = 8 + s->crystal;
472		break;
473	case 57600:
474		param_new = 1 + s->crystal;
475		break;
476	case 115200:
477		param_new = 0 + s->crystal;
478		break;
479	case 230400:
480		if (s->crystal)
481			param_new = 0;
482		else
483			baud = s->baud;
484		break;
485	default:
486		baud = s->baud;
487	}
488	tty_termios_encode_baud_rate(termios, baud, baud);
489	s->baud = baud;
490	param_mask |= MAX3100_BAUD;
491
492	if ((cflag & CSIZE) == CS8) {
493		param_new &= ~MAX3100_L;
494		parity &= ~MAX3100_7BIT;
495	} else {
496		param_new |= MAX3100_L;
497		parity |= MAX3100_7BIT;
498		cflag = (cflag & ~CSIZE) | CS7;
499	}
500	param_mask |= MAX3100_L;
501
502	if (cflag & CSTOPB)
503		param_new |= MAX3100_ST;
504	else
505		param_new &= ~MAX3100_ST;
506	param_mask |= MAX3100_ST;
507
508	if (cflag & PARENB) {
509		param_new |= MAX3100_PE;
510		parity |= MAX3100_PARITY_ON;
511	} else {
512		param_new &= ~MAX3100_PE;
513		parity &= ~MAX3100_PARITY_ON;
514	}
515	param_mask |= MAX3100_PE;
516
517	if (cflag & PARODD)
518		parity |= MAX3100_PARITY_ODD;
519	else
520		parity &= ~MAX3100_PARITY_ODD;
521
522	/* mask termios capabilities we don't support */
523	cflag &= ~CMSPAR;
524	termios->c_cflag = cflag;
525
526	s->port.ignore_status_mask = 0;
527	if (termios->c_iflag & IGNPAR)
528		s->port.ignore_status_mask |=
529			MAX3100_STATUS_PE | MAX3100_STATUS_FE |
530			MAX3100_STATUS_OE;
531
532	/* we are sending char from a workqueue so enable */
533	s->port.state->port.low_latency = 1;
534
535	if (s->poll_time > 0)
536		del_timer_sync(&s->timer);
537
538	uart_update_timeout(port, termios->c_cflag, baud);
539
540	spin_lock(&s->conf_lock);
541	s->conf = (s->conf & ~param_mask) | (param_new & param_mask);
542	s->conf_commit = 1;
543	s->parity = parity;
544	spin_unlock(&s->conf_lock);
545	max3100_dowork(s);
546
547	if (UART_ENABLE_MS(&s->port, termios->c_cflag))
548		max3100_enable_ms(&s->port);
549}
550
551static void max3100_shutdown(struct uart_port *port)
552{
553	struct max3100_port *s = container_of(port,
554					      struct max3100_port,
555					      port);
556
557	dev_dbg(&s->spi->dev, "%s\n", __func__);
558
559	if (s->suspending)
560		return;
561
562	s->force_end_work = 1;
563
564	if (s->poll_time > 0)
565		del_timer_sync(&s->timer);
566
567	if (s->workqueue) {
568		flush_workqueue(s->workqueue);
569		destroy_workqueue(s->workqueue);
570		s->workqueue = NULL;
571	}
572	if (s->irq)
573		free_irq(s->irq, s);
574
575	/* set shutdown mode to save power */
576	if (s->max3100_hw_suspend)
577		s->max3100_hw_suspend(1);
578	else  {
579		u16 tx, rx;
580
581		tx = MAX3100_WC | MAX3100_SHDN;
582		max3100_sr(s, tx, &rx);
583	}
584}
585
586static int max3100_startup(struct uart_port *port)
587{
588	struct max3100_port *s = container_of(port,
589					      struct max3100_port,
590					      port);
591	char b[12];
592
593	dev_dbg(&s->spi->dev, "%s\n", __func__);
594
595	s->conf = MAX3100_RM;
596	s->baud = s->crystal ? 230400 : 115200;
597	s->rx_enabled = 1;
598
599	if (s->suspending)
600		return 0;
601
602	s->force_end_work = 0;
603	s->parity = 0;
604	s->rts = 0;
605
606	sprintf(b, "max3100-%d", s->minor);
607	s->workqueue = create_freezable_workqueue(b);
608	if (!s->workqueue) {
609		dev_warn(&s->spi->dev, "cannot create workqueue\n");
610		return -EBUSY;
611	}
612	INIT_WORK(&s->work, max3100_work);
613
614	if (request_irq(s->irq, max3100_irq,
615			IRQF_TRIGGER_FALLING, "max3100", s) < 0) {
616		dev_warn(&s->spi->dev, "cannot allocate irq %d\n", s->irq);
617		s->irq = 0;
618		destroy_workqueue(s->workqueue);
619		s->workqueue = NULL;
620		return -EBUSY;
621	}
622
623	if (s->loopback) {
624		u16 tx, rx;
625		tx = 0x4001;
626		max3100_sr(s, tx, &rx);
627	}
628
629	if (s->max3100_hw_suspend)
630		s->max3100_hw_suspend(0);
631	s->conf_commit = 1;
632	max3100_dowork(s);
633	/* wait for clock to settle */
634	msleep(50);
635
636	max3100_enable_ms(&s->port);
637
638	return 0;
639}
640
641static const char *max3100_type(struct uart_port *port)
642{
643	struct max3100_port *s = container_of(port,
644					      struct max3100_port,
645					      port);
646
647	dev_dbg(&s->spi->dev, "%s\n", __func__);
648
649	return s->port.type == PORT_MAX3100 ? "MAX3100" : NULL;
650}
651
652static void max3100_release_port(struct uart_port *port)
653{
654	struct max3100_port *s = container_of(port,
655					      struct max3100_port,
656					      port);
657
658	dev_dbg(&s->spi->dev, "%s\n", __func__);
659}
660
661static void max3100_config_port(struct uart_port *port, int flags)
662{
663	struct max3100_port *s = container_of(port,
664					      struct max3100_port,
665					      port);
666
667	dev_dbg(&s->spi->dev, "%s\n", __func__);
668
669	if (flags & UART_CONFIG_TYPE)
670		s->port.type = PORT_MAX3100;
671}
672
673static int max3100_verify_port(struct uart_port *port,
674			       struct serial_struct *ser)
675{
676	struct max3100_port *s = container_of(port,
677					      struct max3100_port,
678					      port);
679	int ret = -EINVAL;
680
681	dev_dbg(&s->spi->dev, "%s\n", __func__);
682
683	if (ser->type == PORT_UNKNOWN || ser->type == PORT_MAX3100)
684		ret = 0;
685	return ret;
686}
687
688static void max3100_stop_tx(struct uart_port *port)
689{
690	struct max3100_port *s = container_of(port,
691					      struct max3100_port,
692					      port);
693
694	dev_dbg(&s->spi->dev, "%s\n", __func__);
695}
696
697static int max3100_request_port(struct uart_port *port)
698{
699	struct max3100_port *s = container_of(port,
700					      struct max3100_port,
701					      port);
702
703	dev_dbg(&s->spi->dev, "%s\n", __func__);
704	return 0;
705}
706
707static void max3100_break_ctl(struct uart_port *port, int break_state)
708{
709	struct max3100_port *s = container_of(port,
710					      struct max3100_port,
711					      port);
712
713	dev_dbg(&s->spi->dev, "%s\n", __func__);
714}
715
716static struct uart_ops max3100_ops = {
717	.tx_empty	= max3100_tx_empty,
718	.set_mctrl	= max3100_set_mctrl,
719	.get_mctrl	= max3100_get_mctrl,
720	.stop_tx        = max3100_stop_tx,
721	.start_tx	= max3100_start_tx,
722	.stop_rx	= max3100_stop_rx,
723	.enable_ms      = max3100_enable_ms,
724	.break_ctl      = max3100_break_ctl,
725	.startup	= max3100_startup,
726	.shutdown	= max3100_shutdown,
727	.set_termios	= max3100_set_termios,
728	.type		= max3100_type,
729	.release_port   = max3100_release_port,
730	.request_port   = max3100_request_port,
731	.config_port	= max3100_config_port,
732	.verify_port	= max3100_verify_port,
733};
734
735static struct uart_driver max3100_uart_driver = {
736	.owner          = THIS_MODULE,
737	.driver_name    = "ttyMAX",
738	.dev_name       = "ttyMAX",
739	.major          = MAX3100_MAJOR,
740	.minor          = MAX3100_MINOR,
741	.nr             = MAX_MAX3100,
742};
743static int uart_driver_registered;
744
745static int max3100_probe(struct spi_device *spi)
746{
747	int i, retval;
748	struct plat_max3100 *pdata;
749	u16 tx, rx;
750
751	mutex_lock(&max3100s_lock);
752
753	if (!uart_driver_registered) {
754		uart_driver_registered = 1;
755		retval = uart_register_driver(&max3100_uart_driver);
756		if (retval) {
757			printk(KERN_ERR "Couldn't register max3100 uart driver\n");
758			mutex_unlock(&max3100s_lock);
759			return retval;
760		}
761	}
762
763	for (i = 0; i < MAX_MAX3100; i++)
764		if (!max3100s[i])
765			break;
766	if (i == MAX_MAX3100) {
767		dev_warn(&spi->dev, "too many MAX3100 chips\n");
768		mutex_unlock(&max3100s_lock);
769		return -ENOMEM;
770	}
771
772	max3100s[i] = kzalloc(sizeof(struct max3100_port), GFP_KERNEL);
773	if (!max3100s[i]) {
774		dev_warn(&spi->dev,
775			 "kmalloc for max3100 structure %d failed!\n", i);
776		mutex_unlock(&max3100s_lock);
777		return -ENOMEM;
778	}
779	max3100s[i]->spi = spi;
780	max3100s[i]->irq = spi->irq;
781	spin_lock_init(&max3100s[i]->conf_lock);
782	dev_set_drvdata(&spi->dev, max3100s[i]);
783	pdata = spi->dev.platform_data;
784	max3100s[i]->crystal = pdata->crystal;
785	max3100s[i]->loopback = pdata->loopback;
786	max3100s[i]->poll_time = pdata->poll_time * HZ / 1000;
787	if (pdata->poll_time > 0 && max3100s[i]->poll_time == 0)
788		max3100s[i]->poll_time = 1;
789	max3100s[i]->max3100_hw_suspend = pdata->max3100_hw_suspend;
790	max3100s[i]->minor = i;
791	init_timer(&max3100s[i]->timer);
792	max3100s[i]->timer.function = max3100_timeout;
793	max3100s[i]->timer.data = (unsigned long) max3100s[i];
794
795	dev_dbg(&spi->dev, "%s: adding port %d\n", __func__, i);
796	max3100s[i]->port.irq = max3100s[i]->irq;
797	max3100s[i]->port.uartclk = max3100s[i]->crystal ? 3686400 : 1843200;
798	max3100s[i]->port.fifosize = 16;
799	max3100s[i]->port.ops = &max3100_ops;
800	max3100s[i]->port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF;
801	max3100s[i]->port.line = i;
802	max3100s[i]->port.type = PORT_MAX3100;
803	max3100s[i]->port.dev = &spi->dev;
804	retval = uart_add_one_port(&max3100_uart_driver, &max3100s[i]->port);
805	if (retval < 0)
806		dev_warn(&spi->dev,
807			 "uart_add_one_port failed for line %d with error %d\n",
808			 i, retval);
809
810	/* set shutdown mode to save power. Will be woken-up on open */
811	if (max3100s[i]->max3100_hw_suspend)
812		max3100s[i]->max3100_hw_suspend(1);
813	else {
814		tx = MAX3100_WC | MAX3100_SHDN;
815		max3100_sr(max3100s[i], tx, &rx);
816	}
817	mutex_unlock(&max3100s_lock);
818	return 0;
819}
820
821static int max3100_remove(struct spi_device *spi)
822{
823	struct max3100_port *s = dev_get_drvdata(&spi->dev);
824	int i;
825
826	mutex_lock(&max3100s_lock);
827
828	/* find out the index for the chip we are removing */
829	for (i = 0; i < MAX_MAX3100; i++)
830		if (max3100s[i] == s) {
831			dev_dbg(&spi->dev, "%s: removing port %d\n", __func__, i);
832			uart_remove_one_port(&max3100_uart_driver, &max3100s[i]->port);
833			kfree(max3100s[i]);
834			max3100s[i] = NULL;
835			break;
836		}
837
838	WARN_ON(i == MAX_MAX3100);
839
840	/* check if this is the last chip we have */
841	for (i = 0; i < MAX_MAX3100; i++)
842		if (max3100s[i]) {
843			mutex_unlock(&max3100s_lock);
844			return 0;
845		}
846	pr_debug("removing max3100 driver\n");
847	uart_unregister_driver(&max3100_uart_driver);
848
849	mutex_unlock(&max3100s_lock);
850	return 0;
851}
852
853#ifdef CONFIG_PM
854
855static int max3100_suspend(struct spi_device *spi, pm_message_t state)
856{
857	struct max3100_port *s = dev_get_drvdata(&spi->dev);
858
859	dev_dbg(&s->spi->dev, "%s\n", __func__);
860
861	disable_irq(s->irq);
862
863	s->suspending = 1;
864	uart_suspend_port(&max3100_uart_driver, &s->port);
865
866	if (s->max3100_hw_suspend)
867		s->max3100_hw_suspend(1);
868	else {
869		/* no HW suspend, so do SW one */
870		u16 tx, rx;
871
872		tx = MAX3100_WC | MAX3100_SHDN;
873		max3100_sr(s, tx, &rx);
874	}
875	return 0;
876}
877
878static int max3100_resume(struct spi_device *spi)
879{
880	struct max3100_port *s = dev_get_drvdata(&spi->dev);
881
882	dev_dbg(&s->spi->dev, "%s\n", __func__);
883
884	if (s->max3100_hw_suspend)
885		s->max3100_hw_suspend(0);
886	uart_resume_port(&max3100_uart_driver, &s->port);
887	s->suspending = 0;
888
889	enable_irq(s->irq);
890
891	s->conf_commit = 1;
892	if (s->workqueue)
893		max3100_dowork(s);
894
895	return 0;
896}
897
898#else
899#define max3100_suspend NULL
900#define max3100_resume  NULL
901#endif
902
903static struct spi_driver max3100_driver = {
904	.driver = {
905		.name		= "max3100",
906		.owner		= THIS_MODULE,
907	},
908
909	.probe		= max3100_probe,
910	.remove		= max3100_remove,
911	.suspend	= max3100_suspend,
912	.resume		= max3100_resume,
913};
914
915module_spi_driver(max3100_driver);
916
917MODULE_DESCRIPTION("MAX3100 driver");
918MODULE_AUTHOR("Christian Pellegrin <chripell@evolware.org>");
919MODULE_LICENSE("GPL");
920MODULE_ALIAS("spi:max3100");
921