ehci-tegra.c revision 1ba8216f0bc02af6ba70d1108d60eb1b064395e4
179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby/* 279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs 379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Copyright (C) 2010 Google, Inc. 579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Copyright (C) 2009 NVIDIA Corporation 679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * This program is free software; you can redistribute it and/or modify it 879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * under the terms of the GNU General Public License as published by the 979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Free Software Foundation; either version 2 of the License, or (at your 1079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * option) any later version. 1179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 1279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * This program is distributed in the hope that it will be useful, but WITHOUT 1379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * more details. 1679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 1779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby */ 1879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 1979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/clk.h> 20ded017ee6c7b90f7356bd8488f8af1c10ba90490Kishon Vijay Abraham I#include <linux/err.h> 2179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/platform_device.h> 2279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/platform_data/tegra_usb.h> 2379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/irq.h> 2479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/usb/otg.h> 254a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <linux/gpio.h> 264a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <linux/of.h> 274a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <linux/of_gpio.h> 28ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern#include <linux/pm_runtime.h> 294a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 301ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu#include <linux/usb/tegra_usb_phy.h> 314a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <mach/iomap.h> 3279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 33fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell#define TEGRA_USB_DMA_ALIGN 32 34fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 3579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystruct tegra_ehci_hcd { 3679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci; 3779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_usb_phy *phy; 3879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct clk *clk; 3979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct clk *emc_clk; 408675381109b0eb1c948a423c2b35e3f4509cb25eHeikki Krogerus struct usb_phy *transceiver; 4179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int host_resumed; 4279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int port_resuming; 4379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby enum tegra_usb_phy_port_speed port_speed; 4479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby}; 4579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 4679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_power_up(struct usb_hcd *hcd) 4779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 4879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 4979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 5020de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_prepare_enable(tegra->emc_clk); 5120de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_prepare_enable(tegra->clk); 521ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu usb_phy_set_suspend(&tegra->phy->u_phy, 0); 5379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->host_resumed = 1; 5479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 5579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 5679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_power_down(struct usb_hcd *hcd) 5779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 5879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 5979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 6079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->host_resumed = 0; 611ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu usb_phy_set_suspend(&tegra->phy->u_phy, 1); 6220de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_disable_unprepare(tegra->clk); 6320de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_disable_unprepare(tegra->emc_clk); 6479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 6579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 661f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Linstatic int tegra_ehci_internal_port_reset( 671f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin struct ehci_hcd *ehci, 681f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin u32 __iomem *portsc_reg 691f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin) 701f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin{ 711f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin u32 temp; 721f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin unsigned long flags; 731f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin int retval = 0; 741f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin int i, tries; 751f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin u32 saved_usbintr; 761f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 771f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin spin_lock_irqsave(&ehci->lock, flags); 781f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable); 791f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* disable USB interrupt */ 801f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, 0, &ehci->regs->intr_enable); 811f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin spin_unlock_irqrestore(&ehci->lock, flags); 821f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 831f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 841f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Here we have to do Port Reset at most twice for 851f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Port Enable bit to be set. 861f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 871f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin for (i = 0; i < 2; i++) { 881f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp = ehci_readl(ehci, portsc_reg); 891f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp |= PORT_RESET; 901f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, temp, portsc_reg); 911f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin mdelay(10); 921f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp &= ~PORT_RESET; 931f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, temp, portsc_reg); 941f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin mdelay(1); 951f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin tries = 100; 961f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin do { 971f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin mdelay(1); 981f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 991f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Up to this point, Port Enable bit is 1001f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * expected to be set after 2 ms waiting. 1011f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * USB1 usually takes extra 45 ms, for safety, 1021f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * we take 100 ms as timeout. 1031f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 1041f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp = ehci_readl(ehci, portsc_reg); 1051f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin } while (!(temp & PORT_PE) && tries--); 1061f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (temp & PORT_PE) 1071f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin break; 1081f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin } 1091f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (i == 2) 1101f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin retval = -ETIMEDOUT; 1111f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 1121f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 1131f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Clear Connect Status Change bit if it's set. 1141f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared. 1151f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 1161f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (temp & PORT_CSC) 1171f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, PORT_CSC, portsc_reg); 1181f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 1191f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 1201f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Write to clear any interrupt status bits that might be set 1211f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * during port reset. 1221f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 1231f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp = ehci_readl(ehci, &ehci->regs->status); 1241f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, temp, &ehci->regs->status); 1251f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 1261f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* restore original interrupt enable bits */ 1271f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable); 1281f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin return retval; 1291f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin} 1301f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 13179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_hub_control( 13279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd, 13379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 typeReq, 13479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 wValue, 13579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 wIndex, 13679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby char *buf, 13779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 wLength 13879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby) 13979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 14079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci = hcd_to_ehci(hcd); 14179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 14279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u32 __iomem *status_reg; 14379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u32 temp; 14479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby unsigned long flags; 14579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int retval = 0; 14679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 14779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1]; 14879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 14979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_lock_irqsave(&ehci->lock, flags); 15079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 1516d5f89c7b4fa5f8d6dc757982402c032183ffd8dStephen Warren if (typeReq == GetPortStatus) { 15279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp = ehci_readl(ehci, status_reg); 15379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->port_resuming && !(temp & PORT_SUSPEND)) { 15479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Resume completed, re-enable disconnect detection */ 15579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->port_resuming = 0; 15679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_postresume(tegra->phy); 15779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 15879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 15979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 16079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { 16179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp = ehci_readl(ehci, status_reg); 16279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { 16379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby retval = -EPIPE; 16479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 16579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 16679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 167b08765749332c54c65c1a6515c01c6eb3fc1843eStephen Warren temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E); 16879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp |= PORT_WKDISC_E | PORT_WKOC_E; 16979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); 17079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 17179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* 17279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * If a transaction is in progress, there may be a delay in 17379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * suspending the port. Poll until the port is suspended. 17479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby */ 17579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, status_reg, PORT_SUSPEND, 17679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby PORT_SUSPEND, 5000)) 17779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for SUSPEND\n", __func__); 17879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 17979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); 18079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 18179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 18279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 1831f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* For USB1 port we need to issue Port Reset twice internally */ 1841f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (tegra->phy->instance == 0 && 1851f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) { 1861f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin spin_unlock_irqrestore(&ehci->lock, flags); 1871f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin return tegra_ehci_internal_port_reset(ehci, status_reg); 1881f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin } 1891f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 19079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* 19179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Tegra host controller will time the resume operation to clear the bit 19279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * when the port control state switches to HS or FS Idle. This behavior 19379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * is different from EHCI where the host controller driver is required 19479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * to set this bit to a zero after the resume duration is timed in the 19579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * driver. 19679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby */ 19779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby else if (typeReq == ClearPortFeature && 19879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby wValue == USB_PORT_FEAT_SUSPEND) { 19979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp = ehci_readl(ehci, status_reg); 20079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if ((temp & PORT_RESET) || !(temp & PORT_PE)) { 20179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby retval = -EPIPE; 20279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 20379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 20479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 20579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!(temp & PORT_SUSPEND)) 20679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 20779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 20879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Disable disconnect detection during port resume */ 20979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_preresume(tegra->phy); 21079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 21179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25); 21279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 21379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); 21479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* start resume signalling */ 21579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, temp | PORT_RESUME, status_reg); 216a448e4dc25303fe551e4dafe16c8c7c34f1b9d82Alan Stern set_bit(wIndex-1, &ehci->resuming_ports); 21779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 21879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_unlock_irqrestore(&ehci->lock, flags); 21979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby msleep(20); 22079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_lock_irqsave(&ehci->lock, flags); 22179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 22279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Poll until the controller clears RESUME and SUSPEND */ 22379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, status_reg, PORT_RESUME, 0, 2000)) 22479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for RESUME\n", __func__); 22579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000)) 22679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for SUSPEND\n", __func__); 22779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 22879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->reset_done[wIndex-1] = 0; 229a448e4dc25303fe551e4dafe16c8c7c34f1b9d82Alan Stern clear_bit(wIndex-1, &ehci->resuming_ports); 23079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 23179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->port_resuming = 1; 23279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 23379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 23479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 23579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_unlock_irqrestore(&ehci->lock, flags); 23679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 23779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Handle the hub control events here */ 23879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); 23979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobydone: 24079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_unlock_irqrestore(&ehci->lock, flags); 24179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return retval; 24279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 24379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 24479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_restart(struct usb_hcd *hcd) 24579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 24679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci = hcd_to_ehci(hcd); 24779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 24879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_reset(ehci); 24979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 25079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* setup the frame list and Async q heads */ 25179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); 25279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); 25379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* setup the command register and set the controller in RUN mode */ 25479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 25579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->command |= CMD_RUN; 25679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, ehci->command, &ehci->regs->command); 25779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 25879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby down_write(&ehci_cf_port_reset_rwsem); 25979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); 26079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* flush posted writes */ 26179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_readl(ehci, &ehci->regs->command); 26279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby up_write(&ehci_cf_port_reset_rwsem); 26379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 26479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 26579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_shutdown(struct usb_hcd *hcd) 26679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 26779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 26879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 26979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* ehci_shutdown touches the USB controller registers, make sure 27079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * controller has clocks to it */ 27179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!tegra->host_resumed) 27279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_power_up(hcd); 27379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 27479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_shutdown(hcd); 27579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 27679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 27779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_setup(struct usb_hcd *hcd) 27879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 27979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci = hcd_to_ehci(hcd); 28079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int retval; 28179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 28279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* EHCI registers start at offset 0x100 */ 28379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->caps = hcd->regs + 0x100; 28479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 28579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* switch to host mode */ 28679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->has_tt = 1; 28779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 28872119743651054ceddd4fdf0cce161bdb4cc4aacLaxman Dewangan retval = ehci_setup(hcd); 28979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (retval) 29079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return retval; 29179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 29279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_port_power(ehci, 1); 29379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return retval; 29479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 29579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 296fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasustruct dma_aligned_buffer { 297fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell void *kmalloc_ptr; 298fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell void *old_xfer_buffer; 299fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell u8 data[0]; 300fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell}; 301fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 302fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasustatic void free_dma_aligned_buffer(struct urb *urb) 303fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 304fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu struct dma_aligned_buffer *temp; 305fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 306fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) 307fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return; 308fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 309fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu temp = container_of(urb->transfer_buffer, 310fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu struct dma_aligned_buffer, data); 311fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 312fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu if (usb_urb_dir_in(urb)) 313fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell memcpy(temp->old_xfer_buffer, temp->data, 314fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer_length); 315fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer = temp->old_xfer_buffer; 316fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell kfree(temp->kmalloc_ptr); 317fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 318fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; 319fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 320fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 321fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasustatic int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) 322fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 323fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu struct dma_aligned_buffer *temp, *kmalloc_ptr; 324fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell size_t kmalloc_size; 325fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 326fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (urb->num_sgs || urb->sg || 327fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer_length == 0 || 328fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1))) 329fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return 0; 330fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 331fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell /* Allocate a buffer with enough padding for alignment */ 332fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell kmalloc_size = urb->transfer_buffer_length + 333fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1; 334fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 335fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); 336fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (!kmalloc_ptr) 337fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return -ENOMEM; 338fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 339fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu /* Position our struct dma_aligned_buffer such that data is aligned */ 340fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1; 341fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell temp->kmalloc_ptr = kmalloc_ptr; 342fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell temp->old_xfer_buffer = urb->transfer_buffer; 343fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu if (usb_urb_dir_out(urb)) 344fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell memcpy(temp->data, urb->transfer_buffer, 345fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer_length); 346fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer = temp->data; 347fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 348fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; 349fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 350fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return 0; 351fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 352fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 353fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morellstatic int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, 354fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell gfp_t mem_flags) 355fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 356fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell int ret; 357fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 358fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu ret = alloc_dma_aligned_buffer(urb, mem_flags); 359fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (ret) 360fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return ret; 361fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 362fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); 363fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (ret) 364fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu free_dma_aligned_buffer(urb); 365fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 366fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return ret; 367fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 368fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 369fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morellstatic void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) 370fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 371fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell usb_hcd_unmap_urb_for_dma(hcd, urb); 372fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu free_dma_aligned_buffer(urb); 373fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 374fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 37579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic const struct hc_driver tegra_ehci_hc_driver = { 37679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .description = hcd_name, 37779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .product_desc = "Tegra EHCI Host Controller", 37879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .hcd_priv_size = sizeof(struct ehci_hcd), 37979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .flags = HCD_USB2 | HCD_MEMORY, 38079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 381c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu /* standard ehci functions */ 38279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .irq = ehci_irq, 38379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .start = ehci_run, 38479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .stop = ehci_stop, 38579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .urb_enqueue = ehci_urb_enqueue, 38679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .urb_dequeue = ehci_urb_dequeue, 38779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .endpoint_disable = ehci_endpoint_disable, 38879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .endpoint_reset = ehci_endpoint_reset, 38979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .get_frame_number = ehci_get_frame, 39079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .hub_status_data = ehci_hub_status_data, 39179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, 392c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .relinquish_port = ehci_relinquish_port, 393c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .port_handed_over = ehci_port_handed_over, 394c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu 395c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu /* modified ehci functions for tegra */ 396c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .reset = tegra_ehci_setup, 397c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .shutdown = tegra_ehci_shutdown, 398c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .map_urb_for_dma = tegra_ehci_map_urb_for_dma, 399c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma, 400c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .hub_control = tegra_ehci_hub_control, 40179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_PM 402ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern .bus_suspend = ehci_bus_suspend, 403ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern .bus_resume = ehci_bus_resume, 40479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 40579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby}; 40679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 407434103adea3f63f6550f4b2bd16653328f933a66Stephen Warrenstatic int setup_vbus_gpio(struct platform_device *pdev, 408434103adea3f63f6550f4b2bd16653328f933a66Stephen Warren struct tegra_ehci_platform_data *pdata) 4094a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson{ 4104a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson int err = 0; 4114a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson int gpio; 4124a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 413434103adea3f63f6550f4b2bd16653328f933a66Stephen Warren gpio = pdata->vbus_gpio; 414434103adea3f63f6550f4b2bd16653328f933a66Stephen Warren if (!gpio_is_valid(gpio)) 415434103adea3f63f6550f4b2bd16653328f933a66Stephen Warren gpio = of_get_named_gpio(pdev->dev.of_node, 416434103adea3f63f6550f4b2bd16653328f933a66Stephen Warren "nvidia,vbus-gpio", 0); 4174a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (!gpio_is_valid(gpio)) 4184a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return 0; 4194a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 4204a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson err = gpio_request(gpio, "vbus_gpio"); 4214a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (err) { 4224a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson dev_err(&pdev->dev, "can't request vbus gpio %d", gpio); 4234a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return err; 4244a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 4254a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson err = gpio_direction_output(gpio, 1); 4264a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (err) { 4274a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson dev_err(&pdev->dev, "can't enable vbus\n"); 4284a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return err; 4294a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 4304a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 4314a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return err; 4324a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson} 4334a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 434ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern#ifdef CONFIG_PM 435ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 436ebf20de453042c066a289b90dd14d59de03dba2fAlan Sternstatic int controller_suspend(struct device *dev) 437ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern{ 438ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct tegra_ehci_hcd *tegra = 439ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern platform_get_drvdata(to_platform_device(dev)); 440ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct ehci_hcd *ehci = tegra->ehci; 441ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct usb_hcd *hcd = ehci_to_hcd(ehci); 442ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct ehci_regs __iomem *hw = ehci->regs; 443ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern unsigned long flags; 444ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 445ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (time_before(jiffies, ehci->next_statechange)) 446ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern msleep(10); 447ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 448c4f3476436f7452b97c8accb5dd7d53219a11a3fAlan Stern ehci_halt(ehci); 449ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 450c4f3476436f7452b97c8accb5dd7d53219a11a3fAlan Stern spin_lock_irqsave(&ehci->lock, flags); 451ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra->port_speed = (readl(&hw->port_status[0]) >> 26) & 0x3; 452ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 453ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern spin_unlock_irqrestore(&ehci->lock, flags); 454ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 455ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra_ehci_power_down(hcd); 456ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern return 0; 457ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern} 458ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 459ebf20de453042c066a289b90dd14d59de03dba2fAlan Sternstatic int controller_resume(struct device *dev) 460ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern{ 461ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct tegra_ehci_hcd *tegra = 462ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern platform_get_drvdata(to_platform_device(dev)); 463ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct ehci_hcd *ehci = tegra->ehci; 464ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct usb_hcd *hcd = ehci_to_hcd(ehci); 465ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct ehci_regs __iomem *hw = ehci->regs; 466ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern unsigned long val; 467ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 468ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 469ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra_ehci_power_up(hcd); 470ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 471ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (tegra->port_speed > TEGRA_USB_PHY_PORT_SPEED_HIGH) { 472ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Wait for the phy to detect new devices 473ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern * before we restart the controller */ 474ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern msleep(10); 475ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern goto restart; 476ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern } 477ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 478ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Force the phy to keep data lines in suspend state */ 479ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra_ehci_phy_restore_start(tegra->phy, tegra->port_speed); 480ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 481ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Enable host mode */ 482ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tdi_reset(ehci); 483ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 484ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Enable Port Power */ 485ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val = readl(&hw->port_status[0]); 486ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val |= PORT_POWER; 487ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern writel(val, &hw->port_status[0]); 488ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern udelay(10); 489ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 490ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Check if the phy resume from LP0. When the phy resume from LP0 491ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern * USB register will be reset. */ 492ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (!readl(&hw->async_next)) { 493ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Program the field PTC based on the saved speed mode */ 494ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val = readl(&hw->port_status[0]); 495ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val &= ~PORT_TEST(~0); 496ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_HIGH) 497ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val |= PORT_TEST_FORCE; 498ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_FULL) 499ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val |= PORT_TEST(6); 500ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW) 501ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val |= PORT_TEST(7); 502ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern writel(val, &hw->port_status[0]); 503ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern udelay(10); 504ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 505ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Disable test mode by setting PTC field to NORMAL_OP */ 506ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val = readl(&hw->port_status[0]); 507ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val &= ~PORT_TEST(~0); 508ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern writel(val, &hw->port_status[0]); 509ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern udelay(10); 510ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern } 511ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 512ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Poll until CCS is enabled */ 513ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (handshake(ehci, &hw->port_status[0], PORT_CONNECT, 514ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern PORT_CONNECT, 2000)) { 515ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pr_err("%s: timeout waiting for PORT_CONNECT\n", __func__); 516ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern goto restart; 517ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern } 518ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 519ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Poll until PE is enabled */ 520ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (handshake(ehci, &hw->port_status[0], PORT_PE, 521ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern PORT_PE, 2000)) { 522ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pr_err("%s: timeout waiting for USB_PORTSC1_PE\n", __func__); 523ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern goto restart; 524ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern } 525ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 526ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Clear the PCI status, to avoid an interrupt taken upon resume */ 527ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val = readl(&hw->status); 528ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val |= STS_PCD; 529ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern writel(val, &hw->status); 530ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 531ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Put controller in suspend mode by writing 1 to SUSP bit of PORTSC */ 532ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val = readl(&hw->port_status[0]); 533ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if ((val & PORT_POWER) && (val & PORT_PE)) { 534ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern val |= PORT_SUSPEND; 535ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern writel(val, &hw->port_status[0]); 536ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 537ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Wait until port suspend completes */ 538ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (handshake(ehci, &hw->port_status[0], PORT_SUSPEND, 539ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern PORT_SUSPEND, 1000)) { 540ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pr_err("%s: timeout waiting for PORT_SUSPEND\n", 541ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern __func__); 542ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern goto restart; 543ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern } 544ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern } 545ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 546ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra_ehci_phy_restore_end(tegra->phy); 547ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern goto done; 548ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 549ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern restart: 550ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (tegra->port_speed <= TEGRA_USB_PHY_PORT_SPEED_HIGH) 551ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra_ehci_phy_restore_end(tegra->phy); 552ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 553ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra_ehci_restart(hcd); 554ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 555ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern done: 556ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra_usb_phy_preresume(tegra->phy); 557ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern tegra->port_resuming = 1; 558ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern return 0; 559ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern} 560ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 561ebf20de453042c066a289b90dd14d59de03dba2fAlan Sternstatic int tegra_ehci_suspend(struct device *dev) 562ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern{ 563ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct tegra_ehci_hcd *tegra = 564ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern platform_get_drvdata(to_platform_device(dev)); 565ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); 566ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern int rc = 0; 567ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 568ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* 569ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern * When system sleep is supported and USB controller wakeup is 570ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern * implemented: If the controller is runtime-suspended and the 571ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern * wakeup setting needs to be changed, call pm_runtime_resume(). 572ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern */ 573ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (HCD_HW_ACCESSIBLE(hcd)) 574ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern rc = controller_suspend(dev); 575ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern return rc; 576ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern} 577ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 578ebf20de453042c066a289b90dd14d59de03dba2fAlan Sternstatic int tegra_ehci_resume(struct device *dev) 579ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern{ 580ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern int rc; 581ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 582ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern rc = controller_resume(dev); 583ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern if (rc == 0) { 584ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_disable(dev); 585ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_set_active(dev); 586ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_enable(dev); 587ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern } 588ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern return rc; 589ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern} 590ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 591ebf20de453042c066a289b90dd14d59de03dba2fAlan Sternstatic int tegra_ehci_runtime_suspend(struct device *dev) 592ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern{ 593ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern return controller_suspend(dev); 594ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern} 595ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 596ebf20de453042c066a289b90dd14d59de03dba2fAlan Sternstatic int tegra_ehci_runtime_resume(struct device *dev) 597ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern{ 598ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern return controller_resume(dev); 599ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern} 600ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 601ebf20de453042c066a289b90dd14d59de03dba2fAlan Sternstatic const struct dev_pm_ops tegra_ehci_pm_ops = { 602ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern .suspend = tegra_ehci_suspend, 603ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern .resume = tegra_ehci_resume, 604ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern .runtime_suspend = tegra_ehci_runtime_suspend, 605ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern .runtime_resume = tegra_ehci_runtime_resume, 606ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern}; 607ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 608ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern#endif 609ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 6104a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johanssonstatic u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32); 6114a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 61279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_probe(struct platform_device *pdev) 61379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 61479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct resource *res; 61579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd; 61679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra; 61779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_platform_data *pdata; 61879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int err = 0; 61979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int irq; 62079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int instance = pdev->id; 62179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 62279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pdata = pdev->dev.platform_data; 62379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!pdata) { 62479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Platform data missing\n"); 62579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return -EINVAL; 62679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 62779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 6284a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson /* Right now device-tree probed devices don't get dma_mask set. 6294a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * Since shared usb code relies on it, set it here for now. 6304a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * Once we have dma capability bindings this can go away. 6314a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson */ 6324a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (!pdev->dev.dma_mask) 6334a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson pdev->dev.dma_mask = &tegra_ehci_dma_mask; 6344a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 635434103adea3f63f6550f4b2bd16653328f933a66Stephen Warren setup_vbus_gpio(pdev, pdata); 6364a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 63779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra = kzalloc(sizeof(struct tegra_ehci_hcd), GFP_KERNEL); 63879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!tegra) 63979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return -ENOMEM; 64079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 64179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev, 64279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_name(&pdev->dev)); 64379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!hcd) { 64479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Unable to create HCD\n"); 64579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENOMEM; 64679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_hcd; 64779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 64879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 64979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby platform_set_drvdata(pdev, tegra); 65079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 65179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->clk = clk_get(&pdev->dev, NULL); 65279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (IS_ERR(tegra->clk)) { 65379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Can't get ehci clock\n"); 65479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = PTR_ERR(tegra->clk); 65579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_clk; 65679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 65779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 65820de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad err = clk_prepare_enable(tegra->clk); 65979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (err) 66079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_clken; 66179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 66279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->emc_clk = clk_get(&pdev->dev, "emc"); 66379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (IS_ERR(tegra->emc_clk)) { 66479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Can't get emc clock\n"); 66579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = PTR_ERR(tegra->emc_clk); 66679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_emc_clk; 66779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 66879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 66920de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_prepare_enable(tegra->emc_clk); 67079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_set_rate(tegra->emc_clk, 400000000); 67179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 67279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 67379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!res) { 67479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to get I/O memory\n"); 67579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENXIO; 67679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_io; 67779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 67879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->rsrc_start = res->start; 67979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->rsrc_len = resource_size(res); 68079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->regs = ioremap(res->start, resource_size(res)); 68179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!hcd->regs) { 68279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to remap I/O memory\n"); 68379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENOMEM; 68479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_io; 68579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 68679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 6874a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson /* This is pretty ugly and needs to be fixed when we do only 6884a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * device-tree probing. Old code relies on the platform_device 6894a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * numbering that we lack for device-tree-instantiated devices. 6904a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson */ 6914a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (instance < 0) { 6924a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson switch (res->start) { 6934a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson case TEGRA_USB_BASE: 6944a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson instance = 0; 6954a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson break; 6964a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson case TEGRA_USB2_BASE: 6974a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson instance = 1; 6984a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson break; 6994a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson case TEGRA_USB3_BASE: 7004a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson instance = 2; 7014a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson break; 7024a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson default: 7034a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson err = -ENODEV; 7044a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson dev_err(&pdev->dev, "unknown usb instance\n"); 7054a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson goto fail_phy; 7064a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 7074a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 7084a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 709aa607ebf93a5fc26275a575781399df971dd1b91Stephen Warren tegra->phy = tegra_usb_phy_open(&pdev->dev, instance, hcd->regs, 710aa607ebf93a5fc26275a575781399df971dd1b91Stephen Warren pdata->phy_config, 711aa607ebf93a5fc26275a575781399df971dd1b91Stephen Warren TEGRA_USB_PHY_MODE_HOST); 71279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (IS_ERR(tegra->phy)) { 71379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to open USB phy\n"); 71479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENXIO; 71579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_phy; 71679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 71779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 7181ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu usb_phy_init(&tegra->phy->u_phy); 7191ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu 7201ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu err = usb_phy_set_suspend(&tegra->phy->u_phy, 0); 72179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (err) { 72279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to power on the phy\n"); 72379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail; 72479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 72579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 72679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->host_resumed = 1; 72779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->ehci = hcd_to_ehci(hcd); 72879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 72979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby irq = platform_get_irq(pdev, 0); 73079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!irq) { 73179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to get IRQ\n"); 73279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENODEV; 73379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail; 73479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 73579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 73679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_USB_OTG_UTILS 73779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (pdata->operating_mode == TEGRA_USB_OTG) { 738662dca54ca67c92b7aa14b9a2ec54acacf33ce45Kishon Vijay Abraham I tegra->transceiver = usb_get_phy(USB_PHY_TYPE_USB2); 739ded017ee6c7b90f7356bd8488f8af1c10ba90490Kishon Vijay Abraham I if (!IS_ERR_OR_NULL(tegra->transceiver)) 7406e13c6505cdff9766d5268ffb8c972c1a2f996e6Heikki Krogerus otg_set_host(tegra->transceiver->otg, &hcd->self); 74179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 74279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 74379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 744b5dd18d8747010e3f3eb1cc76a49f94291938559Yong Zhang err = usb_add_hcd(hcd, irq, IRQF_SHARED); 74579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (err) { 74679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to add USB HCD\n"); 74779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail; 74879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 74979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 750ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_set_active(&pdev->dev); 751ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_get_noresume(&pdev->dev); 752ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 753ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* Don't skip the pm_runtime_forbid call if wakeup isn't working */ 754ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern /* if (!pdata->power_down_on_bus_suspend) */ 755ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_forbid(&pdev->dev); 756ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_enable(&pdev->dev); 757ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_put_sync(&pdev->dev); 75879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return err; 75979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 76079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail: 76179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_USB_OTG_UTILS 762ded017ee6c7b90f7356bd8488f8af1c10ba90490Kishon Vijay Abraham I if (!IS_ERR_OR_NULL(tegra->transceiver)) { 7636e13c6505cdff9766d5268ffb8c972c1a2f996e6Heikki Krogerus otg_set_host(tegra->transceiver->otg, NULL); 764721002ec1dd55a52425455826af49cf8853b2d4fKishon Vijay Abraham I usb_put_phy(tegra->transceiver); 76579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 76679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 7671ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu usb_phy_shutdown(&tegra->phy->u_phy); 76879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_phy: 76979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby iounmap(hcd->regs); 77079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_io: 77120de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_disable_unprepare(tegra->emc_clk); 77279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->emc_clk); 77379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_emc_clk: 77420de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_disable_unprepare(tegra->clk); 77579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_clken: 77679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->clk); 77779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_clk: 77879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby usb_put_hcd(hcd); 77979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_hcd: 78079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby kfree(tegra); 78179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return err; 78279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 78379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 78479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_remove(struct platform_device *pdev) 78579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 78679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); 78779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); 78879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 78979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra == NULL || hcd == NULL) 79079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return -EINVAL; 79179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 792ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_get_sync(&pdev->dev); 793ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_disable(&pdev->dev); 794ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern pm_runtime_put_noidle(&pdev->dev); 795ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern 79679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_USB_OTG_UTILS 797ded017ee6c7b90f7356bd8488f8af1c10ba90490Kishon Vijay Abraham I if (!IS_ERR_OR_NULL(tegra->transceiver)) { 7986e13c6505cdff9766d5268ffb8c972c1a2f996e6Heikki Krogerus otg_set_host(tegra->transceiver->otg, NULL); 799721002ec1dd55a52425455826af49cf8853b2d4fKishon Vijay Abraham I usb_put_phy(tegra->transceiver); 80079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 80179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 80279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 80379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby usb_remove_hcd(hcd); 80479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby usb_put_hcd(hcd); 80579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 8061ba8216f0bc02af6ba70d1108d60eb1b064395e4Venu Byravarasu usb_phy_shutdown(&tegra->phy->u_phy); 80779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby iounmap(hcd->regs); 80879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 80920de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_disable_unprepare(tegra->clk); 81079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->clk); 81179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 81220de12ccf900d71eee1344adc7ae0dcd7db9b4abPrashant Gaikwad clk_disable_unprepare(tegra->emc_clk); 81379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->emc_clk); 81479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 81579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby kfree(tegra); 81679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return 0; 81779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 81879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 81979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_hcd_shutdown(struct platform_device *pdev) 82079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 82179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); 82279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); 82379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 82479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (hcd->driver->shutdown) 82579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->driver->shutdown(hcd); 82679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 82779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 8284a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johanssonstatic struct of_device_id tegra_ehci_of_match[] __devinitdata = { 8294a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson { .compatible = "nvidia,tegra20-ehci", }, 8304a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson { }, 8314a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson}; 8324a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 83379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic struct platform_driver tegra_ehci_driver = { 83479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .probe = tegra_ehci_probe, 83579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .remove = tegra_ehci_remove, 83679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .shutdown = tegra_ehci_hcd_shutdown, 83779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .driver = { 83879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .name = "tegra-ehci", 8394a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson .of_match_table = tegra_ehci_of_match, 840ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern#ifdef CONFIG_PM 841ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern .pm = &tegra_ehci_pm_ops, 842ebf20de453042c066a289b90dd14d59de03dba2fAlan Stern#endif 84379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 84479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby}; 845