ehci-tegra.c revision b08765749332c54c65c1a6515c01c6eb3fc1843e
179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby/* 279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs 379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Copyright (C) 2010 Google, Inc. 579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Copyright (C) 2009 NVIDIA Corporation 679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * This program is free software; you can redistribute it and/or modify it 879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * under the terms of the GNU General Public License as published by the 979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Free Software Foundation; either version 2 of the License, or (at your 1079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * option) any later version. 1179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 1279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * This program is distributed in the hope that it will be useful, but WITHOUT 1379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 1479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 1579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * more details. 1679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * 1779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby */ 1879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 1979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/clk.h> 2079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/platform_device.h> 2179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/platform_data/tegra_usb.h> 2279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/irq.h> 2379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <linux/usb/otg.h> 244a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <linux/gpio.h> 254a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <linux/of.h> 264a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <linux/of_gpio.h> 274a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 2879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#include <mach/usb_phy.h> 294a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson#include <mach/iomap.h> 3079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 31fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell#define TEGRA_USB_DMA_ALIGN 32 32fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 3379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystruct tegra_ehci_hcd { 3479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci; 3579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_usb_phy *phy; 3679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct clk *clk; 3779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct clk *emc_clk; 388675381109b0eb1c948a423c2b35e3f4509cb25eHeikki Krogerus struct usb_phy *transceiver; 3979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int host_resumed; 4079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int bus_suspended; 4179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int port_resuming; 4279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int power_down_on_bus_suspend; 4379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby enum tegra_usb_phy_port_speed port_speed; 4479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby}; 4579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 4679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_power_up(struct usb_hcd *hcd) 4779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 4879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 4979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 5079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_enable(tegra->emc_clk); 5179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_enable(tegra->clk); 5279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_power_on(tegra->phy); 5379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->host_resumed = 1; 5479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 5579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 5679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_power_down(struct usb_hcd *hcd) 5779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 5879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 5979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 6079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->host_resumed = 0; 6179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_power_off(tegra->phy); 6279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_disable(tegra->clk); 6379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_disable(tegra->emc_clk); 6479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 6579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 661f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Linstatic int tegra_ehci_internal_port_reset( 671f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin struct ehci_hcd *ehci, 681f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin u32 __iomem *portsc_reg 691f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin) 701f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin{ 711f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin u32 temp; 721f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin unsigned long flags; 731f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin int retval = 0; 741f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin int i, tries; 751f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin u32 saved_usbintr; 761f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 771f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin spin_lock_irqsave(&ehci->lock, flags); 781f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable); 791f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* disable USB interrupt */ 801f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, 0, &ehci->regs->intr_enable); 811f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin spin_unlock_irqrestore(&ehci->lock, flags); 821f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 831f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 841f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Here we have to do Port Reset at most twice for 851f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Port Enable bit to be set. 861f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 871f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin for (i = 0; i < 2; i++) { 881f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp = ehci_readl(ehci, portsc_reg); 891f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp |= PORT_RESET; 901f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, temp, portsc_reg); 911f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin mdelay(10); 921f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp &= ~PORT_RESET; 931f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, temp, portsc_reg); 941f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin mdelay(1); 951f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin tries = 100; 961f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin do { 971f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin mdelay(1); 981f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 991f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Up to this point, Port Enable bit is 1001f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * expected to be set after 2 ms waiting. 1011f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * USB1 usually takes extra 45 ms, for safety, 1021f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * we take 100 ms as timeout. 1031f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 1041f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp = ehci_readl(ehci, portsc_reg); 1051f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin } while (!(temp & PORT_PE) && tries--); 1061f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (temp & PORT_PE) 1071f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin break; 1081f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin } 1091f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (i == 2) 1101f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin retval = -ETIMEDOUT; 1111f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 1121f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 1131f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Clear Connect Status Change bit if it's set. 1141f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared. 1151f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 1161f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (temp & PORT_CSC) 1171f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, PORT_CSC, portsc_reg); 1181f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 1191f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* 1201f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * Write to clear any interrupt status bits that might be set 1211f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin * during port reset. 1221f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin */ 1231f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin temp = ehci_readl(ehci, &ehci->regs->status); 1241f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, temp, &ehci->regs->status); 1251f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 1261f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* restore original interrupt enable bits */ 1271f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable); 1281f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin return retval; 1291f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin} 1301f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 13179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_hub_control( 13279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd, 13379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 typeReq, 13479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 wValue, 13579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 wIndex, 13679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby char *buf, 13779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u16 wLength 13879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby) 13979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 14079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci = hcd_to_ehci(hcd); 14179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 14279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u32 __iomem *status_reg; 14379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby u32 temp; 14479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby unsigned long flags; 14579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int retval = 0; 14679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 14779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1]; 14879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 14979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_lock_irqsave(&ehci->lock, flags); 15079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 1516d5f89c7b4fa5f8d6dc757982402c032183ffd8dStephen Warren if (typeReq == GetPortStatus) { 15279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp = ehci_readl(ehci, status_reg); 15379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->port_resuming && !(temp & PORT_SUSPEND)) { 15479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Resume completed, re-enable disconnect detection */ 15579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->port_resuming = 0; 15679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_postresume(tegra->phy); 15779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 15879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 15979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 16079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) { 16179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp = ehci_readl(ehci, status_reg); 16279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) { 16379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby retval = -EPIPE; 16479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 16579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 16679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 167b08765749332c54c65c1a6515c01c6eb3fc1843eStephen Warren temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E); 16879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp |= PORT_WKDISC_E | PORT_WKOC_E; 16979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, temp | PORT_SUSPEND, status_reg); 17079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 17179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* 17279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * If a transaction is in progress, there may be a delay in 17379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * suspending the port. Poll until the port is suspended. 17479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby */ 17579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, status_reg, PORT_SUSPEND, 17679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby PORT_SUSPEND, 5000)) 17779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for SUSPEND\n", __func__); 17879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 17979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports); 18079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 18179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 18279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 1831f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin /* For USB1 port we need to issue Port Reset twice internally */ 1841f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin if (tegra->phy->instance == 0 && 1851f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) { 1861f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin spin_unlock_irqrestore(&ehci->lock, flags); 1871f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin return tegra_ehci_internal_port_reset(ehci, status_reg); 1881f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin } 1891f594b64a4f74ece0b7166ca4db05a71a64bd685Jim Lin 19079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* 19179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * Tegra host controller will time the resume operation to clear the bit 19279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * when the port control state switches to HS or FS Idle. This behavior 19379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * is different from EHCI where the host controller driver is required 19479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * to set this bit to a zero after the resume duration is timed in the 19579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * driver. 19679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby */ 19779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby else if (typeReq == ClearPortFeature && 19879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby wValue == USB_PORT_FEAT_SUSPEND) { 19979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp = ehci_readl(ehci, status_reg); 20079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if ((temp & PORT_RESET) || !(temp & PORT_PE)) { 20179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby retval = -EPIPE; 20279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 20379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 20479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 20579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!(temp & PORT_SUSPEND)) 20679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 20779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 20879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Disable disconnect detection during port resume */ 20979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_preresume(tegra->phy); 21079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 21179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25); 21279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 21379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); 21479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* start resume signalling */ 21579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, temp | PORT_RESUME, status_reg); 216a448e4dc25303fe551e4dafe16c8c7c34f1b9d82Alan Stern set_bit(wIndex-1, &ehci->resuming_ports); 21779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 21879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_unlock_irqrestore(&ehci->lock, flags); 21979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby msleep(20); 22079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_lock_irqsave(&ehci->lock, flags); 22179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 22279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Poll until the controller clears RESUME and SUSPEND */ 22379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, status_reg, PORT_RESUME, 0, 2000)) 22479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for RESUME\n", __func__); 22579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000)) 22679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for SUSPEND\n", __func__); 22779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 22879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->reset_done[wIndex-1] = 0; 229a448e4dc25303fe551e4dafe16c8c7c34f1b9d82Alan Stern clear_bit(wIndex-1, &ehci->resuming_ports); 23079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 23179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->port_resuming = 1; 23279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto done; 23379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 23479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 23579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_unlock_irqrestore(&ehci->lock, flags); 23679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 23779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Handle the hub control events here */ 23879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); 23979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobydone: 24079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_unlock_irqrestore(&ehci->lock, flags); 24179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return retval; 24279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 24379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 24479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_restart(struct usb_hcd *hcd) 24579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 24679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci = hcd_to_ehci(hcd); 24779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 24879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_reset(ehci); 24979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 25079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* setup the frame list and Async q heads */ 25179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list); 25279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next); 25379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* setup the command register and set the controller in RUN mode */ 25479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET); 25579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->command |= CMD_RUN; 25679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, ehci->command, &ehci->regs->command); 25779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 25879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby down_write(&ehci_cf_port_reset_rwsem); 25979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag); 26079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* flush posted writes */ 26179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_readl(ehci, &ehci->regs->command); 26279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby up_write(&ehci_cf_port_reset_rwsem); 26379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 26479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 26579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_usb_suspend(struct usb_hcd *hcd) 26679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 26779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 26879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_regs __iomem *hw = tegra->ehci->regs; 26979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby unsigned long flags; 27079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 27179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_lock_irqsave(&tegra->ehci->lock, flags); 27279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 27379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->port_speed = (readl(&hw->port_status[0]) >> 26) & 0x3; 27479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_halt(tegra->ehci); 27579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 27679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 27779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby spin_unlock_irqrestore(&tegra->ehci->lock, flags); 27879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 27979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_power_down(hcd); 28079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return 0; 28179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 28279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 28379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_usb_resume(struct usb_hcd *hcd) 28479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 28579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 28679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci = hcd_to_ehci(hcd); 28779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_regs __iomem *hw = ehci->regs; 28879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby unsigned long val; 28979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 29079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); 29179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_power_up(hcd); 29279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 29379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->port_speed > TEGRA_USB_PHY_PORT_SPEED_HIGH) { 29479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Wait for the phy to detect new devices 29579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * before we restart the controller */ 29679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby msleep(10); 29779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto restart; 29879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 29979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 30079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Force the phy to keep data lines in suspend state */ 30179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_phy_restore_start(tegra->phy, tegra->port_speed); 30279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 30379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Enable host mode */ 30479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tdi_reset(ehci); 30579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 30679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Enable Port Power */ 30779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val = readl(&hw->port_status[0]); 30879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val |= PORT_POWER; 30979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby writel(val, &hw->port_status[0]); 31079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby udelay(10); 31179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 31279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Check if the phy resume from LP0. When the phy resume from LP0 31379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * USB register will be reset. */ 31479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!readl(&hw->async_next)) { 31579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Program the field PTC based on the saved speed mode */ 31679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val = readl(&hw->port_status[0]); 31779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val &= ~PORT_TEST(~0); 31879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_HIGH) 31979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val |= PORT_TEST_FORCE; 32079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_FULL) 32179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val |= PORT_TEST(6); 32279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby else if (tegra->port_speed == TEGRA_USB_PHY_PORT_SPEED_LOW) 32379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val |= PORT_TEST(7); 32479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby writel(val, &hw->port_status[0]); 32579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby udelay(10); 32679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 32779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Disable test mode by setting PTC field to NORMAL_OP */ 32879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val = readl(&hw->port_status[0]); 32979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val &= ~PORT_TEST(~0); 33079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby writel(val, &hw->port_status[0]); 33179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby udelay(10); 33279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 33379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 33479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Poll until CCS is enabled */ 33579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, &hw->port_status[0], PORT_CONNECT, 33679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby PORT_CONNECT, 2000)) { 33779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for PORT_CONNECT\n", __func__); 33879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto restart; 33979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 34079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 34179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Poll until PE is enabled */ 34279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, &hw->port_status[0], PORT_PE, 34379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby PORT_PE, 2000)) { 34479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for USB_PORTSC1_PE\n", __func__); 34579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto restart; 34679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 34779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 34879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Clear the PCI status, to avoid an interrupt taken upon resume */ 34979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val = readl(&hw->status); 35079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val |= STS_PCD; 35179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby writel(val, &hw->status); 35279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 35379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Put controller in suspend mode by writing 1 to SUSP bit of PORTSC */ 35479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val = readl(&hw->port_status[0]); 35579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if ((val & PORT_POWER) && (val & PORT_PE)) { 35679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby val |= PORT_SUSPEND; 35779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby writel(val, &hw->port_status[0]); 35879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 35979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* Wait until port suspend completes */ 36079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (handshake(ehci, &hw->port_status[0], PORT_SUSPEND, 36179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby PORT_SUSPEND, 1000)) { 36279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pr_err("%s: timeout waiting for PORT_SUSPEND\n", 36379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby __func__); 36479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto restart; 36579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 36679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 36779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 36879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_phy_restore_end(tegra->phy); 36979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return 0; 37079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 37179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyrestart: 37279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->port_speed <= TEGRA_USB_PHY_PORT_SPEED_HIGH) 37379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_phy_restore_end(tegra->phy); 37479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 37579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_restart(hcd); 37679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return 0; 37779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 37879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 37979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_shutdown(struct usb_hcd *hcd) 38079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 38179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 38279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 38379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* ehci_shutdown touches the USB controller registers, make sure 38479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby * controller has clocks to it */ 38579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!tegra->host_resumed) 38679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_ehci_power_up(hcd); 38779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 38879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_shutdown(hcd); 38979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 39079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 39179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_setup(struct usb_hcd *hcd) 39279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 39379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct ehci_hcd *ehci = hcd_to_ehci(hcd); 39479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int retval; 39579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 39679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* EHCI registers start at offset 0x100 */ 39779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->caps = hcd->regs + 0x100; 39879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->regs = hcd->regs + 0x100 + 399c430131a02d677aa708f56342c1565edfdacb3c0Jan Andersson HC_LENGTH(ehci, readl(&ehci->caps->hc_capbase)); 40079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 40179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dbg_hcs_params(ehci, "reset"); 40279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dbg_hcc_params(ehci, "reset"); 40379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 40479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* cache this readonly data; minimize chip reads */ 40579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->hcs_params = readl(&ehci->caps->hcs_params); 40679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 40779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* switch to host mode */ 40879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->has_tt = 1; 40979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_reset(ehci); 41079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 41179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby retval = ehci_halt(ehci); 41279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (retval) 41379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return retval; 41479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 41579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby /* data structure init */ 41679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby retval = ehci_init(hcd); 41779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (retval) 41879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return retval; 41979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 42079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci->sbrn = 0x20; 42179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 42279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby ehci_port_power(ehci, 1); 42379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return retval; 42479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 42579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 42679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_PM 42779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_bus_suspend(struct usb_hcd *hcd) 42879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 42979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 43079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int error_status = 0; 43179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 43279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby error_status = ehci_bus_suspend(hcd); 43379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!error_status && tegra->power_down_on_bus_suspend) { 43479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_suspend(hcd); 43579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->bus_suspended = 1; 43679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 43779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 43879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return error_status; 43979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 44079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 44179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_bus_resume(struct usb_hcd *hcd) 44279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 44379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = dev_get_drvdata(hcd->self.controller); 44479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 44579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->bus_suspended && tegra->power_down_on_bus_suspend) { 44679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_resume(hcd); 44779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->bus_suspended = 0; 44879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 44979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 45079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_preresume(tegra->phy); 45179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->port_resuming = 1; 45279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return ehci_bus_resume(hcd); 45379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 45479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 45579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 456fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasustruct dma_aligned_buffer { 457fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell void *kmalloc_ptr; 458fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell void *old_xfer_buffer; 459fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell u8 data[0]; 460fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell}; 461fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 462fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasustatic void free_dma_aligned_buffer(struct urb *urb) 463fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 464fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu struct dma_aligned_buffer *temp; 465fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 466fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER)) 467fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return; 468fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 469fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu temp = container_of(urb->transfer_buffer, 470fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu struct dma_aligned_buffer, data); 471fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 472fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu if (usb_urb_dir_in(urb)) 473fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell memcpy(temp->old_xfer_buffer, temp->data, 474fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer_length); 475fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer = temp->old_xfer_buffer; 476fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell kfree(temp->kmalloc_ptr); 477fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 478fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER; 479fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 480fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 481fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasustatic int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags) 482fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 483fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu struct dma_aligned_buffer *temp, *kmalloc_ptr; 484fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell size_t kmalloc_size; 485fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 486fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (urb->num_sgs || urb->sg || 487fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer_length == 0 || 488fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1))) 489fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return 0; 490fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 491fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell /* Allocate a buffer with enough padding for alignment */ 492fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell kmalloc_size = urb->transfer_buffer_length + 493fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1; 494fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 495fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell kmalloc_ptr = kmalloc(kmalloc_size, mem_flags); 496fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (!kmalloc_ptr) 497fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return -ENOMEM; 498fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 499fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu /* Position our struct dma_aligned_buffer such that data is aligned */ 500fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1; 501fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell temp->kmalloc_ptr = kmalloc_ptr; 502fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell temp->old_xfer_buffer = urb->transfer_buffer; 503fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu if (usb_urb_dir_out(urb)) 504fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell memcpy(temp->data, urb->transfer_buffer, 505fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer_length); 506fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_buffer = temp->data; 507fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 508fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER; 509fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 510fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return 0; 511fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 512fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 513fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morellstatic int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb, 514fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell gfp_t mem_flags) 515fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 516fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell int ret; 517fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 518fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu ret = alloc_dma_aligned_buffer(urb, mem_flags); 519fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (ret) 520fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return ret; 521fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 522fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags); 523fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell if (ret) 524fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu free_dma_aligned_buffer(urb); 525fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 526fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell return ret; 527fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 528fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 529fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morellstatic void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb) 530fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell{ 531fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell usb_hcd_unmap_urb_for_dma(hcd, urb); 532fe375774bd88a358d24c3f624373117c642f6999Venu Byravarasu free_dma_aligned_buffer(urb); 533fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell} 534fbf9865c6d96f4a131092d2018056e86113e5ceaRobert Morell 53579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic const struct hc_driver tegra_ehci_hc_driver = { 53679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .description = hcd_name, 53779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .product_desc = "Tegra EHCI Host Controller", 53879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .hcd_priv_size = sizeof(struct ehci_hcd), 53979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .flags = HCD_USB2 | HCD_MEMORY, 54079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 541c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu /* standard ehci functions */ 54279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .irq = ehci_irq, 54379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .start = ehci_run, 54479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .stop = ehci_stop, 54579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .urb_enqueue = ehci_urb_enqueue, 54679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .urb_dequeue = ehci_urb_dequeue, 54779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .endpoint_disable = ehci_endpoint_disable, 54879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .endpoint_reset = ehci_endpoint_reset, 54979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .get_frame_number = ehci_get_frame, 55079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .hub_status_data = ehci_hub_status_data, 55179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete, 552c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .relinquish_port = ehci_relinquish_port, 553c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .port_handed_over = ehci_port_handed_over, 554c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu 555c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu /* modified ehci functions for tegra */ 556c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .reset = tegra_ehci_setup, 557c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .shutdown = tegra_ehci_shutdown, 558c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .map_urb_for_dma = tegra_ehci_map_urb_for_dma, 559c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma, 560c6fa0b4c4e09a13e034a1c6c542dc2b3539ba1b8Venu Byravarasu .hub_control = tegra_ehci_hub_control, 56179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_PM 56279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .bus_suspend = tegra_ehci_bus_suspend, 56379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .bus_resume = tegra_ehci_bus_resume, 56479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 56579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby}; 56679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 5674a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johanssonstatic int setup_vbus_gpio(struct platform_device *pdev) 5684a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson{ 5694a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson int err = 0; 5704a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson int gpio; 5714a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 5724a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (!pdev->dev.of_node) 5734a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return 0; 5744a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 5754a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson gpio = of_get_named_gpio(pdev->dev.of_node, "nvidia,vbus-gpio", 0); 5764a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (!gpio_is_valid(gpio)) 5774a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return 0; 5784a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 5794a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson err = gpio_request(gpio, "vbus_gpio"); 5804a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (err) { 5814a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson dev_err(&pdev->dev, "can't request vbus gpio %d", gpio); 5824a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return err; 5834a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 5844a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson err = gpio_direction_output(gpio, 1); 5854a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (err) { 5864a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson dev_err(&pdev->dev, "can't enable vbus\n"); 5874a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return err; 5884a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 5894a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson gpio_set_value(gpio, 1); 5904a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 5914a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson return err; 5924a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson} 5934a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 5944a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johanssonstatic u64 tegra_ehci_dma_mask = DMA_BIT_MASK(32); 5954a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 59679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_probe(struct platform_device *pdev) 59779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 59879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct resource *res; 59979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd; 60079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra; 60179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_platform_data *pdata; 60279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int err = 0; 60379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int irq; 60479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby int instance = pdev->id; 60579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 60679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby pdata = pdev->dev.platform_data; 60779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!pdata) { 60879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Platform data missing\n"); 60979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return -EINVAL; 61079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 61179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 6124a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson /* Right now device-tree probed devices don't get dma_mask set. 6134a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * Since shared usb code relies on it, set it here for now. 6144a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * Once we have dma capability bindings this can go away. 6154a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson */ 6164a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (!pdev->dev.dma_mask) 6174a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson pdev->dev.dma_mask = &tegra_ehci_dma_mask; 6184a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 6194a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson setup_vbus_gpio(pdev); 6204a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 62179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra = kzalloc(sizeof(struct tegra_ehci_hcd), GFP_KERNEL); 62279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!tegra) 62379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return -ENOMEM; 62479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 62579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev, 62679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_name(&pdev->dev)); 62779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!hcd) { 62879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Unable to create HCD\n"); 62979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENOMEM; 63079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_hcd; 63179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 63279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 63379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby platform_set_drvdata(pdev, tegra); 63479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 63579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->clk = clk_get(&pdev->dev, NULL); 63679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (IS_ERR(tegra->clk)) { 63779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Can't get ehci clock\n"); 63879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = PTR_ERR(tegra->clk); 63979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_clk; 64079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 64179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 64279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = clk_enable(tegra->clk); 64379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (err) 64479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_clken; 64579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 64679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->emc_clk = clk_get(&pdev->dev, "emc"); 64779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (IS_ERR(tegra->emc_clk)) { 64879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Can't get emc clock\n"); 64979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = PTR_ERR(tegra->emc_clk); 65079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_emc_clk; 65179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 65279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 65379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_enable(tegra->emc_clk); 65479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_set_rate(tegra->emc_clk, 400000000); 65579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 65679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 65779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!res) { 65879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to get I/O memory\n"); 65979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENXIO; 66079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_io; 66179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 66279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->rsrc_start = res->start; 66379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->rsrc_len = resource_size(res); 66479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->regs = ioremap(res->start, resource_size(res)); 66579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!hcd->regs) { 66679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to remap I/O memory\n"); 66779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENOMEM; 66879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_io; 66979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 67079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 6714a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson /* This is pretty ugly and needs to be fixed when we do only 6724a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * device-tree probing. Old code relies on the platform_device 6734a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson * numbering that we lack for device-tree-instantiated devices. 6744a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson */ 6754a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson if (instance < 0) { 6764a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson switch (res->start) { 6774a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson case TEGRA_USB_BASE: 6784a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson instance = 0; 6794a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson break; 6804a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson case TEGRA_USB2_BASE: 6814a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson instance = 1; 6824a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson break; 6834a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson case TEGRA_USB3_BASE: 6844a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson instance = 2; 6854a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson break; 6864a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson default: 6874a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson err = -ENODEV; 6884a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson dev_err(&pdev->dev, "unknown usb instance\n"); 6894a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson goto fail_phy; 6904a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 6914a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson } 6924a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 69379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->phy = tegra_usb_phy_open(instance, hcd->regs, pdata->phy_config, 69479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby TEGRA_USB_PHY_MODE_HOST); 69579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (IS_ERR(tegra->phy)) { 69679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to open USB phy\n"); 69779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENXIO; 69879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail_phy; 69979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 70079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 70179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = tegra_usb_phy_power_on(tegra->phy); 70279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (err) { 70379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to power on the phy\n"); 70479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail; 70579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 70679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 70779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->host_resumed = 1; 70879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->power_down_on_bus_suspend = pdata->power_down_on_bus_suspend; 70979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra->ehci = hcd_to_ehci(hcd); 71079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 71179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby irq = platform_get_irq(pdev, 0); 71279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (!irq) { 71379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to get IRQ\n"); 71479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby err = -ENODEV; 71579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail; 71679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 71779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 71879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_USB_OTG_UTILS 71979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (pdata->operating_mode == TEGRA_USB_OTG) { 720b96d3b08365f5a9603f50f3aadca6012f7eaffa1Heikki Krogerus tegra->transceiver = usb_get_transceiver(); 72179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->transceiver) 7226e13c6505cdff9766d5268ffb8c972c1a2f996e6Heikki Krogerus otg_set_host(tegra->transceiver->otg, &hcd->self); 72379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 72479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 72579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 726b5dd18d8747010e3f3eb1cc76a49f94291938559Yong Zhang err = usb_add_hcd(hcd, irq, IRQF_SHARED); 72779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (err) { 72879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby dev_err(&pdev->dev, "Failed to add USB HCD\n"); 72979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby goto fail; 73079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 73179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 73279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return err; 73379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 73479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail: 73579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_USB_OTG_UTILS 73679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->transceiver) { 7376e13c6505cdff9766d5268ffb8c972c1a2f996e6Heikki Krogerus otg_set_host(tegra->transceiver->otg, NULL); 738b96d3b08365f5a9603f50f3aadca6012f7eaffa1Heikki Krogerus usb_put_transceiver(tegra->transceiver); 73979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 74079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 74179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_close(tegra->phy); 74279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_phy: 74379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby iounmap(hcd->regs); 74479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_io: 74579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_disable(tegra->emc_clk); 74679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->emc_clk); 74779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_emc_clk: 74879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_disable(tegra->clk); 74979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_clken: 75079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->clk); 75179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_clk: 75279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby usb_put_hcd(hcd); 75379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobyfail_hcd: 75479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby kfree(tegra); 75579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return err; 75679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 75779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 75879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_PM 75979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_resume(struct platform_device *pdev) 76079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 76179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); 76279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); 76379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 76479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->bus_suspended) 76579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return 0; 76679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 76779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return tegra_usb_resume(hcd); 76879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 76979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 77079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_suspend(struct platform_device *pdev, pm_message_t state) 77179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 77279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); 77379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); 77479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 77579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->bus_suspended) 77679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return 0; 77779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 77879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (time_before(jiffies, tegra->ehci->next_statechange)) 77979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby msleep(10); 78079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 78179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return tegra_usb_suspend(hcd); 78279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 78379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 78479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 78579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic int tegra_ehci_remove(struct platform_device *pdev) 78679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 78779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); 78879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); 78979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 79079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra == NULL || hcd == NULL) 79179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return -EINVAL; 79279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 79379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_USB_OTG_UTILS 79479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (tegra->transceiver) { 7956e13c6505cdff9766d5268ffb8c972c1a2f996e6Heikki Krogerus otg_set_host(tegra->transceiver->otg, NULL); 796b96d3b08365f5a9603f50f3aadca6012f7eaffa1Heikki Krogerus usb_put_transceiver(tegra->transceiver); 79779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 79879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 79979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 80079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby usb_remove_hcd(hcd); 80179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby usb_put_hcd(hcd); 80279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 80379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby tegra_usb_phy_close(tegra->phy); 80479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby iounmap(hcd->regs); 80579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 80679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_disable(tegra->clk); 80779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->clk); 80879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 80979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_disable(tegra->emc_clk); 81079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby clk_put(tegra->emc_clk); 81179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 81279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby kfree(tegra); 81379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby return 0; 81479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 81579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 81679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic void tegra_ehci_hcd_shutdown(struct platform_device *pdev) 81779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby{ 81879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct tegra_ehci_hcd *tegra = platform_get_drvdata(pdev); 81979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby struct usb_hcd *hcd = ehci_to_hcd(tegra->ehci); 82079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 82179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby if (hcd->driver->shutdown) 82279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby hcd->driver->shutdown(hcd); 82379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby} 82479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby 8254a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johanssonstatic struct of_device_id tegra_ehci_of_match[] __devinitdata = { 8264a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson { .compatible = "nvidia,tegra20-ehci", }, 8274a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson { }, 8284a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson}; 8294a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson 83079ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Gobystatic struct platform_driver tegra_ehci_driver = { 83179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .probe = tegra_ehci_probe, 83279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .remove = tegra_ehci_remove, 83379ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#ifdef CONFIG_PM 83479ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .suspend = tegra_ehci_suspend, 83579ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .resume = tegra_ehci_resume, 83679ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby#endif 83779ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .shutdown = tegra_ehci_hcd_shutdown, 83879ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .driver = { 83979ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby .name = "tegra-ehci", 8404a53f4e692c5df8a4bf9bf059b8007d575b0204aOlof Johansson .of_match_table = tegra_ehci_of_match, 84179ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby } 84279ad3b5add4a683af02d1b51ccb699d1b01f1fbfBenoit Goby}; 843