16c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#ifndef __LINUX_FUSBH200_H 26c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define __LINUX_FUSBH200_H 36c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 46c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* definitions used for the EHCI driver */ 56c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 66c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 76c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * __hc32 and __hc16 are "Host Controller" types, they may be equivalent to 86c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * __leXX (normally) or __beXX (given FUSBH200_BIG_ENDIAN_DESC), depending on 96c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * the host controller implementation. 106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * To facilitate the strongest possible byte-order checking from "sparse" 126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * and so on, we use __leXX unless that's not practical. 136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define __hc32 __le32 156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define __hc16 __le16 166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* statistics can be kept for tuning/monitoring */ 186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_stats { 196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* irq usage */ 206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long normal; 216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long error; 226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long iaa; 236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long lost_iaa; 246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* termination of urbs from core */ 266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long complete; 276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long unlink; 286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* fusbh200_hcd->lock guards shared data against other CPUs: 316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * fusbh200_hcd: async, unlink, periodic (and shadow), ... 326c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * usb_host_endpoint: hcpriv 336c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * fusbh200_qh: qh_next, qtd_list 346c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * fusbh200_qtd: qtd_list 356c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 366c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Also, hold this lock when talking to HC registers or 376c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * when updating hw_* fields in shared qh/qtd/... structures. 386c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 396c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 406c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_MAX_ROOT_PORTS 1 /* see HCS_N_PORTS */ 416c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 426c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 436c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * fusbh200_rh_state values of FUSBH200_RH_RUNNING or above mean that the 446c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * controller may be doing DMA. Lower values mean there's no DMA. 456c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 466c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenenum fusbh200_rh_state { 476c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_RH_HALTED, 486c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_RH_SUSPENDED, 496c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_RH_RUNNING, 506c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_RH_STOPPING 516c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 526c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 536c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 546c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Timer events, ordered by increasing delay length. 556c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Always update event_delays_ns[] and event_handlers[] (defined in 566c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * ehci-timer.c) in parallel with this list. 576c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 586c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenenum fusbh200_hrtimer_event { 596c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_POLL_ASS, /* Poll for async schedule off */ 606c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_POLL_PSS, /* Poll for periodic schedule off */ 616c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_POLL_DEAD, /* Wait for dead controller to stop */ 626c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_UNLINK_INTR, /* Wait for interrupt QH unlink */ 636c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_FREE_ITDS, /* Wait for unused iTDs and siTDs */ 646c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_ASYNC_UNLINKS, /* Unlink empty async QHs */ 656c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_IAA_WATCHDOG, /* Handle lost IAA interrupts */ 666c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_DISABLE_PERIODIC, /* Wait to disable periodic sched */ 676c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_DISABLE_ASYNC, /* Wait to disable async sched */ 686c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_IO_WATCHDOG, /* Check for missing IRQs */ 696c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_HRTIMER_NUM_EVENTS /* Must come last */ 706c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 716c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_HRTIMER_NO_EVENT 99 726c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 736c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_hcd { /* one per controller */ 746c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* timing support */ 756c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen enum fusbh200_hrtimer_event next_hrtimer_event; 766c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned enabled_hrtimer_events; 776c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen ktime_t hr_timeouts[FUSBH200_HRTIMER_NUM_EVENTS]; 786c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct hrtimer hrtimer; 796c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 806c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen int PSS_poll_count; 816c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen int ASS_poll_count; 826c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen int died_poll_count; 836c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 846c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* glue to PCI and HCD framework */ 856c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_caps __iomem *caps; 866c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_regs __iomem *regs; 876c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_dbg_port __iomem *debug; 886c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 896c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __u32 hcs_params; /* cached register copy */ 906c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen spinlock_t lock; 916c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen enum fusbh200_rh_state rh_state; 926c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 936c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* general schedule support */ 946c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen bool scanning:1; 956c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen bool need_rescan:1; 966c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen bool intr_unlinking:1; 976c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen bool async_unlinking:1; 986c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen bool shutdown:1; 996c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *qh_scan_next; 1006c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1016c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* async schedule support */ 1026c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *async; 1036c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *dummy; /* For AMD quirk use */ 1046c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *async_unlink; 1056c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *async_unlink_last; 1066c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *async_iaa; 1076c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned async_unlink_cycle; 1086c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned async_count; /* async activity count */ 1096c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* periodic schedule support */ 1116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DEFAULT_I_TDPS 1024 /* some HCs can do less */ 1126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned periodic_size; 1136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 *periodic; /* hw periodic table */ 1146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen dma_addr_t periodic_dma; 1156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head intr_qh_list; 1166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned i_thresh; /* uframes HC might cache */ 1176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen union fusbh200_shadow *pshadow; /* mirror hw periodic table */ 1196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *intr_unlink; 1206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *intr_unlink_last; 1216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned intr_unlink_cycle; 1226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned now_frame; /* frame from HC hardware */ 1236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned next_frame; /* scan periodic, start here */ 1246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned intr_count; /* intr activity count */ 1256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned isoc_count; /* isoc activity count */ 1266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned periodic_count; /* periodic activity count */ 1276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned uframe_periodic_max; /* max periodic time per uframe */ 1286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* list of itds completed while now_frame was still active */ 1316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head cached_itd_list; 1326c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_itd *last_itd_to_free; 1336c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1346c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* per root hub port */ 1356c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long reset_done [FUSBH200_MAX_ROOT_PORTS]; 1366c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1376c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* bit vectors (one bit per port) */ 1386c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long bus_suspended; /* which ports were 1396c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen already suspended at the start of a bus suspend */ 1406c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long companion_ports; /* which ports are 1416c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen dedicated to the companion controller */ 1426c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long owned_ports; /* which ports are 1436c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen owned by the companion during a bus suspend */ 1446c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long port_c_suspend; /* which ports have 1456c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen the change-suspend feature turned on */ 1466c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long suspended_ports; /* which ports are 1476c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen suspended */ 1486c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long resuming_ports; /* which ports have 1496c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen started to resume */ 1506c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1516c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* per-HC memory pools (could be per-bus, but ...) */ 1526c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct dma_pool *qh_pool; /* qh per active urb */ 1536c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct dma_pool *qtd_pool; /* one or more per qh */ 1546c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct dma_pool *itd_pool; /* itd per iso urb */ 1556c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1566c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned random_frame; 1576c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned long next_statechange; 1586c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen ktime_t last_periodic_enable; 1596c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 command; 1606c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1616c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* SILICON QUIRKS */ 1626c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned need_io_watchdog:1; 1636c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned fs_i_thresh:1; /* Intel iso scheduling */ 1646c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1656c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 sbrn; /* packed release number */ 1666c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1676c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* irq statistics */ 1686c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_stats stats; 1696c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen# define COUNT(x) do { (x)++; } while (0) 1706c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1716c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* debug files */ 1726c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct dentry *debug_dir; 1736c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 1746c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1756c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* convert between an HCD pointer and the corresponding FUSBH200_HCD */ 1766c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline struct fusbh200_hcd *hcd_to_fusbh200 (struct usb_hcd *hcd) 1776c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 1786c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return (struct fusbh200_hcd *) (hcd->hcd_priv); 1796c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 1806c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline struct usb_hcd *fusbh200_to_hcd (struct fusbh200_hcd *fusbh200) 1816c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 1826c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return container_of ((void *) fusbh200, struct usb_hcd, hcd_priv); 1836c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 1846c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1856c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 1866c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1876c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* EHCI register interface, corresponds to EHCI Revision 0.95 specification */ 1886c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 1896c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* Section 2.2 Host Controller Capability Registers */ 1906c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_caps { 1916c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* these fields are specified as 8 and 16 bit registers, 1926c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * but some hosts can't perform 8 or 16 bit PCI accesses. 1936c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * some hosts treat caplength and hciversion as parts of a 32-bit 1946c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * register, others treat them as two separate registers, this 1956c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * affects the memory map for big endian controllers. 1966c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 1976c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 hc_capbase; 1986c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define HC_LENGTH(fusbh200, p) (0x00ff&((p) >> /* bits 7:0 / offset 00h */ \ 1996c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen (fusbh200_big_endian_capbase(fusbh200) ? 24 : 0))) 2006c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define HC_VERSION(fusbh200, p) (0xffff&((p) >> /* bits 31:16 / offset 02h */ \ 2016c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen (fusbh200_big_endian_capbase(fusbh200) ? 0 : 16))) 2026c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 hcs_params; /* HCSPARAMS - offset 0x4 */ 2036c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */ 2046c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2056c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 hcc_params; /* HCCPARAMS - offset 0x8 */ 2066c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define HCC_CANPARK(p) ((p)&(1 << 2)) /* true: can park on async qh */ 2076c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define HCC_PGM_FRAMELISTLEN(p) ((p)&(1 << 1)) /* true: periodic_size changes*/ 2086c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 portroute[8]; /* nibbles for routing - offset 0xC */ 2096c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 2106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* Section 2.3 Host Controller Operational Registers */ 2136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_regs { 2146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* USBCMD: offset 0x00 */ 2166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 command; 2176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* EHCI 1.1 addendum */ 2196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 23:16 is r/w intr rate, in microframes; default "8" == 1/msec */ 2206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define CMD_PARK (1<<11) /* enable "park" on async qh */ 2216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define CMD_PARK_CNT(c) (((c)>>8)&3) /* how many transfers to park for */ 2226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define CMD_IAAD (1<<6) /* "doorbell" interrupt async advance */ 2236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define CMD_ASE (1<<5) /* async schedule enable */ 2246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define CMD_PSE (1<<4) /* periodic schedule enable */ 2256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 3:2 is periodic frame list size */ 2266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define CMD_RESET (1<<1) /* reset HC not bus */ 2276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define CMD_RUN (1<<0) /* start/stop HC */ 2286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* USBSTS: offset 0x04 */ 2306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 status; 2316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_ASS (1<<15) /* Async Schedule Status */ 2326c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_PSS (1<<14) /* Periodic Schedule Status */ 2336c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_RECL (1<<13) /* Reclamation */ 2346c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_HALT (1<<12) /* Not running (any reason) */ 2356c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* some bits reserved */ 2366c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* these STS_* flags are also intr_enable bits (USBINTR) */ 2376c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_IAA (1<<5) /* Interrupted on async advance */ 2386c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_FATAL (1<<4) /* such as some PCI access errors */ 2396c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_FLR (1<<3) /* frame list rolled over */ 2406c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_PCD (1<<2) /* port change detect */ 2416c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_ERR (1<<1) /* "error" completion (overflow, ...) */ 2426c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STS_INT (1<<0) /* "normal" completion (short, ...) */ 2436c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2446c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* USBINTR: offset 0x08 */ 2456c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 intr_enable; 2466c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2476c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* FRINDEX: offset 0x0C */ 2486c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 frame_index; /* current microframe number */ 2496c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* CTRLDSSEGMENT: offset 0x10 */ 2506c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 segment; /* address bits 63:32 if needed */ 2516c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* PERIODICLISTBASE: offset 0x14 */ 2526c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 frame_list; /* points to periodic list */ 2536c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* ASYNCLISTADDR: offset 0x18 */ 2546c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 async_next; /* address of next async queue head */ 2556c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2566c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 reserved1; 2576c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* PORTSC: offset 0x20 */ 2586c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 port_status; 2596c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 31:23 reserved */ 2606c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_USB11(x) (((x)&(3<<10)) == (1<<10)) /* USB 1.1 device */ 2616c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_RESET (1<<8) /* reset port */ 2626c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_SUSPEND (1<<7) /* suspend port */ 2636c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_RESUME (1<<6) /* resume it */ 2646c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_PEC (1<<3) /* port enable change */ 2656c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_PE (1<<2) /* port enable */ 2666c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_CSC (1<<1) /* connect status change */ 2676c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_CONNECT (1<<0) /* device connected */ 2686c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define PORT_RWC_BITS (PORT_CSC | PORT_PEC) 2696c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2706c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 reserved2[3]; 2716c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2726c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* BMCSR: offset 0x30 */ 2736c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 bmcsr; /* Bus Moniter Control/Status Register */ 2746c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define BMCSR_HOST_SPD_TYP (3<<9) 2756c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define BMCSR_VBUS_OFF (1<<4) 2766c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define BMCSR_INT_POLARITY (1<<3) 2776c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2786c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* BMISR: offset 0x34 */ 2796c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 bmisr; /* Bus Moniter Interrupt Status Register*/ 2806c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define BMISR_OVC (1<<1) 2816c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2826c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* BMIER: offset 0x38 */ 2836c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 bmier; /* Bus Moniter Interrupt Enable Register */ 2846c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define BMIER_OVC_EN (1<<1) 2856c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define BMIER_VBUS_ERR_EN (1<<0) 2866c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 2876c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 2886c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* Appendix C, Debug port ... intended for use with special "debug devices" 2896c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * that can help if there's no serial console. (nonstandard enumeration.) 2906c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 2916c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_dbg_port { 2926c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 control; 2936c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_OWNER (1<<30) 2946c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_ENABLED (1<<28) 2956c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_DONE (1<<16) 2966c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_INUSE (1<<10) 2976c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_ERRCODE(x) (((x)>>7)&0x07) 2986c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen# define DBGP_ERR_BAD 1 2996c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen# define DBGP_ERR_SIGNAL 2 3006c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_ERROR (1<<6) 3016c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_GO (1<<5) 3026c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_OUT (1<<4) 3036c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_LEN(x) (((x)>>0)&0x0f) 3046c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 pids; 3056c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_PID_GET(x) (((x)>>16)&0xff) 3066c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_PID_SET(data, tok) (((data)<<8)|(tok)) 3076c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 data03; 3086c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 data47; 3096c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 address; 3106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define DBGP_EPADDR(dev, ep) (((dev)<<8)|(ep)) 3116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 3126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#ifdef CONFIG_EARLY_PRINTK_DBGP 3146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#include <linux/init.h> 3156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenextern int __init early_dbgp_init(char *s); 3166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenextern struct console early_dbgp_console; 3176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#endif /* CONFIG_EARLY_PRINTK_DBGP */ 3186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct usb_hcd; 3206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline int xen_dbgp_reset_prep(struct usb_hcd *hcd) 3226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 3236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return 1; /* Shouldn't this be 0? */ 3246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 3256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline int xen_dbgp_external_startup(struct usb_hcd *hcd) 3276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 3286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return -1; 3296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 3306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#ifdef CONFIG_EARLY_PRINTK_DBGP 3326c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* Call backs from fusbh200 host driver to fusbh200 debug driver */ 3336c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenextern int dbgp_external_startup(struct usb_hcd *); 3346c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenextern int dbgp_reset_prep(struct usb_hcd *hcd); 3356c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#else 3366c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline int dbgp_reset_prep(struct usb_hcd *hcd) 3376c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 3386c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return xen_dbgp_reset_prep(hcd); 3396c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 3406c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline int dbgp_external_startup(struct usb_hcd *hcd) 3416c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 3426c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return xen_dbgp_external_startup(hcd); 3436c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 3446c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#endif 3456c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3466c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 3476c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3486c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_NEXT(fusbh200, dma) cpu_to_hc32(fusbh200, (u32)dma) 3496c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3506c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 3516c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * EHCI Specification 0.95 Section 3.5 3526c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * QTD: describe data transfer components (buffer, direction, ...) 3536c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram". 3546c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 3556c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * These are associated only with "QH" (Queue Head) structures, 3566c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * used with control, bulk, and interrupt transfers. 3576c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 3586c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_qtd { 3596c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* first part defined by EHCI spec */ 3606c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_next; /* see EHCI 3.5.1 */ 3616c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_alt_next; /* see EHCI 3.5.2 */ 3626c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_token; /* see EHCI 3.5.3 */ 3636c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_TOGGLE (1 << 31) /* data toggle */ 3646c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_LENGTH(tok) (((tok)>>16) & 0x7fff) 3656c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_IOC (1 << 15) /* interrupt on complete */ 3666c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_CERR(tok) (((tok)>>10) & 0x3) 3676c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_PID(tok) (((tok)>>8) & 0x3) 3686c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_ACTIVE (1 << 7) /* HC may execute this */ 3696c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_HALT (1 << 6) /* halted on error */ 3706c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_DBE (1 << 5) /* data buffer error (in HC) */ 3716c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_BABBLE (1 << 4) /* device was babbling (qtd halted) */ 3726c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_XACT (1 << 3) /* device gave illegal response */ 3736c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_MMF (1 << 2) /* incomplete split transaction */ 3746c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_STS (1 << 1) /* split transaction state */ 3756c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_STS_PING (1 << 0) /* issue PING? */ 3766c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3776c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define ACTIVE_BIT(fusbh200) cpu_to_hc32(fusbh200, QTD_STS_ACTIVE) 3786c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define HALT_BIT(fusbh200) cpu_to_hc32(fusbh200, QTD_STS_HALT) 3796c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define STATUS_BIT(fusbh200) cpu_to_hc32(fusbh200, QTD_STS_STS) 3806c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3816c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_buf [5]; /* see EHCI 3.5.4 */ 3826c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_buf_hi [5]; /* Appendix B */ 3836c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3846c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* the rest is HCD-private */ 3856c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen dma_addr_t qtd_dma; /* qtd address */ 3866c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head qtd_list; /* sw qtd list */ 3876c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct urb *urb; /* qtd's urb */ 3886c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen size_t length; /* length of buffer */ 3896c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} __attribute__ ((aligned (32))); 3906c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3916c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* mask NakCnt+T in qh->hw_alt_next */ 3926c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QTD_MASK(fusbh200) cpu_to_hc32 (fusbh200, ~0x1f) 3936c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3946c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define IS_SHORT_READ(token) (QTD_LENGTH (token) != 0 && QTD_PID (token) == 1) 3956c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3966c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 3976c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 3986c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* type tag from {qh,itd,fstn}->hw_next */ 3996c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define Q_NEXT_TYPE(fusbh200,dma) ((dma) & cpu_to_hc32(fusbh200, 3 << 1)) 4006c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4016c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 4026c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Now the following defines are not converted using the 4036c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * cpu_to_le32() macro anymore, since we have to support 4046c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * "dynamic" switching between be and le support, so that the driver 4056c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * can be used on one system with SoC EHCI controller using big-endian 4066c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * descriptors as well as a normal little-endian PCI EHCI controller. 4076c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 4086c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* values for that type tag */ 4096c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define Q_TYPE_ITD (0 << 1) 4106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define Q_TYPE_QH (1 << 1) 4116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define Q_TYPE_SITD (2 << 1) 4126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define Q_TYPE_FSTN (3 << 1) 4136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* next async queue entry, or pointer to interrupt/periodic QH */ 4156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_NEXT(fusbh200,dma) (cpu_to_hc32(fusbh200, (((u32)dma)&~0x01f)|Q_TYPE_QH)) 4166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* for periodic/async schedules and qtd lists, mark end of list */ 4186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_LIST_END(fusbh200) cpu_to_hc32(fusbh200, 1) /* "null pointer" to hw */ 4196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 4216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Entries in periodic shadow table are pointers to one of four kinds 4226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * of data structure. That's dictated by the hardware; a type tag is 4236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * encoded in the low bits of the hardware's periodic schedule. Use 4246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Q_NEXT_TYPE to get the tag. 4256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 4266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * For entries in the async schedule, the type tag always says "qh". 4276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 4286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenunion fusbh200_shadow { 4296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *qh; /* Q_TYPE_QH */ 4306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_itd *itd; /* Q_TYPE_ITD */ 4316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_fstn *fstn; /* Q_TYPE_FSTN */ 4326c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 *hw_next; /* (all types) */ 4336c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen void *ptr; 4346c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 4356c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4366c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 4376c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4386c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 4396c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * EHCI Specification 0.95 Section 3.6 4406c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * QH: describes control/bulk/interrupt endpoints 4416c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * See Fig 3-7 "Queue Head Structure Layout". 4426c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 4436c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * These appear in both the async and (for interrupt) periodic schedules. 4446c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 4456c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4466c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* first part defined by EHCI spec */ 4476c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_qh_hw { 4486c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_next; /* see EHCI 3.6.1 */ 4496c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_info1; /* see EHCI 3.6.2 */ 4506c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_CONTROL_EP (1 << 27) /* FS/LS control endpoint */ 4516c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_HEAD (1 << 15) /* Head of async reclamation list */ 4526c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_TOGGLE_CTL (1 << 14) /* Data toggle control */ 4536c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_HIGH_SPEED (2 << 12) /* Endpoint speed */ 4546c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_LOW_SPEED (1 << 12) 4556c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_FULL_SPEED (0 << 12) 4566c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_INACTIVATE (1 << 7) /* Inactivate on next transaction */ 4576c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_info2; /* see EHCI 3.6.2 */ 4586c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_SMASK 0x000000ff 4596c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_CMASK 0x0000ff00 4606c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_HUBADDR 0x007f0000 4616c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_HUBPORT 0x3f800000 4626c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_MULT 0xc0000000 4636c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_current; /* qtd list - see EHCI 3.6.4 */ 4646c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4656c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* qtd overlay (hardware parts of a struct fusbh200_qtd) */ 4666c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_qtd_next; 4676c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_alt_next; 4686c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_token; 4696c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_buf [5]; 4706c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_buf_hi [5]; 4716c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} __attribute__ ((aligned(32))); 4726c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4736c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_qh { 4746c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh_hw *hw; /* Must come first */ 4756c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* the rest is HCD-private */ 4766c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen dma_addr_t qh_dma; /* address of qh */ 4776c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen union fusbh200_shadow qh_next; /* ptr to qh; or periodic */ 4786c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head qtd_list; /* sw qtd list */ 4796c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head intr_node; /* list of intr QHs */ 4806c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qtd *dummy; 4816c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh *unlink_next; /* next on unlink list */ 4826c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4836c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned unlink_cycle; 4846c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4856c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 needs_rescan; /* Dequeue during giveback */ 4866c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 qh_state; 4876c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_STATE_LINKED 1 /* HC sees this */ 4886c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_STATE_UNLINK 2 /* HC may still see this */ 4896c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_STATE_IDLE 3 /* HC doesn't see this */ 4906c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_STATE_UNLINK_WAIT 4 /* LINKED and on unlink q */ 4916c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_STATE_COMPLETING 5 /* don't touch token.HALT */ 4926c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4936c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 xacterrs; /* XactErr retry counter */ 4946c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define QH_XACTERR_MAX 32 /* XactErr retry limit */ 4956c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 4966c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* periodic schedule info */ 4976c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 usecs; /* intr bandwidth */ 4986c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 gap_uf; /* uframes split/csplit gap */ 4996c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 c_usecs; /* ... split completion bw */ 5006c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u16 tt_usecs; /* tt downstream bandwidth */ 5016c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned short period; /* polling interval */ 5026c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned short start; /* where polling starts */ 5036c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define NO_FRAME ((unsigned short)~0) /* pick new start */ 5046c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5056c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct usb_device *dev; /* access to TT */ 5066c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned is_out:1; /* bulk or intr OUT */ 5076c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned clearing_tt:1; /* Clear-TT-Buf in progress */ 5086c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 5096c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 5116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* description of one iso transaction (up to 3 KB data if highspeed) */ 5136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_iso_packet { 5146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* These will be copied to iTD when scheduling */ 5156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u64 bufp; /* itd->hw_bufp{,_hi}[pg] |= */ 5166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 transaction; /* itd->hw_transaction[i] |= */ 5176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 cross; /* buf crosses pages */ 5186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* for full speed OUT splits */ 5196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u32 buf1; 5206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 5216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* temporary schedule data for packets from iso urbs (both speeds) 5236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * each packet is one logical usb transaction to the device (not TT), 5246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * beginning at stream->next_uframe 5256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 5266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_iso_sched { 5276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head td_list; 5286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned span; 5296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_iso_packet packet [0]; 5306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 5316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5326c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 5336c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * fusbh200_iso_stream - groups all (s)itds for this endpoint. 5346c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * acts like a qh would, if EHCI had them for ISO. 5356c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 5366c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_iso_stream { 5376c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* first field matches fusbh200_hq, but is NULL */ 5386c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_qh_hw *hw; 5396c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5406c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 bEndpointAddress; 5416c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 highspeed; 5426c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head td_list; /* queued itds */ 5436c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head free_list; /* list of unused itds */ 5446c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct usb_device *udev; 5456c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct usb_host_endpoint *ep; 5466c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5476c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* output of (re)scheduling */ 5486c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen int next_uframe; 5496c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 splits; 5506c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5516c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* the rest is derived from the endpoint descriptor, 5526c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * trusting urb->interval == f(epdesc->bInterval) and 5536c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * including the extra info for hw_bufp[0..2] 5546c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 5556c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u8 usecs, c_usecs; 5566c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u16 interval; 5576c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u16 tt_usecs; 5586c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u16 maxp; 5596c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen u16 raw_mask; 5606c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned bandwidth; 5616c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5626c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* This is used to initialize iTD's hw_bufp fields */ 5636c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 buf0; 5646c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 buf1; 5656c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 buf2; 5666c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5676c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* this is used to initialize sITD's tt info */ 5686c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 address; 5696c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}; 5706c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5716c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 5726c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5736c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 5746c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * EHCI Specification 0.95 Section 3.3 5756c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Fig 3-4 "Isochronous Transaction Descriptor (iTD)" 5766c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 5776c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Schedule records for high speed iso xfers 5786c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 5796c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_itd { 5806c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* first part defined by EHCI spec */ 5816c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_next; /* see EHCI 3.3.1 */ 5826c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_transaction [8]; /* see EHCI 3.3.2 */ 5836c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_ISOC_ACTIVE (1<<31) /* activate transfer this slot */ 5846c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_ISOC_BUF_ERR (1<<30) /* Data buffer error */ 5856c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_ISOC_BABBLE (1<<29) /* babble detected */ 5866c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_ISOC_XACTERR (1<<28) /* XactErr - transaction error */ 5876c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_ITD_LENGTH(tok) (((tok)>>16) & 0x0fff) 5886c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define FUSBH200_ITD_IOC (1 << 15) /* interrupt on complete */ 5896c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5906c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define ITD_ACTIVE(fusbh200) cpu_to_hc32(fusbh200, FUSBH200_ISOC_ACTIVE) 5916c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5926c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_bufp [7]; /* see EHCI 3.3.3 */ 5936c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_bufp_hi [7]; /* Appendix B */ 5946c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5956c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* the rest is HCD-private */ 5966c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen dma_addr_t itd_dma; /* for this itd */ 5976c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen union fusbh200_shadow itd_next; /* ptr to periodic q entry */ 5986c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 5996c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct urb *urb; 6006c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct fusbh200_iso_stream *stream; /* endpoint's queue */ 6016c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen struct list_head itd_list; /* list of stream's itds */ 6026c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6036c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* any/all hw_transactions here may be used by that urb */ 6046c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned frame; /* where scheduled */ 6056c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned pg; 6066c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen unsigned index[8]; /* in urb->iso_frame_desc */ 6076c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} __attribute__ ((aligned (32))); 6086c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6096c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 6106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 6126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * EHCI Specification 0.96 Section 3.7 6136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Periodic Frame Span Traversal Node (FSTN) 6146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 6156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Manages split interrupt transactions (using TT) that span frame boundaries 6166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * into uframes 0/1; see 4.12.2.2. In those uframes, a "save place" FSTN 6176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * makes the HC jump (back) to a QH to scan for fs/ls QH completions until 6186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * it hits a "restore" FSTN; then it returns to finish other uframe 0/1 work. 6196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 6206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstruct fusbh200_fstn { 6216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_next; /* any periodic q entry */ 6226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __hc32 hw_prev; /* qh or FUSBH200_LIST_END */ 6236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen /* the rest is HCD-private */ 6256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen dma_addr_t fstn_dma; 6266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen union fusbh200_shadow fstn_next; /* ptr to periodic q entry */ 6276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} __attribute__ ((aligned (32))); 6286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 6306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* Prepare the PORTSC wakeup flags during controller suspend/resume */ 6326c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6336c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define fusbh200_prepare_ports_for_controller_suspend(fusbh200, do_wakeup) \ 6346c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen fusbh200_adjust_port_wakeup_flags(fusbh200, true, do_wakeup); 6356c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6366c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define fusbh200_prepare_ports_for_controller_resume(fusbh200) \ 6376c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen fusbh200_adjust_port_wakeup_flags(fusbh200, false, false); 6386c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6396c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 6406c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6416c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 6426c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * Some EHCI controllers have a Transaction Translator built into the 6436c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * root hub. This is a non-standard feature. Each controller will need 6446c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * to add code to the following inline functions, and call them as 6456c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * needed (mostly in root hub code). 6466c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 6476c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6486c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline unsigned int 6496c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenfusbh200_get_speed(struct fusbh200_hcd *fusbh200, unsigned int portsc) 6506c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 6516c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return (readl(&fusbh200->regs->bmcsr) 6526c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen & BMCSR_HOST_SPD_TYP) >> 9; 6536c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 6546c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6556c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* Returns the speed of a device attached to a port on the root hub. */ 6566c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline unsigned int 6576c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenfusbh200_port_speed(struct fusbh200_hcd *fusbh200, unsigned int portsc) 6586c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 6596c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen switch (fusbh200_get_speed(fusbh200, portsc)) { 6606c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen case 0: 6616c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return 0; 6626c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen case 1: 6636c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return USB_PORT_STAT_LOW_SPEED; 6646c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen case 2: 6656c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen default: 6666c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return USB_PORT_STAT_HIGH_SPEED; 6676c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen } 6686c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 6696c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6706c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 6716c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6726c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define fusbh200_has_fsl_portno_bug(e) (0) 6736c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6746c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* 6756c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * While most USB host controllers implement their registers in 6766c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * little-endian format, a minority (celleb companion chip) implement 6776c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * them in big endian format. 6786c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 6796c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * This attempts to support either format at compile time without a 6806c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * runtime penalty, or both formats with the additional overhead 6816c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * of checking a flag bit. 6826c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen * 6836c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen */ 6846c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6856c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define fusbh200_big_endian_mmio(e) 0 6866c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define fusbh200_big_endian_capbase(e) 0 6876c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6886c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline unsigned int fusbh200_readl(const struct fusbh200_hcd *fusbh200, 6896c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen __u32 __iomem * regs) 6906c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 6916c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return readl(regs); 6926c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 6936c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 6946c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline void fusbh200_writel(const struct fusbh200_hcd *fusbh200, 6956c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen const unsigned int val, __u32 __iomem *regs) 6966c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 6976c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen writel(val, regs); 6986c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 6996c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 7006c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* cpu to fusbh200 */ 7016c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline __hc32 cpu_to_hc32 (const struct fusbh200_hcd *fusbh200, const u32 x) 7026c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 7036c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return cpu_to_le32(x); 7046c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 7056c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 7066c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/* fusbh200 to cpu */ 7076c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline u32 hc32_to_cpu (const struct fusbh200_hcd *fusbh200, const __hc32 x) 7086c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 7096c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return le32_to_cpu(x); 7106c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 7116c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 7126c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline u32 hc32_to_cpup (const struct fusbh200_hcd *fusbh200, const __hc32 *x) 7136c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 7146c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return le32_to_cpup(x); 7156c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 7166c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 7176c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 7186c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 7196c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chenstatic inline unsigned fusbh200_read_frame_index(struct fusbh200_hcd *fusbh200) 7206c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen{ 7216c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen return fusbh200_readl(fusbh200, &fusbh200->regs->frame_index); 7226c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen} 7236c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 7246c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#define fusbh200_itdlen(urb, desc, t) ({ \ 7256c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen usb_pipein((urb)->pipe) ? \ 7266c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen (desc)->length - FUSBH200_ITD_LENGTH(t) : \ 7276c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen FUSBH200_ITD_LENGTH(t); \ 7286c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen}) 7296c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen/*-------------------------------------------------------------------------*/ 7306c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen 7316c920bfb98d07a883918733075a4bc4287e36946Yuan-Hsin Chen#endif /* __LINUX_FUSBH200_H */ 732