oxu210hp-hcd.c revision 27729aadd31dafddaaf64c24f8ef6d0ff750f3aa
1/* 2 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it> 3 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it> 4 * 5 * This code is *strongly* based on EHCI-HCD code by David Brownell since 6 * the chip is a quasi-EHCI compatible. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16 * for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software Foundation, 20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 21 */ 22 23#include <linux/module.h> 24#include <linux/pci.h> 25#include <linux/dmapool.h> 26#include <linux/kernel.h> 27#include <linux/delay.h> 28#include <linux/ioport.h> 29#include <linux/sched.h> 30#include <linux/slab.h> 31#include <linux/errno.h> 32#include <linux/init.h> 33#include <linux/timer.h> 34#include <linux/list.h> 35#include <linux/interrupt.h> 36#include <linux/usb.h> 37#include <linux/usb/hcd.h> 38#include <linux/moduleparam.h> 39#include <linux/dma-mapping.h> 40#include <linux/io.h> 41 42#include <asm/irq.h> 43#include <asm/system.h> 44#include <asm/unaligned.h> 45 46#include <linux/irq.h> 47#include <linux/platform_device.h> 48 49#include "oxu210hp.h" 50 51#define DRIVER_VERSION "0.0.50" 52 53/* 54 * Main defines 55 */ 56 57#define oxu_dbg(oxu, fmt, args...) \ 58 dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args) 59#define oxu_err(oxu, fmt, args...) \ 60 dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args) 61#define oxu_info(oxu, fmt, args...) \ 62 dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args) 63 64static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu) 65{ 66 return container_of((void *) oxu, struct usb_hcd, hcd_priv); 67} 68 69static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd) 70{ 71 return (struct oxu_hcd *) (hcd->hcd_priv); 72} 73 74/* 75 * Debug stuff 76 */ 77 78#undef OXU_URB_TRACE 79#undef OXU_VERBOSE_DEBUG 80 81#ifdef OXU_VERBOSE_DEBUG 82#define oxu_vdbg oxu_dbg 83#else 84#define oxu_vdbg(oxu, fmt, args...) /* Nop */ 85#endif 86 87#ifdef DEBUG 88 89static int __attribute__((__unused__)) 90dbg_status_buf(char *buf, unsigned len, const char *label, u32 status) 91{ 92 return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s", 93 label, label[0] ? " " : "", status, 94 (status & STS_ASS) ? " Async" : "", 95 (status & STS_PSS) ? " Periodic" : "", 96 (status & STS_RECL) ? " Recl" : "", 97 (status & STS_HALT) ? " Halt" : "", 98 (status & STS_IAA) ? " IAA" : "", 99 (status & STS_FATAL) ? " FATAL" : "", 100 (status & STS_FLR) ? " FLR" : "", 101 (status & STS_PCD) ? " PCD" : "", 102 (status & STS_ERR) ? " ERR" : "", 103 (status & STS_INT) ? " INT" : "" 104 ); 105} 106 107static int __attribute__((__unused__)) 108dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable) 109{ 110 return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s", 111 label, label[0] ? " " : "", enable, 112 (enable & STS_IAA) ? " IAA" : "", 113 (enable & STS_FATAL) ? " FATAL" : "", 114 (enable & STS_FLR) ? " FLR" : "", 115 (enable & STS_PCD) ? " PCD" : "", 116 (enable & STS_ERR) ? " ERR" : "", 117 (enable & STS_INT) ? " INT" : "" 118 ); 119} 120 121static const char *const fls_strings[] = 122 { "1024", "512", "256", "??" }; 123 124static int dbg_command_buf(char *buf, unsigned len, 125 const char *label, u32 command) 126{ 127 return scnprintf(buf, len, 128 "%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s", 129 label, label[0] ? " " : "", command, 130 (command & CMD_PARK) ? "park" : "(park)", 131 CMD_PARK_CNT(command), 132 (command >> 16) & 0x3f, 133 (command & CMD_LRESET) ? " LReset" : "", 134 (command & CMD_IAAD) ? " IAAD" : "", 135 (command & CMD_ASE) ? " Async" : "", 136 (command & CMD_PSE) ? " Periodic" : "", 137 fls_strings[(command >> 2) & 0x3], 138 (command & CMD_RESET) ? " Reset" : "", 139 (command & CMD_RUN) ? "RUN" : "HALT" 140 ); 141} 142 143static int dbg_port_buf(char *buf, unsigned len, const char *label, 144 int port, u32 status) 145{ 146 char *sig; 147 148 /* signaling state */ 149 switch (status & (3 << 10)) { 150 case 0 << 10: 151 sig = "se0"; 152 break; 153 case 1 << 10: 154 sig = "k"; /* low speed */ 155 break; 156 case 2 << 10: 157 sig = "j"; 158 break; 159 default: 160 sig = "?"; 161 break; 162 } 163 164 return scnprintf(buf, len, 165 "%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s", 166 label, label[0] ? " " : "", port, status, 167 (status & PORT_POWER) ? " POWER" : "", 168 (status & PORT_OWNER) ? " OWNER" : "", 169 sig, 170 (status & PORT_RESET) ? " RESET" : "", 171 (status & PORT_SUSPEND) ? " SUSPEND" : "", 172 (status & PORT_RESUME) ? " RESUME" : "", 173 (status & PORT_OCC) ? " OCC" : "", 174 (status & PORT_OC) ? " OC" : "", 175 (status & PORT_PEC) ? " PEC" : "", 176 (status & PORT_PE) ? " PE" : "", 177 (status & PORT_CSC) ? " CSC" : "", 178 (status & PORT_CONNECT) ? " CONNECT" : "" 179 ); 180} 181 182#else 183 184static inline int __attribute__((__unused__)) 185dbg_status_buf(char *buf, unsigned len, const char *label, u32 status) 186{ return 0; } 187 188static inline int __attribute__((__unused__)) 189dbg_command_buf(char *buf, unsigned len, const char *label, u32 command) 190{ return 0; } 191 192static inline int __attribute__((__unused__)) 193dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable) 194{ return 0; } 195 196static inline int __attribute__((__unused__)) 197dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status) 198{ return 0; } 199 200#endif /* DEBUG */ 201 202/* functions have the "wrong" filename when they're output... */ 203#define dbg_status(oxu, label, status) { \ 204 char _buf[80]; \ 205 dbg_status_buf(_buf, sizeof _buf, label, status); \ 206 oxu_dbg(oxu, "%s\n", _buf); \ 207} 208 209#define dbg_cmd(oxu, label, command) { \ 210 char _buf[80]; \ 211 dbg_command_buf(_buf, sizeof _buf, label, command); \ 212 oxu_dbg(oxu, "%s\n", _buf); \ 213} 214 215#define dbg_port(oxu, label, port, status) { \ 216 char _buf[80]; \ 217 dbg_port_buf(_buf, sizeof _buf, label, port, status); \ 218 oxu_dbg(oxu, "%s\n", _buf); \ 219} 220 221/* 222 * Module parameters 223 */ 224 225/* Initial IRQ latency: faster than hw default */ 226static int log2_irq_thresh; /* 0 to 6 */ 227module_param(log2_irq_thresh, int, S_IRUGO); 228MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes"); 229 230/* Initial park setting: slower than hw default */ 231static unsigned park; 232module_param(park, uint, S_IRUGO); 233MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets"); 234 235/* For flakey hardware, ignore overcurrent indicators */ 236static int ignore_oc; 237module_param(ignore_oc, bool, S_IRUGO); 238MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications"); 239 240 241static void ehci_work(struct oxu_hcd *oxu); 242static int oxu_hub_control(struct usb_hcd *hcd, 243 u16 typeReq, u16 wValue, u16 wIndex, 244 char *buf, u16 wLength); 245 246/* 247 * Local functions 248 */ 249 250/* Low level read/write registers functions */ 251static inline u32 oxu_readl(void *base, u32 reg) 252{ 253 return readl(base + reg); 254} 255 256static inline void oxu_writel(void *base, u32 reg, u32 val) 257{ 258 writel(val, base + reg); 259} 260 261static inline void timer_action_done(struct oxu_hcd *oxu, 262 enum ehci_timer_action action) 263{ 264 clear_bit(action, &oxu->actions); 265} 266 267static inline void timer_action(struct oxu_hcd *oxu, 268 enum ehci_timer_action action) 269{ 270 if (!test_and_set_bit(action, &oxu->actions)) { 271 unsigned long t; 272 273 switch (action) { 274 case TIMER_IAA_WATCHDOG: 275 t = EHCI_IAA_JIFFIES; 276 break; 277 case TIMER_IO_WATCHDOG: 278 t = EHCI_IO_JIFFIES; 279 break; 280 case TIMER_ASYNC_OFF: 281 t = EHCI_ASYNC_JIFFIES; 282 break; 283 case TIMER_ASYNC_SHRINK: 284 default: 285 t = EHCI_SHRINK_JIFFIES; 286 break; 287 } 288 t += jiffies; 289 /* all timings except IAA watchdog can be overridden. 290 * async queue SHRINK often precedes IAA. while it's ready 291 * to go OFF neither can matter, and afterwards the IO 292 * watchdog stops unless there's still periodic traffic. 293 */ 294 if (action != TIMER_IAA_WATCHDOG 295 && t > oxu->watchdog.expires 296 && timer_pending(&oxu->watchdog)) 297 return; 298 mod_timer(&oxu->watchdog, t); 299 } 300} 301 302/* 303 * handshake - spin reading hc until handshake completes or fails 304 * @ptr: address of hc register to be read 305 * @mask: bits to look at in result of read 306 * @done: value of those bits when handshake succeeds 307 * @usec: timeout in microseconds 308 * 309 * Returns negative errno, or zero on success 310 * 311 * Success happens when the "mask" bits have the specified value (hardware 312 * handshake done). There are two failure modes: "usec" have passed (major 313 * hardware flakeout), or the register reads as all-ones (hardware removed). 314 * 315 * That last failure should_only happen in cases like physical cardbus eject 316 * before driver shutdown. But it also seems to be caused by bugs in cardbus 317 * bridge shutdown: shutting down the bridge before the devices using it. 318 */ 319static int handshake(struct oxu_hcd *oxu, void __iomem *ptr, 320 u32 mask, u32 done, int usec) 321{ 322 u32 result; 323 324 do { 325 result = readl(ptr); 326 if (result == ~(u32)0) /* card removed */ 327 return -ENODEV; 328 result &= mask; 329 if (result == done) 330 return 0; 331 udelay(1); 332 usec--; 333 } while (usec > 0); 334 return -ETIMEDOUT; 335} 336 337/* Force HC to halt state from unknown (EHCI spec section 2.3) */ 338static int ehci_halt(struct oxu_hcd *oxu) 339{ 340 u32 temp = readl(&oxu->regs->status); 341 342 /* disable any irqs left enabled by previous code */ 343 writel(0, &oxu->regs->intr_enable); 344 345 if ((temp & STS_HALT) != 0) 346 return 0; 347 348 temp = readl(&oxu->regs->command); 349 temp &= ~CMD_RUN; 350 writel(temp, &oxu->regs->command); 351 return handshake(oxu, &oxu->regs->status, 352 STS_HALT, STS_HALT, 16 * 125); 353} 354 355/* Put TDI/ARC silicon into EHCI mode */ 356static void tdi_reset(struct oxu_hcd *oxu) 357{ 358 u32 __iomem *reg_ptr; 359 u32 tmp; 360 361 reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68); 362 tmp = readl(reg_ptr); 363 tmp |= 0x3; 364 writel(tmp, reg_ptr); 365} 366 367/* Reset a non-running (STS_HALT == 1) controller */ 368static int ehci_reset(struct oxu_hcd *oxu) 369{ 370 int retval; 371 u32 command = readl(&oxu->regs->command); 372 373 command |= CMD_RESET; 374 dbg_cmd(oxu, "reset", command); 375 writel(command, &oxu->regs->command); 376 oxu_to_hcd(oxu)->state = HC_STATE_HALT; 377 oxu->next_statechange = jiffies; 378 retval = handshake(oxu, &oxu->regs->command, 379 CMD_RESET, 0, 250 * 1000); 380 381 if (retval) 382 return retval; 383 384 tdi_reset(oxu); 385 386 return retval; 387} 388 389/* Idle the controller (from running) */ 390static void ehci_quiesce(struct oxu_hcd *oxu) 391{ 392 u32 temp; 393 394#ifdef DEBUG 395 if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) 396 BUG(); 397#endif 398 399 /* wait for any schedule enables/disables to take effect */ 400 temp = readl(&oxu->regs->command) << 10; 401 temp &= STS_ASS | STS_PSS; 402 if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS, 403 temp, 16 * 125) != 0) { 404 oxu_to_hcd(oxu)->state = HC_STATE_HALT; 405 return; 406 } 407 408 /* then disable anything that's still active */ 409 temp = readl(&oxu->regs->command); 410 temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE); 411 writel(temp, &oxu->regs->command); 412 413 /* hardware can take 16 microframes to turn off ... */ 414 if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS, 415 0, 16 * 125) != 0) { 416 oxu_to_hcd(oxu)->state = HC_STATE_HALT; 417 return; 418 } 419} 420 421static int check_reset_complete(struct oxu_hcd *oxu, int index, 422 u32 __iomem *status_reg, int port_status) 423{ 424 if (!(port_status & PORT_CONNECT)) { 425 oxu->reset_done[index] = 0; 426 return port_status; 427 } 428 429 /* if reset finished and it's still not enabled -- handoff */ 430 if (!(port_status & PORT_PE)) { 431 oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n", 432 index+1); 433 return port_status; 434 } else 435 oxu_dbg(oxu, "port %d high speed\n", index + 1); 436 437 return port_status; 438} 439 440static void ehci_hub_descriptor(struct oxu_hcd *oxu, 441 struct usb_hub_descriptor *desc) 442{ 443 int ports = HCS_N_PORTS(oxu->hcs_params); 444 u16 temp; 445 446 desc->bDescriptorType = 0x29; 447 desc->bPwrOn2PwrGood = 10; /* oxu 1.0, 2.3.9 says 20ms max */ 448 desc->bHubContrCurrent = 0; 449 450 desc->bNbrPorts = ports; 451 temp = 1 + (ports / 8); 452 desc->bDescLength = 7 + 2 * temp; 453 454 /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */ 455 memset(&desc->bitmap[0], 0, temp); 456 memset(&desc->bitmap[temp], 0xff, temp); 457 458 temp = 0x0008; /* per-port overcurrent reporting */ 459 if (HCS_PPC(oxu->hcs_params)) 460 temp |= 0x0001; /* per-port power control */ 461 else 462 temp |= 0x0002; /* no power switching */ 463 desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp); 464} 465 466 467/* Allocate an OXU210HP on-chip memory data buffer 468 * 469 * An on-chip memory data buffer is required for each OXU210HP USB transfer. 470 * Each transfer descriptor has one or more on-chip memory data buffers. 471 * 472 * Data buffers are allocated from a fix sized pool of data blocks. 473 * To minimise fragmentation and give reasonable memory utlisation, 474 * data buffers are allocated with sizes the power of 2 multiples of 475 * the block size, starting on an address a multiple of the allocated size. 476 * 477 * FIXME: callers of this function require a buffer to be allocated for 478 * len=0. This is a waste of on-chip memory and should be fix. Then this 479 * function should be changed to not allocate a buffer for len=0. 480 */ 481static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len) 482{ 483 int n_blocks; /* minium blocks needed to hold len */ 484 int a_blocks; /* blocks allocated */ 485 int i, j; 486 487 /* Don't allocte bigger than supported */ 488 if (len > BUFFER_SIZE * BUFFER_NUM) { 489 oxu_err(oxu, "buffer too big (%d)\n", len); 490 return -ENOMEM; 491 } 492 493 spin_lock(&oxu->mem_lock); 494 495 /* Number of blocks needed to hold len */ 496 n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE; 497 498 /* Round the number of blocks up to the power of 2 */ 499 for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1) 500 ; 501 502 /* Find a suitable available data buffer */ 503 for (i = 0; i < BUFFER_NUM; 504 i += max(a_blocks, (int)oxu->db_used[i])) { 505 506 /* Check all the required blocks are available */ 507 for (j = 0; j < a_blocks; j++) 508 if (oxu->db_used[i + j]) 509 break; 510 511 if (j != a_blocks) 512 continue; 513 514 /* Allocate blocks found! */ 515 qtd->buffer = (void *) &oxu->mem->db_pool[i]; 516 qtd->buffer_dma = virt_to_phys(qtd->buffer); 517 518 qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks; 519 oxu->db_used[i] = a_blocks; 520 521 spin_unlock(&oxu->mem_lock); 522 523 return 0; 524 } 525 526 /* Failed */ 527 528 spin_unlock(&oxu->mem_lock); 529 530 return -ENOMEM; 531} 532 533static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd) 534{ 535 int index; 536 537 spin_lock(&oxu->mem_lock); 538 539 index = (qtd->buffer - (void *) &oxu->mem->db_pool[0]) 540 / BUFFER_SIZE; 541 oxu->db_used[index] = 0; 542 qtd->qtd_buffer_len = 0; 543 qtd->buffer_dma = 0; 544 qtd->buffer = NULL; 545 546 spin_unlock(&oxu->mem_lock); 547 548 return; 549} 550 551static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma) 552{ 553 memset(qtd, 0, sizeof *qtd); 554 qtd->qtd_dma = dma; 555 qtd->hw_token = cpu_to_le32(QTD_STS_HALT); 556 qtd->hw_next = EHCI_LIST_END; 557 qtd->hw_alt_next = EHCI_LIST_END; 558 INIT_LIST_HEAD(&qtd->qtd_list); 559} 560 561static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd) 562{ 563 int index; 564 565 if (qtd->buffer) 566 oxu_buf_free(oxu, qtd); 567 568 spin_lock(&oxu->mem_lock); 569 570 index = qtd - &oxu->mem->qtd_pool[0]; 571 oxu->qtd_used[index] = 0; 572 573 spin_unlock(&oxu->mem_lock); 574 575 return; 576} 577 578static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu) 579{ 580 int i; 581 struct ehci_qtd *qtd = NULL; 582 583 spin_lock(&oxu->mem_lock); 584 585 for (i = 0; i < QTD_NUM; i++) 586 if (!oxu->qtd_used[i]) 587 break; 588 589 if (i < QTD_NUM) { 590 qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i]; 591 memset(qtd, 0, sizeof *qtd); 592 593 qtd->hw_token = cpu_to_le32(QTD_STS_HALT); 594 qtd->hw_next = EHCI_LIST_END; 595 qtd->hw_alt_next = EHCI_LIST_END; 596 INIT_LIST_HEAD(&qtd->qtd_list); 597 598 qtd->qtd_dma = virt_to_phys(qtd); 599 600 oxu->qtd_used[i] = 1; 601 } 602 603 spin_unlock(&oxu->mem_lock); 604 605 return qtd; 606} 607 608static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh) 609{ 610 int index; 611 612 spin_lock(&oxu->mem_lock); 613 614 index = qh - &oxu->mem->qh_pool[0]; 615 oxu->qh_used[index] = 0; 616 617 spin_unlock(&oxu->mem_lock); 618 619 return; 620} 621 622static void qh_destroy(struct kref *kref) 623{ 624 struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref); 625 struct oxu_hcd *oxu = qh->oxu; 626 627 /* clean qtds first, and know this is not linked */ 628 if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) { 629 oxu_dbg(oxu, "unused qh not empty!\n"); 630 BUG(); 631 } 632 if (qh->dummy) 633 oxu_qtd_free(oxu, qh->dummy); 634 oxu_qh_free(oxu, qh); 635} 636 637static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu) 638{ 639 int i; 640 struct ehci_qh *qh = NULL; 641 642 spin_lock(&oxu->mem_lock); 643 644 for (i = 0; i < QHEAD_NUM; i++) 645 if (!oxu->qh_used[i]) 646 break; 647 648 if (i < QHEAD_NUM) { 649 qh = (struct ehci_qh *) &oxu->mem->qh_pool[i]; 650 memset(qh, 0, sizeof *qh); 651 652 kref_init(&qh->kref); 653 qh->oxu = oxu; 654 qh->qh_dma = virt_to_phys(qh); 655 INIT_LIST_HEAD(&qh->qtd_list); 656 657 /* dummy td enables safe urb queuing */ 658 qh->dummy = ehci_qtd_alloc(oxu); 659 if (qh->dummy == NULL) { 660 oxu_dbg(oxu, "no dummy td\n"); 661 oxu->qh_used[i] = 0; 662 qh = NULL; 663 goto unlock; 664 } 665 666 oxu->qh_used[i] = 1; 667 } 668unlock: 669 spin_unlock(&oxu->mem_lock); 670 671 return qh; 672} 673 674/* to share a qh (cpu threads, or hc) */ 675static inline struct ehci_qh *qh_get(struct ehci_qh *qh) 676{ 677 kref_get(&qh->kref); 678 return qh; 679} 680 681static inline void qh_put(struct ehci_qh *qh) 682{ 683 kref_put(&qh->kref, qh_destroy); 684} 685 686static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb) 687{ 688 int index; 689 690 spin_lock(&oxu->mem_lock); 691 692 index = murb - &oxu->murb_pool[0]; 693 oxu->murb_used[index] = 0; 694 695 spin_unlock(&oxu->mem_lock); 696 697 return; 698} 699 700static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu) 701 702{ 703 int i; 704 struct oxu_murb *murb = NULL; 705 706 spin_lock(&oxu->mem_lock); 707 708 for (i = 0; i < MURB_NUM; i++) 709 if (!oxu->murb_used[i]) 710 break; 711 712 if (i < MURB_NUM) { 713 murb = &(oxu->murb_pool)[i]; 714 715 oxu->murb_used[i] = 1; 716 } 717 718 spin_unlock(&oxu->mem_lock); 719 720 return murb; 721} 722 723/* The queue heads and transfer descriptors are managed from pools tied 724 * to each of the "per device" structures. 725 * This is the initialisation and cleanup code. 726 */ 727static void ehci_mem_cleanup(struct oxu_hcd *oxu) 728{ 729 kfree(oxu->murb_pool); 730 oxu->murb_pool = NULL; 731 732 if (oxu->async) 733 qh_put(oxu->async); 734 oxu->async = NULL; 735 736 del_timer(&oxu->urb_timer); 737 738 oxu->periodic = NULL; 739 740 /* shadow periodic table */ 741 kfree(oxu->pshadow); 742 oxu->pshadow = NULL; 743} 744 745/* Remember to add cleanup code (above) if you add anything here. 746 */ 747static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags) 748{ 749 int i; 750 751 for (i = 0; i < oxu->periodic_size; i++) 752 oxu->mem->frame_list[i] = EHCI_LIST_END; 753 for (i = 0; i < QHEAD_NUM; i++) 754 oxu->qh_used[i] = 0; 755 for (i = 0; i < QTD_NUM; i++) 756 oxu->qtd_used[i] = 0; 757 758 oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags); 759 if (!oxu->murb_pool) 760 goto fail; 761 762 for (i = 0; i < MURB_NUM; i++) 763 oxu->murb_used[i] = 0; 764 765 oxu->async = oxu_qh_alloc(oxu); 766 if (!oxu->async) 767 goto fail; 768 769 oxu->periodic = (__le32 *) &oxu->mem->frame_list; 770 oxu->periodic_dma = virt_to_phys(oxu->periodic); 771 772 for (i = 0; i < oxu->periodic_size; i++) 773 oxu->periodic[i] = EHCI_LIST_END; 774 775 /* software shadow of hardware table */ 776 oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags); 777 if (oxu->pshadow != NULL) 778 return 0; 779 780fail: 781 oxu_dbg(oxu, "couldn't init memory\n"); 782 ehci_mem_cleanup(oxu); 783 return -ENOMEM; 784} 785 786/* Fill a qtd, returning how much of the buffer we were able to queue up. 787 */ 788static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len, 789 int token, int maxpacket) 790{ 791 int i, count; 792 u64 addr = buf; 793 794 /* one buffer entry per 4K ... first might be short or unaligned */ 795 qtd->hw_buf[0] = cpu_to_le32((u32)addr); 796 qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32)); 797 count = 0x1000 - (buf & 0x0fff); /* rest of that page */ 798 if (likely(len < count)) /* ... iff needed */ 799 count = len; 800 else { 801 buf += 0x1000; 802 buf &= ~0x0fff; 803 804 /* per-qtd limit: from 16K to 20K (best alignment) */ 805 for (i = 1; count < len && i < 5; i++) { 806 addr = buf; 807 qtd->hw_buf[i] = cpu_to_le32((u32)addr); 808 qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32)); 809 buf += 0x1000; 810 if ((count + 0x1000) < len) 811 count += 0x1000; 812 else 813 count = len; 814 } 815 816 /* short packets may only terminate transfers */ 817 if (count != len) 818 count -= (count % maxpacket); 819 } 820 qtd->hw_token = cpu_to_le32((count << 16) | token); 821 qtd->length = count; 822 823 return count; 824} 825 826static inline void qh_update(struct oxu_hcd *oxu, 827 struct ehci_qh *qh, struct ehci_qtd *qtd) 828{ 829 /* writes to an active overlay are unsafe */ 830 BUG_ON(qh->qh_state != QH_STATE_IDLE); 831 832 qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma); 833 qh->hw_alt_next = EHCI_LIST_END; 834 835 /* Except for control endpoints, we make hardware maintain data 836 * toggle (like OHCI) ... here (re)initialize the toggle in the QH, 837 * and set the pseudo-toggle in udev. Only usb_clear_halt() will 838 * ever clear it. 839 */ 840 if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) { 841 unsigned is_out, epnum; 842 843 is_out = !(qtd->hw_token & cpu_to_le32(1 << 8)); 844 epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f; 845 if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) { 846 qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE); 847 usb_settoggle(qh->dev, epnum, is_out, 1); 848 } 849 } 850 851 /* HC must see latest qtd and qh data before we clear ACTIVE+HALT */ 852 wmb(); 853 qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING); 854} 855 856/* If it weren't for a common silicon quirk (writing the dummy into the qh 857 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault 858 * recovery (including urb dequeue) would need software changes to a QH... 859 */ 860static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh) 861{ 862 struct ehci_qtd *qtd; 863 864 if (list_empty(&qh->qtd_list)) 865 qtd = qh->dummy; 866 else { 867 qtd = list_entry(qh->qtd_list.next, 868 struct ehci_qtd, qtd_list); 869 /* first qtd may already be partially processed */ 870 if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current) 871 qtd = NULL; 872 } 873 874 if (qtd) 875 qh_update(oxu, qh, qtd); 876} 877 878static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb, 879 size_t length, u32 token) 880{ 881 /* count IN/OUT bytes, not SETUP (even short packets) */ 882 if (likely(QTD_PID(token) != 2)) 883 urb->actual_length += length - QTD_LENGTH(token); 884 885 /* don't modify error codes */ 886 if (unlikely(urb->status != -EINPROGRESS)) 887 return; 888 889 /* force cleanup after short read; not always an error */ 890 if (unlikely(IS_SHORT_READ(token))) 891 urb->status = -EREMOTEIO; 892 893 /* serious "can't proceed" faults reported by the hardware */ 894 if (token & QTD_STS_HALT) { 895 if (token & QTD_STS_BABBLE) { 896 /* FIXME "must" disable babbling device's port too */ 897 urb->status = -EOVERFLOW; 898 } else if (token & QTD_STS_MMF) { 899 /* fs/ls interrupt xfer missed the complete-split */ 900 urb->status = -EPROTO; 901 } else if (token & QTD_STS_DBE) { 902 urb->status = (QTD_PID(token) == 1) /* IN ? */ 903 ? -ENOSR /* hc couldn't read data */ 904 : -ECOMM; /* hc couldn't write data */ 905 } else if (token & QTD_STS_XACT) { 906 /* timeout, bad crc, wrong PID, etc; retried */ 907 if (QTD_CERR(token)) 908 urb->status = -EPIPE; 909 else { 910 oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n", 911 urb->dev->devpath, 912 usb_pipeendpoint(urb->pipe), 913 usb_pipein(urb->pipe) ? "in" : "out"); 914 urb->status = -EPROTO; 915 } 916 /* CERR nonzero + no errors + halt --> stall */ 917 } else if (QTD_CERR(token)) 918 urb->status = -EPIPE; 919 else /* unknown */ 920 urb->status = -EPROTO; 921 922 oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n", 923 usb_pipedevice(urb->pipe), 924 usb_pipeendpoint(urb->pipe), 925 usb_pipein(urb->pipe) ? "in" : "out", 926 token, urb->status); 927 } 928} 929 930static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb) 931__releases(oxu->lock) 932__acquires(oxu->lock) 933{ 934 if (likely(urb->hcpriv != NULL)) { 935 struct ehci_qh *qh = (struct ehci_qh *) urb->hcpriv; 936 937 /* S-mask in a QH means it's an interrupt urb */ 938 if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) { 939 940 /* ... update hc-wide periodic stats (for usbfs) */ 941 oxu_to_hcd(oxu)->self.bandwidth_int_reqs--; 942 } 943 qh_put(qh); 944 } 945 946 urb->hcpriv = NULL; 947 switch (urb->status) { 948 case -EINPROGRESS: /* success */ 949 urb->status = 0; 950 default: /* fault */ 951 break; 952 case -EREMOTEIO: /* fault or normal */ 953 if (!(urb->transfer_flags & URB_SHORT_NOT_OK)) 954 urb->status = 0; 955 break; 956 case -ECONNRESET: /* canceled */ 957 case -ENOENT: 958 break; 959 } 960 961#ifdef OXU_URB_TRACE 962 oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n", 963 __func__, urb->dev->devpath, urb, 964 usb_pipeendpoint(urb->pipe), 965 usb_pipein(urb->pipe) ? "in" : "out", 966 urb->status, 967 urb->actual_length, urb->transfer_buffer_length); 968#endif 969 970 /* complete() can reenter this HCD */ 971 spin_unlock(&oxu->lock); 972 usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status); 973 spin_lock(&oxu->lock); 974} 975 976static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh); 977static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh); 978 979static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh); 980static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh); 981 982#define HALT_BIT cpu_to_le32(QTD_STS_HALT) 983 984/* Process and free completed qtds for a qh, returning URBs to drivers. 985 * Chases up to qh->hw_current. Returns number of completions called, 986 * indicating how much "real" work we did. 987 */ 988static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh) 989{ 990 struct ehci_qtd *last = NULL, *end = qh->dummy; 991 struct list_head *entry, *tmp; 992 int stopped; 993 unsigned count = 0; 994 int do_status = 0; 995 u8 state; 996 struct oxu_murb *murb = NULL; 997 998 if (unlikely(list_empty(&qh->qtd_list))) 999 return count; 1000 1001 /* completions (or tasks on other cpus) must never clobber HALT 1002 * till we've gone through and cleaned everything up, even when 1003 * they add urbs to this qh's queue or mark them for unlinking. 1004 * 1005 * NOTE: unlinking expects to be done in queue order. 1006 */ 1007 state = qh->qh_state; 1008 qh->qh_state = QH_STATE_COMPLETING; 1009 stopped = (state == QH_STATE_IDLE); 1010 1011 /* remove de-activated QTDs from front of queue. 1012 * after faults (including short reads), cleanup this urb 1013 * then let the queue advance. 1014 * if queue is stopped, handles unlinks. 1015 */ 1016 list_for_each_safe(entry, tmp, &qh->qtd_list) { 1017 struct ehci_qtd *qtd; 1018 struct urb *urb; 1019 u32 token = 0; 1020 1021 qtd = list_entry(entry, struct ehci_qtd, qtd_list); 1022 urb = qtd->urb; 1023 1024 /* Clean up any state from previous QTD ...*/ 1025 if (last) { 1026 if (likely(last->urb != urb)) { 1027 if (last->urb->complete == NULL) { 1028 murb = (struct oxu_murb *) last->urb; 1029 last->urb = murb->main; 1030 if (murb->last) { 1031 ehci_urb_done(oxu, last->urb); 1032 count++; 1033 } 1034 oxu_murb_free(oxu, murb); 1035 } else { 1036 ehci_urb_done(oxu, last->urb); 1037 count++; 1038 } 1039 } 1040 oxu_qtd_free(oxu, last); 1041 last = NULL; 1042 } 1043 1044 /* ignore urbs submitted during completions we reported */ 1045 if (qtd == end) 1046 break; 1047 1048 /* hardware copies qtd out of qh overlay */ 1049 rmb(); 1050 token = le32_to_cpu(qtd->hw_token); 1051 1052 /* always clean up qtds the hc de-activated */ 1053 if ((token & QTD_STS_ACTIVE) == 0) { 1054 1055 if ((token & QTD_STS_HALT) != 0) { 1056 stopped = 1; 1057 1058 /* magic dummy for some short reads; qh won't advance. 1059 * that silicon quirk can kick in with this dummy too. 1060 */ 1061 } else if (IS_SHORT_READ(token) && 1062 !(qtd->hw_alt_next & EHCI_LIST_END)) { 1063 stopped = 1; 1064 goto halt; 1065 } 1066 1067 /* stop scanning when we reach qtds the hc is using */ 1068 } else if (likely(!stopped && 1069 HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) { 1070 break; 1071 1072 } else { 1073 stopped = 1; 1074 1075 if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) 1076 urb->status = -ESHUTDOWN; 1077 1078 /* ignore active urbs unless some previous qtd 1079 * for the urb faulted (including short read) or 1080 * its urb was canceled. we may patch qh or qtds. 1081 */ 1082 if (likely(urb->status == -EINPROGRESS)) 1083 continue; 1084 1085 /* issue status after short control reads */ 1086 if (unlikely(do_status != 0) 1087 && QTD_PID(token) == 0 /* OUT */) { 1088 do_status = 0; 1089 continue; 1090 } 1091 1092 /* token in overlay may be most current */ 1093 if (state == QH_STATE_IDLE 1094 && cpu_to_le32(qtd->qtd_dma) 1095 == qh->hw_current) 1096 token = le32_to_cpu(qh->hw_token); 1097 1098 /* force halt for unlinked or blocked qh, so we'll 1099 * patch the qh later and so that completions can't 1100 * activate it while we "know" it's stopped. 1101 */ 1102 if ((HALT_BIT & qh->hw_token) == 0) { 1103halt: 1104 qh->hw_token |= HALT_BIT; 1105 wmb(); 1106 } 1107 } 1108 1109 /* Remove it from the queue */ 1110 qtd_copy_status(oxu, urb->complete ? 1111 urb : ((struct oxu_murb *) urb)->main, 1112 qtd->length, token); 1113 if ((usb_pipein(qtd->urb->pipe)) && 1114 (NULL != qtd->transfer_buffer)) 1115 memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length); 1116 do_status = (urb->status == -EREMOTEIO) 1117 && usb_pipecontrol(urb->pipe); 1118 1119 if (stopped && qtd->qtd_list.prev != &qh->qtd_list) { 1120 last = list_entry(qtd->qtd_list.prev, 1121 struct ehci_qtd, qtd_list); 1122 last->hw_next = qtd->hw_next; 1123 } 1124 list_del(&qtd->qtd_list); 1125 last = qtd; 1126 } 1127 1128 /* last urb's completion might still need calling */ 1129 if (likely(last != NULL)) { 1130 if (last->urb->complete == NULL) { 1131 murb = (struct oxu_murb *) last->urb; 1132 last->urb = murb->main; 1133 if (murb->last) { 1134 ehci_urb_done(oxu, last->urb); 1135 count++; 1136 } 1137 oxu_murb_free(oxu, murb); 1138 } else { 1139 ehci_urb_done(oxu, last->urb); 1140 count++; 1141 } 1142 oxu_qtd_free(oxu, last); 1143 } 1144 1145 /* restore original state; caller must unlink or relink */ 1146 qh->qh_state = state; 1147 1148 /* be sure the hardware's done with the qh before refreshing 1149 * it after fault cleanup, or recovering from silicon wrongly 1150 * overlaying the dummy qtd (which reduces DMA chatter). 1151 */ 1152 if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) { 1153 switch (state) { 1154 case QH_STATE_IDLE: 1155 qh_refresh(oxu, qh); 1156 break; 1157 case QH_STATE_LINKED: 1158 /* should be rare for periodic transfers, 1159 * except maybe high bandwidth ... 1160 */ 1161 if ((cpu_to_le32(QH_SMASK) 1162 & qh->hw_info2) != 0) { 1163 intr_deschedule(oxu, qh); 1164 (void) qh_schedule(oxu, qh); 1165 } else 1166 unlink_async(oxu, qh); 1167 break; 1168 /* otherwise, unlink already started */ 1169 } 1170 } 1171 1172 return count; 1173} 1174 1175/* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */ 1176#define hb_mult(wMaxPacketSize) (1 + (((wMaxPacketSize) >> 11) & 0x03)) 1177/* ... and packet size, for any kind of endpoint descriptor */ 1178#define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff) 1179 1180/* Reverse of qh_urb_transaction: free a list of TDs. 1181 * used for cleanup after errors, before HC sees an URB's TDs. 1182 */ 1183static void qtd_list_free(struct oxu_hcd *oxu, 1184 struct urb *urb, struct list_head *qtd_list) 1185{ 1186 struct list_head *entry, *temp; 1187 1188 list_for_each_safe(entry, temp, qtd_list) { 1189 struct ehci_qtd *qtd; 1190 1191 qtd = list_entry(entry, struct ehci_qtd, qtd_list); 1192 list_del(&qtd->qtd_list); 1193 oxu_qtd_free(oxu, qtd); 1194 } 1195} 1196 1197/* Create a list of filled qtds for this URB; won't link into qh. 1198 */ 1199static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu, 1200 struct urb *urb, 1201 struct list_head *head, 1202 gfp_t flags) 1203{ 1204 struct ehci_qtd *qtd, *qtd_prev; 1205 dma_addr_t buf; 1206 int len, maxpacket; 1207 int is_input; 1208 u32 token; 1209 void *transfer_buf = NULL; 1210 int ret; 1211 1212 /* 1213 * URBs map to sequences of QTDs: one logical transaction 1214 */ 1215 qtd = ehci_qtd_alloc(oxu); 1216 if (unlikely(!qtd)) 1217 return NULL; 1218 list_add_tail(&qtd->qtd_list, head); 1219 qtd->urb = urb; 1220 1221 token = QTD_STS_ACTIVE; 1222 token |= (EHCI_TUNE_CERR << 10); 1223 /* for split transactions, SplitXState initialized to zero */ 1224 1225 len = urb->transfer_buffer_length; 1226 is_input = usb_pipein(urb->pipe); 1227 if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input) 1228 urb->transfer_buffer = phys_to_virt(urb->transfer_dma); 1229 1230 if (usb_pipecontrol(urb->pipe)) { 1231 /* SETUP pid */ 1232 ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest)); 1233 if (ret) 1234 goto cleanup; 1235 1236 qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest), 1237 token | (2 /* "setup" */ << 8), 8); 1238 memcpy(qtd->buffer, qtd->urb->setup_packet, 1239 sizeof(struct usb_ctrlrequest)); 1240 1241 /* ... and always at least one more pid */ 1242 token ^= QTD_TOGGLE; 1243 qtd_prev = qtd; 1244 qtd = ehci_qtd_alloc(oxu); 1245 if (unlikely(!qtd)) 1246 goto cleanup; 1247 qtd->urb = urb; 1248 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma); 1249 list_add_tail(&qtd->qtd_list, head); 1250 1251 /* for zero length DATA stages, STATUS is always IN */ 1252 if (len == 0) 1253 token |= (1 /* "in" */ << 8); 1254 } 1255 1256 /* 1257 * Data transfer stage: buffer setup 1258 */ 1259 1260 ret = oxu_buf_alloc(oxu, qtd, len); 1261 if (ret) 1262 goto cleanup; 1263 1264 buf = qtd->buffer_dma; 1265 transfer_buf = urb->transfer_buffer; 1266 1267 if (!is_input) 1268 memcpy(qtd->buffer, qtd->urb->transfer_buffer, len); 1269 1270 if (is_input) 1271 token |= (1 /* "in" */ << 8); 1272 /* else it's already initted to "out" pid (0 << 8) */ 1273 1274 maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input)); 1275 1276 /* 1277 * buffer gets wrapped in one or more qtds; 1278 * last one may be "short" (including zero len) 1279 * and may serve as a control status ack 1280 */ 1281 for (;;) { 1282 int this_qtd_len; 1283 1284 this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket); 1285 qtd->transfer_buffer = transfer_buf; 1286 len -= this_qtd_len; 1287 buf += this_qtd_len; 1288 transfer_buf += this_qtd_len; 1289 if (is_input) 1290 qtd->hw_alt_next = oxu->async->hw_alt_next; 1291 1292 /* qh makes control packets use qtd toggle; maybe switch it */ 1293 if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0) 1294 token ^= QTD_TOGGLE; 1295 1296 if (likely(len <= 0)) 1297 break; 1298 1299 qtd_prev = qtd; 1300 qtd = ehci_qtd_alloc(oxu); 1301 if (unlikely(!qtd)) 1302 goto cleanup; 1303 if (likely(len > 0)) { 1304 ret = oxu_buf_alloc(oxu, qtd, len); 1305 if (ret) 1306 goto cleanup; 1307 } 1308 qtd->urb = urb; 1309 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma); 1310 list_add_tail(&qtd->qtd_list, head); 1311 } 1312 1313 /* unless the bulk/interrupt caller wants a chance to clean 1314 * up after short reads, hc should advance qh past this urb 1315 */ 1316 if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0 1317 || usb_pipecontrol(urb->pipe))) 1318 qtd->hw_alt_next = EHCI_LIST_END; 1319 1320 /* 1321 * control requests may need a terminating data "status" ack; 1322 * bulk ones may need a terminating short packet (zero length). 1323 */ 1324 if (likely(urb->transfer_buffer_length != 0)) { 1325 int one_more = 0; 1326 1327 if (usb_pipecontrol(urb->pipe)) { 1328 one_more = 1; 1329 token ^= 0x0100; /* "in" <--> "out" */ 1330 token |= QTD_TOGGLE; /* force DATA1 */ 1331 } else if (usb_pipebulk(urb->pipe) 1332 && (urb->transfer_flags & URB_ZERO_PACKET) 1333 && !(urb->transfer_buffer_length % maxpacket)) { 1334 one_more = 1; 1335 } 1336 if (one_more) { 1337 qtd_prev = qtd; 1338 qtd = ehci_qtd_alloc(oxu); 1339 if (unlikely(!qtd)) 1340 goto cleanup; 1341 qtd->urb = urb; 1342 qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma); 1343 list_add_tail(&qtd->qtd_list, head); 1344 1345 /* never any data in such packets */ 1346 qtd_fill(qtd, 0, 0, token, 0); 1347 } 1348 } 1349 1350 /* by default, enable interrupt on urb completion */ 1351 qtd->hw_token |= cpu_to_le32(QTD_IOC); 1352 return head; 1353 1354cleanup: 1355 qtd_list_free(oxu, urb, head); 1356 return NULL; 1357} 1358 1359/* Each QH holds a qtd list; a QH is used for everything except iso. 1360 * 1361 * For interrupt urbs, the scheduler must set the microframe scheduling 1362 * mask(s) each time the QH gets scheduled. For highspeed, that's 1363 * just one microframe in the s-mask. For split interrupt transactions 1364 * there are additional complications: c-mask, maybe FSTNs. 1365 */ 1366static struct ehci_qh *qh_make(struct oxu_hcd *oxu, 1367 struct urb *urb, gfp_t flags) 1368{ 1369 struct ehci_qh *qh = oxu_qh_alloc(oxu); 1370 u32 info1 = 0, info2 = 0; 1371 int is_input, type; 1372 int maxp = 0; 1373 1374 if (!qh) 1375 return qh; 1376 1377 /* 1378 * init endpoint/device data for this QH 1379 */ 1380 info1 |= usb_pipeendpoint(urb->pipe) << 8; 1381 info1 |= usb_pipedevice(urb->pipe) << 0; 1382 1383 is_input = usb_pipein(urb->pipe); 1384 type = usb_pipetype(urb->pipe); 1385 maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input); 1386 1387 /* Compute interrupt scheduling parameters just once, and save. 1388 * - allowing for high bandwidth, how many nsec/uframe are used? 1389 * - split transactions need a second CSPLIT uframe; same question 1390 * - splits also need a schedule gap (for full/low speed I/O) 1391 * - qh has a polling interval 1392 * 1393 * For control/bulk requests, the HC or TT handles these. 1394 */ 1395 if (type == PIPE_INTERRUPT) { 1396 qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH, 1397 is_input, 0, 1398 hb_mult(maxp) * max_packet(maxp))); 1399 qh->start = NO_FRAME; 1400 1401 if (urb->dev->speed == USB_SPEED_HIGH) { 1402 qh->c_usecs = 0; 1403 qh->gap_uf = 0; 1404 1405 qh->period = urb->interval >> 3; 1406 if (qh->period == 0 && urb->interval != 1) { 1407 /* NOTE interval 2 or 4 uframes could work. 1408 * But interval 1 scheduling is simpler, and 1409 * includes high bandwidth. 1410 */ 1411 dbg("intr period %d uframes, NYET!", 1412 urb->interval); 1413 goto done; 1414 } 1415 } else { 1416 struct usb_tt *tt = urb->dev->tt; 1417 int think_time; 1418 1419 /* gap is f(FS/LS transfer times) */ 1420 qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed, 1421 is_input, 0, maxp) / (125 * 1000); 1422 1423 /* FIXME this just approximates SPLIT/CSPLIT times */ 1424 if (is_input) { /* SPLIT, gap, CSPLIT+DATA */ 1425 qh->c_usecs = qh->usecs + HS_USECS(0); 1426 qh->usecs = HS_USECS(1); 1427 } else { /* SPLIT+DATA, gap, CSPLIT */ 1428 qh->usecs += HS_USECS(1); 1429 qh->c_usecs = HS_USECS(0); 1430 } 1431 1432 think_time = tt ? tt->think_time : 0; 1433 qh->tt_usecs = NS_TO_US(think_time + 1434 usb_calc_bus_time(urb->dev->speed, 1435 is_input, 0, max_packet(maxp))); 1436 qh->period = urb->interval; 1437 } 1438 } 1439 1440 /* support for tt scheduling, and access to toggles */ 1441 qh->dev = urb->dev; 1442 1443 /* using TT? */ 1444 switch (urb->dev->speed) { 1445 case USB_SPEED_LOW: 1446 info1 |= (1 << 12); /* EPS "low" */ 1447 /* FALL THROUGH */ 1448 1449 case USB_SPEED_FULL: 1450 /* EPS 0 means "full" */ 1451 if (type != PIPE_INTERRUPT) 1452 info1 |= (EHCI_TUNE_RL_TT << 28); 1453 if (type == PIPE_CONTROL) { 1454 info1 |= (1 << 27); /* for TT */ 1455 info1 |= 1 << 14; /* toggle from qtd */ 1456 } 1457 info1 |= maxp << 16; 1458 1459 info2 |= (EHCI_TUNE_MULT_TT << 30); 1460 info2 |= urb->dev->ttport << 23; 1461 1462 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets c-mask } */ 1463 1464 break; 1465 1466 case USB_SPEED_HIGH: /* no TT involved */ 1467 info1 |= (2 << 12); /* EPS "high" */ 1468 if (type == PIPE_CONTROL) { 1469 info1 |= (EHCI_TUNE_RL_HS << 28); 1470 info1 |= 64 << 16; /* usb2 fixed maxpacket */ 1471 info1 |= 1 << 14; /* toggle from qtd */ 1472 info2 |= (EHCI_TUNE_MULT_HS << 30); 1473 } else if (type == PIPE_BULK) { 1474 info1 |= (EHCI_TUNE_RL_HS << 28); 1475 info1 |= 512 << 16; /* usb2 fixed maxpacket */ 1476 info2 |= (EHCI_TUNE_MULT_HS << 30); 1477 } else { /* PIPE_INTERRUPT */ 1478 info1 |= max_packet(maxp) << 16; 1479 info2 |= hb_mult(maxp) << 30; 1480 } 1481 break; 1482 default: 1483 dbg("bogus dev %p speed %d", urb->dev, urb->dev->speed); 1484done: 1485 qh_put(qh); 1486 return NULL; 1487 } 1488 1489 /* NOTE: if (PIPE_INTERRUPT) { scheduler sets s-mask } */ 1490 1491 /* init as live, toggle clear, advance to dummy */ 1492 qh->qh_state = QH_STATE_IDLE; 1493 qh->hw_info1 = cpu_to_le32(info1); 1494 qh->hw_info2 = cpu_to_le32(info2); 1495 usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1); 1496 qh_refresh(oxu, qh); 1497 return qh; 1498} 1499 1500/* Move qh (and its qtds) onto async queue; maybe enable queue. 1501 */ 1502static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh) 1503{ 1504 __le32 dma = QH_NEXT(qh->qh_dma); 1505 struct ehci_qh *head; 1506 1507 /* (re)start the async schedule? */ 1508 head = oxu->async; 1509 timer_action_done(oxu, TIMER_ASYNC_OFF); 1510 if (!head->qh_next.qh) { 1511 u32 cmd = readl(&oxu->regs->command); 1512 1513 if (!(cmd & CMD_ASE)) { 1514 /* in case a clear of CMD_ASE didn't take yet */ 1515 (void)handshake(oxu, &oxu->regs->status, 1516 STS_ASS, 0, 150); 1517 cmd |= CMD_ASE | CMD_RUN; 1518 writel(cmd, &oxu->regs->command); 1519 oxu_to_hcd(oxu)->state = HC_STATE_RUNNING; 1520 /* posted write need not be known to HC yet ... */ 1521 } 1522 } 1523 1524 /* clear halt and/or toggle; and maybe recover from silicon quirk */ 1525 if (qh->qh_state == QH_STATE_IDLE) 1526 qh_refresh(oxu, qh); 1527 1528 /* splice right after start */ 1529 qh->qh_next = head->qh_next; 1530 qh->hw_next = head->hw_next; 1531 wmb(); 1532 1533 head->qh_next.qh = qh; 1534 head->hw_next = dma; 1535 1536 qh->qh_state = QH_STATE_LINKED; 1537 /* qtd completions reported later by interrupt */ 1538} 1539 1540#define QH_ADDR_MASK cpu_to_le32(0x7f) 1541 1542/* 1543 * For control/bulk/interrupt, return QH with these TDs appended. 1544 * Allocates and initializes the QH if necessary. 1545 * Returns null if it can't allocate a QH it needs to. 1546 * If the QH has TDs (urbs) already, that's great. 1547 */ 1548static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu, 1549 struct urb *urb, struct list_head *qtd_list, 1550 int epnum, void **ptr) 1551{ 1552 struct ehci_qh *qh = NULL; 1553 1554 qh = (struct ehci_qh *) *ptr; 1555 if (unlikely(qh == NULL)) { 1556 /* can't sleep here, we have oxu->lock... */ 1557 qh = qh_make(oxu, urb, GFP_ATOMIC); 1558 *ptr = qh; 1559 } 1560 if (likely(qh != NULL)) { 1561 struct ehci_qtd *qtd; 1562 1563 if (unlikely(list_empty(qtd_list))) 1564 qtd = NULL; 1565 else 1566 qtd = list_entry(qtd_list->next, struct ehci_qtd, 1567 qtd_list); 1568 1569 /* control qh may need patching ... */ 1570 if (unlikely(epnum == 0)) { 1571 1572 /* usb_reset_device() briefly reverts to address 0 */ 1573 if (usb_pipedevice(urb->pipe) == 0) 1574 qh->hw_info1 &= ~QH_ADDR_MASK; 1575 } 1576 1577 /* just one way to queue requests: swap with the dummy qtd. 1578 * only hc or qh_refresh() ever modify the overlay. 1579 */ 1580 if (likely(qtd != NULL)) { 1581 struct ehci_qtd *dummy; 1582 dma_addr_t dma; 1583 __le32 token; 1584 1585 /* to avoid racing the HC, use the dummy td instead of 1586 * the first td of our list (becomes new dummy). both 1587 * tds stay deactivated until we're done, when the 1588 * HC is allowed to fetch the old dummy (4.10.2). 1589 */ 1590 token = qtd->hw_token; 1591 qtd->hw_token = HALT_BIT; 1592 wmb(); 1593 dummy = qh->dummy; 1594 1595 dma = dummy->qtd_dma; 1596 *dummy = *qtd; 1597 dummy->qtd_dma = dma; 1598 1599 list_del(&qtd->qtd_list); 1600 list_add(&dummy->qtd_list, qtd_list); 1601 list_splice(qtd_list, qh->qtd_list.prev); 1602 1603 ehci_qtd_init(qtd, qtd->qtd_dma); 1604 qh->dummy = qtd; 1605 1606 /* hc must see the new dummy at list end */ 1607 dma = qtd->qtd_dma; 1608 qtd = list_entry(qh->qtd_list.prev, 1609 struct ehci_qtd, qtd_list); 1610 qtd->hw_next = QTD_NEXT(dma); 1611 1612 /* let the hc process these next qtds */ 1613 dummy->hw_token = (token & ~(0x80)); 1614 wmb(); 1615 dummy->hw_token = token; 1616 1617 urb->hcpriv = qh_get(qh); 1618 } 1619 } 1620 return qh; 1621} 1622 1623static int submit_async(struct oxu_hcd *oxu, struct urb *urb, 1624 struct list_head *qtd_list, gfp_t mem_flags) 1625{ 1626 struct ehci_qtd *qtd; 1627 int epnum; 1628 unsigned long flags; 1629 struct ehci_qh *qh = NULL; 1630 int rc = 0; 1631 1632 qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list); 1633 epnum = urb->ep->desc.bEndpointAddress; 1634 1635#ifdef OXU_URB_TRACE 1636 oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n", 1637 __func__, urb->dev->devpath, urb, 1638 epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out", 1639 urb->transfer_buffer_length, 1640 qtd, urb->ep->hcpriv); 1641#endif 1642 1643 spin_lock_irqsave(&oxu->lock, flags); 1644 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, 1645 &oxu_to_hcd(oxu)->flags))) { 1646 rc = -ESHUTDOWN; 1647 goto done; 1648 } 1649 1650 qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv); 1651 if (unlikely(qh == NULL)) { 1652 rc = -ENOMEM; 1653 goto done; 1654 } 1655 1656 /* Control/bulk operations through TTs don't need scheduling, 1657 * the HC and TT handle it when the TT has a buffer ready. 1658 */ 1659 if (likely(qh->qh_state == QH_STATE_IDLE)) 1660 qh_link_async(oxu, qh_get(qh)); 1661done: 1662 spin_unlock_irqrestore(&oxu->lock, flags); 1663 if (unlikely(qh == NULL)) 1664 qtd_list_free(oxu, urb, qtd_list); 1665 return rc; 1666} 1667 1668/* The async qh for the qtds being reclaimed are now unlinked from the HC */ 1669 1670static void end_unlink_async(struct oxu_hcd *oxu) 1671{ 1672 struct ehci_qh *qh = oxu->reclaim; 1673 struct ehci_qh *next; 1674 1675 timer_action_done(oxu, TIMER_IAA_WATCHDOG); 1676 1677 qh->qh_state = QH_STATE_IDLE; 1678 qh->qh_next.qh = NULL; 1679 qh_put(qh); /* refcount from reclaim */ 1680 1681 /* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */ 1682 next = qh->reclaim; 1683 oxu->reclaim = next; 1684 oxu->reclaim_ready = 0; 1685 qh->reclaim = NULL; 1686 1687 qh_completions(oxu, qh); 1688 1689 if (!list_empty(&qh->qtd_list) 1690 && HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) 1691 qh_link_async(oxu, qh); 1692 else { 1693 qh_put(qh); /* refcount from async list */ 1694 1695 /* it's not free to turn the async schedule on/off; leave it 1696 * active but idle for a while once it empties. 1697 */ 1698 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) 1699 && oxu->async->qh_next.qh == NULL) 1700 timer_action(oxu, TIMER_ASYNC_OFF); 1701 } 1702 1703 if (next) { 1704 oxu->reclaim = NULL; 1705 start_unlink_async(oxu, next); 1706 } 1707} 1708 1709/* makes sure the async qh will become idle */ 1710/* caller must own oxu->lock */ 1711 1712static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh) 1713{ 1714 int cmd = readl(&oxu->regs->command); 1715 struct ehci_qh *prev; 1716 1717#ifdef DEBUG 1718 assert_spin_locked(&oxu->lock); 1719 if (oxu->reclaim || (qh->qh_state != QH_STATE_LINKED 1720 && qh->qh_state != QH_STATE_UNLINK_WAIT)) 1721 BUG(); 1722#endif 1723 1724 /* stop async schedule right now? */ 1725 if (unlikely(qh == oxu->async)) { 1726 /* can't get here without STS_ASS set */ 1727 if (oxu_to_hcd(oxu)->state != HC_STATE_HALT 1728 && !oxu->reclaim) { 1729 /* ... and CMD_IAAD clear */ 1730 writel(cmd & ~CMD_ASE, &oxu->regs->command); 1731 wmb(); 1732 /* handshake later, if we need to */ 1733 timer_action_done(oxu, TIMER_ASYNC_OFF); 1734 } 1735 return; 1736 } 1737 1738 qh->qh_state = QH_STATE_UNLINK; 1739 oxu->reclaim = qh = qh_get(qh); 1740 1741 prev = oxu->async; 1742 while (prev->qh_next.qh != qh) 1743 prev = prev->qh_next.qh; 1744 1745 prev->hw_next = qh->hw_next; 1746 prev->qh_next = qh->qh_next; 1747 wmb(); 1748 1749 if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) { 1750 /* if (unlikely(qh->reclaim != 0)) 1751 * this will recurse, probably not much 1752 */ 1753 end_unlink_async(oxu); 1754 return; 1755 } 1756 1757 oxu->reclaim_ready = 0; 1758 cmd |= CMD_IAAD; 1759 writel(cmd, &oxu->regs->command); 1760 (void) readl(&oxu->regs->command); 1761 timer_action(oxu, TIMER_IAA_WATCHDOG); 1762} 1763 1764static void scan_async(struct oxu_hcd *oxu) 1765{ 1766 struct ehci_qh *qh; 1767 enum ehci_timer_action action = TIMER_IO_WATCHDOG; 1768 1769 if (!++(oxu->stamp)) 1770 oxu->stamp++; 1771 timer_action_done(oxu, TIMER_ASYNC_SHRINK); 1772rescan: 1773 qh = oxu->async->qh_next.qh; 1774 if (likely(qh != NULL)) { 1775 do { 1776 /* clean any finished work for this qh */ 1777 if (!list_empty(&qh->qtd_list) 1778 && qh->stamp != oxu->stamp) { 1779 int temp; 1780 1781 /* unlinks could happen here; completion 1782 * reporting drops the lock. rescan using 1783 * the latest schedule, but don't rescan 1784 * qhs we already finished (no looping). 1785 */ 1786 qh = qh_get(qh); 1787 qh->stamp = oxu->stamp; 1788 temp = qh_completions(oxu, qh); 1789 qh_put(qh); 1790 if (temp != 0) 1791 goto rescan; 1792 } 1793 1794 /* unlink idle entries, reducing HC PCI usage as well 1795 * as HCD schedule-scanning costs. delay for any qh 1796 * we just scanned, there's a not-unusual case that it 1797 * doesn't stay idle for long. 1798 * (plus, avoids some kind of re-activation race.) 1799 */ 1800 if (list_empty(&qh->qtd_list)) { 1801 if (qh->stamp == oxu->stamp) 1802 action = TIMER_ASYNC_SHRINK; 1803 else if (!oxu->reclaim 1804 && qh->qh_state == QH_STATE_LINKED) 1805 start_unlink_async(oxu, qh); 1806 } 1807 1808 qh = qh->qh_next.qh; 1809 } while (qh); 1810 } 1811 if (action == TIMER_ASYNC_SHRINK) 1812 timer_action(oxu, TIMER_ASYNC_SHRINK); 1813} 1814 1815/* 1816 * periodic_next_shadow - return "next" pointer on shadow list 1817 * @periodic: host pointer to qh/itd/sitd 1818 * @tag: hardware tag for type of this record 1819 */ 1820static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic, 1821 __le32 tag) 1822{ 1823 switch (tag) { 1824 default: 1825 case Q_TYPE_QH: 1826 return &periodic->qh->qh_next; 1827 } 1828} 1829 1830/* caller must hold oxu->lock */ 1831static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr) 1832{ 1833 union ehci_shadow *prev_p = &oxu->pshadow[frame]; 1834 __le32 *hw_p = &oxu->periodic[frame]; 1835 union ehci_shadow here = *prev_p; 1836 1837 /* find predecessor of "ptr"; hw and shadow lists are in sync */ 1838 while (here.ptr && here.ptr != ptr) { 1839 prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p)); 1840 hw_p = here.hw_next; 1841 here = *prev_p; 1842 } 1843 /* an interrupt entry (at list end) could have been shared */ 1844 if (!here.ptr) 1845 return; 1846 1847 /* update shadow and hardware lists ... the old "next" pointers 1848 * from ptr may still be in use, the caller updates them. 1849 */ 1850 *prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p)); 1851 *hw_p = *here.hw_next; 1852} 1853 1854/* how many of the uframe's 125 usecs are allocated? */ 1855static unsigned short periodic_usecs(struct oxu_hcd *oxu, 1856 unsigned frame, unsigned uframe) 1857{ 1858 __le32 *hw_p = &oxu->periodic[frame]; 1859 union ehci_shadow *q = &oxu->pshadow[frame]; 1860 unsigned usecs = 0; 1861 1862 while (q->ptr) { 1863 switch (Q_NEXT_TYPE(*hw_p)) { 1864 case Q_TYPE_QH: 1865 default: 1866 /* is it in the S-mask? */ 1867 if (q->qh->hw_info2 & cpu_to_le32(1 << uframe)) 1868 usecs += q->qh->usecs; 1869 /* ... or C-mask? */ 1870 if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe))) 1871 usecs += q->qh->c_usecs; 1872 hw_p = &q->qh->hw_next; 1873 q = &q->qh->qh_next; 1874 break; 1875 } 1876 } 1877#ifdef DEBUG 1878 if (usecs > 100) 1879 oxu_err(oxu, "uframe %d sched overrun: %d usecs\n", 1880 frame * 8 + uframe, usecs); 1881#endif 1882 return usecs; 1883} 1884 1885static int enable_periodic(struct oxu_hcd *oxu) 1886{ 1887 u32 cmd; 1888 int status; 1889 1890 /* did clearing PSE did take effect yet? 1891 * takes effect only at frame boundaries... 1892 */ 1893 status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125); 1894 if (status != 0) { 1895 oxu_to_hcd(oxu)->state = HC_STATE_HALT; 1896 return status; 1897 } 1898 1899 cmd = readl(&oxu->regs->command) | CMD_PSE; 1900 writel(cmd, &oxu->regs->command); 1901 /* posted write ... PSS happens later */ 1902 oxu_to_hcd(oxu)->state = HC_STATE_RUNNING; 1903 1904 /* make sure ehci_work scans these */ 1905 oxu->next_uframe = readl(&oxu->regs->frame_index) 1906 % (oxu->periodic_size << 3); 1907 return 0; 1908} 1909 1910static int disable_periodic(struct oxu_hcd *oxu) 1911{ 1912 u32 cmd; 1913 int status; 1914 1915 /* did setting PSE not take effect yet? 1916 * takes effect only at frame boundaries... 1917 */ 1918 status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125); 1919 if (status != 0) { 1920 oxu_to_hcd(oxu)->state = HC_STATE_HALT; 1921 return status; 1922 } 1923 1924 cmd = readl(&oxu->regs->command) & ~CMD_PSE; 1925 writel(cmd, &oxu->regs->command); 1926 /* posted write ... */ 1927 1928 oxu->next_uframe = -1; 1929 return 0; 1930} 1931 1932/* periodic schedule slots have iso tds (normal or split) first, then a 1933 * sparse tree for active interrupt transfers. 1934 * 1935 * this just links in a qh; caller guarantees uframe masks are set right. 1936 * no FSTN support (yet; oxu 0.96+) 1937 */ 1938static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh) 1939{ 1940 unsigned i; 1941 unsigned period = qh->period; 1942 1943 dev_dbg(&qh->dev->dev, 1944 "link qh%d-%04x/%p start %d [%d/%d us]\n", 1945 period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK), 1946 qh, qh->start, qh->usecs, qh->c_usecs); 1947 1948 /* high bandwidth, or otherwise every microframe */ 1949 if (period == 0) 1950 period = 1; 1951 1952 for (i = qh->start; i < oxu->periodic_size; i += period) { 1953 union ehci_shadow *prev = &oxu->pshadow[i]; 1954 __le32 *hw_p = &oxu->periodic[i]; 1955 union ehci_shadow here = *prev; 1956 __le32 type = 0; 1957 1958 /* skip the iso nodes at list head */ 1959 while (here.ptr) { 1960 type = Q_NEXT_TYPE(*hw_p); 1961 if (type == Q_TYPE_QH) 1962 break; 1963 prev = periodic_next_shadow(prev, type); 1964 hw_p = &here.qh->hw_next; 1965 here = *prev; 1966 } 1967 1968 /* sorting each branch by period (slow-->fast) 1969 * enables sharing interior tree nodes 1970 */ 1971 while (here.ptr && qh != here.qh) { 1972 if (qh->period > here.qh->period) 1973 break; 1974 prev = &here.qh->qh_next; 1975 hw_p = &here.qh->hw_next; 1976 here = *prev; 1977 } 1978 /* link in this qh, unless some earlier pass did that */ 1979 if (qh != here.qh) { 1980 qh->qh_next = here; 1981 if (here.qh) 1982 qh->hw_next = *hw_p; 1983 wmb(); 1984 prev->qh = qh; 1985 *hw_p = QH_NEXT(qh->qh_dma); 1986 } 1987 } 1988 qh->qh_state = QH_STATE_LINKED; 1989 qh_get(qh); 1990 1991 /* update per-qh bandwidth for usbfs */ 1992 oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period 1993 ? ((qh->usecs + qh->c_usecs) / qh->period) 1994 : (qh->usecs * 8); 1995 1996 /* maybe enable periodic schedule processing */ 1997 if (!oxu->periodic_sched++) 1998 return enable_periodic(oxu); 1999 2000 return 0; 2001} 2002 2003static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh) 2004{ 2005 unsigned i; 2006 unsigned period; 2007 2008 /* FIXME: 2009 * IF this isn't high speed 2010 * and this qh is active in the current uframe 2011 * (and overlay token SplitXstate is false?) 2012 * THEN 2013 * qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore"); 2014 */ 2015 2016 /* high bandwidth, or otherwise part of every microframe */ 2017 period = qh->period; 2018 if (period == 0) 2019 period = 1; 2020 2021 for (i = qh->start; i < oxu->periodic_size; i += period) 2022 periodic_unlink(oxu, i, qh); 2023 2024 /* update per-qh bandwidth for usbfs */ 2025 oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period 2026 ? ((qh->usecs + qh->c_usecs) / qh->period) 2027 : (qh->usecs * 8); 2028 2029 dev_dbg(&qh->dev->dev, 2030 "unlink qh%d-%04x/%p start %d [%d/%d us]\n", 2031 qh->period, 2032 le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK), 2033 qh, qh->start, qh->usecs, qh->c_usecs); 2034 2035 /* qh->qh_next still "live" to HC */ 2036 qh->qh_state = QH_STATE_UNLINK; 2037 qh->qh_next.ptr = NULL; 2038 qh_put(qh); 2039 2040 /* maybe turn off periodic schedule */ 2041 oxu->periodic_sched--; 2042 if (!oxu->periodic_sched) 2043 (void) disable_periodic(oxu); 2044} 2045 2046static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh) 2047{ 2048 unsigned wait; 2049 2050 qh_unlink_periodic(oxu, qh); 2051 2052 /* simple/paranoid: always delay, expecting the HC needs to read 2053 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and 2054 * expect khubd to clean up after any CSPLITs we won't issue. 2055 * active high speed queues may need bigger delays... 2056 */ 2057 if (list_empty(&qh->qtd_list) 2058 || (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0) 2059 wait = 2; 2060 else 2061 wait = 55; /* worst case: 3 * 1024 */ 2062 2063 udelay(wait); 2064 qh->qh_state = QH_STATE_IDLE; 2065 qh->hw_next = EHCI_LIST_END; 2066 wmb(); 2067} 2068 2069static int check_period(struct oxu_hcd *oxu, 2070 unsigned frame, unsigned uframe, 2071 unsigned period, unsigned usecs) 2072{ 2073 int claimed; 2074 2075 /* complete split running into next frame? 2076 * given FSTN support, we could sometimes check... 2077 */ 2078 if (uframe >= 8) 2079 return 0; 2080 2081 /* 2082 * 80% periodic == 100 usec/uframe available 2083 * convert "usecs we need" to "max already claimed" 2084 */ 2085 usecs = 100 - usecs; 2086 2087 /* we "know" 2 and 4 uframe intervals were rejected; so 2088 * for period 0, check _every_ microframe in the schedule. 2089 */ 2090 if (unlikely(period == 0)) { 2091 do { 2092 for (uframe = 0; uframe < 7; uframe++) { 2093 claimed = periodic_usecs(oxu, frame, uframe); 2094 if (claimed > usecs) 2095 return 0; 2096 } 2097 } while ((frame += 1) < oxu->periodic_size); 2098 2099 /* just check the specified uframe, at that period */ 2100 } else { 2101 do { 2102 claimed = periodic_usecs(oxu, frame, uframe); 2103 if (claimed > usecs) 2104 return 0; 2105 } while ((frame += period) < oxu->periodic_size); 2106 } 2107 2108 return 1; 2109} 2110 2111static int check_intr_schedule(struct oxu_hcd *oxu, 2112 unsigned frame, unsigned uframe, 2113 const struct ehci_qh *qh, __le32 *c_maskp) 2114{ 2115 int retval = -ENOSPC; 2116 2117 if (qh->c_usecs && uframe >= 6) /* FSTN territory? */ 2118 goto done; 2119 2120 if (!check_period(oxu, frame, uframe, qh->period, qh->usecs)) 2121 goto done; 2122 if (!qh->c_usecs) { 2123 retval = 0; 2124 *c_maskp = 0; 2125 goto done; 2126 } 2127 2128done: 2129 return retval; 2130} 2131 2132/* "first fit" scheduling policy used the first time through, 2133 * or when the previous schedule slot can't be re-used. 2134 */ 2135static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh) 2136{ 2137 int status; 2138 unsigned uframe; 2139 __le32 c_mask; 2140 unsigned frame; /* 0..(qh->period - 1), or NO_FRAME */ 2141 2142 qh_refresh(oxu, qh); 2143 qh->hw_next = EHCI_LIST_END; 2144 frame = qh->start; 2145 2146 /* reuse the previous schedule slots, if we can */ 2147 if (frame < qh->period) { 2148 uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK); 2149 status = check_intr_schedule(oxu, frame, --uframe, 2150 qh, &c_mask); 2151 } else { 2152 uframe = 0; 2153 c_mask = 0; 2154 status = -ENOSPC; 2155 } 2156 2157 /* else scan the schedule to find a group of slots such that all 2158 * uframes have enough periodic bandwidth available. 2159 */ 2160 if (status) { 2161 /* "normal" case, uframing flexible except with splits */ 2162 if (qh->period) { 2163 frame = qh->period - 1; 2164 do { 2165 for (uframe = 0; uframe < 8; uframe++) { 2166 status = check_intr_schedule(oxu, 2167 frame, uframe, qh, 2168 &c_mask); 2169 if (status == 0) 2170 break; 2171 } 2172 } while (status && frame--); 2173 2174 /* qh->period == 0 means every uframe */ 2175 } else { 2176 frame = 0; 2177 status = check_intr_schedule(oxu, 0, 0, qh, &c_mask); 2178 } 2179 if (status) 2180 goto done; 2181 qh->start = frame; 2182 2183 /* reset S-frame and (maybe) C-frame masks */ 2184 qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK)); 2185 qh->hw_info2 |= qh->period 2186 ? cpu_to_le32(1 << uframe) 2187 : cpu_to_le32(QH_SMASK); 2188 qh->hw_info2 |= c_mask; 2189 } else 2190 oxu_dbg(oxu, "reused qh %p schedule\n", qh); 2191 2192 /* stuff into the periodic schedule */ 2193 status = qh_link_periodic(oxu, qh); 2194done: 2195 return status; 2196} 2197 2198static int intr_submit(struct oxu_hcd *oxu, struct urb *urb, 2199 struct list_head *qtd_list, gfp_t mem_flags) 2200{ 2201 unsigned epnum; 2202 unsigned long flags; 2203 struct ehci_qh *qh; 2204 int status = 0; 2205 struct list_head empty; 2206 2207 /* get endpoint and transfer/schedule data */ 2208 epnum = urb->ep->desc.bEndpointAddress; 2209 2210 spin_lock_irqsave(&oxu->lock, flags); 2211 2212 if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE, 2213 &oxu_to_hcd(oxu)->flags))) { 2214 status = -ESHUTDOWN; 2215 goto done; 2216 } 2217 2218 /* get qh and force any scheduling errors */ 2219 INIT_LIST_HEAD(&empty); 2220 qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv); 2221 if (qh == NULL) { 2222 status = -ENOMEM; 2223 goto done; 2224 } 2225 if (qh->qh_state == QH_STATE_IDLE) { 2226 status = qh_schedule(oxu, qh); 2227 if (status != 0) 2228 goto done; 2229 } 2230 2231 /* then queue the urb's tds to the qh */ 2232 qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv); 2233 BUG_ON(qh == NULL); 2234 2235 /* ... update usbfs periodic stats */ 2236 oxu_to_hcd(oxu)->self.bandwidth_int_reqs++; 2237 2238done: 2239 spin_unlock_irqrestore(&oxu->lock, flags); 2240 if (status) 2241 qtd_list_free(oxu, urb, qtd_list); 2242 2243 return status; 2244} 2245 2246static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb, 2247 gfp_t mem_flags) 2248{ 2249 oxu_dbg(oxu, "iso support is missing!\n"); 2250 return -ENOSYS; 2251} 2252 2253static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb, 2254 gfp_t mem_flags) 2255{ 2256 oxu_dbg(oxu, "split iso support is missing!\n"); 2257 return -ENOSYS; 2258} 2259 2260static void scan_periodic(struct oxu_hcd *oxu) 2261{ 2262 unsigned frame, clock, now_uframe, mod; 2263 unsigned modified; 2264 2265 mod = oxu->periodic_size << 3; 2266 2267 /* 2268 * When running, scan from last scan point up to "now" 2269 * else clean up by scanning everything that's left. 2270 * Touches as few pages as possible: cache-friendly. 2271 */ 2272 now_uframe = oxu->next_uframe; 2273 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) 2274 clock = readl(&oxu->regs->frame_index); 2275 else 2276 clock = now_uframe + mod - 1; 2277 clock %= mod; 2278 2279 for (;;) { 2280 union ehci_shadow q, *q_p; 2281 __le32 type, *hw_p; 2282 unsigned uframes; 2283 2284 /* don't scan past the live uframe */ 2285 frame = now_uframe >> 3; 2286 if (frame == (clock >> 3)) 2287 uframes = now_uframe & 0x07; 2288 else { 2289 /* safe to scan the whole frame at once */ 2290 now_uframe |= 0x07; 2291 uframes = 8; 2292 } 2293 2294restart: 2295 /* scan each element in frame's queue for completions */ 2296 q_p = &oxu->pshadow[frame]; 2297 hw_p = &oxu->periodic[frame]; 2298 q.ptr = q_p->ptr; 2299 type = Q_NEXT_TYPE(*hw_p); 2300 modified = 0; 2301 2302 while (q.ptr != NULL) { 2303 union ehci_shadow temp; 2304 int live; 2305 2306 live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state); 2307 switch (type) { 2308 case Q_TYPE_QH: 2309 /* handle any completions */ 2310 temp.qh = qh_get(q.qh); 2311 type = Q_NEXT_TYPE(q.qh->hw_next); 2312 q = q.qh->qh_next; 2313 modified = qh_completions(oxu, temp.qh); 2314 if (unlikely(list_empty(&temp.qh->qtd_list))) 2315 intr_deschedule(oxu, temp.qh); 2316 qh_put(temp.qh); 2317 break; 2318 default: 2319 dbg("corrupt type %d frame %d shadow %p", 2320 type, frame, q.ptr); 2321 q.ptr = NULL; 2322 } 2323 2324 /* assume completion callbacks modify the queue */ 2325 if (unlikely(modified)) 2326 goto restart; 2327 } 2328 2329 /* Stop when we catch up to the HC */ 2330 2331 /* FIXME: this assumes we won't get lapped when 2332 * latencies climb; that should be rare, but... 2333 * detect it, and just go all the way around. 2334 * FLR might help detect this case, so long as latencies 2335 * don't exceed periodic_size msec (default 1.024 sec). 2336 */ 2337 2338 /* FIXME: likewise assumes HC doesn't halt mid-scan */ 2339 2340 if (now_uframe == clock) { 2341 unsigned now; 2342 2343 if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) 2344 break; 2345 oxu->next_uframe = now_uframe; 2346 now = readl(&oxu->regs->frame_index) % mod; 2347 if (now_uframe == now) 2348 break; 2349 2350 /* rescan the rest of this frame, then ... */ 2351 clock = now; 2352 } else { 2353 now_uframe++; 2354 now_uframe %= mod; 2355 } 2356 } 2357} 2358 2359/* On some systems, leaving remote wakeup enabled prevents system shutdown. 2360 * The firmware seems to think that powering off is a wakeup event! 2361 * This routine turns off remote wakeup and everything else, on all ports. 2362 */ 2363static void ehci_turn_off_all_ports(struct oxu_hcd *oxu) 2364{ 2365 int port = HCS_N_PORTS(oxu->hcs_params); 2366 2367 while (port--) 2368 writel(PORT_RWC_BITS, &oxu->regs->port_status[port]); 2369} 2370 2371static void ehci_port_power(struct oxu_hcd *oxu, int is_on) 2372{ 2373 unsigned port; 2374 2375 if (!HCS_PPC(oxu->hcs_params)) 2376 return; 2377 2378 oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down"); 2379 for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; ) 2380 (void) oxu_hub_control(oxu_to_hcd(oxu), 2381 is_on ? SetPortFeature : ClearPortFeature, 2382 USB_PORT_FEAT_POWER, 2383 port--, NULL, 0); 2384 msleep(20); 2385} 2386 2387/* Called from some interrupts, timers, and so on. 2388 * It calls driver completion functions, after dropping oxu->lock. 2389 */ 2390static void ehci_work(struct oxu_hcd *oxu) 2391{ 2392 timer_action_done(oxu, TIMER_IO_WATCHDOG); 2393 if (oxu->reclaim_ready) 2394 end_unlink_async(oxu); 2395 2396 /* another CPU may drop oxu->lock during a schedule scan while 2397 * it reports urb completions. this flag guards against bogus 2398 * attempts at re-entrant schedule scanning. 2399 */ 2400 if (oxu->scanning) 2401 return; 2402 oxu->scanning = 1; 2403 scan_async(oxu); 2404 if (oxu->next_uframe != -1) 2405 scan_periodic(oxu); 2406 oxu->scanning = 0; 2407 2408 /* the IO watchdog guards against hardware or driver bugs that 2409 * misplace IRQs, and should let us run completely without IRQs. 2410 * such lossage has been observed on both VT6202 and VT8235. 2411 */ 2412 if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && 2413 (oxu->async->qh_next.ptr != NULL || 2414 oxu->periodic_sched != 0)) 2415 timer_action(oxu, TIMER_IO_WATCHDOG); 2416} 2417 2418static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh) 2419{ 2420 /* if we need to use IAA and it's busy, defer */ 2421 if (qh->qh_state == QH_STATE_LINKED 2422 && oxu->reclaim 2423 && HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) { 2424 struct ehci_qh *last; 2425 2426 for (last = oxu->reclaim; 2427 last->reclaim; 2428 last = last->reclaim) 2429 continue; 2430 qh->qh_state = QH_STATE_UNLINK_WAIT; 2431 last->reclaim = qh; 2432 2433 /* bypass IAA if the hc can't care */ 2434 } else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim) 2435 end_unlink_async(oxu); 2436 2437 /* something else might have unlinked the qh by now */ 2438 if (qh->qh_state == QH_STATE_LINKED) 2439 start_unlink_async(oxu, qh); 2440} 2441 2442/* 2443 * USB host controller methods 2444 */ 2445 2446static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd) 2447{ 2448 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2449 u32 status, pcd_status = 0; 2450 int bh; 2451 2452 spin_lock(&oxu->lock); 2453 2454 status = readl(&oxu->regs->status); 2455 2456 /* e.g. cardbus physical eject */ 2457 if (status == ~(u32) 0) { 2458 oxu_dbg(oxu, "device removed\n"); 2459 goto dead; 2460 } 2461 2462 status &= INTR_MASK; 2463 if (!status) { /* irq sharing? */ 2464 spin_unlock(&oxu->lock); 2465 return IRQ_NONE; 2466 } 2467 2468 /* clear (just) interrupts */ 2469 writel(status, &oxu->regs->status); 2470 readl(&oxu->regs->command); /* unblock posted write */ 2471 bh = 0; 2472 2473#ifdef OXU_VERBOSE_DEBUG 2474 /* unrequested/ignored: Frame List Rollover */ 2475 dbg_status(oxu, "irq", status); 2476#endif 2477 2478 /* INT, ERR, and IAA interrupt rates can be throttled */ 2479 2480 /* normal [4.15.1.2] or error [4.15.1.1] completion */ 2481 if (likely((status & (STS_INT|STS_ERR)) != 0)) 2482 bh = 1; 2483 2484 /* complete the unlinking of some qh [4.15.2.3] */ 2485 if (status & STS_IAA) { 2486 oxu->reclaim_ready = 1; 2487 bh = 1; 2488 } 2489 2490 /* remote wakeup [4.3.1] */ 2491 if (status & STS_PCD) { 2492 unsigned i = HCS_N_PORTS(oxu->hcs_params); 2493 pcd_status = status; 2494 2495 /* resume root hub? */ 2496 if (!(readl(&oxu->regs->command) & CMD_RUN)) 2497 usb_hcd_resume_root_hub(hcd); 2498 2499 while (i--) { 2500 int pstatus = readl(&oxu->regs->port_status[i]); 2501 2502 if (pstatus & PORT_OWNER) 2503 continue; 2504 if (!(pstatus & PORT_RESUME) 2505 || oxu->reset_done[i] != 0) 2506 continue; 2507 2508 /* start 20 msec resume signaling from this port, 2509 * and make khubd collect PORT_STAT_C_SUSPEND to 2510 * stop that signaling. 2511 */ 2512 oxu->reset_done[i] = jiffies + msecs_to_jiffies(20); 2513 oxu_dbg(oxu, "port %d remote wakeup\n", i + 1); 2514 mod_timer(&hcd->rh_timer, oxu->reset_done[i]); 2515 } 2516 } 2517 2518 /* PCI errors [4.15.2.4] */ 2519 if (unlikely((status & STS_FATAL) != 0)) { 2520 /* bogus "fatal" IRQs appear on some chips... why? */ 2521 status = readl(&oxu->regs->status); 2522 dbg_cmd(oxu, "fatal", readl(&oxu->regs->command)); 2523 dbg_status(oxu, "fatal", status); 2524 if (status & STS_HALT) { 2525 oxu_err(oxu, "fatal error\n"); 2526dead: 2527 ehci_reset(oxu); 2528 writel(0, &oxu->regs->configured_flag); 2529 /* generic layer kills/unlinks all urbs, then 2530 * uses oxu_stop to clean up the rest 2531 */ 2532 bh = 1; 2533 } 2534 } 2535 2536 if (bh) 2537 ehci_work(oxu); 2538 spin_unlock(&oxu->lock); 2539 if (pcd_status & STS_PCD) 2540 usb_hcd_poll_rh_status(hcd); 2541 return IRQ_HANDLED; 2542} 2543 2544static irqreturn_t oxu_irq(struct usb_hcd *hcd) 2545{ 2546 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2547 int ret = IRQ_HANDLED; 2548 2549 u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS); 2550 u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET); 2551 2552 /* Disable all interrupt */ 2553 oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable); 2554 2555 if ((oxu->is_otg && (status & OXU_USBOTGI)) || 2556 (!oxu->is_otg && (status & OXU_USBSPHI))) 2557 oxu210_hcd_irq(hcd); 2558 else 2559 ret = IRQ_NONE; 2560 2561 /* Enable all interrupt back */ 2562 oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable); 2563 2564 return ret; 2565} 2566 2567static void oxu_watchdog(unsigned long param) 2568{ 2569 struct oxu_hcd *oxu = (struct oxu_hcd *) param; 2570 unsigned long flags; 2571 2572 spin_lock_irqsave(&oxu->lock, flags); 2573 2574 /* lost IAA irqs wedge things badly; seen with a vt8235 */ 2575 if (oxu->reclaim) { 2576 u32 status = readl(&oxu->regs->status); 2577 if (status & STS_IAA) { 2578 oxu_vdbg(oxu, "lost IAA\n"); 2579 writel(STS_IAA, &oxu->regs->status); 2580 oxu->reclaim_ready = 1; 2581 } 2582 } 2583 2584 /* stop async processing after it's idled a bit */ 2585 if (test_bit(TIMER_ASYNC_OFF, &oxu->actions)) 2586 start_unlink_async(oxu, oxu->async); 2587 2588 /* oxu could run by timer, without IRQs ... */ 2589 ehci_work(oxu); 2590 2591 spin_unlock_irqrestore(&oxu->lock, flags); 2592} 2593 2594/* One-time init, only for memory state. 2595 */ 2596static int oxu_hcd_init(struct usb_hcd *hcd) 2597{ 2598 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2599 u32 temp; 2600 int retval; 2601 u32 hcc_params; 2602 2603 spin_lock_init(&oxu->lock); 2604 2605 init_timer(&oxu->watchdog); 2606 oxu->watchdog.function = oxu_watchdog; 2607 oxu->watchdog.data = (unsigned long) oxu; 2608 2609 /* 2610 * hw default: 1K periodic list heads, one per frame. 2611 * periodic_size can shrink by USBCMD update if hcc_params allows. 2612 */ 2613 oxu->periodic_size = DEFAULT_I_TDPS; 2614 retval = ehci_mem_init(oxu, GFP_KERNEL); 2615 if (retval < 0) 2616 return retval; 2617 2618 /* controllers may cache some of the periodic schedule ... */ 2619 hcc_params = readl(&oxu->caps->hcc_params); 2620 if (HCC_ISOC_CACHE(hcc_params)) /* full frame cache */ 2621 oxu->i_thresh = 8; 2622 else /* N microframes cached */ 2623 oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); 2624 2625 oxu->reclaim = NULL; 2626 oxu->reclaim_ready = 0; 2627 oxu->next_uframe = -1; 2628 2629 /* 2630 * dedicate a qh for the async ring head, since we couldn't unlink 2631 * a 'real' qh without stopping the async schedule [4.8]. use it 2632 * as the 'reclamation list head' too. 2633 * its dummy is used in hw_alt_next of many tds, to prevent the qh 2634 * from automatically advancing to the next td after short reads. 2635 */ 2636 oxu->async->qh_next.qh = NULL; 2637 oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma); 2638 oxu->async->hw_info1 = cpu_to_le32(QH_HEAD); 2639 oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT); 2640 oxu->async->hw_qtd_next = EHCI_LIST_END; 2641 oxu->async->qh_state = QH_STATE_LINKED; 2642 oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma); 2643 2644 /* clear interrupt enables, set irq latency */ 2645 if (log2_irq_thresh < 0 || log2_irq_thresh > 6) 2646 log2_irq_thresh = 0; 2647 temp = 1 << (16 + log2_irq_thresh); 2648 if (HCC_CANPARK(hcc_params)) { 2649 /* HW default park == 3, on hardware that supports it (like 2650 * NVidia and ALI silicon), maximizes throughput on the async 2651 * schedule by avoiding QH fetches between transfers. 2652 * 2653 * With fast usb storage devices and NForce2, "park" seems to 2654 * make problems: throughput reduction (!), data errors... 2655 */ 2656 if (park) { 2657 park = min(park, (unsigned) 3); 2658 temp |= CMD_PARK; 2659 temp |= park << 8; 2660 } 2661 oxu_dbg(oxu, "park %d\n", park); 2662 } 2663 if (HCC_PGM_FRAMELISTLEN(hcc_params)) { 2664 /* periodic schedule size can be smaller than default */ 2665 temp &= ~(3 << 2); 2666 temp |= (EHCI_TUNE_FLS << 2); 2667 } 2668 oxu->command = temp; 2669 2670 return 0; 2671} 2672 2673/* Called during probe() after chip reset completes. 2674 */ 2675static int oxu_reset(struct usb_hcd *hcd) 2676{ 2677 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2678 int ret; 2679 2680 spin_lock_init(&oxu->mem_lock); 2681 INIT_LIST_HEAD(&oxu->urb_list); 2682 oxu->urb_len = 0; 2683 2684 /* FIMXE */ 2685 hcd->self.controller->dma_mask = NULL; 2686 2687 if (oxu->is_otg) { 2688 oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET; 2689 oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \ 2690 HC_LENGTH(readl(&oxu->caps->hc_capbase)); 2691 2692 oxu->mem = hcd->regs + OXU_SPH_MEM; 2693 } else { 2694 oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET; 2695 oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \ 2696 HC_LENGTH(readl(&oxu->caps->hc_capbase)); 2697 2698 oxu->mem = hcd->regs + OXU_OTG_MEM; 2699 } 2700 2701 oxu->hcs_params = readl(&oxu->caps->hcs_params); 2702 oxu->sbrn = 0x20; 2703 2704 ret = oxu_hcd_init(hcd); 2705 if (ret) 2706 return ret; 2707 2708 return 0; 2709} 2710 2711static int oxu_run(struct usb_hcd *hcd) 2712{ 2713 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2714 int retval; 2715 u32 temp, hcc_params; 2716 2717 hcd->uses_new_polling = 1; 2718 hcd->poll_rh = 0; 2719 2720 /* EHCI spec section 4.1 */ 2721 retval = ehci_reset(oxu); 2722 if (retval != 0) { 2723 ehci_mem_cleanup(oxu); 2724 return retval; 2725 } 2726 writel(oxu->periodic_dma, &oxu->regs->frame_list); 2727 writel((u32) oxu->async->qh_dma, &oxu->regs->async_next); 2728 2729 /* hcc_params controls whether oxu->regs->segment must (!!!) 2730 * be used; it constrains QH/ITD/SITD and QTD locations. 2731 * pci_pool consistent memory always uses segment zero. 2732 * streaming mappings for I/O buffers, like pci_map_single(), 2733 * can return segments above 4GB, if the device allows. 2734 * 2735 * NOTE: the dma mask is visible through dma_supported(), so 2736 * drivers can pass this info along ... like NETIF_F_HIGHDMA, 2737 * Scsi_Host.highmem_io, and so forth. It's readonly to all 2738 * host side drivers though. 2739 */ 2740 hcc_params = readl(&oxu->caps->hcc_params); 2741 if (HCC_64BIT_ADDR(hcc_params)) 2742 writel(0, &oxu->regs->segment); 2743 2744 oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE | 2745 CMD_ASE | CMD_RESET); 2746 oxu->command |= CMD_RUN; 2747 writel(oxu->command, &oxu->regs->command); 2748 dbg_cmd(oxu, "init", oxu->command); 2749 2750 /* 2751 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices 2752 * are explicitly handed to companion controller(s), so no TT is 2753 * involved with the root hub. (Except where one is integrated, 2754 * and there's no companion controller unless maybe for USB OTG.) 2755 */ 2756 hcd->state = HC_STATE_RUNNING; 2757 writel(FLAG_CF, &oxu->regs->configured_flag); 2758 readl(&oxu->regs->command); /* unblock posted writes */ 2759 2760 temp = HC_VERSION(readl(&oxu->caps->hc_capbase)); 2761 oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n", 2762 ((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f), 2763 temp >> 8, temp & 0xff, DRIVER_VERSION, 2764 ignore_oc ? ", overcurrent ignored" : ""); 2765 2766 writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */ 2767 2768 return 0; 2769} 2770 2771static void oxu_stop(struct usb_hcd *hcd) 2772{ 2773 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2774 2775 /* Turn off port power on all root hub ports. */ 2776 ehci_port_power(oxu, 0); 2777 2778 /* no more interrupts ... */ 2779 del_timer_sync(&oxu->watchdog); 2780 2781 spin_lock_irq(&oxu->lock); 2782 if (HC_IS_RUNNING(hcd->state)) 2783 ehci_quiesce(oxu); 2784 2785 ehci_reset(oxu); 2786 writel(0, &oxu->regs->intr_enable); 2787 spin_unlock_irq(&oxu->lock); 2788 2789 /* let companion controllers work when we aren't */ 2790 writel(0, &oxu->regs->configured_flag); 2791 2792 /* root hub is shut down separately (first, when possible) */ 2793 spin_lock_irq(&oxu->lock); 2794 if (oxu->async) 2795 ehci_work(oxu); 2796 spin_unlock_irq(&oxu->lock); 2797 ehci_mem_cleanup(oxu); 2798 2799 dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status)); 2800} 2801 2802/* Kick in for silicon on any bus (not just pci, etc). 2803 * This forcibly disables dma and IRQs, helping kexec and other cases 2804 * where the next system software may expect clean state. 2805 */ 2806static void oxu_shutdown(struct usb_hcd *hcd) 2807{ 2808 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2809 2810 (void) ehci_halt(oxu); 2811 ehci_turn_off_all_ports(oxu); 2812 2813 /* make BIOS/etc use companion controller during reboot */ 2814 writel(0, &oxu->regs->configured_flag); 2815 2816 /* unblock posted writes */ 2817 readl(&oxu->regs->configured_flag); 2818} 2819 2820/* Non-error returns are a promise to giveback() the urb later 2821 * we drop ownership so next owner (or urb unlink) can get it 2822 * 2823 * urb + dev is in hcd.self.controller.urb_list 2824 * we're queueing TDs onto software and hardware lists 2825 * 2826 * hcd-specific init for hcpriv hasn't been done yet 2827 * 2828 * NOTE: control, bulk, and interrupt share the same code to append TDs 2829 * to a (possibly active) QH, and the same QH scanning code. 2830 */ 2831static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, 2832 gfp_t mem_flags) 2833{ 2834 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2835 struct list_head qtd_list; 2836 2837 INIT_LIST_HEAD(&qtd_list); 2838 2839 switch (usb_pipetype(urb->pipe)) { 2840 case PIPE_CONTROL: 2841 case PIPE_BULK: 2842 default: 2843 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags)) 2844 return -ENOMEM; 2845 return submit_async(oxu, urb, &qtd_list, mem_flags); 2846 2847 case PIPE_INTERRUPT: 2848 if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags)) 2849 return -ENOMEM; 2850 return intr_submit(oxu, urb, &qtd_list, mem_flags); 2851 2852 case PIPE_ISOCHRONOUS: 2853 if (urb->dev->speed == USB_SPEED_HIGH) 2854 return itd_submit(oxu, urb, mem_flags); 2855 else 2856 return sitd_submit(oxu, urb, mem_flags); 2857 } 2858} 2859 2860/* This function is responsible for breaking URBs with big data size 2861 * into smaller size and processing small urbs in sequence. 2862 */ 2863static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, 2864 gfp_t mem_flags) 2865{ 2866 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2867 int num, rem; 2868 int transfer_buffer_length; 2869 void *transfer_buffer; 2870 struct urb *murb; 2871 int i, ret; 2872 2873 /* If not bulk pipe just enqueue the URB */ 2874 if (!usb_pipebulk(urb->pipe)) 2875 return __oxu_urb_enqueue(hcd, urb, mem_flags); 2876 2877 /* Otherwise we should verify the USB transfer buffer size! */ 2878 transfer_buffer = urb->transfer_buffer; 2879 transfer_buffer_length = urb->transfer_buffer_length; 2880 2881 num = urb->transfer_buffer_length / 4096; 2882 rem = urb->transfer_buffer_length % 4096; 2883 if (rem != 0) 2884 num++; 2885 2886 /* If URB is smaller than 4096 bytes just enqueue it! */ 2887 if (num == 1) 2888 return __oxu_urb_enqueue(hcd, urb, mem_flags); 2889 2890 /* Ok, we have more job to do! :) */ 2891 2892 for (i = 0; i < num - 1; i++) { 2893 /* Get free micro URB poll till a free urb is recieved */ 2894 2895 do { 2896 murb = (struct urb *) oxu_murb_alloc(oxu); 2897 if (!murb) 2898 schedule(); 2899 } while (!murb); 2900 2901 /* Coping the urb */ 2902 memcpy(murb, urb, sizeof(struct urb)); 2903 2904 murb->transfer_buffer_length = 4096; 2905 murb->transfer_buffer = transfer_buffer + i * 4096; 2906 2907 /* Null pointer for the encodes that this is a micro urb */ 2908 murb->complete = NULL; 2909 2910 ((struct oxu_murb *) murb)->main = urb; 2911 ((struct oxu_murb *) murb)->last = 0; 2912 2913 /* This loop is to guarantee urb to be processed when there's 2914 * not enough resources at a particular time by retrying. 2915 */ 2916 do { 2917 ret = __oxu_urb_enqueue(hcd, murb, mem_flags); 2918 if (ret) 2919 schedule(); 2920 } while (ret); 2921 } 2922 2923 /* Last urb requires special handling */ 2924 2925 /* Get free micro URB poll till a free urb is recieved */ 2926 do { 2927 murb = (struct urb *) oxu_murb_alloc(oxu); 2928 if (!murb) 2929 schedule(); 2930 } while (!murb); 2931 2932 /* Coping the urb */ 2933 memcpy(murb, urb, sizeof(struct urb)); 2934 2935 murb->transfer_buffer_length = rem > 0 ? rem : 4096; 2936 murb->transfer_buffer = transfer_buffer + (num - 1) * 4096; 2937 2938 /* Null pointer for the encodes that this is a micro urb */ 2939 murb->complete = NULL; 2940 2941 ((struct oxu_murb *) murb)->main = urb; 2942 ((struct oxu_murb *) murb)->last = 1; 2943 2944 do { 2945 ret = __oxu_urb_enqueue(hcd, murb, mem_flags); 2946 if (ret) 2947 schedule(); 2948 } while (ret); 2949 2950 return ret; 2951} 2952 2953/* Remove from hardware lists. 2954 * Completions normally happen asynchronously 2955 */ 2956static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 2957{ 2958 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 2959 struct ehci_qh *qh; 2960 unsigned long flags; 2961 2962 spin_lock_irqsave(&oxu->lock, flags); 2963 switch (usb_pipetype(urb->pipe)) { 2964 case PIPE_CONTROL: 2965 case PIPE_BULK: 2966 default: 2967 qh = (struct ehci_qh *) urb->hcpriv; 2968 if (!qh) 2969 break; 2970 unlink_async(oxu, qh); 2971 break; 2972 2973 case PIPE_INTERRUPT: 2974 qh = (struct ehci_qh *) urb->hcpriv; 2975 if (!qh) 2976 break; 2977 switch (qh->qh_state) { 2978 case QH_STATE_LINKED: 2979 intr_deschedule(oxu, qh); 2980 /* FALL THROUGH */ 2981 case QH_STATE_IDLE: 2982 qh_completions(oxu, qh); 2983 break; 2984 default: 2985 oxu_dbg(oxu, "bogus qh %p state %d\n", 2986 qh, qh->qh_state); 2987 goto done; 2988 } 2989 2990 /* reschedule QH iff another request is queued */ 2991 if (!list_empty(&qh->qtd_list) 2992 && HC_IS_RUNNING(hcd->state)) { 2993 int status; 2994 2995 status = qh_schedule(oxu, qh); 2996 spin_unlock_irqrestore(&oxu->lock, flags); 2997 2998 if (status != 0) { 2999 /* shouldn't happen often, but ... 3000 * FIXME kill those tds' urbs 3001 */ 3002 err("can't reschedule qh %p, err %d", 3003 qh, status); 3004 } 3005 return status; 3006 } 3007 break; 3008 } 3009done: 3010 spin_unlock_irqrestore(&oxu->lock, flags); 3011 return 0; 3012} 3013 3014/* Bulk qh holds the data toggle */ 3015static void oxu_endpoint_disable(struct usb_hcd *hcd, 3016 struct usb_host_endpoint *ep) 3017{ 3018 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 3019 unsigned long flags; 3020 struct ehci_qh *qh, *tmp; 3021 3022 /* ASSERT: any requests/urbs are being unlinked */ 3023 /* ASSERT: nobody can be submitting urbs for this any more */ 3024 3025rescan: 3026 spin_lock_irqsave(&oxu->lock, flags); 3027 qh = ep->hcpriv; 3028 if (!qh) 3029 goto done; 3030 3031 /* endpoints can be iso streams. for now, we don't 3032 * accelerate iso completions ... so spin a while. 3033 */ 3034 if (qh->hw_info1 == 0) { 3035 oxu_vdbg(oxu, "iso delay\n"); 3036 goto idle_timeout; 3037 } 3038 3039 if (!HC_IS_RUNNING(hcd->state)) 3040 qh->qh_state = QH_STATE_IDLE; 3041 switch (qh->qh_state) { 3042 case QH_STATE_LINKED: 3043 for (tmp = oxu->async->qh_next.qh; 3044 tmp && tmp != qh; 3045 tmp = tmp->qh_next.qh) 3046 continue; 3047 /* periodic qh self-unlinks on empty */ 3048 if (!tmp) 3049 goto nogood; 3050 unlink_async(oxu, qh); 3051 /* FALL THROUGH */ 3052 case QH_STATE_UNLINK: /* wait for hw to finish? */ 3053idle_timeout: 3054 spin_unlock_irqrestore(&oxu->lock, flags); 3055 schedule_timeout_uninterruptible(1); 3056 goto rescan; 3057 case QH_STATE_IDLE: /* fully unlinked */ 3058 if (list_empty(&qh->qtd_list)) { 3059 qh_put(qh); 3060 break; 3061 } 3062 /* else FALL THROUGH */ 3063 default: 3064nogood: 3065 /* caller was supposed to have unlinked any requests; 3066 * that's not our job. just leak this memory. 3067 */ 3068 oxu_err(oxu, "qh %p (#%02x) state %d%s\n", 3069 qh, ep->desc.bEndpointAddress, qh->qh_state, 3070 list_empty(&qh->qtd_list) ? "" : "(has tds)"); 3071 break; 3072 } 3073 ep->hcpriv = NULL; 3074done: 3075 spin_unlock_irqrestore(&oxu->lock, flags); 3076 return; 3077} 3078 3079static int oxu_get_frame(struct usb_hcd *hcd) 3080{ 3081 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 3082 3083 return (readl(&oxu->regs->frame_index) >> 3) % 3084 oxu->periodic_size; 3085} 3086 3087/* Build "status change" packet (one or two bytes) from HC registers */ 3088static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf) 3089{ 3090 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 3091 u32 temp, mask, status = 0; 3092 int ports, i, retval = 1; 3093 unsigned long flags; 3094 3095 /* if !USB_SUSPEND, root hub timers won't get shut down ... */ 3096 if (!HC_IS_RUNNING(hcd->state)) 3097 return 0; 3098 3099 /* init status to no-changes */ 3100 buf[0] = 0; 3101 ports = HCS_N_PORTS(oxu->hcs_params); 3102 if (ports > 7) { 3103 buf[1] = 0; 3104 retval++; 3105 } 3106 3107 /* Some boards (mostly VIA?) report bogus overcurrent indications, 3108 * causing massive log spam unless we completely ignore them. It 3109 * may be relevant that VIA VT8235 controlers, where PORT_POWER is 3110 * always set, seem to clear PORT_OCC and PORT_CSC when writing to 3111 * PORT_POWER; that's surprising, but maybe within-spec. 3112 */ 3113 if (!ignore_oc) 3114 mask = PORT_CSC | PORT_PEC | PORT_OCC; 3115 else 3116 mask = PORT_CSC | PORT_PEC; 3117 3118 /* no hub change reports (bit 0) for now (power, ...) */ 3119 3120 /* port N changes (bit N)? */ 3121 spin_lock_irqsave(&oxu->lock, flags); 3122 for (i = 0; i < ports; i++) { 3123 temp = readl(&oxu->regs->port_status[i]); 3124 3125 /* 3126 * Return status information even for ports with OWNER set. 3127 * Otherwise khubd wouldn't see the disconnect event when a 3128 * high-speed device is switched over to the companion 3129 * controller by the user. 3130 */ 3131 3132 if (!(temp & PORT_CONNECT)) 3133 oxu->reset_done[i] = 0; 3134 if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 && 3135 time_after_eq(jiffies, oxu->reset_done[i]))) { 3136 if (i < 7) 3137 buf[0] |= 1 << (i + 1); 3138 else 3139 buf[1] |= 1 << (i - 7); 3140 status = STS_PCD; 3141 } 3142 } 3143 /* FIXME autosuspend idle root hubs */ 3144 spin_unlock_irqrestore(&oxu->lock, flags); 3145 return status ? retval : 0; 3146} 3147 3148/* Returns the speed of a device attached to a port on the root hub. */ 3149static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu, 3150 unsigned int portsc) 3151{ 3152 switch ((portsc >> 26) & 3) { 3153 case 0: 3154 return 0; 3155 case 1: 3156 return 1 << USB_PORT_FEAT_LOWSPEED; 3157 case 2: 3158 default: 3159 return 1 << USB_PORT_FEAT_HIGHSPEED; 3160 } 3161} 3162 3163#define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) 3164static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq, 3165 u16 wValue, u16 wIndex, char *buf, u16 wLength) 3166{ 3167 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 3168 int ports = HCS_N_PORTS(oxu->hcs_params); 3169 u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1]; 3170 u32 temp, status; 3171 unsigned long flags; 3172 int retval = 0; 3173 unsigned selector; 3174 3175 /* 3176 * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR. 3177 * HCS_INDICATOR may say we can change LEDs to off/amber/green. 3178 * (track current state ourselves) ... blink for diagnostics, 3179 * power, "this is the one", etc. EHCI spec supports this. 3180 */ 3181 3182 spin_lock_irqsave(&oxu->lock, flags); 3183 switch (typeReq) { 3184 case ClearHubFeature: 3185 switch (wValue) { 3186 case C_HUB_LOCAL_POWER: 3187 case C_HUB_OVER_CURRENT: 3188 /* no hub-wide feature/status flags */ 3189 break; 3190 default: 3191 goto error; 3192 } 3193 break; 3194 case ClearPortFeature: 3195 if (!wIndex || wIndex > ports) 3196 goto error; 3197 wIndex--; 3198 temp = readl(status_reg); 3199 3200 /* 3201 * Even if OWNER is set, so the port is owned by the 3202 * companion controller, khubd needs to be able to clear 3203 * the port-change status bits (especially 3204 * USB_PORT_FEAT_C_CONNECTION). 3205 */ 3206 3207 switch (wValue) { 3208 case USB_PORT_FEAT_ENABLE: 3209 writel(temp & ~PORT_PE, status_reg); 3210 break; 3211 case USB_PORT_FEAT_C_ENABLE: 3212 writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg); 3213 break; 3214 case USB_PORT_FEAT_SUSPEND: 3215 if (temp & PORT_RESET) 3216 goto error; 3217 if (temp & PORT_SUSPEND) { 3218 if ((temp & PORT_PE) == 0) 3219 goto error; 3220 /* resume signaling for 20 msec */ 3221 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS); 3222 writel(temp | PORT_RESUME, status_reg); 3223 oxu->reset_done[wIndex] = jiffies 3224 + msecs_to_jiffies(20); 3225 } 3226 break; 3227 case USB_PORT_FEAT_C_SUSPEND: 3228 /* we auto-clear this feature */ 3229 break; 3230 case USB_PORT_FEAT_POWER: 3231 if (HCS_PPC(oxu->hcs_params)) 3232 writel(temp & ~(PORT_RWC_BITS | PORT_POWER), 3233 status_reg); 3234 break; 3235 case USB_PORT_FEAT_C_CONNECTION: 3236 writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg); 3237 break; 3238 case USB_PORT_FEAT_C_OVER_CURRENT: 3239 writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg); 3240 break; 3241 case USB_PORT_FEAT_C_RESET: 3242 /* GetPortStatus clears reset */ 3243 break; 3244 default: 3245 goto error; 3246 } 3247 readl(&oxu->regs->command); /* unblock posted write */ 3248 break; 3249 case GetHubDescriptor: 3250 ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *) 3251 buf); 3252 break; 3253 case GetHubStatus: 3254 /* no hub-wide feature/status flags */ 3255 memset(buf, 0, 4); 3256 break; 3257 case GetPortStatus: 3258 if (!wIndex || wIndex > ports) 3259 goto error; 3260 wIndex--; 3261 status = 0; 3262 temp = readl(status_reg); 3263 3264 /* wPortChange bits */ 3265 if (temp & PORT_CSC) 3266 status |= 1 << USB_PORT_FEAT_C_CONNECTION; 3267 if (temp & PORT_PEC) 3268 status |= 1 << USB_PORT_FEAT_C_ENABLE; 3269 if ((temp & PORT_OCC) && !ignore_oc) 3270 status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT; 3271 3272 /* whoever resumes must GetPortStatus to complete it!! */ 3273 if (temp & PORT_RESUME) { 3274 3275 /* Remote Wakeup received? */ 3276 if (!oxu->reset_done[wIndex]) { 3277 /* resume signaling for 20 msec */ 3278 oxu->reset_done[wIndex] = jiffies 3279 + msecs_to_jiffies(20); 3280 /* check the port again */ 3281 mod_timer(&oxu_to_hcd(oxu)->rh_timer, 3282 oxu->reset_done[wIndex]); 3283 } 3284 3285 /* resume completed? */ 3286 else if (time_after_eq(jiffies, 3287 oxu->reset_done[wIndex])) { 3288 status |= 1 << USB_PORT_FEAT_C_SUSPEND; 3289 oxu->reset_done[wIndex] = 0; 3290 3291 /* stop resume signaling */ 3292 temp = readl(status_reg); 3293 writel(temp & ~(PORT_RWC_BITS | PORT_RESUME), 3294 status_reg); 3295 retval = handshake(oxu, status_reg, 3296 PORT_RESUME, 0, 2000 /* 2msec */); 3297 if (retval != 0) { 3298 oxu_err(oxu, 3299 "port %d resume error %d\n", 3300 wIndex + 1, retval); 3301 goto error; 3302 } 3303 temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10)); 3304 } 3305 } 3306 3307 /* whoever resets must GetPortStatus to complete it!! */ 3308 if ((temp & PORT_RESET) 3309 && time_after_eq(jiffies, 3310 oxu->reset_done[wIndex])) { 3311 status |= 1 << USB_PORT_FEAT_C_RESET; 3312 oxu->reset_done[wIndex] = 0; 3313 3314 /* force reset to complete */ 3315 writel(temp & ~(PORT_RWC_BITS | PORT_RESET), 3316 status_reg); 3317 /* REVISIT: some hardware needs 550+ usec to clear 3318 * this bit; seems too long to spin routinely... 3319 */ 3320 retval = handshake(oxu, status_reg, 3321 PORT_RESET, 0, 750); 3322 if (retval != 0) { 3323 oxu_err(oxu, "port %d reset error %d\n", 3324 wIndex + 1, retval); 3325 goto error; 3326 } 3327 3328 /* see what we found out */ 3329 temp = check_reset_complete(oxu, wIndex, status_reg, 3330 readl(status_reg)); 3331 } 3332 3333 /* transfer dedicated ports to the companion hc */ 3334 if ((temp & PORT_CONNECT) && 3335 test_bit(wIndex, &oxu->companion_ports)) { 3336 temp &= ~PORT_RWC_BITS; 3337 temp |= PORT_OWNER; 3338 writel(temp, status_reg); 3339 oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1); 3340 temp = readl(status_reg); 3341 } 3342 3343 /* 3344 * Even if OWNER is set, there's no harm letting khubd 3345 * see the wPortStatus values (they should all be 0 except 3346 * for PORT_POWER anyway). 3347 */ 3348 3349 if (temp & PORT_CONNECT) { 3350 status |= 1 << USB_PORT_FEAT_CONNECTION; 3351 /* status may be from integrated TT */ 3352 status |= oxu_port_speed(oxu, temp); 3353 } 3354 if (temp & PORT_PE) 3355 status |= 1 << USB_PORT_FEAT_ENABLE; 3356 if (temp & (PORT_SUSPEND|PORT_RESUME)) 3357 status |= 1 << USB_PORT_FEAT_SUSPEND; 3358 if (temp & PORT_OC) 3359 status |= 1 << USB_PORT_FEAT_OVER_CURRENT; 3360 if (temp & PORT_RESET) 3361 status |= 1 << USB_PORT_FEAT_RESET; 3362 if (temp & PORT_POWER) 3363 status |= 1 << USB_PORT_FEAT_POWER; 3364 3365#ifndef OXU_VERBOSE_DEBUG 3366 if (status & ~0xffff) /* only if wPortChange is interesting */ 3367#endif 3368 dbg_port(oxu, "GetStatus", wIndex + 1, temp); 3369 put_unaligned(cpu_to_le32(status), (__le32 *) buf); 3370 break; 3371 case SetHubFeature: 3372 switch (wValue) { 3373 case C_HUB_LOCAL_POWER: 3374 case C_HUB_OVER_CURRENT: 3375 /* no hub-wide feature/status flags */ 3376 break; 3377 default: 3378 goto error; 3379 } 3380 break; 3381 case SetPortFeature: 3382 selector = wIndex >> 8; 3383 wIndex &= 0xff; 3384 if (!wIndex || wIndex > ports) 3385 goto error; 3386 wIndex--; 3387 temp = readl(status_reg); 3388 if (temp & PORT_OWNER) 3389 break; 3390 3391 temp &= ~PORT_RWC_BITS; 3392 switch (wValue) { 3393 case USB_PORT_FEAT_SUSPEND: 3394 if ((temp & PORT_PE) == 0 3395 || (temp & PORT_RESET) != 0) 3396 goto error; 3397 if (device_may_wakeup(&hcd->self.root_hub->dev)) 3398 temp |= PORT_WAKE_BITS; 3399 writel(temp | PORT_SUSPEND, status_reg); 3400 break; 3401 case USB_PORT_FEAT_POWER: 3402 if (HCS_PPC(oxu->hcs_params)) 3403 writel(temp | PORT_POWER, status_reg); 3404 break; 3405 case USB_PORT_FEAT_RESET: 3406 if (temp & PORT_RESUME) 3407 goto error; 3408 /* line status bits may report this as low speed, 3409 * which can be fine if this root hub has a 3410 * transaction translator built in. 3411 */ 3412 oxu_vdbg(oxu, "port %d reset\n", wIndex + 1); 3413 temp |= PORT_RESET; 3414 temp &= ~PORT_PE; 3415 3416 /* 3417 * caller must wait, then call GetPortStatus 3418 * usb 2.0 spec says 50 ms resets on root 3419 */ 3420 oxu->reset_done[wIndex] = jiffies 3421 + msecs_to_jiffies(50); 3422 writel(temp, status_reg); 3423 break; 3424 3425 /* For downstream facing ports (these): one hub port is put 3426 * into test mode according to USB2 11.24.2.13, then the hub 3427 * must be reset (which for root hub now means rmmod+modprobe, 3428 * or else system reboot). See EHCI 2.3.9 and 4.14 for info 3429 * about the EHCI-specific stuff. 3430 */ 3431 case USB_PORT_FEAT_TEST: 3432 if (!selector || selector > 5) 3433 goto error; 3434 ehci_quiesce(oxu); 3435 ehci_halt(oxu); 3436 temp |= selector << 16; 3437 writel(temp, status_reg); 3438 break; 3439 3440 default: 3441 goto error; 3442 } 3443 readl(&oxu->regs->command); /* unblock posted writes */ 3444 break; 3445 3446 default: 3447error: 3448 /* "stall" on error */ 3449 retval = -EPIPE; 3450 } 3451 spin_unlock_irqrestore(&oxu->lock, flags); 3452 return retval; 3453} 3454 3455#ifdef CONFIG_PM 3456 3457static int oxu_bus_suspend(struct usb_hcd *hcd) 3458{ 3459 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 3460 int port; 3461 int mask; 3462 3463 oxu_dbg(oxu, "suspend root hub\n"); 3464 3465 if (time_before(jiffies, oxu->next_statechange)) 3466 msleep(5); 3467 3468 port = HCS_N_PORTS(oxu->hcs_params); 3469 spin_lock_irq(&oxu->lock); 3470 3471 /* stop schedules, clean any completed work */ 3472 if (HC_IS_RUNNING(hcd->state)) { 3473 ehci_quiesce(oxu); 3474 hcd->state = HC_STATE_QUIESCING; 3475 } 3476 oxu->command = readl(&oxu->regs->command); 3477 if (oxu->reclaim) 3478 oxu->reclaim_ready = 1; 3479 ehci_work(oxu); 3480 3481 /* Unlike other USB host controller types, EHCI doesn't have 3482 * any notion of "global" or bus-wide suspend. The driver has 3483 * to manually suspend all the active unsuspended ports, and 3484 * then manually resume them in the bus_resume() routine. 3485 */ 3486 oxu->bus_suspended = 0; 3487 while (port--) { 3488 u32 __iomem *reg = &oxu->regs->port_status[port]; 3489 u32 t1 = readl(reg) & ~PORT_RWC_BITS; 3490 u32 t2 = t1; 3491 3492 /* keep track of which ports we suspend */ 3493 if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) && 3494 !(t1 & PORT_SUSPEND)) { 3495 t2 |= PORT_SUSPEND; 3496 set_bit(port, &oxu->bus_suspended); 3497 } 3498 3499 /* enable remote wakeup on all ports */ 3500 if (device_may_wakeup(&hcd->self.root_hub->dev)) 3501 t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E; 3502 else 3503 t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E); 3504 3505 if (t1 != t2) { 3506 oxu_vdbg(oxu, "port %d, %08x -> %08x\n", 3507 port + 1, t1, t2); 3508 writel(t2, reg); 3509 } 3510 } 3511 3512 /* turn off now-idle HC */ 3513 del_timer_sync(&oxu->watchdog); 3514 ehci_halt(oxu); 3515 hcd->state = HC_STATE_SUSPENDED; 3516 3517 /* allow remote wakeup */ 3518 mask = INTR_MASK; 3519 if (!device_may_wakeup(&hcd->self.root_hub->dev)) 3520 mask &= ~STS_PCD; 3521 writel(mask, &oxu->regs->intr_enable); 3522 readl(&oxu->regs->intr_enable); 3523 3524 oxu->next_statechange = jiffies + msecs_to_jiffies(10); 3525 spin_unlock_irq(&oxu->lock); 3526 return 0; 3527} 3528 3529/* Caller has locked the root hub, and should reset/reinit on error */ 3530static int oxu_bus_resume(struct usb_hcd *hcd) 3531{ 3532 struct oxu_hcd *oxu = hcd_to_oxu(hcd); 3533 u32 temp; 3534 int i; 3535 3536 if (time_before(jiffies, oxu->next_statechange)) 3537 msleep(5); 3538 spin_lock_irq(&oxu->lock); 3539 3540 /* Ideally and we've got a real resume here, and no port's power 3541 * was lost. (For PCI, that means Vaux was maintained.) But we 3542 * could instead be restoring a swsusp snapshot -- so that BIOS was 3543 * the last user of the controller, not reset/pm hardware keeping 3544 * state we gave to it. 3545 */ 3546 temp = readl(&oxu->regs->intr_enable); 3547 oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss"); 3548 3549 /* at least some APM implementations will try to deliver 3550 * IRQs right away, so delay them until we're ready. 3551 */ 3552 writel(0, &oxu->regs->intr_enable); 3553 3554 /* re-init operational registers */ 3555 writel(0, &oxu->regs->segment); 3556 writel(oxu->periodic_dma, &oxu->regs->frame_list); 3557 writel((u32) oxu->async->qh_dma, &oxu->regs->async_next); 3558 3559 /* restore CMD_RUN, framelist size, and irq threshold */ 3560 writel(oxu->command, &oxu->regs->command); 3561 3562 /* Some controller/firmware combinations need a delay during which 3563 * they set up the port statuses. See Bugzilla #8190. */ 3564 mdelay(8); 3565 3566 /* manually resume the ports we suspended during bus_suspend() */ 3567 i = HCS_N_PORTS(oxu->hcs_params); 3568 while (i--) { 3569 temp = readl(&oxu->regs->port_status[i]); 3570 temp &= ~(PORT_RWC_BITS 3571 | PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E); 3572 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) { 3573 oxu->reset_done[i] = jiffies + msecs_to_jiffies(20); 3574 temp |= PORT_RESUME; 3575 } 3576 writel(temp, &oxu->regs->port_status[i]); 3577 } 3578 i = HCS_N_PORTS(oxu->hcs_params); 3579 mdelay(20); 3580 while (i--) { 3581 temp = readl(&oxu->regs->port_status[i]); 3582 if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) { 3583 temp &= ~(PORT_RWC_BITS | PORT_RESUME); 3584 writel(temp, &oxu->regs->port_status[i]); 3585 oxu_vdbg(oxu, "resumed port %d\n", i + 1); 3586 } 3587 } 3588 (void) readl(&oxu->regs->command); 3589 3590 /* maybe re-activate the schedule(s) */ 3591 temp = 0; 3592 if (oxu->async->qh_next.qh) 3593 temp |= CMD_ASE; 3594 if (oxu->periodic_sched) 3595 temp |= CMD_PSE; 3596 if (temp) { 3597 oxu->command |= temp; 3598 writel(oxu->command, &oxu->regs->command); 3599 } 3600 3601 oxu->next_statechange = jiffies + msecs_to_jiffies(5); 3602 hcd->state = HC_STATE_RUNNING; 3603 3604 /* Now we can safely re-enable irqs */ 3605 writel(INTR_MASK, &oxu->regs->intr_enable); 3606 3607 spin_unlock_irq(&oxu->lock); 3608 return 0; 3609} 3610 3611#else 3612 3613static int oxu_bus_suspend(struct usb_hcd *hcd) 3614{ 3615 return 0; 3616} 3617 3618static int oxu_bus_resume(struct usb_hcd *hcd) 3619{ 3620 return 0; 3621} 3622 3623#endif /* CONFIG_PM */ 3624 3625static const struct hc_driver oxu_hc_driver = { 3626 .description = "oxu210hp_hcd", 3627 .product_desc = "oxu210hp HCD", 3628 .hcd_priv_size = sizeof(struct oxu_hcd), 3629 3630 /* 3631 * Generic hardware linkage 3632 */ 3633 .irq = oxu_irq, 3634 .flags = HCD_MEMORY | HCD_USB2, 3635 3636 /* 3637 * Basic lifecycle operations 3638 */ 3639 .reset = oxu_reset, 3640 .start = oxu_run, 3641 .stop = oxu_stop, 3642 .shutdown = oxu_shutdown, 3643 3644 /* 3645 * Managing i/o requests and associated device resources 3646 */ 3647 .urb_enqueue = oxu_urb_enqueue, 3648 .urb_dequeue = oxu_urb_dequeue, 3649 .endpoint_disable = oxu_endpoint_disable, 3650 3651 /* 3652 * Scheduling support 3653 */ 3654 .get_frame_number = oxu_get_frame, 3655 3656 /* 3657 * Root hub support 3658 */ 3659 .hub_status_data = oxu_hub_status_data, 3660 .hub_control = oxu_hub_control, 3661 .bus_suspend = oxu_bus_suspend, 3662 .bus_resume = oxu_bus_resume, 3663}; 3664 3665/* 3666 * Module stuff 3667 */ 3668 3669static void oxu_configuration(struct platform_device *pdev, void *base) 3670{ 3671 u32 tmp; 3672 3673 /* Initialize top level registers. 3674 * First write ever 3675 */ 3676 oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D); 3677 oxu_writel(base, OXU_SOFTRESET, OXU_SRESET); 3678 oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D); 3679 3680 tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL); 3681 oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040); 3682 3683 oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN | 3684 OXU_COMPARATOR | OXU_ASO_OP); 3685 3686 tmp = oxu_readl(base, OXU_CLKCTRL_SET); 3687 oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN); 3688 3689 /* Clear all top interrupt enable */ 3690 oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff); 3691 3692 /* Clear all top interrupt status */ 3693 oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff); 3694 3695 /* Enable all needed top interrupt except OTG SPH core */ 3696 oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI); 3697} 3698 3699static int oxu_verify_id(struct platform_device *pdev, void *base) 3700{ 3701 u32 id; 3702 char *bo[] = { 3703 "reserved", 3704 "128-pin LQFP", 3705 "84-pin TFBGA", 3706 "reserved", 3707 }; 3708 3709 /* Read controller signature register to find a match */ 3710 id = oxu_readl(base, OXU_DEVICEID); 3711 dev_info(&pdev->dev, "device ID %x\n", id); 3712 if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT)) 3713 return -1; 3714 3715 dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n", 3716 id >> OXU_REV_SHIFT, 3717 bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT], 3718 (id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT, 3719 (id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT); 3720 3721 return 0; 3722} 3723 3724static const struct hc_driver oxu_hc_driver; 3725static struct usb_hcd *oxu_create(struct platform_device *pdev, 3726 unsigned long memstart, unsigned long memlen, 3727 void *base, int irq, int otg) 3728{ 3729 struct device *dev = &pdev->dev; 3730 3731 struct usb_hcd *hcd; 3732 struct oxu_hcd *oxu; 3733 int ret; 3734 3735 /* Set endian mode and host mode */ 3736 oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET), 3737 OXU_USBMODE, 3738 OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS); 3739 3740 hcd = usb_create_hcd(&oxu_hc_driver, dev, 3741 otg ? "oxu210hp_otg" : "oxu210hp_sph"); 3742 if (!hcd) 3743 return ERR_PTR(-ENOMEM); 3744 3745 hcd->rsrc_start = memstart; 3746 hcd->rsrc_len = memlen; 3747 hcd->regs = base; 3748 hcd->irq = irq; 3749 hcd->state = HC_STATE_HALT; 3750 3751 oxu = hcd_to_oxu(hcd); 3752 oxu->is_otg = otg; 3753 3754 ret = usb_add_hcd(hcd, irq, IRQF_SHARED); 3755 if (ret < 0) 3756 return ERR_PTR(ret); 3757 3758 return hcd; 3759} 3760 3761static int oxu_init(struct platform_device *pdev, 3762 unsigned long memstart, unsigned long memlen, 3763 void *base, int irq) 3764{ 3765 struct oxu_info *info = platform_get_drvdata(pdev); 3766 struct usb_hcd *hcd; 3767 int ret; 3768 3769 /* First time configuration at start up */ 3770 oxu_configuration(pdev, base); 3771 3772 ret = oxu_verify_id(pdev, base); 3773 if (ret) { 3774 dev_err(&pdev->dev, "no devices found!\n"); 3775 return -ENODEV; 3776 } 3777 3778 /* Create the OTG controller */ 3779 hcd = oxu_create(pdev, memstart, memlen, base, irq, 1); 3780 if (IS_ERR(hcd)) { 3781 dev_err(&pdev->dev, "cannot create OTG controller!\n"); 3782 ret = PTR_ERR(hcd); 3783 goto error_create_otg; 3784 } 3785 info->hcd[0] = hcd; 3786 3787 /* Create the SPH host controller */ 3788 hcd = oxu_create(pdev, memstart, memlen, base, irq, 0); 3789 if (IS_ERR(hcd)) { 3790 dev_err(&pdev->dev, "cannot create SPH controller!\n"); 3791 ret = PTR_ERR(hcd); 3792 goto error_create_sph; 3793 } 3794 info->hcd[1] = hcd; 3795 3796 oxu_writel(base, OXU_CHIPIRQEN_SET, 3797 oxu_readl(base, OXU_CHIPIRQEN_SET) | 3); 3798 3799 return 0; 3800 3801error_create_sph: 3802 usb_remove_hcd(info->hcd[0]); 3803 usb_put_hcd(info->hcd[0]); 3804 3805error_create_otg: 3806 return ret; 3807} 3808 3809static int oxu_drv_probe(struct platform_device *pdev) 3810{ 3811 struct resource *res; 3812 void *base; 3813 unsigned long memstart, memlen; 3814 int irq, ret; 3815 struct oxu_info *info; 3816 3817 if (usb_disabled()) 3818 return -ENODEV; 3819 3820 /* 3821 * Get the platform resources 3822 */ 3823 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 3824 if (!res) { 3825 dev_err(&pdev->dev, 3826 "no IRQ! Check %s setup!\n", dev_name(&pdev->dev)); 3827 return -ENODEV; 3828 } 3829 irq = res->start; 3830 dev_dbg(&pdev->dev, "IRQ resource %d\n", irq); 3831 3832 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 3833 if (!res) { 3834 dev_err(&pdev->dev, "no registers address! Check %s setup!\n", 3835 dev_name(&pdev->dev)); 3836 return -ENODEV; 3837 } 3838 memstart = res->start; 3839 memlen = res->end - res->start + 1; 3840 dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen); 3841 if (!request_mem_region(memstart, memlen, 3842 oxu_hc_driver.description)) { 3843 dev_dbg(&pdev->dev, "memory area already in use\n"); 3844 return -EBUSY; 3845 } 3846 3847 ret = set_irq_type(irq, IRQF_TRIGGER_FALLING); 3848 if (ret) { 3849 dev_err(&pdev->dev, "error setting irq type\n"); 3850 ret = -EFAULT; 3851 goto error_set_irq_type; 3852 } 3853 3854 base = ioremap(memstart, memlen); 3855 if (!base) { 3856 dev_dbg(&pdev->dev, "error mapping memory\n"); 3857 ret = -EFAULT; 3858 goto error_ioremap; 3859 } 3860 3861 /* Allocate a driver data struct to hold useful info for both 3862 * SPH & OTG devices 3863 */ 3864 info = kzalloc(sizeof(struct oxu_info), GFP_KERNEL); 3865 if (!info) { 3866 dev_dbg(&pdev->dev, "error allocating memory\n"); 3867 ret = -EFAULT; 3868 goto error_alloc; 3869 } 3870 platform_set_drvdata(pdev, info); 3871 3872 ret = oxu_init(pdev, memstart, memlen, base, irq); 3873 if (ret < 0) { 3874 dev_dbg(&pdev->dev, "cannot init USB devices\n"); 3875 goto error_init; 3876 } 3877 3878 dev_info(&pdev->dev, "devices enabled and running\n"); 3879 platform_set_drvdata(pdev, info); 3880 3881 return 0; 3882 3883error_init: 3884 kfree(info); 3885 platform_set_drvdata(pdev, NULL); 3886 3887error_alloc: 3888 iounmap(base); 3889 3890error_set_irq_type: 3891error_ioremap: 3892 release_mem_region(memstart, memlen); 3893 3894 dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret); 3895 return ret; 3896} 3897 3898static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd) 3899{ 3900 usb_remove_hcd(hcd); 3901 usb_put_hcd(hcd); 3902} 3903 3904static int oxu_drv_remove(struct platform_device *pdev) 3905{ 3906 struct oxu_info *info = platform_get_drvdata(pdev); 3907 unsigned long memstart = info->hcd[0]->rsrc_start, 3908 memlen = info->hcd[0]->rsrc_len; 3909 void *base = info->hcd[0]->regs; 3910 3911 oxu_remove(pdev, info->hcd[0]); 3912 oxu_remove(pdev, info->hcd[1]); 3913 3914 iounmap(base); 3915 release_mem_region(memstart, memlen); 3916 3917 kfree(info); 3918 platform_set_drvdata(pdev, NULL); 3919 3920 return 0; 3921} 3922 3923static void oxu_drv_shutdown(struct platform_device *pdev) 3924{ 3925 oxu_drv_remove(pdev); 3926} 3927 3928#if 0 3929/* FIXME: TODO */ 3930static int oxu_drv_suspend(struct device *dev) 3931{ 3932 struct platform_device *pdev = to_platform_device(dev); 3933 struct usb_hcd *hcd = dev_get_drvdata(dev); 3934 3935 return 0; 3936} 3937 3938static int oxu_drv_resume(struct device *dev) 3939{ 3940 struct platform_device *pdev = to_platform_device(dev); 3941 struct usb_hcd *hcd = dev_get_drvdata(dev); 3942 3943 return 0; 3944} 3945#else 3946#define oxu_drv_suspend NULL 3947#define oxu_drv_resume NULL 3948#endif 3949 3950static struct platform_driver oxu_driver = { 3951 .probe = oxu_drv_probe, 3952 .remove = oxu_drv_remove, 3953 .shutdown = oxu_drv_shutdown, 3954 .suspend = oxu_drv_suspend, 3955 .resume = oxu_drv_resume, 3956 .driver = { 3957 .name = "oxu210hp-hcd", 3958 .bus = &platform_bus_type 3959 } 3960}; 3961 3962static int __init oxu_module_init(void) 3963{ 3964 int retval = 0; 3965 3966 retval = platform_driver_register(&oxu_driver); 3967 if (retval < 0) 3968 return retval; 3969 3970 return retval; 3971} 3972 3973static void __exit oxu_module_cleanup(void) 3974{ 3975 platform_driver_unregister(&oxu_driver); 3976} 3977 3978module_init(oxu_module_init); 3979module_exit(oxu_module_cleanup); 3980 3981MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION); 3982MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>"); 3983MODULE_LICENSE("GPL"); 3984