oxu210hp-hcd.c revision 3c9740a117d40a74412775b5d3fe2b88a7635a0e
1/*
2 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
3 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
4 *
5 * This code is *strongly* based on EHCI-HCD code by David Brownell since
6 * the chip is a quasi-EHCI compatible.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/dmapool.h>
26#include <linux/kernel.h>
27#include <linux/delay.h>
28#include <linux/ioport.h>
29#include <linux/sched.h>
30#include <linux/slab.h>
31#include <linux/errno.h>
32#include <linux/init.h>
33#include <linux/timer.h>
34#include <linux/list.h>
35#include <linux/interrupt.h>
36#include <linux/usb.h>
37#include <linux/usb/hcd.h>
38#include <linux/moduleparam.h>
39#include <linux/dma-mapping.h>
40#include <linux/io.h>
41
42#include <asm/irq.h>
43#include <asm/unaligned.h>
44
45#include <linux/irq.h>
46#include <linux/platform_device.h>
47
48#include "oxu210hp.h"
49
50#define DRIVER_VERSION "0.0.50"
51
52/*
53 * Main defines
54 */
55
56#define oxu_dbg(oxu, fmt, args...) \
57		dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
58#define oxu_err(oxu, fmt, args...) \
59		dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
60#define oxu_info(oxu, fmt, args...) \
61		dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
62
63#ifdef CONFIG_DYNAMIC_DEBUG
64#define DEBUG
65#endif
66
67static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
68{
69	return container_of((void *) oxu, struct usb_hcd, hcd_priv);
70}
71
72static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
73{
74	return (struct oxu_hcd *) (hcd->hcd_priv);
75}
76
77/*
78 * Debug stuff
79 */
80
81#undef OXU_URB_TRACE
82#undef OXU_VERBOSE_DEBUG
83
84#ifdef OXU_VERBOSE_DEBUG
85#define oxu_vdbg			oxu_dbg
86#else
87#define oxu_vdbg(oxu, fmt, args...)	/* Nop */
88#endif
89
90#ifdef DEBUG
91
92static int __attribute__((__unused__))
93dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
94{
95	return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
96		label, label[0] ? " " : "", status,
97		(status & STS_ASS) ? " Async" : "",
98		(status & STS_PSS) ? " Periodic" : "",
99		(status & STS_RECL) ? " Recl" : "",
100		(status & STS_HALT) ? " Halt" : "",
101		(status & STS_IAA) ? " IAA" : "",
102		(status & STS_FATAL) ? " FATAL" : "",
103		(status & STS_FLR) ? " FLR" : "",
104		(status & STS_PCD) ? " PCD" : "",
105		(status & STS_ERR) ? " ERR" : "",
106		(status & STS_INT) ? " INT" : ""
107		);
108}
109
110static int __attribute__((__unused__))
111dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
112{
113	return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
114		label, label[0] ? " " : "", enable,
115		(enable & STS_IAA) ? " IAA" : "",
116		(enable & STS_FATAL) ? " FATAL" : "",
117		(enable & STS_FLR) ? " FLR" : "",
118		(enable & STS_PCD) ? " PCD" : "",
119		(enable & STS_ERR) ? " ERR" : "",
120		(enable & STS_INT) ? " INT" : ""
121		);
122}
123
124static const char *const fls_strings[] =
125    { "1024", "512", "256", "??" };
126
127static int dbg_command_buf(char *buf, unsigned len,
128				const char *label, u32 command)
129{
130	return scnprintf(buf, len,
131		"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
132		label, label[0] ? " " : "", command,
133		(command & CMD_PARK) ? "park" : "(park)",
134		CMD_PARK_CNT(command),
135		(command >> 16) & 0x3f,
136		(command & CMD_LRESET) ? " LReset" : "",
137		(command & CMD_IAAD) ? " IAAD" : "",
138		(command & CMD_ASE) ? " Async" : "",
139		(command & CMD_PSE) ? " Periodic" : "",
140		fls_strings[(command >> 2) & 0x3],
141		(command & CMD_RESET) ? " Reset" : "",
142		(command & CMD_RUN) ? "RUN" : "HALT"
143		);
144}
145
146static int dbg_port_buf(char *buf, unsigned len, const char *label,
147				int port, u32 status)
148{
149	char	*sig;
150
151	/* signaling state */
152	switch (status & (3 << 10)) {
153	case 0 << 10:
154		sig = "se0";
155		break;
156	case 1 << 10:
157		sig = "k";	/* low speed */
158		break;
159	case 2 << 10:
160		sig = "j";
161		break;
162	default:
163		sig = "?";
164		break;
165	}
166
167	return scnprintf(buf, len,
168		"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
169		label, label[0] ? " " : "", port, status,
170		(status & PORT_POWER) ? " POWER" : "",
171		(status & PORT_OWNER) ? " OWNER" : "",
172		sig,
173		(status & PORT_RESET) ? " RESET" : "",
174		(status & PORT_SUSPEND) ? " SUSPEND" : "",
175		(status & PORT_RESUME) ? " RESUME" : "",
176		(status & PORT_OCC) ? " OCC" : "",
177		(status & PORT_OC) ? " OC" : "",
178		(status & PORT_PEC) ? " PEC" : "",
179		(status & PORT_PE) ? " PE" : "",
180		(status & PORT_CSC) ? " CSC" : "",
181		(status & PORT_CONNECT) ? " CONNECT" : ""
182	    );
183}
184
185#else
186
187static inline int __attribute__((__unused__))
188dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
189{ return 0; }
190
191static inline int __attribute__((__unused__))
192dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
193{ return 0; }
194
195static inline int __attribute__((__unused__))
196dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
197{ return 0; }
198
199static inline int __attribute__((__unused__))
200dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
201{ return 0; }
202
203#endif /* DEBUG */
204
205/* functions have the "wrong" filename when they're output... */
206#define dbg_status(oxu, label, status) { \
207	char _buf[80]; \
208	dbg_status_buf(_buf, sizeof _buf, label, status); \
209	oxu_dbg(oxu, "%s\n", _buf); \
210}
211
212#define dbg_cmd(oxu, label, command) { \
213	char _buf[80]; \
214	dbg_command_buf(_buf, sizeof _buf, label, command); \
215	oxu_dbg(oxu, "%s\n", _buf); \
216}
217
218#define dbg_port(oxu, label, port, status) { \
219	char _buf[80]; \
220	dbg_port_buf(_buf, sizeof _buf, label, port, status); \
221	oxu_dbg(oxu, "%s\n", _buf); \
222}
223
224/*
225 * Module parameters
226 */
227
228/* Initial IRQ latency: faster than hw default */
229static int log2_irq_thresh;			/* 0 to 6 */
230module_param(log2_irq_thresh, int, S_IRUGO);
231MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
232
233/* Initial park setting: slower than hw default */
234static unsigned park;
235module_param(park, uint, S_IRUGO);
236MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
237
238/* For flakey hardware, ignore overcurrent indicators */
239static bool ignore_oc;
240module_param(ignore_oc, bool, S_IRUGO);
241MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
242
243
244static void ehci_work(struct oxu_hcd *oxu);
245static int oxu_hub_control(struct usb_hcd *hcd,
246				u16 typeReq, u16 wValue, u16 wIndex,
247				char *buf, u16 wLength);
248
249/*
250 * Local functions
251 */
252
253/* Low level read/write registers functions */
254static inline u32 oxu_readl(void *base, u32 reg)
255{
256	return readl(base + reg);
257}
258
259static inline void oxu_writel(void *base, u32 reg, u32 val)
260{
261	writel(val, base + reg);
262}
263
264static inline void timer_action_done(struct oxu_hcd *oxu,
265					enum ehci_timer_action action)
266{
267	clear_bit(action, &oxu->actions);
268}
269
270static inline void timer_action(struct oxu_hcd *oxu,
271					enum ehci_timer_action action)
272{
273	if (!test_and_set_bit(action, &oxu->actions)) {
274		unsigned long t;
275
276		switch (action) {
277		case TIMER_IAA_WATCHDOG:
278			t = EHCI_IAA_JIFFIES;
279			break;
280		case TIMER_IO_WATCHDOG:
281			t = EHCI_IO_JIFFIES;
282			break;
283		case TIMER_ASYNC_OFF:
284			t = EHCI_ASYNC_JIFFIES;
285			break;
286		case TIMER_ASYNC_SHRINK:
287		default:
288			t = EHCI_SHRINK_JIFFIES;
289			break;
290		}
291		t += jiffies;
292		/* all timings except IAA watchdog can be overridden.
293		 * async queue SHRINK often precedes IAA.  while it's ready
294		 * to go OFF neither can matter, and afterwards the IO
295		 * watchdog stops unless there's still periodic traffic.
296		 */
297		if (action != TIMER_IAA_WATCHDOG
298				&& t > oxu->watchdog.expires
299				&& timer_pending(&oxu->watchdog))
300			return;
301		mod_timer(&oxu->watchdog, t);
302	}
303}
304
305/*
306 * handshake - spin reading hc until handshake completes or fails
307 * @ptr: address of hc register to be read
308 * @mask: bits to look at in result of read
309 * @done: value of those bits when handshake succeeds
310 * @usec: timeout in microseconds
311 *
312 * Returns negative errno, or zero on success
313 *
314 * Success happens when the "mask" bits have the specified value (hardware
315 * handshake done).  There are two failure modes:  "usec" have passed (major
316 * hardware flakeout), or the register reads as all-ones (hardware removed).
317 *
318 * That last failure should_only happen in cases like physical cardbus eject
319 * before driver shutdown. But it also seems to be caused by bugs in cardbus
320 * bridge shutdown:  shutting down the bridge before the devices using it.
321 */
322static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
323					u32 mask, u32 done, int usec)
324{
325	u32 result;
326
327	do {
328		result = readl(ptr);
329		if (result == ~(u32)0)		/* card removed */
330			return -ENODEV;
331		result &= mask;
332		if (result == done)
333			return 0;
334		udelay(1);
335		usec--;
336	} while (usec > 0);
337	return -ETIMEDOUT;
338}
339
340/* Force HC to halt state from unknown (EHCI spec section 2.3) */
341static int ehci_halt(struct oxu_hcd *oxu)
342{
343	u32	temp = readl(&oxu->regs->status);
344
345	/* disable any irqs left enabled by previous code */
346	writel(0, &oxu->regs->intr_enable);
347
348	if ((temp & STS_HALT) != 0)
349		return 0;
350
351	temp = readl(&oxu->regs->command);
352	temp &= ~CMD_RUN;
353	writel(temp, &oxu->regs->command);
354	return handshake(oxu, &oxu->regs->status,
355			  STS_HALT, STS_HALT, 16 * 125);
356}
357
358/* Put TDI/ARC silicon into EHCI mode */
359static void tdi_reset(struct oxu_hcd *oxu)
360{
361	u32 __iomem *reg_ptr;
362	u32 tmp;
363
364	reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
365	tmp = readl(reg_ptr);
366	tmp |= 0x3;
367	writel(tmp, reg_ptr);
368}
369
370/* Reset a non-running (STS_HALT == 1) controller */
371static int ehci_reset(struct oxu_hcd *oxu)
372{
373	int	retval;
374	u32	command = readl(&oxu->regs->command);
375
376	command |= CMD_RESET;
377	dbg_cmd(oxu, "reset", command);
378	writel(command, &oxu->regs->command);
379	oxu_to_hcd(oxu)->state = HC_STATE_HALT;
380	oxu->next_statechange = jiffies;
381	retval = handshake(oxu, &oxu->regs->command,
382			    CMD_RESET, 0, 250 * 1000);
383
384	if (retval)
385		return retval;
386
387	tdi_reset(oxu);
388
389	return retval;
390}
391
392/* Idle the controller (from running) */
393static void ehci_quiesce(struct oxu_hcd *oxu)
394{
395	u32	temp;
396
397#ifdef DEBUG
398	if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
399		BUG();
400#endif
401
402	/* wait for any schedule enables/disables to take effect */
403	temp = readl(&oxu->regs->command) << 10;
404	temp &= STS_ASS | STS_PSS;
405	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
406				temp, 16 * 125) != 0) {
407		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
408		return;
409	}
410
411	/* then disable anything that's still active */
412	temp = readl(&oxu->regs->command);
413	temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
414	writel(temp, &oxu->regs->command);
415
416	/* hardware can take 16 microframes to turn off ... */
417	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
418				0, 16 * 125) != 0) {
419		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
420		return;
421	}
422}
423
424static int check_reset_complete(struct oxu_hcd *oxu, int index,
425				u32 __iomem *status_reg, int port_status)
426{
427	if (!(port_status & PORT_CONNECT)) {
428		oxu->reset_done[index] = 0;
429		return port_status;
430	}
431
432	/* if reset finished and it's still not enabled -- handoff */
433	if (!(port_status & PORT_PE)) {
434		oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
435				index+1);
436		return port_status;
437	} else
438		oxu_dbg(oxu, "port %d high speed\n", index + 1);
439
440	return port_status;
441}
442
443static void ehci_hub_descriptor(struct oxu_hcd *oxu,
444				struct usb_hub_descriptor *desc)
445{
446	int ports = HCS_N_PORTS(oxu->hcs_params);
447	u16 temp;
448
449	desc->bDescriptorType = 0x29;
450	desc->bPwrOn2PwrGood = 10;	/* oxu 1.0, 2.3.9 says 20ms max */
451	desc->bHubContrCurrent = 0;
452
453	desc->bNbrPorts = ports;
454	temp = 1 + (ports / 8);
455	desc->bDescLength = 7 + 2 * temp;
456
457	/* ports removable, and usb 1.0 legacy PortPwrCtrlMask */
458	memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
459	memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
460
461	temp = 0x0008;			/* per-port overcurrent reporting */
462	if (HCS_PPC(oxu->hcs_params))
463		temp |= 0x0001;		/* per-port power control */
464	else
465		temp |= 0x0002;		/* no power switching */
466	desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
467}
468
469
470/* Allocate an OXU210HP on-chip memory data buffer
471 *
472 * An on-chip memory data buffer is required for each OXU210HP USB transfer.
473 * Each transfer descriptor has one or more on-chip memory data buffers.
474 *
475 * Data buffers are allocated from a fix sized pool of data blocks.
476 * To minimise fragmentation and give reasonable memory utlisation,
477 * data buffers are allocated with sizes the power of 2 multiples of
478 * the block size, starting on an address a multiple of the allocated size.
479 *
480 * FIXME: callers of this function require a buffer to be allocated for
481 * len=0. This is a waste of on-chip memory and should be fix. Then this
482 * function should be changed to not allocate a buffer for len=0.
483 */
484static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
485{
486	int n_blocks;	/* minium blocks needed to hold len */
487	int a_blocks;	/* blocks allocated */
488	int i, j;
489
490	/* Don't allocte bigger than supported */
491	if (len > BUFFER_SIZE * BUFFER_NUM) {
492		oxu_err(oxu, "buffer too big (%d)\n", len);
493		return -ENOMEM;
494	}
495
496	spin_lock(&oxu->mem_lock);
497
498	/* Number of blocks needed to hold len */
499	n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
500
501	/* Round the number of blocks up to the power of 2 */
502	for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
503		;
504
505	/* Find a suitable available data buffer */
506	for (i = 0; i < BUFFER_NUM;
507			i += max(a_blocks, (int)oxu->db_used[i])) {
508
509		/* Check all the required blocks are available */
510		for (j = 0; j < a_blocks; j++)
511			if (oxu->db_used[i + j])
512				break;
513
514		if (j != a_blocks)
515			continue;
516
517		/* Allocate blocks found! */
518		qtd->buffer = (void *) &oxu->mem->db_pool[i];
519		qtd->buffer_dma = virt_to_phys(qtd->buffer);
520
521		qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
522		oxu->db_used[i] = a_blocks;
523
524		spin_unlock(&oxu->mem_lock);
525
526		return 0;
527	}
528
529	/* Failed */
530
531	spin_unlock(&oxu->mem_lock);
532
533	return -ENOMEM;
534}
535
536static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
537{
538	int index;
539
540	spin_lock(&oxu->mem_lock);
541
542	index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
543							 / BUFFER_SIZE;
544	oxu->db_used[index] = 0;
545	qtd->qtd_buffer_len = 0;
546	qtd->buffer_dma = 0;
547	qtd->buffer = NULL;
548
549	spin_unlock(&oxu->mem_lock);
550}
551
552static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
553{
554	memset(qtd, 0, sizeof *qtd);
555	qtd->qtd_dma = dma;
556	qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
557	qtd->hw_next = EHCI_LIST_END;
558	qtd->hw_alt_next = EHCI_LIST_END;
559	INIT_LIST_HEAD(&qtd->qtd_list);
560}
561
562static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
563{
564	int index;
565
566	if (qtd->buffer)
567		oxu_buf_free(oxu, qtd);
568
569	spin_lock(&oxu->mem_lock);
570
571	index = qtd - &oxu->mem->qtd_pool[0];
572	oxu->qtd_used[index] = 0;
573
574	spin_unlock(&oxu->mem_lock);
575}
576
577static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
578{
579	int i;
580	struct ehci_qtd *qtd = NULL;
581
582	spin_lock(&oxu->mem_lock);
583
584	for (i = 0; i < QTD_NUM; i++)
585		if (!oxu->qtd_used[i])
586			break;
587
588	if (i < QTD_NUM) {
589		qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
590		memset(qtd, 0, sizeof *qtd);
591
592		qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
593		qtd->hw_next = EHCI_LIST_END;
594		qtd->hw_alt_next = EHCI_LIST_END;
595		INIT_LIST_HEAD(&qtd->qtd_list);
596
597		qtd->qtd_dma = virt_to_phys(qtd);
598
599		oxu->qtd_used[i] = 1;
600	}
601
602	spin_unlock(&oxu->mem_lock);
603
604	return qtd;
605}
606
607static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
608{
609	int index;
610
611	spin_lock(&oxu->mem_lock);
612
613	index = qh - &oxu->mem->qh_pool[0];
614	oxu->qh_used[index] = 0;
615
616	spin_unlock(&oxu->mem_lock);
617}
618
619static void qh_destroy(struct kref *kref)
620{
621	struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
622	struct oxu_hcd *oxu = qh->oxu;
623
624	/* clean qtds first, and know this is not linked */
625	if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
626		oxu_dbg(oxu, "unused qh not empty!\n");
627		BUG();
628	}
629	if (qh->dummy)
630		oxu_qtd_free(oxu, qh->dummy);
631	oxu_qh_free(oxu, qh);
632}
633
634static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
635{
636	int i;
637	struct ehci_qh *qh = NULL;
638
639	spin_lock(&oxu->mem_lock);
640
641	for (i = 0; i < QHEAD_NUM; i++)
642		if (!oxu->qh_used[i])
643			break;
644
645	if (i < QHEAD_NUM) {
646		qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
647		memset(qh, 0, sizeof *qh);
648
649		kref_init(&qh->kref);
650		qh->oxu = oxu;
651		qh->qh_dma = virt_to_phys(qh);
652		INIT_LIST_HEAD(&qh->qtd_list);
653
654		/* dummy td enables safe urb queuing */
655		qh->dummy = ehci_qtd_alloc(oxu);
656		if (qh->dummy == NULL) {
657			oxu_dbg(oxu, "no dummy td\n");
658			oxu->qh_used[i] = 0;
659			qh = NULL;
660			goto unlock;
661		}
662
663		oxu->qh_used[i] = 1;
664	}
665unlock:
666	spin_unlock(&oxu->mem_lock);
667
668	return qh;
669}
670
671/* to share a qh (cpu threads, or hc) */
672static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
673{
674	kref_get(&qh->kref);
675	return qh;
676}
677
678static inline void qh_put(struct ehci_qh *qh)
679{
680	kref_put(&qh->kref, qh_destroy);
681}
682
683static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
684{
685	int index;
686
687	spin_lock(&oxu->mem_lock);
688
689	index = murb - &oxu->murb_pool[0];
690	oxu->murb_used[index] = 0;
691
692	spin_unlock(&oxu->mem_lock);
693}
694
695static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
696
697{
698	int i;
699	struct oxu_murb *murb = NULL;
700
701	spin_lock(&oxu->mem_lock);
702
703	for (i = 0; i < MURB_NUM; i++)
704		if (!oxu->murb_used[i])
705			break;
706
707	if (i < MURB_NUM) {
708		murb = &(oxu->murb_pool)[i];
709
710		oxu->murb_used[i] = 1;
711	}
712
713	spin_unlock(&oxu->mem_lock);
714
715	return murb;
716}
717
718/* The queue heads and transfer descriptors are managed from pools tied
719 * to each of the "per device" structures.
720 * This is the initialisation and cleanup code.
721 */
722static void ehci_mem_cleanup(struct oxu_hcd *oxu)
723{
724	kfree(oxu->murb_pool);
725	oxu->murb_pool = NULL;
726
727	if (oxu->async)
728		qh_put(oxu->async);
729	oxu->async = NULL;
730
731	del_timer(&oxu->urb_timer);
732
733	oxu->periodic = NULL;
734
735	/* shadow periodic table */
736	kfree(oxu->pshadow);
737	oxu->pshadow = NULL;
738}
739
740/* Remember to add cleanup code (above) if you add anything here.
741 */
742static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
743{
744	int i;
745
746	for (i = 0; i < oxu->periodic_size; i++)
747		oxu->mem->frame_list[i] = EHCI_LIST_END;
748	for (i = 0; i < QHEAD_NUM; i++)
749		oxu->qh_used[i] = 0;
750	for (i = 0; i < QTD_NUM; i++)
751		oxu->qtd_used[i] = 0;
752
753	oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
754	if (!oxu->murb_pool)
755		goto fail;
756
757	for (i = 0; i < MURB_NUM; i++)
758		oxu->murb_used[i] = 0;
759
760	oxu->async = oxu_qh_alloc(oxu);
761	if (!oxu->async)
762		goto fail;
763
764	oxu->periodic = (__le32 *) &oxu->mem->frame_list;
765	oxu->periodic_dma = virt_to_phys(oxu->periodic);
766
767	for (i = 0; i < oxu->periodic_size; i++)
768		oxu->periodic[i] = EHCI_LIST_END;
769
770	/* software shadow of hardware table */
771	oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
772	if (oxu->pshadow != NULL)
773		return 0;
774
775fail:
776	oxu_dbg(oxu, "couldn't init memory\n");
777	ehci_mem_cleanup(oxu);
778	return -ENOMEM;
779}
780
781/* Fill a qtd, returning how much of the buffer we were able to queue up.
782 */
783static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
784				int token, int maxpacket)
785{
786	int i, count;
787	u64 addr = buf;
788
789	/* one buffer entry per 4K ... first might be short or unaligned */
790	qtd->hw_buf[0] = cpu_to_le32((u32)addr);
791	qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
792	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
793	if (likely(len < count))		/* ... iff needed */
794		count = len;
795	else {
796		buf +=  0x1000;
797		buf &= ~0x0fff;
798
799		/* per-qtd limit: from 16K to 20K (best alignment) */
800		for (i = 1; count < len && i < 5; i++) {
801			addr = buf;
802			qtd->hw_buf[i] = cpu_to_le32((u32)addr);
803			qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
804			buf += 0x1000;
805			if ((count + 0x1000) < len)
806				count += 0x1000;
807			else
808				count = len;
809		}
810
811		/* short packets may only terminate transfers */
812		if (count != len)
813			count -= (count % maxpacket);
814	}
815	qtd->hw_token = cpu_to_le32((count << 16) | token);
816	qtd->length = count;
817
818	return count;
819}
820
821static inline void qh_update(struct oxu_hcd *oxu,
822				struct ehci_qh *qh, struct ehci_qtd *qtd)
823{
824	/* writes to an active overlay are unsafe */
825	BUG_ON(qh->qh_state != QH_STATE_IDLE);
826
827	qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
828	qh->hw_alt_next = EHCI_LIST_END;
829
830	/* Except for control endpoints, we make hardware maintain data
831	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
832	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
833	 * ever clear it.
834	 */
835	if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
836		unsigned	is_out, epnum;
837
838		is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
839		epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
840		if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
841			qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
842			usb_settoggle(qh->dev, epnum, is_out, 1);
843		}
844	}
845
846	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
847	wmb();
848	qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
849}
850
851/* If it weren't for a common silicon quirk (writing the dummy into the qh
852 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
853 * recovery (including urb dequeue) would need software changes to a QH...
854 */
855static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
856{
857	struct ehci_qtd *qtd;
858
859	if (list_empty(&qh->qtd_list))
860		qtd = qh->dummy;
861	else {
862		qtd = list_entry(qh->qtd_list.next,
863				struct ehci_qtd, qtd_list);
864		/* first qtd may already be partially processed */
865		if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
866			qtd = NULL;
867	}
868
869	if (qtd)
870		qh_update(oxu, qh, qtd);
871}
872
873static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
874				size_t length, u32 token)
875{
876	/* count IN/OUT bytes, not SETUP (even short packets) */
877	if (likely(QTD_PID(token) != 2))
878		urb->actual_length += length - QTD_LENGTH(token);
879
880	/* don't modify error codes */
881	if (unlikely(urb->status != -EINPROGRESS))
882		return;
883
884	/* force cleanup after short read; not always an error */
885	if (unlikely(IS_SHORT_READ(token)))
886		urb->status = -EREMOTEIO;
887
888	/* serious "can't proceed" faults reported by the hardware */
889	if (token & QTD_STS_HALT) {
890		if (token & QTD_STS_BABBLE) {
891			/* FIXME "must" disable babbling device's port too */
892			urb->status = -EOVERFLOW;
893		} else if (token & QTD_STS_MMF) {
894			/* fs/ls interrupt xfer missed the complete-split */
895			urb->status = -EPROTO;
896		} else if (token & QTD_STS_DBE) {
897			urb->status = (QTD_PID(token) == 1) /* IN ? */
898				? -ENOSR  /* hc couldn't read data */
899				: -ECOMM; /* hc couldn't write data */
900		} else if (token & QTD_STS_XACT) {
901			/* timeout, bad crc, wrong PID, etc; retried */
902			if (QTD_CERR(token))
903				urb->status = -EPIPE;
904			else {
905				oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
906					urb->dev->devpath,
907					usb_pipeendpoint(urb->pipe),
908					usb_pipein(urb->pipe) ? "in" : "out");
909				urb->status = -EPROTO;
910			}
911		/* CERR nonzero + no errors + halt --> stall */
912		} else if (QTD_CERR(token))
913			urb->status = -EPIPE;
914		else	/* unknown */
915			urb->status = -EPROTO;
916
917		oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
918			usb_pipedevice(urb->pipe),
919			usb_pipeendpoint(urb->pipe),
920			usb_pipein(urb->pipe) ? "in" : "out",
921			token, urb->status);
922	}
923}
924
925static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
926__releases(oxu->lock)
927__acquires(oxu->lock)
928{
929	if (likely(urb->hcpriv != NULL)) {
930		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
931
932		/* S-mask in a QH means it's an interrupt urb */
933		if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
934
935			/* ... update hc-wide periodic stats (for usbfs) */
936			oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
937		}
938		qh_put(qh);
939	}
940
941	urb->hcpriv = NULL;
942	switch (urb->status) {
943	case -EINPROGRESS:		/* success */
944		urb->status = 0;
945	default:			/* fault */
946		break;
947	case -EREMOTEIO:		/* fault or normal */
948		if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
949			urb->status = 0;
950		break;
951	case -ECONNRESET:		/* canceled */
952	case -ENOENT:
953		break;
954	}
955
956#ifdef OXU_URB_TRACE
957	oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
958		__func__, urb->dev->devpath, urb,
959		usb_pipeendpoint(urb->pipe),
960		usb_pipein(urb->pipe) ? "in" : "out",
961		urb->status,
962		urb->actual_length, urb->transfer_buffer_length);
963#endif
964
965	/* complete() can reenter this HCD */
966	spin_unlock(&oxu->lock);
967	usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
968	spin_lock(&oxu->lock);
969}
970
971static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
972static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
973
974static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
975static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
976
977#define HALT_BIT cpu_to_le32(QTD_STS_HALT)
978
979/* Process and free completed qtds for a qh, returning URBs to drivers.
980 * Chases up to qh->hw_current.  Returns number of completions called,
981 * indicating how much "real" work we did.
982 */
983static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
984{
985	struct ehci_qtd *last = NULL, *end = qh->dummy;
986	struct list_head *entry, *tmp;
987	int stopped;
988	unsigned count = 0;
989	int do_status = 0;
990	u8 state;
991	struct oxu_murb *murb = NULL;
992
993	if (unlikely(list_empty(&qh->qtd_list)))
994		return count;
995
996	/* completions (or tasks on other cpus) must never clobber HALT
997	 * till we've gone through and cleaned everything up, even when
998	 * they add urbs to this qh's queue or mark them for unlinking.
999	 *
1000	 * NOTE:  unlinking expects to be done in queue order.
1001	 */
1002	state = qh->qh_state;
1003	qh->qh_state = QH_STATE_COMPLETING;
1004	stopped = (state == QH_STATE_IDLE);
1005
1006	/* remove de-activated QTDs from front of queue.
1007	 * after faults (including short reads), cleanup this urb
1008	 * then let the queue advance.
1009	 * if queue is stopped, handles unlinks.
1010	 */
1011	list_for_each_safe(entry, tmp, &qh->qtd_list) {
1012		struct ehci_qtd	*qtd;
1013		struct urb *urb;
1014		u32 token = 0;
1015
1016		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1017		urb = qtd->urb;
1018
1019		/* Clean up any state from previous QTD ...*/
1020		if (last) {
1021			if (likely(last->urb != urb)) {
1022				if (last->urb->complete == NULL) {
1023					murb = (struct oxu_murb *) last->urb;
1024					last->urb = murb->main;
1025					if (murb->last) {
1026						ehci_urb_done(oxu, last->urb);
1027						count++;
1028					}
1029					oxu_murb_free(oxu, murb);
1030				} else {
1031					ehci_urb_done(oxu, last->urb);
1032					count++;
1033				}
1034			}
1035			oxu_qtd_free(oxu, last);
1036			last = NULL;
1037		}
1038
1039		/* ignore urbs submitted during completions we reported */
1040		if (qtd == end)
1041			break;
1042
1043		/* hardware copies qtd out of qh overlay */
1044		rmb();
1045		token = le32_to_cpu(qtd->hw_token);
1046
1047		/* always clean up qtds the hc de-activated */
1048		if ((token & QTD_STS_ACTIVE) == 0) {
1049
1050			if ((token & QTD_STS_HALT) != 0) {
1051				stopped = 1;
1052
1053			/* magic dummy for some short reads; qh won't advance.
1054			 * that silicon quirk can kick in with this dummy too.
1055			 */
1056			} else if (IS_SHORT_READ(token) &&
1057					!(qtd->hw_alt_next & EHCI_LIST_END)) {
1058				stopped = 1;
1059				goto halt;
1060			}
1061
1062		/* stop scanning when we reach qtds the hc is using */
1063		} else if (likely(!stopped &&
1064				HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1065			break;
1066
1067		} else {
1068			stopped = 1;
1069
1070			if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1071				urb->status = -ESHUTDOWN;
1072
1073			/* ignore active urbs unless some previous qtd
1074			 * for the urb faulted (including short read) or
1075			 * its urb was canceled.  we may patch qh or qtds.
1076			 */
1077			if (likely(urb->status == -EINPROGRESS))
1078				continue;
1079
1080			/* issue status after short control reads */
1081			if (unlikely(do_status != 0)
1082					&& QTD_PID(token) == 0 /* OUT */) {
1083				do_status = 0;
1084				continue;
1085			}
1086
1087			/* token in overlay may be most current */
1088			if (state == QH_STATE_IDLE
1089					&& cpu_to_le32(qtd->qtd_dma)
1090						== qh->hw_current)
1091				token = le32_to_cpu(qh->hw_token);
1092
1093			/* force halt for unlinked or blocked qh, so we'll
1094			 * patch the qh later and so that completions can't
1095			 * activate it while we "know" it's stopped.
1096			 */
1097			if ((HALT_BIT & qh->hw_token) == 0) {
1098halt:
1099				qh->hw_token |= HALT_BIT;
1100				wmb();
1101			}
1102		}
1103
1104		/* Remove it from the queue */
1105		qtd_copy_status(oxu, urb->complete ?
1106					urb : ((struct oxu_murb *) urb)->main,
1107				qtd->length, token);
1108		if ((usb_pipein(qtd->urb->pipe)) &&
1109				(NULL != qtd->transfer_buffer))
1110			memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1111		do_status = (urb->status == -EREMOTEIO)
1112				&& usb_pipecontrol(urb->pipe);
1113
1114		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1115			last = list_entry(qtd->qtd_list.prev,
1116					struct ehci_qtd, qtd_list);
1117			last->hw_next = qtd->hw_next;
1118		}
1119		list_del(&qtd->qtd_list);
1120		last = qtd;
1121	}
1122
1123	/* last urb's completion might still need calling */
1124	if (likely(last != NULL)) {
1125		if (last->urb->complete == NULL) {
1126			murb = (struct oxu_murb *) last->urb;
1127			last->urb = murb->main;
1128			if (murb->last) {
1129				ehci_urb_done(oxu, last->urb);
1130				count++;
1131			}
1132			oxu_murb_free(oxu, murb);
1133		} else {
1134			ehci_urb_done(oxu, last->urb);
1135			count++;
1136		}
1137		oxu_qtd_free(oxu, last);
1138	}
1139
1140	/* restore original state; caller must unlink or relink */
1141	qh->qh_state = state;
1142
1143	/* be sure the hardware's done with the qh before refreshing
1144	 * it after fault cleanup, or recovering from silicon wrongly
1145	 * overlaying the dummy qtd (which reduces DMA chatter).
1146	 */
1147	if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1148		switch (state) {
1149		case QH_STATE_IDLE:
1150			qh_refresh(oxu, qh);
1151			break;
1152		case QH_STATE_LINKED:
1153			/* should be rare for periodic transfers,
1154			 * except maybe high bandwidth ...
1155			 */
1156			if ((cpu_to_le32(QH_SMASK)
1157					& qh->hw_info2) != 0) {
1158				intr_deschedule(oxu, qh);
1159				(void) qh_schedule(oxu, qh);
1160			} else
1161				unlink_async(oxu, qh);
1162			break;
1163		/* otherwise, unlink already started */
1164		}
1165	}
1166
1167	return count;
1168}
1169
1170/* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1171#define hb_mult(wMaxPacketSize)		(1 + (((wMaxPacketSize) >> 11) & 0x03))
1172/* ... and packet size, for any kind of endpoint descriptor */
1173#define max_packet(wMaxPacketSize)	((wMaxPacketSize) & 0x07ff)
1174
1175/* Reverse of qh_urb_transaction: free a list of TDs.
1176 * used for cleanup after errors, before HC sees an URB's TDs.
1177 */
1178static void qtd_list_free(struct oxu_hcd *oxu,
1179				struct urb *urb, struct list_head *qtd_list)
1180{
1181	struct list_head *entry, *temp;
1182
1183	list_for_each_safe(entry, temp, qtd_list) {
1184		struct ehci_qtd	*qtd;
1185
1186		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1187		list_del(&qtd->qtd_list);
1188		oxu_qtd_free(oxu, qtd);
1189	}
1190}
1191
1192/* Create a list of filled qtds for this URB; won't link into qh.
1193 */
1194static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1195						struct urb *urb,
1196						struct list_head *head,
1197						gfp_t flags)
1198{
1199	struct ehci_qtd	*qtd, *qtd_prev;
1200	dma_addr_t buf;
1201	int len, maxpacket;
1202	int is_input;
1203	u32 token;
1204	void *transfer_buf = NULL;
1205	int ret;
1206
1207	/*
1208	 * URBs map to sequences of QTDs: one logical transaction
1209	 */
1210	qtd = ehci_qtd_alloc(oxu);
1211	if (unlikely(!qtd))
1212		return NULL;
1213	list_add_tail(&qtd->qtd_list, head);
1214	qtd->urb = urb;
1215
1216	token = QTD_STS_ACTIVE;
1217	token |= (EHCI_TUNE_CERR << 10);
1218	/* for split transactions, SplitXState initialized to zero */
1219
1220	len = urb->transfer_buffer_length;
1221	is_input = usb_pipein(urb->pipe);
1222	if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1223		urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1224
1225	if (usb_pipecontrol(urb->pipe)) {
1226		/* SETUP pid */
1227		ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1228		if (ret)
1229			goto cleanup;
1230
1231		qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1232				token | (2 /* "setup" */ << 8), 8);
1233		memcpy(qtd->buffer, qtd->urb->setup_packet,
1234				sizeof(struct usb_ctrlrequest));
1235
1236		/* ... and always at least one more pid */
1237		token ^= QTD_TOGGLE;
1238		qtd_prev = qtd;
1239		qtd = ehci_qtd_alloc(oxu);
1240		if (unlikely(!qtd))
1241			goto cleanup;
1242		qtd->urb = urb;
1243		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1244		list_add_tail(&qtd->qtd_list, head);
1245
1246		/* for zero length DATA stages, STATUS is always IN */
1247		if (len == 0)
1248			token |= (1 /* "in" */ << 8);
1249	}
1250
1251	/*
1252	 * Data transfer stage: buffer setup
1253	 */
1254
1255	ret = oxu_buf_alloc(oxu, qtd, len);
1256	if (ret)
1257		goto cleanup;
1258
1259	buf = qtd->buffer_dma;
1260	transfer_buf = urb->transfer_buffer;
1261
1262	if (!is_input)
1263		memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1264
1265	if (is_input)
1266		token |= (1 /* "in" */ << 8);
1267	/* else it's already initted to "out" pid (0 << 8) */
1268
1269	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1270
1271	/*
1272	 * buffer gets wrapped in one or more qtds;
1273	 * last one may be "short" (including zero len)
1274	 * and may serve as a control status ack
1275	 */
1276	for (;;) {
1277		int this_qtd_len;
1278
1279		this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1280		qtd->transfer_buffer = transfer_buf;
1281		len -= this_qtd_len;
1282		buf += this_qtd_len;
1283		transfer_buf += this_qtd_len;
1284		if (is_input)
1285			qtd->hw_alt_next = oxu->async->hw_alt_next;
1286
1287		/* qh makes control packets use qtd toggle; maybe switch it */
1288		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1289			token ^= QTD_TOGGLE;
1290
1291		if (likely(len <= 0))
1292			break;
1293
1294		qtd_prev = qtd;
1295		qtd = ehci_qtd_alloc(oxu);
1296		if (unlikely(!qtd))
1297			goto cleanup;
1298		if (likely(len > 0)) {
1299			ret = oxu_buf_alloc(oxu, qtd, len);
1300			if (ret)
1301				goto cleanup;
1302		}
1303		qtd->urb = urb;
1304		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1305		list_add_tail(&qtd->qtd_list, head);
1306	}
1307
1308	/* unless the bulk/interrupt caller wants a chance to clean
1309	 * up after short reads, hc should advance qh past this urb
1310	 */
1311	if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1312				|| usb_pipecontrol(urb->pipe)))
1313		qtd->hw_alt_next = EHCI_LIST_END;
1314
1315	/*
1316	 * control requests may need a terminating data "status" ack;
1317	 * bulk ones may need a terminating short packet (zero length).
1318	 */
1319	if (likely(urb->transfer_buffer_length != 0)) {
1320		int	one_more = 0;
1321
1322		if (usb_pipecontrol(urb->pipe)) {
1323			one_more = 1;
1324			token ^= 0x0100;	/* "in" <--> "out"  */
1325			token |= QTD_TOGGLE;	/* force DATA1 */
1326		} else if (usb_pipebulk(urb->pipe)
1327				&& (urb->transfer_flags & URB_ZERO_PACKET)
1328				&& !(urb->transfer_buffer_length % maxpacket)) {
1329			one_more = 1;
1330		}
1331		if (one_more) {
1332			qtd_prev = qtd;
1333			qtd = ehci_qtd_alloc(oxu);
1334			if (unlikely(!qtd))
1335				goto cleanup;
1336			qtd->urb = urb;
1337			qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1338			list_add_tail(&qtd->qtd_list, head);
1339
1340			/* never any data in such packets */
1341			qtd_fill(qtd, 0, 0, token, 0);
1342		}
1343	}
1344
1345	/* by default, enable interrupt on urb completion */
1346		qtd->hw_token |= cpu_to_le32(QTD_IOC);
1347	return head;
1348
1349cleanup:
1350	qtd_list_free(oxu, urb, head);
1351	return NULL;
1352}
1353
1354/* Each QH holds a qtd list; a QH is used for everything except iso.
1355 *
1356 * For interrupt urbs, the scheduler must set the microframe scheduling
1357 * mask(s) each time the QH gets scheduled.  For highspeed, that's
1358 * just one microframe in the s-mask.  For split interrupt transactions
1359 * there are additional complications: c-mask, maybe FSTNs.
1360 */
1361static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1362				struct urb *urb, gfp_t flags)
1363{
1364	struct ehci_qh *qh = oxu_qh_alloc(oxu);
1365	u32 info1 = 0, info2 = 0;
1366	int is_input, type;
1367	int maxp = 0;
1368
1369	if (!qh)
1370		return qh;
1371
1372	/*
1373	 * init endpoint/device data for this QH
1374	 */
1375	info1 |= usb_pipeendpoint(urb->pipe) << 8;
1376	info1 |= usb_pipedevice(urb->pipe) << 0;
1377
1378	is_input = usb_pipein(urb->pipe);
1379	type = usb_pipetype(urb->pipe);
1380	maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1381
1382	/* Compute interrupt scheduling parameters just once, and save.
1383	 * - allowing for high bandwidth, how many nsec/uframe are used?
1384	 * - split transactions need a second CSPLIT uframe; same question
1385	 * - splits also need a schedule gap (for full/low speed I/O)
1386	 * - qh has a polling interval
1387	 *
1388	 * For control/bulk requests, the HC or TT handles these.
1389	 */
1390	if (type == PIPE_INTERRUPT) {
1391		qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1392								is_input, 0,
1393				hb_mult(maxp) * max_packet(maxp)));
1394		qh->start = NO_FRAME;
1395
1396		if (urb->dev->speed == USB_SPEED_HIGH) {
1397			qh->c_usecs = 0;
1398			qh->gap_uf = 0;
1399
1400			qh->period = urb->interval >> 3;
1401			if (qh->period == 0 && urb->interval != 1) {
1402				/* NOTE interval 2 or 4 uframes could work.
1403				 * But interval 1 scheduling is simpler, and
1404				 * includes high bandwidth.
1405				 */
1406				oxu_dbg(oxu, "intr period %d uframes, NYET!\n",
1407					urb->interval);
1408				goto done;
1409			}
1410		} else {
1411			struct usb_tt	*tt = urb->dev->tt;
1412			int		think_time;
1413
1414			/* gap is f(FS/LS transfer times) */
1415			qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1416					is_input, 0, maxp) / (125 * 1000);
1417
1418			/* FIXME this just approximates SPLIT/CSPLIT times */
1419			if (is_input) {		/* SPLIT, gap, CSPLIT+DATA */
1420				qh->c_usecs = qh->usecs + HS_USECS(0);
1421				qh->usecs = HS_USECS(1);
1422			} else {		/* SPLIT+DATA, gap, CSPLIT */
1423				qh->usecs += HS_USECS(1);
1424				qh->c_usecs = HS_USECS(0);
1425			}
1426
1427			think_time = tt ? tt->think_time : 0;
1428			qh->tt_usecs = NS_TO_US(think_time +
1429					usb_calc_bus_time(urb->dev->speed,
1430					is_input, 0, max_packet(maxp)));
1431			qh->period = urb->interval;
1432		}
1433	}
1434
1435	/* support for tt scheduling, and access to toggles */
1436	qh->dev = urb->dev;
1437
1438	/* using TT? */
1439	switch (urb->dev->speed) {
1440	case USB_SPEED_LOW:
1441		info1 |= (1 << 12);	/* EPS "low" */
1442		/* FALL THROUGH */
1443
1444	case USB_SPEED_FULL:
1445		/* EPS 0 means "full" */
1446		if (type != PIPE_INTERRUPT)
1447			info1 |= (EHCI_TUNE_RL_TT << 28);
1448		if (type == PIPE_CONTROL) {
1449			info1 |= (1 << 27);	/* for TT */
1450			info1 |= 1 << 14;	/* toggle from qtd */
1451		}
1452		info1 |= maxp << 16;
1453
1454		info2 |= (EHCI_TUNE_MULT_TT << 30);
1455		info2 |= urb->dev->ttport << 23;
1456
1457		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1458
1459		break;
1460
1461	case USB_SPEED_HIGH:		/* no TT involved */
1462		info1 |= (2 << 12);	/* EPS "high" */
1463		if (type == PIPE_CONTROL) {
1464			info1 |= (EHCI_TUNE_RL_HS << 28);
1465			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
1466			info1 |= 1 << 14;	/* toggle from qtd */
1467			info2 |= (EHCI_TUNE_MULT_HS << 30);
1468		} else if (type == PIPE_BULK) {
1469			info1 |= (EHCI_TUNE_RL_HS << 28);
1470			info1 |= 512 << 16;	/* usb2 fixed maxpacket */
1471			info2 |= (EHCI_TUNE_MULT_HS << 30);
1472		} else {		/* PIPE_INTERRUPT */
1473			info1 |= max_packet(maxp) << 16;
1474			info2 |= hb_mult(maxp) << 30;
1475		}
1476		break;
1477	default:
1478		oxu_dbg(oxu, "bogus dev %p speed %d\n", urb->dev, urb->dev->speed);
1479done:
1480		qh_put(qh);
1481		return NULL;
1482	}
1483
1484	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1485
1486	/* init as live, toggle clear, advance to dummy */
1487	qh->qh_state = QH_STATE_IDLE;
1488	qh->hw_info1 = cpu_to_le32(info1);
1489	qh->hw_info2 = cpu_to_le32(info2);
1490	usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1491	qh_refresh(oxu, qh);
1492	return qh;
1493}
1494
1495/* Move qh (and its qtds) onto async queue; maybe enable queue.
1496 */
1497static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1498{
1499	__le32 dma = QH_NEXT(qh->qh_dma);
1500	struct ehci_qh *head;
1501
1502	/* (re)start the async schedule? */
1503	head = oxu->async;
1504	timer_action_done(oxu, TIMER_ASYNC_OFF);
1505	if (!head->qh_next.qh) {
1506		u32	cmd = readl(&oxu->regs->command);
1507
1508		if (!(cmd & CMD_ASE)) {
1509			/* in case a clear of CMD_ASE didn't take yet */
1510			(void)handshake(oxu, &oxu->regs->status,
1511					STS_ASS, 0, 150);
1512			cmd |= CMD_ASE | CMD_RUN;
1513			writel(cmd, &oxu->regs->command);
1514			oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1515			/* posted write need not be known to HC yet ... */
1516		}
1517	}
1518
1519	/* clear halt and/or toggle; and maybe recover from silicon quirk */
1520	if (qh->qh_state == QH_STATE_IDLE)
1521		qh_refresh(oxu, qh);
1522
1523	/* splice right after start */
1524	qh->qh_next = head->qh_next;
1525	qh->hw_next = head->hw_next;
1526	wmb();
1527
1528	head->qh_next.qh = qh;
1529	head->hw_next = dma;
1530
1531	qh->qh_state = QH_STATE_LINKED;
1532	/* qtd completions reported later by interrupt */
1533}
1534
1535#define	QH_ADDR_MASK	cpu_to_le32(0x7f)
1536
1537/*
1538 * For control/bulk/interrupt, return QH with these TDs appended.
1539 * Allocates and initializes the QH if necessary.
1540 * Returns null if it can't allocate a QH it needs to.
1541 * If the QH has TDs (urbs) already, that's great.
1542 */
1543static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1544				struct urb *urb, struct list_head *qtd_list,
1545				int epnum, void	**ptr)
1546{
1547	struct ehci_qh *qh = NULL;
1548
1549	qh = (struct ehci_qh *) *ptr;
1550	if (unlikely(qh == NULL)) {
1551		/* can't sleep here, we have oxu->lock... */
1552		qh = qh_make(oxu, urb, GFP_ATOMIC);
1553		*ptr = qh;
1554	}
1555	if (likely(qh != NULL)) {
1556		struct ehci_qtd	*qtd;
1557
1558		if (unlikely(list_empty(qtd_list)))
1559			qtd = NULL;
1560		else
1561			qtd = list_entry(qtd_list->next, struct ehci_qtd,
1562					qtd_list);
1563
1564		/* control qh may need patching ... */
1565		if (unlikely(epnum == 0)) {
1566
1567			/* usb_reset_device() briefly reverts to address 0 */
1568			if (usb_pipedevice(urb->pipe) == 0)
1569				qh->hw_info1 &= ~QH_ADDR_MASK;
1570		}
1571
1572		/* just one way to queue requests: swap with the dummy qtd.
1573		 * only hc or qh_refresh() ever modify the overlay.
1574		 */
1575		if (likely(qtd != NULL)) {
1576			struct ehci_qtd	*dummy;
1577			dma_addr_t dma;
1578			__le32 token;
1579
1580			/* to avoid racing the HC, use the dummy td instead of
1581			 * the first td of our list (becomes new dummy).  both
1582			 * tds stay deactivated until we're done, when the
1583			 * HC is allowed to fetch the old dummy (4.10.2).
1584			 */
1585			token = qtd->hw_token;
1586			qtd->hw_token = HALT_BIT;
1587			wmb();
1588			dummy = qh->dummy;
1589
1590			dma = dummy->qtd_dma;
1591			*dummy = *qtd;
1592			dummy->qtd_dma = dma;
1593
1594			list_del(&qtd->qtd_list);
1595			list_add(&dummy->qtd_list, qtd_list);
1596			list_splice(qtd_list, qh->qtd_list.prev);
1597
1598			ehci_qtd_init(qtd, qtd->qtd_dma);
1599			qh->dummy = qtd;
1600
1601			/* hc must see the new dummy at list end */
1602			dma = qtd->qtd_dma;
1603			qtd = list_entry(qh->qtd_list.prev,
1604					struct ehci_qtd, qtd_list);
1605			qtd->hw_next = QTD_NEXT(dma);
1606
1607			/* let the hc process these next qtds */
1608			dummy->hw_token = (token & ~(0x80));
1609			wmb();
1610			dummy->hw_token = token;
1611
1612			urb->hcpriv = qh_get(qh);
1613		}
1614	}
1615	return qh;
1616}
1617
1618static int submit_async(struct oxu_hcd	*oxu, struct urb *urb,
1619			struct list_head *qtd_list, gfp_t mem_flags)
1620{
1621	struct ehci_qtd	*qtd;
1622	int epnum;
1623	unsigned long flags;
1624	struct ehci_qh *qh = NULL;
1625	int rc = 0;
1626
1627	qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1628	epnum = urb->ep->desc.bEndpointAddress;
1629
1630#ifdef OXU_URB_TRACE
1631	oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1632		__func__, urb->dev->devpath, urb,
1633		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1634		urb->transfer_buffer_length,
1635		qtd, urb->ep->hcpriv);
1636#endif
1637
1638	spin_lock_irqsave(&oxu->lock, flags);
1639	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
1640		rc = -ESHUTDOWN;
1641		goto done;
1642	}
1643
1644	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
1645	if (unlikely(qh == NULL)) {
1646		rc = -ENOMEM;
1647		goto done;
1648	}
1649
1650	/* Control/bulk operations through TTs don't need scheduling,
1651	 * the HC and TT handle it when the TT has a buffer ready.
1652	 */
1653	if (likely(qh->qh_state == QH_STATE_IDLE))
1654		qh_link_async(oxu, qh_get(qh));
1655done:
1656	spin_unlock_irqrestore(&oxu->lock, flags);
1657	if (unlikely(qh == NULL))
1658		qtd_list_free(oxu, urb, qtd_list);
1659	return rc;
1660}
1661
1662/* The async qh for the qtds being reclaimed are now unlinked from the HC */
1663
1664static void end_unlink_async(struct oxu_hcd *oxu)
1665{
1666	struct ehci_qh *qh = oxu->reclaim;
1667	struct ehci_qh *next;
1668
1669	timer_action_done(oxu, TIMER_IAA_WATCHDOG);
1670
1671	qh->qh_state = QH_STATE_IDLE;
1672	qh->qh_next.qh = NULL;
1673	qh_put(qh);			/* refcount from reclaim */
1674
1675	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1676	next = qh->reclaim;
1677	oxu->reclaim = next;
1678	oxu->reclaim_ready = 0;
1679	qh->reclaim = NULL;
1680
1681	qh_completions(oxu, qh);
1682
1683	if (!list_empty(&qh->qtd_list)
1684			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
1685		qh_link_async(oxu, qh);
1686	else {
1687		qh_put(qh);		/* refcount from async list */
1688
1689		/* it's not free to turn the async schedule on/off; leave it
1690		 * active but idle for a while once it empties.
1691		 */
1692		if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
1693				&& oxu->async->qh_next.qh == NULL)
1694			timer_action(oxu, TIMER_ASYNC_OFF);
1695	}
1696
1697	if (next) {
1698		oxu->reclaim = NULL;
1699		start_unlink_async(oxu, next);
1700	}
1701}
1702
1703/* makes sure the async qh will become idle */
1704/* caller must own oxu->lock */
1705
1706static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1707{
1708	int cmd = readl(&oxu->regs->command);
1709	struct ehci_qh *prev;
1710
1711#ifdef DEBUG
1712	assert_spin_locked(&oxu->lock);
1713	if (oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
1714				&& qh->qh_state != QH_STATE_UNLINK_WAIT))
1715		BUG();
1716#endif
1717
1718	/* stop async schedule right now? */
1719	if (unlikely(qh == oxu->async)) {
1720		/* can't get here without STS_ASS set */
1721		if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
1722				&& !oxu->reclaim) {
1723			/* ... and CMD_IAAD clear */
1724			writel(cmd & ~CMD_ASE, &oxu->regs->command);
1725			wmb();
1726			/* handshake later, if we need to */
1727			timer_action_done(oxu, TIMER_ASYNC_OFF);
1728		}
1729		return;
1730	}
1731
1732	qh->qh_state = QH_STATE_UNLINK;
1733	oxu->reclaim = qh = qh_get(qh);
1734
1735	prev = oxu->async;
1736	while (prev->qh_next.qh != qh)
1737		prev = prev->qh_next.qh;
1738
1739	prev->hw_next = qh->hw_next;
1740	prev->qh_next = qh->qh_next;
1741	wmb();
1742
1743	if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
1744		/* if (unlikely(qh->reclaim != 0))
1745		 *	this will recurse, probably not much
1746		 */
1747		end_unlink_async(oxu);
1748		return;
1749	}
1750
1751	oxu->reclaim_ready = 0;
1752	cmd |= CMD_IAAD;
1753	writel(cmd, &oxu->regs->command);
1754	(void) readl(&oxu->regs->command);
1755	timer_action(oxu, TIMER_IAA_WATCHDOG);
1756}
1757
1758static void scan_async(struct oxu_hcd *oxu)
1759{
1760	struct ehci_qh *qh;
1761	enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1762
1763	if (!++(oxu->stamp))
1764		oxu->stamp++;
1765	timer_action_done(oxu, TIMER_ASYNC_SHRINK);
1766rescan:
1767	qh = oxu->async->qh_next.qh;
1768	if (likely(qh != NULL)) {
1769		do {
1770			/* clean any finished work for this qh */
1771			if (!list_empty(&qh->qtd_list)
1772					&& qh->stamp != oxu->stamp) {
1773				int temp;
1774
1775				/* unlinks could happen here; completion
1776				 * reporting drops the lock.  rescan using
1777				 * the latest schedule, but don't rescan
1778				 * qhs we already finished (no looping).
1779				 */
1780				qh = qh_get(qh);
1781				qh->stamp = oxu->stamp;
1782				temp = qh_completions(oxu, qh);
1783				qh_put(qh);
1784				if (temp != 0)
1785					goto rescan;
1786			}
1787
1788			/* unlink idle entries, reducing HC PCI usage as well
1789			 * as HCD schedule-scanning costs.  delay for any qh
1790			 * we just scanned, there's a not-unusual case that it
1791			 * doesn't stay idle for long.
1792			 * (plus, avoids some kind of re-activation race.)
1793			 */
1794			if (list_empty(&qh->qtd_list)) {
1795				if (qh->stamp == oxu->stamp)
1796					action = TIMER_ASYNC_SHRINK;
1797				else if (!oxu->reclaim
1798					    && qh->qh_state == QH_STATE_LINKED)
1799					start_unlink_async(oxu, qh);
1800			}
1801
1802			qh = qh->qh_next.qh;
1803		} while (qh);
1804	}
1805	if (action == TIMER_ASYNC_SHRINK)
1806		timer_action(oxu, TIMER_ASYNC_SHRINK);
1807}
1808
1809/*
1810 * periodic_next_shadow - return "next" pointer on shadow list
1811 * @periodic: host pointer to qh/itd/sitd
1812 * @tag: hardware tag for type of this record
1813 */
1814static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
1815						__le32 tag)
1816{
1817	switch (tag) {
1818	default:
1819	case Q_TYPE_QH:
1820		return &periodic->qh->qh_next;
1821	}
1822}
1823
1824/* caller must hold oxu->lock */
1825static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
1826{
1827	union ehci_shadow *prev_p = &oxu->pshadow[frame];
1828	__le32 *hw_p = &oxu->periodic[frame];
1829	union ehci_shadow here = *prev_p;
1830
1831	/* find predecessor of "ptr"; hw and shadow lists are in sync */
1832	while (here.ptr && here.ptr != ptr) {
1833		prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
1834		hw_p = here.hw_next;
1835		here = *prev_p;
1836	}
1837	/* an interrupt entry (at list end) could have been shared */
1838	if (!here.ptr)
1839		return;
1840
1841	/* update shadow and hardware lists ... the old "next" pointers
1842	 * from ptr may still be in use, the caller updates them.
1843	 */
1844	*prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
1845	*hw_p = *here.hw_next;
1846}
1847
1848/* how many of the uframe's 125 usecs are allocated? */
1849static unsigned short periodic_usecs(struct oxu_hcd *oxu,
1850					unsigned frame, unsigned uframe)
1851{
1852	__le32 *hw_p = &oxu->periodic[frame];
1853	union ehci_shadow *q = &oxu->pshadow[frame];
1854	unsigned usecs = 0;
1855
1856	while (q->ptr) {
1857		switch (Q_NEXT_TYPE(*hw_p)) {
1858		case Q_TYPE_QH:
1859		default:
1860			/* is it in the S-mask? */
1861			if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
1862				usecs += q->qh->usecs;
1863			/* ... or C-mask? */
1864			if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
1865				usecs += q->qh->c_usecs;
1866			hw_p = &q->qh->hw_next;
1867			q = &q->qh->qh_next;
1868			break;
1869		}
1870	}
1871#ifdef DEBUG
1872	if (usecs > 100)
1873		oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
1874						frame * 8 + uframe, usecs);
1875#endif
1876	return usecs;
1877}
1878
1879static int enable_periodic(struct oxu_hcd *oxu)
1880{
1881	u32 cmd;
1882	int status;
1883
1884	/* did clearing PSE did take effect yet?
1885	 * takes effect only at frame boundaries...
1886	 */
1887	status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
1888	if (status != 0) {
1889		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1890		usb_hc_died(oxu_to_hcd(oxu));
1891		return status;
1892	}
1893
1894	cmd = readl(&oxu->regs->command) | CMD_PSE;
1895	writel(cmd, &oxu->regs->command);
1896	/* posted write ... PSS happens later */
1897	oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1898
1899	/* make sure ehci_work scans these */
1900	oxu->next_uframe = readl(&oxu->regs->frame_index)
1901		% (oxu->periodic_size << 3);
1902	return 0;
1903}
1904
1905static int disable_periodic(struct oxu_hcd *oxu)
1906{
1907	u32 cmd;
1908	int status;
1909
1910	/* did setting PSE not take effect yet?
1911	 * takes effect only at frame boundaries...
1912	 */
1913	status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
1914	if (status != 0) {
1915		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1916		usb_hc_died(oxu_to_hcd(oxu));
1917		return status;
1918	}
1919
1920	cmd = readl(&oxu->regs->command) & ~CMD_PSE;
1921	writel(cmd, &oxu->regs->command);
1922	/* posted write ... */
1923
1924	oxu->next_uframe = -1;
1925	return 0;
1926}
1927
1928/* periodic schedule slots have iso tds (normal or split) first, then a
1929 * sparse tree for active interrupt transfers.
1930 *
1931 * this just links in a qh; caller guarantees uframe masks are set right.
1932 * no FSTN support (yet; oxu 0.96+)
1933 */
1934static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1935{
1936	unsigned i;
1937	unsigned period = qh->period;
1938
1939	dev_dbg(&qh->dev->dev,
1940		"link qh%d-%04x/%p start %d [%d/%d us]\n",
1941		period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
1942		qh, qh->start, qh->usecs, qh->c_usecs);
1943
1944	/* high bandwidth, or otherwise every microframe */
1945	if (period == 0)
1946		period = 1;
1947
1948	for (i = qh->start; i < oxu->periodic_size; i += period) {
1949		union ehci_shadow	*prev = &oxu->pshadow[i];
1950		__le32			*hw_p = &oxu->periodic[i];
1951		union ehci_shadow	here = *prev;
1952		__le32			type = 0;
1953
1954		/* skip the iso nodes at list head */
1955		while (here.ptr) {
1956			type = Q_NEXT_TYPE(*hw_p);
1957			if (type == Q_TYPE_QH)
1958				break;
1959			prev = periodic_next_shadow(prev, type);
1960			hw_p = &here.qh->hw_next;
1961			here = *prev;
1962		}
1963
1964		/* sorting each branch by period (slow-->fast)
1965		 * enables sharing interior tree nodes
1966		 */
1967		while (here.ptr && qh != here.qh) {
1968			if (qh->period > here.qh->period)
1969				break;
1970			prev = &here.qh->qh_next;
1971			hw_p = &here.qh->hw_next;
1972			here = *prev;
1973		}
1974		/* link in this qh, unless some earlier pass did that */
1975		if (qh != here.qh) {
1976			qh->qh_next = here;
1977			if (here.qh)
1978				qh->hw_next = *hw_p;
1979			wmb();
1980			prev->qh = qh;
1981			*hw_p = QH_NEXT(qh->qh_dma);
1982		}
1983	}
1984	qh->qh_state = QH_STATE_LINKED;
1985	qh_get(qh);
1986
1987	/* update per-qh bandwidth for usbfs */
1988	oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
1989		? ((qh->usecs + qh->c_usecs) / qh->period)
1990		: (qh->usecs * 8);
1991
1992	/* maybe enable periodic schedule processing */
1993	if (!oxu->periodic_sched++)
1994		return enable_periodic(oxu);
1995
1996	return 0;
1997}
1998
1999static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
2000{
2001	unsigned i;
2002	unsigned period;
2003
2004	/* FIXME:
2005	 *   IF this isn't high speed
2006	 *   and this qh is active in the current uframe
2007	 *   (and overlay token SplitXstate is false?)
2008	 * THEN
2009	 *   qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2010	 */
2011
2012	/* high bandwidth, or otherwise part of every microframe */
2013	period = qh->period;
2014	if (period == 0)
2015		period = 1;
2016
2017	for (i = qh->start; i < oxu->periodic_size; i += period)
2018		periodic_unlink(oxu, i, qh);
2019
2020	/* update per-qh bandwidth for usbfs */
2021	oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2022		? ((qh->usecs + qh->c_usecs) / qh->period)
2023		: (qh->usecs * 8);
2024
2025	dev_dbg(&qh->dev->dev,
2026		"unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2027		qh->period,
2028		le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2029		qh, qh->start, qh->usecs, qh->c_usecs);
2030
2031	/* qh->qh_next still "live" to HC */
2032	qh->qh_state = QH_STATE_UNLINK;
2033	qh->qh_next.ptr = NULL;
2034	qh_put(qh);
2035
2036	/* maybe turn off periodic schedule */
2037	oxu->periodic_sched--;
2038	if (!oxu->periodic_sched)
2039		(void) disable_periodic(oxu);
2040}
2041
2042static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2043{
2044	unsigned wait;
2045
2046	qh_unlink_periodic(oxu, qh);
2047
2048	/* simple/paranoid:  always delay, expecting the HC needs to read
2049	 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2050	 * expect khubd to clean up after any CSPLITs we won't issue.
2051	 * active high speed queues may need bigger delays...
2052	 */
2053	if (list_empty(&qh->qtd_list)
2054		|| (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2055		wait = 2;
2056	else
2057		wait = 55;	/* worst case: 3 * 1024 */
2058
2059	udelay(wait);
2060	qh->qh_state = QH_STATE_IDLE;
2061	qh->hw_next = EHCI_LIST_END;
2062	wmb();
2063}
2064
2065static int check_period(struct oxu_hcd *oxu,
2066			unsigned frame, unsigned uframe,
2067			unsigned period, unsigned usecs)
2068{
2069	int claimed;
2070
2071	/* complete split running into next frame?
2072	 * given FSTN support, we could sometimes check...
2073	 */
2074	if (uframe >= 8)
2075		return 0;
2076
2077	/*
2078	 * 80% periodic == 100 usec/uframe available
2079	 * convert "usecs we need" to "max already claimed"
2080	 */
2081	usecs = 100 - usecs;
2082
2083	/* we "know" 2 and 4 uframe intervals were rejected; so
2084	 * for period 0, check _every_ microframe in the schedule.
2085	 */
2086	if (unlikely(period == 0)) {
2087		do {
2088			for (uframe = 0; uframe < 7; uframe++) {
2089				claimed = periodic_usecs(oxu, frame, uframe);
2090				if (claimed > usecs)
2091					return 0;
2092			}
2093		} while ((frame += 1) < oxu->periodic_size);
2094
2095	/* just check the specified uframe, at that period */
2096	} else {
2097		do {
2098			claimed = periodic_usecs(oxu, frame, uframe);
2099			if (claimed > usecs)
2100				return 0;
2101		} while ((frame += period) < oxu->periodic_size);
2102	}
2103
2104	return 1;
2105}
2106
2107static int check_intr_schedule(struct oxu_hcd	*oxu,
2108				unsigned frame, unsigned uframe,
2109				const struct ehci_qh *qh, __le32 *c_maskp)
2110{
2111	int retval = -ENOSPC;
2112
2113	if (qh->c_usecs && uframe >= 6)		/* FSTN territory? */
2114		goto done;
2115
2116	if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2117		goto done;
2118	if (!qh->c_usecs) {
2119		retval = 0;
2120		*c_maskp = 0;
2121		goto done;
2122	}
2123
2124done:
2125	return retval;
2126}
2127
2128/* "first fit" scheduling policy used the first time through,
2129 * or when the previous schedule slot can't be re-used.
2130 */
2131static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2132{
2133	int		status;
2134	unsigned	uframe;
2135	__le32		c_mask;
2136	unsigned	frame;		/* 0..(qh->period - 1), or NO_FRAME */
2137
2138	qh_refresh(oxu, qh);
2139	qh->hw_next = EHCI_LIST_END;
2140	frame = qh->start;
2141
2142	/* reuse the previous schedule slots, if we can */
2143	if (frame < qh->period) {
2144		uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2145		status = check_intr_schedule(oxu, frame, --uframe,
2146				qh, &c_mask);
2147	} else {
2148		uframe = 0;
2149		c_mask = 0;
2150		status = -ENOSPC;
2151	}
2152
2153	/* else scan the schedule to find a group of slots such that all
2154	 * uframes have enough periodic bandwidth available.
2155	 */
2156	if (status) {
2157		/* "normal" case, uframing flexible except with splits */
2158		if (qh->period) {
2159			frame = qh->period - 1;
2160			do {
2161				for (uframe = 0; uframe < 8; uframe++) {
2162					status = check_intr_schedule(oxu,
2163							frame, uframe, qh,
2164							&c_mask);
2165					if (status == 0)
2166						break;
2167				}
2168			} while (status && frame--);
2169
2170		/* qh->period == 0 means every uframe */
2171		} else {
2172			frame = 0;
2173			status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2174		}
2175		if (status)
2176			goto done;
2177		qh->start = frame;
2178
2179		/* reset S-frame and (maybe) C-frame masks */
2180		qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2181		qh->hw_info2 |= qh->period
2182			? cpu_to_le32(1 << uframe)
2183			: cpu_to_le32(QH_SMASK);
2184		qh->hw_info2 |= c_mask;
2185	} else
2186		oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2187
2188	/* stuff into the periodic schedule */
2189	status = qh_link_periodic(oxu, qh);
2190done:
2191	return status;
2192}
2193
2194static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2195			struct list_head *qtd_list, gfp_t mem_flags)
2196{
2197	unsigned epnum;
2198	unsigned long flags;
2199	struct ehci_qh *qh;
2200	int status = 0;
2201	struct list_head	empty;
2202
2203	/* get endpoint and transfer/schedule data */
2204	epnum = urb->ep->desc.bEndpointAddress;
2205
2206	spin_lock_irqsave(&oxu->lock, flags);
2207
2208	if (unlikely(!HCD_HW_ACCESSIBLE(oxu_to_hcd(oxu)))) {
2209		status = -ESHUTDOWN;
2210		goto done;
2211	}
2212
2213	/* get qh and force any scheduling errors */
2214	INIT_LIST_HEAD(&empty);
2215	qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2216	if (qh == NULL) {
2217		status = -ENOMEM;
2218		goto done;
2219	}
2220	if (qh->qh_state == QH_STATE_IDLE) {
2221		status = qh_schedule(oxu, qh);
2222		if (status != 0)
2223			goto done;
2224	}
2225
2226	/* then queue the urb's tds to the qh */
2227	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2228	BUG_ON(qh == NULL);
2229
2230	/* ... update usbfs periodic stats */
2231	oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2232
2233done:
2234	spin_unlock_irqrestore(&oxu->lock, flags);
2235	if (status)
2236		qtd_list_free(oxu, urb, qtd_list);
2237
2238	return status;
2239}
2240
2241static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2242						gfp_t mem_flags)
2243{
2244	oxu_dbg(oxu, "iso support is missing!\n");
2245	return -ENOSYS;
2246}
2247
2248static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2249						gfp_t mem_flags)
2250{
2251	oxu_dbg(oxu, "split iso support is missing!\n");
2252	return -ENOSYS;
2253}
2254
2255static void scan_periodic(struct oxu_hcd *oxu)
2256{
2257	unsigned frame, clock, now_uframe, mod;
2258	unsigned modified;
2259
2260	mod = oxu->periodic_size << 3;
2261
2262	/*
2263	 * When running, scan from last scan point up to "now"
2264	 * else clean up by scanning everything that's left.
2265	 * Touches as few pages as possible:  cache-friendly.
2266	 */
2267	now_uframe = oxu->next_uframe;
2268	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2269		clock = readl(&oxu->regs->frame_index);
2270	else
2271		clock = now_uframe + mod - 1;
2272	clock %= mod;
2273
2274	for (;;) {
2275		union ehci_shadow	q, *q_p;
2276		__le32			type, *hw_p;
2277		unsigned		uframes;
2278
2279		/* don't scan past the live uframe */
2280		frame = now_uframe >> 3;
2281		if (frame == (clock >> 3))
2282			uframes = now_uframe & 0x07;
2283		else {
2284			/* safe to scan the whole frame at once */
2285			now_uframe |= 0x07;
2286			uframes = 8;
2287		}
2288
2289restart:
2290		/* scan each element in frame's queue for completions */
2291		q_p = &oxu->pshadow[frame];
2292		hw_p = &oxu->periodic[frame];
2293		q.ptr = q_p->ptr;
2294		type = Q_NEXT_TYPE(*hw_p);
2295		modified = 0;
2296
2297		while (q.ptr != NULL) {
2298			union ehci_shadow temp;
2299			int live;
2300
2301			live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state);
2302			switch (type) {
2303			case Q_TYPE_QH:
2304				/* handle any completions */
2305				temp.qh = qh_get(q.qh);
2306				type = Q_NEXT_TYPE(q.qh->hw_next);
2307				q = q.qh->qh_next;
2308				modified = qh_completions(oxu, temp.qh);
2309				if (unlikely(list_empty(&temp.qh->qtd_list)))
2310					intr_deschedule(oxu, temp.qh);
2311				qh_put(temp.qh);
2312				break;
2313			default:
2314				oxu_dbg(oxu, "corrupt type %d frame %d shadow %p\n",
2315					type, frame, q.ptr);
2316				q.ptr = NULL;
2317			}
2318
2319			/* assume completion callbacks modify the queue */
2320			if (unlikely(modified))
2321				goto restart;
2322		}
2323
2324		/* Stop when we catch up to the HC */
2325
2326		/* FIXME:  this assumes we won't get lapped when
2327		 * latencies climb; that should be rare, but...
2328		 * detect it, and just go all the way around.
2329		 * FLR might help detect this case, so long as latencies
2330		 * don't exceed periodic_size msec (default 1.024 sec).
2331		 */
2332
2333		/* FIXME: likewise assumes HC doesn't halt mid-scan */
2334
2335		if (now_uframe == clock) {
2336			unsigned	now;
2337
2338			if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2339				break;
2340			oxu->next_uframe = now_uframe;
2341			now = readl(&oxu->regs->frame_index) % mod;
2342			if (now_uframe == now)
2343				break;
2344
2345			/* rescan the rest of this frame, then ... */
2346			clock = now;
2347		} else {
2348			now_uframe++;
2349			now_uframe %= mod;
2350		}
2351	}
2352}
2353
2354/* On some systems, leaving remote wakeup enabled prevents system shutdown.
2355 * The firmware seems to think that powering off is a wakeup event!
2356 * This routine turns off remote wakeup and everything else, on all ports.
2357 */
2358static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2359{
2360	int port = HCS_N_PORTS(oxu->hcs_params);
2361
2362	while (port--)
2363		writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2364}
2365
2366static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2367{
2368	unsigned port;
2369
2370	if (!HCS_PPC(oxu->hcs_params))
2371		return;
2372
2373	oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2374	for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2375		(void) oxu_hub_control(oxu_to_hcd(oxu),
2376				is_on ? SetPortFeature : ClearPortFeature,
2377				USB_PORT_FEAT_POWER,
2378				port--, NULL, 0);
2379	msleep(20);
2380}
2381
2382/* Called from some interrupts, timers, and so on.
2383 * It calls driver completion functions, after dropping oxu->lock.
2384 */
2385static void ehci_work(struct oxu_hcd *oxu)
2386{
2387	timer_action_done(oxu, TIMER_IO_WATCHDOG);
2388	if (oxu->reclaim_ready)
2389		end_unlink_async(oxu);
2390
2391	/* another CPU may drop oxu->lock during a schedule scan while
2392	 * it reports urb completions.  this flag guards against bogus
2393	 * attempts at re-entrant schedule scanning.
2394	 */
2395	if (oxu->scanning)
2396		return;
2397	oxu->scanning = 1;
2398	scan_async(oxu);
2399	if (oxu->next_uframe != -1)
2400		scan_periodic(oxu);
2401	oxu->scanning = 0;
2402
2403	/* the IO watchdog guards against hardware or driver bugs that
2404	 * misplace IRQs, and should let us run completely without IRQs.
2405	 * such lossage has been observed on both VT6202 and VT8235.
2406	 */
2407	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2408			(oxu->async->qh_next.ptr != NULL ||
2409			 oxu->periodic_sched != 0))
2410		timer_action(oxu, TIMER_IO_WATCHDOG);
2411}
2412
2413static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2414{
2415	/* if we need to use IAA and it's busy, defer */
2416	if (qh->qh_state == QH_STATE_LINKED
2417			&& oxu->reclaim
2418			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2419		struct ehci_qh		*last;
2420
2421		for (last = oxu->reclaim;
2422				last->reclaim;
2423				last = last->reclaim)
2424			continue;
2425		qh->qh_state = QH_STATE_UNLINK_WAIT;
2426		last->reclaim = qh;
2427
2428	/* bypass IAA if the hc can't care */
2429	} else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2430		end_unlink_async(oxu);
2431
2432	/* something else might have unlinked the qh by now */
2433	if (qh->qh_state == QH_STATE_LINKED)
2434		start_unlink_async(oxu, qh);
2435}
2436
2437/*
2438 * USB host controller methods
2439 */
2440
2441static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2442{
2443	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2444	u32 status, pcd_status = 0;
2445	int bh;
2446
2447	spin_lock(&oxu->lock);
2448
2449	status = readl(&oxu->regs->status);
2450
2451	/* e.g. cardbus physical eject */
2452	if (status == ~(u32) 0) {
2453		oxu_dbg(oxu, "device removed\n");
2454		goto dead;
2455	}
2456
2457	/* Shared IRQ? */
2458	status &= INTR_MASK;
2459	if (!status || unlikely(hcd->state == HC_STATE_HALT)) {
2460		spin_unlock(&oxu->lock);
2461		return IRQ_NONE;
2462	}
2463
2464	/* clear (just) interrupts */
2465	writel(status, &oxu->regs->status);
2466	readl(&oxu->regs->command);	/* unblock posted write */
2467	bh = 0;
2468
2469#ifdef OXU_VERBOSE_DEBUG
2470	/* unrequested/ignored: Frame List Rollover */
2471	dbg_status(oxu, "irq", status);
2472#endif
2473
2474	/* INT, ERR, and IAA interrupt rates can be throttled */
2475
2476	/* normal [4.15.1.2] or error [4.15.1.1] completion */
2477	if (likely((status & (STS_INT|STS_ERR)) != 0))
2478		bh = 1;
2479
2480	/* complete the unlinking of some qh [4.15.2.3] */
2481	if (status & STS_IAA) {
2482		oxu->reclaim_ready = 1;
2483		bh = 1;
2484	}
2485
2486	/* remote wakeup [4.3.1] */
2487	if (status & STS_PCD) {
2488		unsigned i = HCS_N_PORTS(oxu->hcs_params);
2489		pcd_status = status;
2490
2491		/* resume root hub? */
2492		if (!(readl(&oxu->regs->command) & CMD_RUN))
2493			usb_hcd_resume_root_hub(hcd);
2494
2495		while (i--) {
2496			int pstatus = readl(&oxu->regs->port_status[i]);
2497
2498			if (pstatus & PORT_OWNER)
2499				continue;
2500			if (!(pstatus & PORT_RESUME)
2501					|| oxu->reset_done[i] != 0)
2502				continue;
2503
2504			/* start 20 msec resume signaling from this port,
2505			 * and make khubd collect PORT_STAT_C_SUSPEND to
2506			 * stop that signaling.
2507			 */
2508			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
2509			oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2510			mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2511		}
2512	}
2513
2514	/* PCI errors [4.15.2.4] */
2515	if (unlikely((status & STS_FATAL) != 0)) {
2516		/* bogus "fatal" IRQs appear on some chips... why?  */
2517		status = readl(&oxu->regs->status);
2518		dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2519		dbg_status(oxu, "fatal", status);
2520		if (status & STS_HALT) {
2521			oxu_err(oxu, "fatal error\n");
2522dead:
2523			ehci_reset(oxu);
2524			writel(0, &oxu->regs->configured_flag);
2525			usb_hc_died(hcd);
2526			/* generic layer kills/unlinks all urbs, then
2527			 * uses oxu_stop to clean up the rest
2528			 */
2529			bh = 1;
2530		}
2531	}
2532
2533	if (bh)
2534		ehci_work(oxu);
2535	spin_unlock(&oxu->lock);
2536	if (pcd_status & STS_PCD)
2537		usb_hcd_poll_rh_status(hcd);
2538	return IRQ_HANDLED;
2539}
2540
2541static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2542{
2543	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2544	int ret = IRQ_HANDLED;
2545
2546	u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2547	u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2548
2549	/* Disable all interrupt */
2550	oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2551
2552	if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2553		(!oxu->is_otg && (status & OXU_USBSPHI)))
2554		oxu210_hcd_irq(hcd);
2555	else
2556		ret = IRQ_NONE;
2557
2558	/* Enable all interrupt back */
2559	oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2560
2561	return ret;
2562}
2563
2564static void oxu_watchdog(unsigned long param)
2565{
2566	struct oxu_hcd	*oxu = (struct oxu_hcd *) param;
2567	unsigned long flags;
2568
2569	spin_lock_irqsave(&oxu->lock, flags);
2570
2571	/* lost IAA irqs wedge things badly; seen with a vt8235 */
2572	if (oxu->reclaim) {
2573		u32 status = readl(&oxu->regs->status);
2574		if (status & STS_IAA) {
2575			oxu_vdbg(oxu, "lost IAA\n");
2576			writel(STS_IAA, &oxu->regs->status);
2577			oxu->reclaim_ready = 1;
2578		}
2579	}
2580
2581	/* stop async processing after it's idled a bit */
2582	if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2583		start_unlink_async(oxu, oxu->async);
2584
2585	/* oxu could run by timer, without IRQs ... */
2586	ehci_work(oxu);
2587
2588	spin_unlock_irqrestore(&oxu->lock, flags);
2589}
2590
2591/* One-time init, only for memory state.
2592 */
2593static int oxu_hcd_init(struct usb_hcd *hcd)
2594{
2595	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2596	u32 temp;
2597	int retval;
2598	u32 hcc_params;
2599
2600	spin_lock_init(&oxu->lock);
2601
2602	init_timer(&oxu->watchdog);
2603	oxu->watchdog.function = oxu_watchdog;
2604	oxu->watchdog.data = (unsigned long) oxu;
2605
2606	/*
2607	 * hw default: 1K periodic list heads, one per frame.
2608	 * periodic_size can shrink by USBCMD update if hcc_params allows.
2609	 */
2610	oxu->periodic_size = DEFAULT_I_TDPS;
2611	retval = ehci_mem_init(oxu, GFP_KERNEL);
2612	if (retval < 0)
2613		return retval;
2614
2615	/* controllers may cache some of the periodic schedule ... */
2616	hcc_params = readl(&oxu->caps->hcc_params);
2617	if (HCC_ISOC_CACHE(hcc_params))		/* full frame cache */
2618		oxu->i_thresh = 8;
2619	else					/* N microframes cached */
2620		oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
2621
2622	oxu->reclaim = NULL;
2623	oxu->reclaim_ready = 0;
2624	oxu->next_uframe = -1;
2625
2626	/*
2627	 * dedicate a qh for the async ring head, since we couldn't unlink
2628	 * a 'real' qh without stopping the async schedule [4.8].  use it
2629	 * as the 'reclamation list head' too.
2630	 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2631	 * from automatically advancing to the next td after short reads.
2632	 */
2633	oxu->async->qh_next.qh = NULL;
2634	oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
2635	oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
2636	oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
2637	oxu->async->hw_qtd_next = EHCI_LIST_END;
2638	oxu->async->qh_state = QH_STATE_LINKED;
2639	oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
2640
2641	/* clear interrupt enables, set irq latency */
2642	if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2643		log2_irq_thresh = 0;
2644	temp = 1 << (16 + log2_irq_thresh);
2645	if (HCC_CANPARK(hcc_params)) {
2646		/* HW default park == 3, on hardware that supports it (like
2647		 * NVidia and ALI silicon), maximizes throughput on the async
2648		 * schedule by avoiding QH fetches between transfers.
2649		 *
2650		 * With fast usb storage devices and NForce2, "park" seems to
2651		 * make problems:  throughput reduction (!), data errors...
2652		 */
2653		if (park) {
2654			park = min(park, (unsigned) 3);
2655			temp |= CMD_PARK;
2656			temp |= park << 8;
2657		}
2658		oxu_dbg(oxu, "park %d\n", park);
2659	}
2660	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
2661		/* periodic schedule size can be smaller than default */
2662		temp &= ~(3 << 2);
2663		temp |= (EHCI_TUNE_FLS << 2);
2664	}
2665	oxu->command = temp;
2666
2667	return 0;
2668}
2669
2670/* Called during probe() after chip reset completes.
2671 */
2672static int oxu_reset(struct usb_hcd *hcd)
2673{
2674	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2675	int ret;
2676
2677	spin_lock_init(&oxu->mem_lock);
2678	INIT_LIST_HEAD(&oxu->urb_list);
2679	oxu->urb_len = 0;
2680
2681	/* FIMXE */
2682	hcd->self.controller->dma_mask = NULL;
2683
2684	if (oxu->is_otg) {
2685		oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
2686		oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
2687			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2688
2689		oxu->mem = hcd->regs + OXU_SPH_MEM;
2690	} else {
2691		oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
2692		oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
2693			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2694
2695		oxu->mem = hcd->regs + OXU_OTG_MEM;
2696	}
2697
2698	oxu->hcs_params = readl(&oxu->caps->hcs_params);
2699	oxu->sbrn = 0x20;
2700
2701	ret = oxu_hcd_init(hcd);
2702	if (ret)
2703		return ret;
2704
2705	return 0;
2706}
2707
2708static int oxu_run(struct usb_hcd *hcd)
2709{
2710	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2711	int retval;
2712	u32 temp, hcc_params;
2713
2714	hcd->uses_new_polling = 1;
2715
2716	/* EHCI spec section 4.1 */
2717	retval = ehci_reset(oxu);
2718	if (retval != 0) {
2719		ehci_mem_cleanup(oxu);
2720		return retval;
2721	}
2722	writel(oxu->periodic_dma, &oxu->regs->frame_list);
2723	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
2724
2725	/* hcc_params controls whether oxu->regs->segment must (!!!)
2726	 * be used; it constrains QH/ITD/SITD and QTD locations.
2727	 * pci_pool consistent memory always uses segment zero.
2728	 * streaming mappings for I/O buffers, like pci_map_single(),
2729	 * can return segments above 4GB, if the device allows.
2730	 *
2731	 * NOTE:  the dma mask is visible through dma_supported(), so
2732	 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2733	 * Scsi_Host.highmem_io, and so forth.  It's readonly to all
2734	 * host side drivers though.
2735	 */
2736	hcc_params = readl(&oxu->caps->hcc_params);
2737	if (HCC_64BIT_ADDR(hcc_params))
2738		writel(0, &oxu->regs->segment);
2739
2740	oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
2741				CMD_ASE | CMD_RESET);
2742	oxu->command |= CMD_RUN;
2743	writel(oxu->command, &oxu->regs->command);
2744	dbg_cmd(oxu, "init", oxu->command);
2745
2746	/*
2747	 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2748	 * are explicitly handed to companion controller(s), so no TT is
2749	 * involved with the root hub.  (Except where one is integrated,
2750	 * and there's no companion controller unless maybe for USB OTG.)
2751	 */
2752	hcd->state = HC_STATE_RUNNING;
2753	writel(FLAG_CF, &oxu->regs->configured_flag);
2754	readl(&oxu->regs->command);	/* unblock posted writes */
2755
2756	temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
2757	oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2758		((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
2759		temp >> 8, temp & 0xff, DRIVER_VERSION,
2760		ignore_oc ? ", overcurrent ignored" : "");
2761
2762	writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2763
2764	return 0;
2765}
2766
2767static void oxu_stop(struct usb_hcd *hcd)
2768{
2769	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2770
2771	/* Turn off port power on all root hub ports. */
2772	ehci_port_power(oxu, 0);
2773
2774	/* no more interrupts ... */
2775	del_timer_sync(&oxu->watchdog);
2776
2777	spin_lock_irq(&oxu->lock);
2778	if (HC_IS_RUNNING(hcd->state))
2779		ehci_quiesce(oxu);
2780
2781	ehci_reset(oxu);
2782	writel(0, &oxu->regs->intr_enable);
2783	spin_unlock_irq(&oxu->lock);
2784
2785	/* let companion controllers work when we aren't */
2786	writel(0, &oxu->regs->configured_flag);
2787
2788	/* root hub is shut down separately (first, when possible) */
2789	spin_lock_irq(&oxu->lock);
2790	if (oxu->async)
2791		ehci_work(oxu);
2792	spin_unlock_irq(&oxu->lock);
2793	ehci_mem_cleanup(oxu);
2794
2795	dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
2796}
2797
2798/* Kick in for silicon on any bus (not just pci, etc).
2799 * This forcibly disables dma and IRQs, helping kexec and other cases
2800 * where the next system software may expect clean state.
2801 */
2802static void oxu_shutdown(struct usb_hcd *hcd)
2803{
2804	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2805
2806	(void) ehci_halt(oxu);
2807	ehci_turn_off_all_ports(oxu);
2808
2809	/* make BIOS/etc use companion controller during reboot */
2810	writel(0, &oxu->regs->configured_flag);
2811
2812	/* unblock posted writes */
2813	readl(&oxu->regs->configured_flag);
2814}
2815
2816/* Non-error returns are a promise to giveback() the urb later
2817 * we drop ownership so next owner (or urb unlink) can get it
2818 *
2819 * urb + dev is in hcd.self.controller.urb_list
2820 * we're queueing TDs onto software and hardware lists
2821 *
2822 * hcd-specific init for hcpriv hasn't been done yet
2823 *
2824 * NOTE:  control, bulk, and interrupt share the same code to append TDs
2825 * to a (possibly active) QH, and the same QH scanning code.
2826 */
2827static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2828				gfp_t mem_flags)
2829{
2830	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2831	struct list_head qtd_list;
2832
2833	INIT_LIST_HEAD(&qtd_list);
2834
2835	switch (usb_pipetype(urb->pipe)) {
2836	case PIPE_CONTROL:
2837	case PIPE_BULK:
2838	default:
2839		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2840			return -ENOMEM;
2841		return submit_async(oxu, urb, &qtd_list, mem_flags);
2842
2843	case PIPE_INTERRUPT:
2844		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2845			return -ENOMEM;
2846		return intr_submit(oxu, urb, &qtd_list, mem_flags);
2847
2848	case PIPE_ISOCHRONOUS:
2849		if (urb->dev->speed == USB_SPEED_HIGH)
2850			return itd_submit(oxu, urb, mem_flags);
2851		else
2852			return sitd_submit(oxu, urb, mem_flags);
2853	}
2854}
2855
2856/* This function is responsible for breaking URBs with big data size
2857 * into smaller size and processing small urbs in sequence.
2858 */
2859static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2860				gfp_t mem_flags)
2861{
2862	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2863	int num, rem;
2864	int transfer_buffer_length;
2865	void *transfer_buffer;
2866	struct urb *murb;
2867	int i, ret;
2868
2869	/* If not bulk pipe just enqueue the URB */
2870	if (!usb_pipebulk(urb->pipe))
2871		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2872
2873	/* Otherwise we should verify the USB transfer buffer size! */
2874	transfer_buffer = urb->transfer_buffer;
2875	transfer_buffer_length = urb->transfer_buffer_length;
2876
2877	num = urb->transfer_buffer_length / 4096;
2878	rem = urb->transfer_buffer_length % 4096;
2879	if (rem != 0)
2880		num++;
2881
2882	/* If URB is smaller than 4096 bytes just enqueue it! */
2883	if (num == 1)
2884		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2885
2886	/* Ok, we have more job to do! :) */
2887
2888	for (i = 0; i < num - 1; i++) {
2889		/* Get free micro URB poll till a free urb is received */
2890
2891		do {
2892			murb = (struct urb *) oxu_murb_alloc(oxu);
2893			if (!murb)
2894				schedule();
2895		} while (!murb);
2896
2897		/* Coping the urb */
2898		memcpy(murb, urb, sizeof(struct urb));
2899
2900		murb->transfer_buffer_length = 4096;
2901		murb->transfer_buffer = transfer_buffer + i * 4096;
2902
2903		/* Null pointer for the encodes that this is a micro urb */
2904		murb->complete = NULL;
2905
2906		((struct oxu_murb *) murb)->main = urb;
2907		((struct oxu_murb *) murb)->last = 0;
2908
2909		/* This loop is to guarantee urb to be processed when there's
2910		 * not enough resources at a particular time by retrying.
2911		 */
2912		do {
2913			ret  = __oxu_urb_enqueue(hcd, murb, mem_flags);
2914			if (ret)
2915				schedule();
2916		} while (ret);
2917	}
2918
2919	/* Last urb requires special handling  */
2920
2921	/* Get free micro URB poll till a free urb is received */
2922	do {
2923		murb = (struct urb *) oxu_murb_alloc(oxu);
2924		if (!murb)
2925			schedule();
2926	} while (!murb);
2927
2928	/* Coping the urb */
2929	memcpy(murb, urb, sizeof(struct urb));
2930
2931	murb->transfer_buffer_length = rem > 0 ? rem : 4096;
2932	murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
2933
2934	/* Null pointer for the encodes that this is a micro urb */
2935	murb->complete = NULL;
2936
2937	((struct oxu_murb *) murb)->main = urb;
2938	((struct oxu_murb *) murb)->last = 1;
2939
2940	do {
2941		ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2942		if (ret)
2943			schedule();
2944	} while (ret);
2945
2946	return ret;
2947}
2948
2949/* Remove from hardware lists.
2950 * Completions normally happen asynchronously
2951 */
2952static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2953{
2954	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2955	struct ehci_qh *qh;
2956	unsigned long flags;
2957
2958	spin_lock_irqsave(&oxu->lock, flags);
2959	switch (usb_pipetype(urb->pipe)) {
2960	case PIPE_CONTROL:
2961	case PIPE_BULK:
2962	default:
2963		qh = (struct ehci_qh *) urb->hcpriv;
2964		if (!qh)
2965			break;
2966		unlink_async(oxu, qh);
2967		break;
2968
2969	case PIPE_INTERRUPT:
2970		qh = (struct ehci_qh *) urb->hcpriv;
2971		if (!qh)
2972			break;
2973		switch (qh->qh_state) {
2974		case QH_STATE_LINKED:
2975			intr_deschedule(oxu, qh);
2976			/* FALL THROUGH */
2977		case QH_STATE_IDLE:
2978			qh_completions(oxu, qh);
2979			break;
2980		default:
2981			oxu_dbg(oxu, "bogus qh %p state %d\n",
2982					qh, qh->qh_state);
2983			goto done;
2984		}
2985
2986		/* reschedule QH iff another request is queued */
2987		if (!list_empty(&qh->qtd_list)
2988				&& HC_IS_RUNNING(hcd->state)) {
2989			int status;
2990
2991			status = qh_schedule(oxu, qh);
2992			spin_unlock_irqrestore(&oxu->lock, flags);
2993
2994			if (status != 0) {
2995				/* shouldn't happen often, but ...
2996				 * FIXME kill those tds' urbs
2997				 */
2998				dev_err(hcd->self.controller,
2999					"can't reschedule qh %p, err %d\n", qh,
3000					status);
3001			}
3002			return status;
3003		}
3004		break;
3005	}
3006done:
3007	spin_unlock_irqrestore(&oxu->lock, flags);
3008	return 0;
3009}
3010
3011/* Bulk qh holds the data toggle */
3012static void oxu_endpoint_disable(struct usb_hcd *hcd,
3013					struct usb_host_endpoint *ep)
3014{
3015	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3016	unsigned long		flags;
3017	struct ehci_qh		*qh, *tmp;
3018
3019	/* ASSERT:  any requests/urbs are being unlinked */
3020	/* ASSERT:  nobody can be submitting urbs for this any more */
3021
3022rescan:
3023	spin_lock_irqsave(&oxu->lock, flags);
3024	qh = ep->hcpriv;
3025	if (!qh)
3026		goto done;
3027
3028	/* endpoints can be iso streams.  for now, we don't
3029	 * accelerate iso completions ... so spin a while.
3030	 */
3031	if (qh->hw_info1 == 0) {
3032		oxu_vdbg(oxu, "iso delay\n");
3033		goto idle_timeout;
3034	}
3035
3036	if (!HC_IS_RUNNING(hcd->state))
3037		qh->qh_state = QH_STATE_IDLE;
3038	switch (qh->qh_state) {
3039	case QH_STATE_LINKED:
3040		for (tmp = oxu->async->qh_next.qh;
3041				tmp && tmp != qh;
3042				tmp = tmp->qh_next.qh)
3043			continue;
3044		/* periodic qh self-unlinks on empty */
3045		if (!tmp)
3046			goto nogood;
3047		unlink_async(oxu, qh);
3048		/* FALL THROUGH */
3049	case QH_STATE_UNLINK:		/* wait for hw to finish? */
3050idle_timeout:
3051		spin_unlock_irqrestore(&oxu->lock, flags);
3052		schedule_timeout_uninterruptible(1);
3053		goto rescan;
3054	case QH_STATE_IDLE:		/* fully unlinked */
3055		if (list_empty(&qh->qtd_list)) {
3056			qh_put(qh);
3057			break;
3058		}
3059		/* else FALL THROUGH */
3060	default:
3061nogood:
3062		/* caller was supposed to have unlinked any requests;
3063		 * that's not our job.  just leak this memory.
3064		 */
3065		oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3066			qh, ep->desc.bEndpointAddress, qh->qh_state,
3067			list_empty(&qh->qtd_list) ? "" : "(has tds)");
3068		break;
3069	}
3070	ep->hcpriv = NULL;
3071done:
3072	spin_unlock_irqrestore(&oxu->lock, flags);
3073}
3074
3075static int oxu_get_frame(struct usb_hcd *hcd)
3076{
3077	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3078
3079	return (readl(&oxu->regs->frame_index) >> 3) %
3080		oxu->periodic_size;
3081}
3082
3083/* Build "status change" packet (one or two bytes) from HC registers */
3084static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3085{
3086	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3087	u32 temp, mask, status = 0;
3088	int ports, i, retval = 1;
3089	unsigned long flags;
3090
3091	/* if !PM_RUNTIME, root hub timers won't get shut down ... */
3092	if (!HC_IS_RUNNING(hcd->state))
3093		return 0;
3094
3095	/* init status to no-changes */
3096	buf[0] = 0;
3097	ports = HCS_N_PORTS(oxu->hcs_params);
3098	if (ports > 7) {
3099		buf[1] = 0;
3100		retval++;
3101	}
3102
3103	/* Some boards (mostly VIA?) report bogus overcurrent indications,
3104	 * causing massive log spam unless we completely ignore them.  It
3105	 * may be relevant that VIA VT8235 controllers, where PORT_POWER is
3106	 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3107	 * PORT_POWER; that's surprising, but maybe within-spec.
3108	 */
3109	if (!ignore_oc)
3110		mask = PORT_CSC | PORT_PEC | PORT_OCC;
3111	else
3112		mask = PORT_CSC | PORT_PEC;
3113
3114	/* no hub change reports (bit 0) for now (power, ...) */
3115
3116	/* port N changes (bit N)? */
3117	spin_lock_irqsave(&oxu->lock, flags);
3118	for (i = 0; i < ports; i++) {
3119		temp = readl(&oxu->regs->port_status[i]);
3120
3121		/*
3122		 * Return status information even for ports with OWNER set.
3123		 * Otherwise khubd wouldn't see the disconnect event when a
3124		 * high-speed device is switched over to the companion
3125		 * controller by the user.
3126		 */
3127
3128		if (!(temp & PORT_CONNECT))
3129			oxu->reset_done[i] = 0;
3130		if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3131				time_after_eq(jiffies, oxu->reset_done[i]))) {
3132			if (i < 7)
3133				buf[0] |= 1 << (i + 1);
3134			else
3135				buf[1] |= 1 << (i - 7);
3136			status = STS_PCD;
3137		}
3138	}
3139	/* FIXME autosuspend idle root hubs */
3140	spin_unlock_irqrestore(&oxu->lock, flags);
3141	return status ? retval : 0;
3142}
3143
3144/* Returns the speed of a device attached to a port on the root hub. */
3145static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3146						unsigned int portsc)
3147{
3148	switch ((portsc >> 26) & 3) {
3149	case 0:
3150		return 0;
3151	case 1:
3152		return USB_PORT_STAT_LOW_SPEED;
3153	case 2:
3154	default:
3155		return USB_PORT_STAT_HIGH_SPEED;
3156	}
3157}
3158
3159#define	PORT_WAKE_BITS	(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3160static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3161				u16 wValue, u16 wIndex, char *buf, u16 wLength)
3162{
3163	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3164	int ports = HCS_N_PORTS(oxu->hcs_params);
3165	u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3166	u32 temp, status;
3167	unsigned long	flags;
3168	int retval = 0;
3169	unsigned selector;
3170
3171	/*
3172	 * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3173	 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3174	 * (track current state ourselves) ... blink for diagnostics,
3175	 * power, "this is the one", etc.  EHCI spec supports this.
3176	 */
3177
3178	spin_lock_irqsave(&oxu->lock, flags);
3179	switch (typeReq) {
3180	case ClearHubFeature:
3181		switch (wValue) {
3182		case C_HUB_LOCAL_POWER:
3183		case C_HUB_OVER_CURRENT:
3184			/* no hub-wide feature/status flags */
3185			break;
3186		default:
3187			goto error;
3188		}
3189		break;
3190	case ClearPortFeature:
3191		if (!wIndex || wIndex > ports)
3192			goto error;
3193		wIndex--;
3194		temp = readl(status_reg);
3195
3196		/*
3197		 * Even if OWNER is set, so the port is owned by the
3198		 * companion controller, khubd needs to be able to clear
3199		 * the port-change status bits (especially
3200		 * USB_PORT_STAT_C_CONNECTION).
3201		 */
3202
3203		switch (wValue) {
3204		case USB_PORT_FEAT_ENABLE:
3205			writel(temp & ~PORT_PE, status_reg);
3206			break;
3207		case USB_PORT_FEAT_C_ENABLE:
3208			writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3209			break;
3210		case USB_PORT_FEAT_SUSPEND:
3211			if (temp & PORT_RESET)
3212				goto error;
3213			if (temp & PORT_SUSPEND) {
3214				if ((temp & PORT_PE) == 0)
3215					goto error;
3216				/* resume signaling for 20 msec */
3217				temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3218				writel(temp | PORT_RESUME, status_reg);
3219				oxu->reset_done[wIndex] = jiffies
3220						+ msecs_to_jiffies(20);
3221			}
3222			break;
3223		case USB_PORT_FEAT_C_SUSPEND:
3224			/* we auto-clear this feature */
3225			break;
3226		case USB_PORT_FEAT_POWER:
3227			if (HCS_PPC(oxu->hcs_params))
3228				writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3229					  status_reg);
3230			break;
3231		case USB_PORT_FEAT_C_CONNECTION:
3232			writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3233			break;
3234		case USB_PORT_FEAT_C_OVER_CURRENT:
3235			writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3236			break;
3237		case USB_PORT_FEAT_C_RESET:
3238			/* GetPortStatus clears reset */
3239			break;
3240		default:
3241			goto error;
3242		}
3243		readl(&oxu->regs->command);	/* unblock posted write */
3244		break;
3245	case GetHubDescriptor:
3246		ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3247			buf);
3248		break;
3249	case GetHubStatus:
3250		/* no hub-wide feature/status flags */
3251		memset(buf, 0, 4);
3252		break;
3253	case GetPortStatus:
3254		if (!wIndex || wIndex > ports)
3255			goto error;
3256		wIndex--;
3257		status = 0;
3258		temp = readl(status_reg);
3259
3260		/* wPortChange bits */
3261		if (temp & PORT_CSC)
3262			status |= USB_PORT_STAT_C_CONNECTION << 16;
3263		if (temp & PORT_PEC)
3264			status |= USB_PORT_STAT_C_ENABLE << 16;
3265		if ((temp & PORT_OCC) && !ignore_oc)
3266			status |= USB_PORT_STAT_C_OVERCURRENT << 16;
3267
3268		/* whoever resumes must GetPortStatus to complete it!! */
3269		if (temp & PORT_RESUME) {
3270
3271			/* Remote Wakeup received? */
3272			if (!oxu->reset_done[wIndex]) {
3273				/* resume signaling for 20 msec */
3274				oxu->reset_done[wIndex] = jiffies
3275						+ msecs_to_jiffies(20);
3276				/* check the port again */
3277				mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3278						oxu->reset_done[wIndex]);
3279			}
3280
3281			/* resume completed? */
3282			else if (time_after_eq(jiffies,
3283					oxu->reset_done[wIndex])) {
3284				status |= USB_PORT_STAT_C_SUSPEND << 16;
3285				oxu->reset_done[wIndex] = 0;
3286
3287				/* stop resume signaling */
3288				temp = readl(status_reg);
3289				writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3290					status_reg);
3291				retval = handshake(oxu, status_reg,
3292					   PORT_RESUME, 0, 2000 /* 2msec */);
3293				if (retval != 0) {
3294					oxu_err(oxu,
3295						"port %d resume error %d\n",
3296						wIndex + 1, retval);
3297					goto error;
3298				}
3299				temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3300			}
3301		}
3302
3303		/* whoever resets must GetPortStatus to complete it!! */
3304		if ((temp & PORT_RESET)
3305				&& time_after_eq(jiffies,
3306					oxu->reset_done[wIndex])) {
3307			status |= USB_PORT_STAT_C_RESET << 16;
3308			oxu->reset_done[wIndex] = 0;
3309
3310			/* force reset to complete */
3311			writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3312					status_reg);
3313			/* REVISIT:  some hardware needs 550+ usec to clear
3314			 * this bit; seems too long to spin routinely...
3315			 */
3316			retval = handshake(oxu, status_reg,
3317					PORT_RESET, 0, 750);
3318			if (retval != 0) {
3319				oxu_err(oxu, "port %d reset error %d\n",
3320					wIndex + 1, retval);
3321				goto error;
3322			}
3323
3324			/* see what we found out */
3325			temp = check_reset_complete(oxu, wIndex, status_reg,
3326					readl(status_reg));
3327		}
3328
3329		/* transfer dedicated ports to the companion hc */
3330		if ((temp & PORT_CONNECT) &&
3331				test_bit(wIndex, &oxu->companion_ports)) {
3332			temp &= ~PORT_RWC_BITS;
3333			temp |= PORT_OWNER;
3334			writel(temp, status_reg);
3335			oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3336			temp = readl(status_reg);
3337		}
3338
3339		/*
3340		 * Even if OWNER is set, there's no harm letting khubd
3341		 * see the wPortStatus values (they should all be 0 except
3342		 * for PORT_POWER anyway).
3343		 */
3344
3345		if (temp & PORT_CONNECT) {
3346			status |= USB_PORT_STAT_CONNECTION;
3347			/* status may be from integrated TT */
3348			status |= oxu_port_speed(oxu, temp);
3349		}
3350		if (temp & PORT_PE)
3351			status |= USB_PORT_STAT_ENABLE;
3352		if (temp & (PORT_SUSPEND|PORT_RESUME))
3353			status |= USB_PORT_STAT_SUSPEND;
3354		if (temp & PORT_OC)
3355			status |= USB_PORT_STAT_OVERCURRENT;
3356		if (temp & PORT_RESET)
3357			status |= USB_PORT_STAT_RESET;
3358		if (temp & PORT_POWER)
3359			status |= USB_PORT_STAT_POWER;
3360
3361#ifndef	OXU_VERBOSE_DEBUG
3362	if (status & ~0xffff)	/* only if wPortChange is interesting */
3363#endif
3364		dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3365		put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3366		break;
3367	case SetHubFeature:
3368		switch (wValue) {
3369		case C_HUB_LOCAL_POWER:
3370		case C_HUB_OVER_CURRENT:
3371			/* no hub-wide feature/status flags */
3372			break;
3373		default:
3374			goto error;
3375		}
3376		break;
3377	case SetPortFeature:
3378		selector = wIndex >> 8;
3379		wIndex &= 0xff;
3380		if (!wIndex || wIndex > ports)
3381			goto error;
3382		wIndex--;
3383		temp = readl(status_reg);
3384		if (temp & PORT_OWNER)
3385			break;
3386
3387		temp &= ~PORT_RWC_BITS;
3388		switch (wValue) {
3389		case USB_PORT_FEAT_SUSPEND:
3390			if ((temp & PORT_PE) == 0
3391					|| (temp & PORT_RESET) != 0)
3392				goto error;
3393			if (device_may_wakeup(&hcd->self.root_hub->dev))
3394				temp |= PORT_WAKE_BITS;
3395			writel(temp | PORT_SUSPEND, status_reg);
3396			break;
3397		case USB_PORT_FEAT_POWER:
3398			if (HCS_PPC(oxu->hcs_params))
3399				writel(temp | PORT_POWER, status_reg);
3400			break;
3401		case USB_PORT_FEAT_RESET:
3402			if (temp & PORT_RESUME)
3403				goto error;
3404			/* line status bits may report this as low speed,
3405			 * which can be fine if this root hub has a
3406			 * transaction translator built in.
3407			 */
3408			oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3409			temp |= PORT_RESET;
3410			temp &= ~PORT_PE;
3411
3412			/*
3413			 * caller must wait, then call GetPortStatus
3414			 * usb 2.0 spec says 50 ms resets on root
3415			 */
3416			oxu->reset_done[wIndex] = jiffies
3417					+ msecs_to_jiffies(50);
3418			writel(temp, status_reg);
3419			break;
3420
3421		/* For downstream facing ports (these):  one hub port is put
3422		 * into test mode according to USB2 11.24.2.13, then the hub
3423		 * must be reset (which for root hub now means rmmod+modprobe,
3424		 * or else system reboot).  See EHCI 2.3.9 and 4.14 for info
3425		 * about the EHCI-specific stuff.
3426		 */
3427		case USB_PORT_FEAT_TEST:
3428			if (!selector || selector > 5)
3429				goto error;
3430			ehci_quiesce(oxu);
3431			ehci_halt(oxu);
3432			temp |= selector << 16;
3433			writel(temp, status_reg);
3434			break;
3435
3436		default:
3437			goto error;
3438		}
3439		readl(&oxu->regs->command);	/* unblock posted writes */
3440		break;
3441
3442	default:
3443error:
3444		/* "stall" on error */
3445		retval = -EPIPE;
3446	}
3447	spin_unlock_irqrestore(&oxu->lock, flags);
3448	return retval;
3449}
3450
3451#ifdef CONFIG_PM
3452
3453static int oxu_bus_suspend(struct usb_hcd *hcd)
3454{
3455	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3456	int port;
3457	int mask;
3458
3459	oxu_dbg(oxu, "suspend root hub\n");
3460
3461	if (time_before(jiffies, oxu->next_statechange))
3462		msleep(5);
3463
3464	port = HCS_N_PORTS(oxu->hcs_params);
3465	spin_lock_irq(&oxu->lock);
3466
3467	/* stop schedules, clean any completed work */
3468	if (HC_IS_RUNNING(hcd->state)) {
3469		ehci_quiesce(oxu);
3470		hcd->state = HC_STATE_QUIESCING;
3471	}
3472	oxu->command = readl(&oxu->regs->command);
3473	if (oxu->reclaim)
3474		oxu->reclaim_ready = 1;
3475	ehci_work(oxu);
3476
3477	/* Unlike other USB host controller types, EHCI doesn't have
3478	 * any notion of "global" or bus-wide suspend.  The driver has
3479	 * to manually suspend all the active unsuspended ports, and
3480	 * then manually resume them in the bus_resume() routine.
3481	 */
3482	oxu->bus_suspended = 0;
3483	while (port--) {
3484		u32 __iomem *reg = &oxu->regs->port_status[port];
3485		u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3486		u32 t2 = t1;
3487
3488		/* keep track of which ports we suspend */
3489		if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3490				!(t1 & PORT_SUSPEND)) {
3491			t2 |= PORT_SUSPEND;
3492			set_bit(port, &oxu->bus_suspended);
3493		}
3494
3495		/* enable remote wakeup on all ports */
3496		if (device_may_wakeup(&hcd->self.root_hub->dev))
3497			t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3498		else
3499			t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3500
3501		if (t1 != t2) {
3502			oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3503				port + 1, t1, t2);
3504			writel(t2, reg);
3505		}
3506	}
3507
3508	/* turn off now-idle HC */
3509	del_timer_sync(&oxu->watchdog);
3510	ehci_halt(oxu);
3511	hcd->state = HC_STATE_SUSPENDED;
3512
3513	/* allow remote wakeup */
3514	mask = INTR_MASK;
3515	if (!device_may_wakeup(&hcd->self.root_hub->dev))
3516		mask &= ~STS_PCD;
3517	writel(mask, &oxu->regs->intr_enable);
3518	readl(&oxu->regs->intr_enable);
3519
3520	oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3521	spin_unlock_irq(&oxu->lock);
3522	return 0;
3523}
3524
3525/* Caller has locked the root hub, and should reset/reinit on error */
3526static int oxu_bus_resume(struct usb_hcd *hcd)
3527{
3528	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3529	u32 temp;
3530	int i;
3531
3532	if (time_before(jiffies, oxu->next_statechange))
3533		msleep(5);
3534	spin_lock_irq(&oxu->lock);
3535
3536	/* Ideally and we've got a real resume here, and no port's power
3537	 * was lost.  (For PCI, that means Vaux was maintained.)  But we
3538	 * could instead be restoring a swsusp snapshot -- so that BIOS was
3539	 * the last user of the controller, not reset/pm hardware keeping
3540	 * state we gave to it.
3541	 */
3542	temp = readl(&oxu->regs->intr_enable);
3543	oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3544
3545	/* at least some APM implementations will try to deliver
3546	 * IRQs right away, so delay them until we're ready.
3547	 */
3548	writel(0, &oxu->regs->intr_enable);
3549
3550	/* re-init operational registers */
3551	writel(0, &oxu->regs->segment);
3552	writel(oxu->periodic_dma, &oxu->regs->frame_list);
3553	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3554
3555	/* restore CMD_RUN, framelist size, and irq threshold */
3556	writel(oxu->command, &oxu->regs->command);
3557
3558	/* Some controller/firmware combinations need a delay during which
3559	 * they set up the port statuses.  See Bugzilla #8190. */
3560	mdelay(8);
3561
3562	/* manually resume the ports we suspended during bus_suspend() */
3563	i = HCS_N_PORTS(oxu->hcs_params);
3564	while (i--) {
3565		temp = readl(&oxu->regs->port_status[i]);
3566		temp &= ~(PORT_RWC_BITS
3567			| PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3568		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3569			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3570			temp |= PORT_RESUME;
3571		}
3572		writel(temp, &oxu->regs->port_status[i]);
3573	}
3574	i = HCS_N_PORTS(oxu->hcs_params);
3575	mdelay(20);
3576	while (i--) {
3577		temp = readl(&oxu->regs->port_status[i]);
3578		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3579			temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3580			writel(temp, &oxu->regs->port_status[i]);
3581			oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3582		}
3583	}
3584	(void) readl(&oxu->regs->command);
3585
3586	/* maybe re-activate the schedule(s) */
3587	temp = 0;
3588	if (oxu->async->qh_next.qh)
3589		temp |= CMD_ASE;
3590	if (oxu->periodic_sched)
3591		temp |= CMD_PSE;
3592	if (temp) {
3593		oxu->command |= temp;
3594		writel(oxu->command, &oxu->regs->command);
3595	}
3596
3597	oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3598	hcd->state = HC_STATE_RUNNING;
3599
3600	/* Now we can safely re-enable irqs */
3601	writel(INTR_MASK, &oxu->regs->intr_enable);
3602
3603	spin_unlock_irq(&oxu->lock);
3604	return 0;
3605}
3606
3607#else
3608
3609static int oxu_bus_suspend(struct usb_hcd *hcd)
3610{
3611	return 0;
3612}
3613
3614static int oxu_bus_resume(struct usb_hcd *hcd)
3615{
3616	return 0;
3617}
3618
3619#endif	/* CONFIG_PM */
3620
3621static const struct hc_driver oxu_hc_driver = {
3622	.description =		"oxu210hp_hcd",
3623	.product_desc =		"oxu210hp HCD",
3624	.hcd_priv_size =	sizeof(struct oxu_hcd),
3625
3626	/*
3627	 * Generic hardware linkage
3628	 */
3629	.irq =			oxu_irq,
3630	.flags =		HCD_MEMORY | HCD_USB2,
3631
3632	/*
3633	 * Basic lifecycle operations
3634	 */
3635	.reset =		oxu_reset,
3636	.start =		oxu_run,
3637	.stop =			oxu_stop,
3638	.shutdown =		oxu_shutdown,
3639
3640	/*
3641	 * Managing i/o requests and associated device resources
3642	 */
3643	.urb_enqueue =		oxu_urb_enqueue,
3644	.urb_dequeue =		oxu_urb_dequeue,
3645	.endpoint_disable =	oxu_endpoint_disable,
3646
3647	/*
3648	 * Scheduling support
3649	 */
3650	.get_frame_number =	oxu_get_frame,
3651
3652	/*
3653	 * Root hub support
3654	 */
3655	.hub_status_data =	oxu_hub_status_data,
3656	.hub_control =		oxu_hub_control,
3657	.bus_suspend =		oxu_bus_suspend,
3658	.bus_resume =		oxu_bus_resume,
3659};
3660
3661/*
3662 * Module stuff
3663 */
3664
3665static void oxu_configuration(struct platform_device *pdev, void *base)
3666{
3667	u32 tmp;
3668
3669	/* Initialize top level registers.
3670	 * First write ever
3671	 */
3672	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3673	oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
3674	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3675
3676	tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
3677	oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
3678
3679	oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
3680					OXU_COMPARATOR | OXU_ASO_OP);
3681
3682	tmp = oxu_readl(base, OXU_CLKCTRL_SET);
3683	oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
3684
3685	/* Clear all top interrupt enable */
3686	oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
3687
3688	/* Clear all top interrupt status */
3689	oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
3690
3691	/* Enable all needed top interrupt except OTG SPH core */
3692	oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
3693}
3694
3695static int oxu_verify_id(struct platform_device *pdev, void *base)
3696{
3697	u32 id;
3698	static const char * const bo[] = {
3699		"reserved",
3700		"128-pin LQFP",
3701		"84-pin TFBGA",
3702		"reserved",
3703	};
3704
3705	/* Read controller signature register to find a match */
3706	id = oxu_readl(base, OXU_DEVICEID);
3707	dev_info(&pdev->dev, "device ID %x\n", id);
3708	if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
3709		return -1;
3710
3711	dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
3712		id >> OXU_REV_SHIFT,
3713		bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
3714		(id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
3715		(id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
3716
3717	return 0;
3718}
3719
3720static const struct hc_driver oxu_hc_driver;
3721static struct usb_hcd *oxu_create(struct platform_device *pdev,
3722				unsigned long memstart, unsigned long memlen,
3723				void *base, int irq, int otg)
3724{
3725	struct device *dev = &pdev->dev;
3726
3727	struct usb_hcd *hcd;
3728	struct oxu_hcd *oxu;
3729	int ret;
3730
3731	/* Set endian mode and host mode */
3732	oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
3733				OXU_USBMODE,
3734				OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
3735
3736	hcd = usb_create_hcd(&oxu_hc_driver, dev,
3737				otg ? "oxu210hp_otg" : "oxu210hp_sph");
3738	if (!hcd)
3739		return ERR_PTR(-ENOMEM);
3740
3741	hcd->rsrc_start = memstart;
3742	hcd->rsrc_len = memlen;
3743	hcd->regs = base;
3744	hcd->irq = irq;
3745	hcd->state = HC_STATE_HALT;
3746
3747	oxu = hcd_to_oxu(hcd);
3748	oxu->is_otg = otg;
3749
3750	ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
3751	if (ret < 0)
3752		return ERR_PTR(ret);
3753
3754	device_wakeup_enable(hcd->self.controller);
3755	return hcd;
3756}
3757
3758static int oxu_init(struct platform_device *pdev,
3759				unsigned long memstart, unsigned long memlen,
3760				void *base, int irq)
3761{
3762	struct oxu_info *info = platform_get_drvdata(pdev);
3763	struct usb_hcd *hcd;
3764	int ret;
3765
3766	/* First time configuration at start up */
3767	oxu_configuration(pdev, base);
3768
3769	ret = oxu_verify_id(pdev, base);
3770	if (ret) {
3771		dev_err(&pdev->dev, "no devices found!\n");
3772		return -ENODEV;
3773	}
3774
3775	/* Create the OTG controller */
3776	hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
3777	if (IS_ERR(hcd)) {
3778		dev_err(&pdev->dev, "cannot create OTG controller!\n");
3779		ret = PTR_ERR(hcd);
3780		goto error_create_otg;
3781	}
3782	info->hcd[0] = hcd;
3783
3784	/* Create the SPH host controller */
3785	hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
3786	if (IS_ERR(hcd)) {
3787		dev_err(&pdev->dev, "cannot create SPH controller!\n");
3788		ret = PTR_ERR(hcd);
3789		goto error_create_sph;
3790	}
3791	info->hcd[1] = hcd;
3792
3793	oxu_writel(base, OXU_CHIPIRQEN_SET,
3794		oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
3795
3796	return 0;
3797
3798error_create_sph:
3799	usb_remove_hcd(info->hcd[0]);
3800	usb_put_hcd(info->hcd[0]);
3801
3802error_create_otg:
3803	return ret;
3804}
3805
3806static int oxu_drv_probe(struct platform_device *pdev)
3807{
3808	struct resource *res;
3809	void *base;
3810	unsigned long memstart, memlen;
3811	int irq, ret;
3812	struct oxu_info *info;
3813
3814	if (usb_disabled())
3815		return -ENODEV;
3816
3817	/*
3818	 * Get the platform resources
3819	 */
3820	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
3821	if (!res) {
3822		dev_err(&pdev->dev,
3823			"no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
3824		return -ENODEV;
3825	}
3826	irq = res->start;
3827	dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
3828
3829	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3830	if (!res) {
3831		dev_err(&pdev->dev, "no registers address! Check %s setup!\n",
3832			dev_name(&pdev->dev));
3833		return -ENODEV;
3834	}
3835	memstart = res->start;
3836	memlen = resource_size(res);
3837	dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen);
3838	if (!request_mem_region(memstart, memlen,
3839				oxu_hc_driver.description)) {
3840		dev_dbg(&pdev->dev, "memory area already in use\n");
3841		return -EBUSY;
3842	}
3843
3844	ret = irq_set_irq_type(irq, IRQF_TRIGGER_FALLING);
3845	if (ret) {
3846		dev_err(&pdev->dev, "error setting irq type\n");
3847		ret = -EFAULT;
3848		goto error_set_irq_type;
3849	}
3850
3851	base = ioremap(memstart, memlen);
3852	if (!base) {
3853		dev_dbg(&pdev->dev, "error mapping memory\n");
3854		ret = -EFAULT;
3855		goto error_ioremap;
3856	}
3857
3858	/* Allocate a driver data struct to hold useful info for both
3859	 * SPH & OTG devices
3860	 */
3861	info = kzalloc(sizeof(struct oxu_info), GFP_KERNEL);
3862	if (!info) {
3863		dev_dbg(&pdev->dev, "error allocating memory\n");
3864		ret = -EFAULT;
3865		goto error_alloc;
3866	}
3867	platform_set_drvdata(pdev, info);
3868
3869	ret = oxu_init(pdev, memstart, memlen, base, irq);
3870	if (ret < 0) {
3871		dev_dbg(&pdev->dev, "cannot init USB devices\n");
3872		goto error_init;
3873	}
3874
3875	dev_info(&pdev->dev, "devices enabled and running\n");
3876	platform_set_drvdata(pdev, info);
3877
3878	return 0;
3879
3880error_init:
3881	kfree(info);
3882
3883error_alloc:
3884	iounmap(base);
3885
3886error_set_irq_type:
3887error_ioremap:
3888	release_mem_region(memstart, memlen);
3889
3890	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
3891	return ret;
3892}
3893
3894static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
3895{
3896	usb_remove_hcd(hcd);
3897	usb_put_hcd(hcd);
3898}
3899
3900static int oxu_drv_remove(struct platform_device *pdev)
3901{
3902	struct oxu_info *info = platform_get_drvdata(pdev);
3903	unsigned long memstart = info->hcd[0]->rsrc_start,
3904			memlen = info->hcd[0]->rsrc_len;
3905	void *base = info->hcd[0]->regs;
3906
3907	oxu_remove(pdev, info->hcd[0]);
3908	oxu_remove(pdev, info->hcd[1]);
3909
3910	iounmap(base);
3911	release_mem_region(memstart, memlen);
3912
3913	kfree(info);
3914
3915	return 0;
3916}
3917
3918static void oxu_drv_shutdown(struct platform_device *pdev)
3919{
3920	oxu_drv_remove(pdev);
3921}
3922
3923#if 0
3924/* FIXME: TODO */
3925static int oxu_drv_suspend(struct device *dev)
3926{
3927	struct platform_device *pdev = to_platform_device(dev);
3928	struct usb_hcd *hcd = dev_get_drvdata(dev);
3929
3930	return 0;
3931}
3932
3933static int oxu_drv_resume(struct device *dev)
3934{
3935	struct platform_device *pdev = to_platform_device(dev);
3936	struct usb_hcd *hcd = dev_get_drvdata(dev);
3937
3938	return 0;
3939}
3940#else
3941#define oxu_drv_suspend	NULL
3942#define oxu_drv_resume	NULL
3943#endif
3944
3945static struct platform_driver oxu_driver = {
3946	.probe		= oxu_drv_probe,
3947	.remove		= oxu_drv_remove,
3948	.shutdown	= oxu_drv_shutdown,
3949	.suspend	= oxu_drv_suspend,
3950	.resume		= oxu_drv_resume,
3951	.driver = {
3952		.name = "oxu210hp-hcd",
3953		.bus = &platform_bus_type
3954	}
3955};
3956
3957module_platform_driver(oxu_driver);
3958
3959MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3960MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3961MODULE_LICENSE("GPL");
3962