oxu210hp-hcd.c revision 82a5eeb9f486366ad1b6c3be2e0d328ca185aa7e
1/*
2 * Copyright (c) 2008 Rodolfo Giometti <giometti@linux.it>
3 * Copyright (c) 2008 Eurotech S.p.A. <info@eurtech.it>
4 *
5 * This code is *strongly* based on EHCI-HCD code by David Brownell since
6 * the chip is a quasi-EHCI compatible.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
16 * for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#include <linux/module.h>
24#include <linux/pci.h>
25#include <linux/dmapool.h>
26#include <linux/kernel.h>
27#include <linux/delay.h>
28#include <linux/ioport.h>
29#include <linux/sched.h>
30#include <linux/slab.h>
31#include <linux/errno.h>
32#include <linux/init.h>
33#include <linux/timer.h>
34#include <linux/list.h>
35#include <linux/interrupt.h>
36#include <linux/usb.h>
37#include <linux/moduleparam.h>
38#include <linux/dma-mapping.h>
39#include <linux/io.h>
40
41#include "../core/hcd.h"
42
43#include <asm/irq.h>
44#include <asm/system.h>
45#include <asm/unaligned.h>
46
47#include <linux/irq.h>
48#include <linux/platform_device.h>
49
50#include "oxu210hp.h"
51
52#define DRIVER_VERSION "0.0.50"
53
54/*
55 * Main defines
56 */
57
58#define oxu_dbg(oxu, fmt, args...) \
59		dev_dbg(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
60#define oxu_err(oxu, fmt, args...) \
61		dev_err(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
62#define oxu_info(oxu, fmt, args...) \
63		dev_info(oxu_to_hcd(oxu)->self.controller , fmt , ## args)
64
65static inline struct usb_hcd *oxu_to_hcd(struct oxu_hcd *oxu)
66{
67	return container_of((void *) oxu, struct usb_hcd, hcd_priv);
68}
69
70static inline struct oxu_hcd *hcd_to_oxu(struct usb_hcd *hcd)
71{
72	return (struct oxu_hcd *) (hcd->hcd_priv);
73}
74
75/*
76 * Debug stuff
77 */
78
79#undef OXU_URB_TRACE
80#undef OXU_VERBOSE_DEBUG
81
82#ifdef OXU_VERBOSE_DEBUG
83#define oxu_vdbg			oxu_dbg
84#else
85#define oxu_vdbg(oxu, fmt, args...)	/* Nop */
86#endif
87
88#ifdef DEBUG
89
90static int __attribute__((__unused__))
91dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
92{
93	return scnprintf(buf, len, "%s%sstatus %04x%s%s%s%s%s%s%s%s%s%s",
94		label, label[0] ? " " : "", status,
95		(status & STS_ASS) ? " Async" : "",
96		(status & STS_PSS) ? " Periodic" : "",
97		(status & STS_RECL) ? " Recl" : "",
98		(status & STS_HALT) ? " Halt" : "",
99		(status & STS_IAA) ? " IAA" : "",
100		(status & STS_FATAL) ? " FATAL" : "",
101		(status & STS_FLR) ? " FLR" : "",
102		(status & STS_PCD) ? " PCD" : "",
103		(status & STS_ERR) ? " ERR" : "",
104		(status & STS_INT) ? " INT" : ""
105		);
106}
107
108static int __attribute__((__unused__))
109dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
110{
111	return scnprintf(buf, len, "%s%sintrenable %02x%s%s%s%s%s%s",
112		label, label[0] ? " " : "", enable,
113		(enable & STS_IAA) ? " IAA" : "",
114		(enable & STS_FATAL) ? " FATAL" : "",
115		(enable & STS_FLR) ? " FLR" : "",
116		(enable & STS_PCD) ? " PCD" : "",
117		(enable & STS_ERR) ? " ERR" : "",
118		(enable & STS_INT) ? " INT" : ""
119		);
120}
121
122static const char *const fls_strings[] =
123    { "1024", "512", "256", "??" };
124
125static int dbg_command_buf(char *buf, unsigned len,
126				const char *label, u32 command)
127{
128	return scnprintf(buf, len,
129		"%s%scommand %06x %s=%d ithresh=%d%s%s%s%s period=%s%s %s",
130		label, label[0] ? " " : "", command,
131		(command & CMD_PARK) ? "park" : "(park)",
132		CMD_PARK_CNT(command),
133		(command >> 16) & 0x3f,
134		(command & CMD_LRESET) ? " LReset" : "",
135		(command & CMD_IAAD) ? " IAAD" : "",
136		(command & CMD_ASE) ? " Async" : "",
137		(command & CMD_PSE) ? " Periodic" : "",
138		fls_strings[(command >> 2) & 0x3],
139		(command & CMD_RESET) ? " Reset" : "",
140		(command & CMD_RUN) ? "RUN" : "HALT"
141		);
142}
143
144static int dbg_port_buf(char *buf, unsigned len, const char *label,
145				int port, u32 status)
146{
147	char	*sig;
148
149	/* signaling state */
150	switch (status & (3 << 10)) {
151	case 0 << 10:
152		sig = "se0";
153		break;
154	case 1 << 10:
155		sig = "k";	/* low speed */
156		break;
157	case 2 << 10:
158		sig = "j";
159		break;
160	default:
161		sig = "?";
162		break;
163	}
164
165	return scnprintf(buf, len,
166		"%s%sport %d status %06x%s%s sig=%s%s%s%s%s%s%s%s%s%s",
167		label, label[0] ? " " : "", port, status,
168		(status & PORT_POWER) ? " POWER" : "",
169		(status & PORT_OWNER) ? " OWNER" : "",
170		sig,
171		(status & PORT_RESET) ? " RESET" : "",
172		(status & PORT_SUSPEND) ? " SUSPEND" : "",
173		(status & PORT_RESUME) ? " RESUME" : "",
174		(status & PORT_OCC) ? " OCC" : "",
175		(status & PORT_OC) ? " OC" : "",
176		(status & PORT_PEC) ? " PEC" : "",
177		(status & PORT_PE) ? " PE" : "",
178		(status & PORT_CSC) ? " CSC" : "",
179		(status & PORT_CONNECT) ? " CONNECT" : ""
180	    );
181}
182
183#else
184
185static inline int __attribute__((__unused__))
186dbg_status_buf(char *buf, unsigned len, const char *label, u32 status)
187{ return 0; }
188
189static inline int __attribute__((__unused__))
190dbg_command_buf(char *buf, unsigned len, const char *label, u32 command)
191{ return 0; }
192
193static inline int __attribute__((__unused__))
194dbg_intr_buf(char *buf, unsigned len, const char *label, u32 enable)
195{ return 0; }
196
197static inline int __attribute__((__unused__))
198dbg_port_buf(char *buf, unsigned len, const char *label, int port, u32 status)
199{ return 0; }
200
201#endif /* DEBUG */
202
203/* functions have the "wrong" filename when they're output... */
204#define dbg_status(oxu, label, status) { \
205	char _buf[80]; \
206	dbg_status_buf(_buf, sizeof _buf, label, status); \
207	oxu_dbg(oxu, "%s\n", _buf); \
208}
209
210#define dbg_cmd(oxu, label, command) { \
211	char _buf[80]; \
212	dbg_command_buf(_buf, sizeof _buf, label, command); \
213	oxu_dbg(oxu, "%s\n", _buf); \
214}
215
216#define dbg_port(oxu, label, port, status) { \
217	char _buf[80]; \
218	dbg_port_buf(_buf, sizeof _buf, label, port, status); \
219	oxu_dbg(oxu, "%s\n", _buf); \
220}
221
222/*
223 * Module parameters
224 */
225
226/* Initial IRQ latency: faster than hw default */
227static int log2_irq_thresh;			/* 0 to 6 */
228module_param(log2_irq_thresh, int, S_IRUGO);
229MODULE_PARM_DESC(log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
230
231/* Initial park setting: slower than hw default */
232static unsigned park;
233module_param(park, uint, S_IRUGO);
234MODULE_PARM_DESC(park, "park setting; 1-3 back-to-back async packets");
235
236/* For flakey hardware, ignore overcurrent indicators */
237static int ignore_oc;
238module_param(ignore_oc, bool, S_IRUGO);
239MODULE_PARM_DESC(ignore_oc, "ignore bogus hardware overcurrent indications");
240
241
242static void ehci_work(struct oxu_hcd *oxu);
243static int oxu_hub_control(struct usb_hcd *hcd,
244				u16 typeReq, u16 wValue, u16 wIndex,
245				char *buf, u16 wLength);
246
247/*
248 * Local functions
249 */
250
251/* Low level read/write registers functions */
252static inline u32 oxu_readl(void *base, u32 reg)
253{
254	return readl(base + reg);
255}
256
257static inline void oxu_writel(void *base, u32 reg, u32 val)
258{
259	writel(val, base + reg);
260}
261
262static inline void timer_action_done(struct oxu_hcd *oxu,
263					enum ehci_timer_action action)
264{
265	clear_bit(action, &oxu->actions);
266}
267
268static inline void timer_action(struct oxu_hcd *oxu,
269					enum ehci_timer_action action)
270{
271	if (!test_and_set_bit(action, &oxu->actions)) {
272		unsigned long t;
273
274		switch (action) {
275		case TIMER_IAA_WATCHDOG:
276			t = EHCI_IAA_JIFFIES;
277			break;
278		case TIMER_IO_WATCHDOG:
279			t = EHCI_IO_JIFFIES;
280			break;
281		case TIMER_ASYNC_OFF:
282			t = EHCI_ASYNC_JIFFIES;
283			break;
284		case TIMER_ASYNC_SHRINK:
285		default:
286			t = EHCI_SHRINK_JIFFIES;
287			break;
288		}
289		t += jiffies;
290		/* all timings except IAA watchdog can be overridden.
291		 * async queue SHRINK often precedes IAA.  while it's ready
292		 * to go OFF neither can matter, and afterwards the IO
293		 * watchdog stops unless there's still periodic traffic.
294		 */
295		if (action != TIMER_IAA_WATCHDOG
296				&& t > oxu->watchdog.expires
297				&& timer_pending(&oxu->watchdog))
298			return;
299		mod_timer(&oxu->watchdog, t);
300	}
301}
302
303/*
304 * handshake - spin reading hc until handshake completes or fails
305 * @ptr: address of hc register to be read
306 * @mask: bits to look at in result of read
307 * @done: value of those bits when handshake succeeds
308 * @usec: timeout in microseconds
309 *
310 * Returns negative errno, or zero on success
311 *
312 * Success happens when the "mask" bits have the specified value (hardware
313 * handshake done).  There are two failure modes:  "usec" have passed (major
314 * hardware flakeout), or the register reads as all-ones (hardware removed).
315 *
316 * That last failure should_only happen in cases like physical cardbus eject
317 * before driver shutdown. But it also seems to be caused by bugs in cardbus
318 * bridge shutdown:  shutting down the bridge before the devices using it.
319 */
320static int handshake(struct oxu_hcd *oxu, void __iomem *ptr,
321					u32 mask, u32 done, int usec)
322{
323	u32 result;
324
325	do {
326		result = readl(ptr);
327		if (result == ~(u32)0)		/* card removed */
328			return -ENODEV;
329		result &= mask;
330		if (result == done)
331			return 0;
332		udelay(1);
333		usec--;
334	} while (usec > 0);
335	return -ETIMEDOUT;
336}
337
338/* Force HC to halt state from unknown (EHCI spec section 2.3) */
339static int ehci_halt(struct oxu_hcd *oxu)
340{
341	u32	temp = readl(&oxu->regs->status);
342
343	/* disable any irqs left enabled by previous code */
344	writel(0, &oxu->regs->intr_enable);
345
346	if ((temp & STS_HALT) != 0)
347		return 0;
348
349	temp = readl(&oxu->regs->command);
350	temp &= ~CMD_RUN;
351	writel(temp, &oxu->regs->command);
352	return handshake(oxu, &oxu->regs->status,
353			  STS_HALT, STS_HALT, 16 * 125);
354}
355
356/* Put TDI/ARC silicon into EHCI mode */
357static void tdi_reset(struct oxu_hcd *oxu)
358{
359	u32 __iomem *reg_ptr;
360	u32 tmp;
361
362	reg_ptr = (u32 __iomem *)(((u8 __iomem *)oxu->regs) + 0x68);
363	tmp = readl(reg_ptr);
364	tmp |= 0x3;
365	writel(tmp, reg_ptr);
366}
367
368/* Reset a non-running (STS_HALT == 1) controller */
369static int ehci_reset(struct oxu_hcd *oxu)
370{
371	int	retval;
372	u32	command = readl(&oxu->regs->command);
373
374	command |= CMD_RESET;
375	dbg_cmd(oxu, "reset", command);
376	writel(command, &oxu->regs->command);
377	oxu_to_hcd(oxu)->state = HC_STATE_HALT;
378	oxu->next_statechange = jiffies;
379	retval = handshake(oxu, &oxu->regs->command,
380			    CMD_RESET, 0, 250 * 1000);
381
382	if (retval)
383		return retval;
384
385	tdi_reset(oxu);
386
387	return retval;
388}
389
390/* Idle the controller (from running) */
391static void ehci_quiesce(struct oxu_hcd *oxu)
392{
393	u32	temp;
394
395#ifdef DEBUG
396	if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
397		BUG();
398#endif
399
400	/* wait for any schedule enables/disables to take effect */
401	temp = readl(&oxu->regs->command) << 10;
402	temp &= STS_ASS | STS_PSS;
403	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
404				temp, 16 * 125) != 0) {
405		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
406		return;
407	}
408
409	/* then disable anything that's still active */
410	temp = readl(&oxu->regs->command);
411	temp &= ~(CMD_ASE | CMD_IAAD | CMD_PSE);
412	writel(temp, &oxu->regs->command);
413
414	/* hardware can take 16 microframes to turn off ... */
415	if (handshake(oxu, &oxu->regs->status, STS_ASS | STS_PSS,
416				0, 16 * 125) != 0) {
417		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
418		return;
419	}
420}
421
422static int check_reset_complete(struct oxu_hcd *oxu, int index,
423				u32 __iomem *status_reg, int port_status)
424{
425	if (!(port_status & PORT_CONNECT)) {
426		oxu->reset_done[index] = 0;
427		return port_status;
428	}
429
430	/* if reset finished and it's still not enabled -- handoff */
431	if (!(port_status & PORT_PE)) {
432		oxu_dbg(oxu, "Failed to enable port %d on root hub TT\n",
433				index+1);
434		return port_status;
435	} else
436		oxu_dbg(oxu, "port %d high speed\n", index + 1);
437
438	return port_status;
439}
440
441static void ehci_hub_descriptor(struct oxu_hcd *oxu,
442				struct usb_hub_descriptor *desc)
443{
444	int ports = HCS_N_PORTS(oxu->hcs_params);
445	u16 temp;
446
447	desc->bDescriptorType = 0x29;
448	desc->bPwrOn2PwrGood = 10;	/* oxu 1.0, 2.3.9 says 20ms max */
449	desc->bHubContrCurrent = 0;
450
451	desc->bNbrPorts = ports;
452	temp = 1 + (ports / 8);
453	desc->bDescLength = 7 + 2 * temp;
454
455	/* two bitmaps:  ports removable, and usb 1.0 legacy PortPwrCtrlMask */
456	memset(&desc->bitmap[0], 0, temp);
457	memset(&desc->bitmap[temp], 0xff, temp);
458
459	temp = 0x0008;			/* per-port overcurrent reporting */
460	if (HCS_PPC(oxu->hcs_params))
461		temp |= 0x0001;		/* per-port power control */
462	else
463		temp |= 0x0002;		/* no power switching */
464	desc->wHubCharacteristics = (__force __u16)cpu_to_le16(temp);
465}
466
467
468/* Allocate an OXU210HP on-chip memory data buffer
469 *
470 * An on-chip memory data buffer is required for each OXU210HP USB transfer.
471 * Each transfer descriptor has one or more on-chip memory data buffers.
472 *
473 * Data buffers are allocated from a fix sized pool of data blocks.
474 * To minimise fragmentation and give reasonable memory utlisation,
475 * data buffers are allocated with sizes the power of 2 multiples of
476 * the block size, starting on an address a multiple of the allocated size.
477 *
478 * FIXME: callers of this function require a buffer to be allocated for
479 * len=0. This is a waste of on-chip memory and should be fix. Then this
480 * function should be changed to not allocate a buffer for len=0.
481 */
482static int oxu_buf_alloc(struct oxu_hcd *oxu, struct ehci_qtd *qtd, int len)
483{
484	int n_blocks;	/* minium blocks needed to hold len */
485	int a_blocks;	/* blocks allocated */
486	int i, j;
487
488	/* Don't allocte bigger than supported */
489	if (len > BUFFER_SIZE * BUFFER_NUM) {
490		oxu_err(oxu, "buffer too big (%d)\n", len);
491		return -ENOMEM;
492	}
493
494	spin_lock(&oxu->mem_lock);
495
496	/* Number of blocks needed to hold len */
497	n_blocks = (len + BUFFER_SIZE - 1) / BUFFER_SIZE;
498
499	/* Round the number of blocks up to the power of 2 */
500	for (a_blocks = 1; a_blocks < n_blocks; a_blocks <<= 1)
501		;
502
503	/* Find a suitable available data buffer */
504	for (i = 0; i < BUFFER_NUM;
505			i += max(a_blocks, (int)oxu->db_used[i])) {
506
507		/* Check all the required blocks are available */
508		for (j = 0; j < a_blocks; j++)
509			if (oxu->db_used[i + j])
510				break;
511
512		if (j != a_blocks)
513			continue;
514
515		/* Allocate blocks found! */
516		qtd->buffer = (void *) &oxu->mem->db_pool[i];
517		qtd->buffer_dma = virt_to_phys(qtd->buffer);
518
519		qtd->qtd_buffer_len = BUFFER_SIZE * a_blocks;
520		oxu->db_used[i] = a_blocks;
521
522		spin_unlock(&oxu->mem_lock);
523
524		return 0;
525	}
526
527	/* Failed */
528
529	spin_unlock(&oxu->mem_lock);
530
531	return -ENOMEM;
532}
533
534static void oxu_buf_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
535{
536	int index;
537
538	spin_lock(&oxu->mem_lock);
539
540	index = (qtd->buffer - (void *) &oxu->mem->db_pool[0])
541							 / BUFFER_SIZE;
542	oxu->db_used[index] = 0;
543	qtd->qtd_buffer_len = 0;
544	qtd->buffer_dma = 0;
545	qtd->buffer = NULL;
546
547	spin_unlock(&oxu->mem_lock);
548
549	return;
550}
551
552static inline void ehci_qtd_init(struct ehci_qtd *qtd, dma_addr_t dma)
553{
554	memset(qtd, 0, sizeof *qtd);
555	qtd->qtd_dma = dma;
556	qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
557	qtd->hw_next = EHCI_LIST_END;
558	qtd->hw_alt_next = EHCI_LIST_END;
559	INIT_LIST_HEAD(&qtd->qtd_list);
560}
561
562static inline void oxu_qtd_free(struct oxu_hcd *oxu, struct ehci_qtd *qtd)
563{
564	int index;
565
566	if (qtd->buffer)
567		oxu_buf_free(oxu, qtd);
568
569	spin_lock(&oxu->mem_lock);
570
571	index = qtd - &oxu->mem->qtd_pool[0];
572	oxu->qtd_used[index] = 0;
573
574	spin_unlock(&oxu->mem_lock);
575
576	return;
577}
578
579static struct ehci_qtd *ehci_qtd_alloc(struct oxu_hcd *oxu)
580{
581	int i;
582	struct ehci_qtd *qtd = NULL;
583
584	spin_lock(&oxu->mem_lock);
585
586	for (i = 0; i < QTD_NUM; i++)
587		if (!oxu->qtd_used[i])
588			break;
589
590	if (i < QTD_NUM) {
591		qtd = (struct ehci_qtd *) &oxu->mem->qtd_pool[i];
592		memset(qtd, 0, sizeof *qtd);
593
594		qtd->hw_token = cpu_to_le32(QTD_STS_HALT);
595		qtd->hw_next = EHCI_LIST_END;
596		qtd->hw_alt_next = EHCI_LIST_END;
597		INIT_LIST_HEAD(&qtd->qtd_list);
598
599		qtd->qtd_dma = virt_to_phys(qtd);
600
601		oxu->qtd_used[i] = 1;
602	}
603
604	spin_unlock(&oxu->mem_lock);
605
606	return qtd;
607}
608
609static void oxu_qh_free(struct oxu_hcd *oxu, struct ehci_qh *qh)
610{
611	int index;
612
613	spin_lock(&oxu->mem_lock);
614
615	index = qh - &oxu->mem->qh_pool[0];
616	oxu->qh_used[index] = 0;
617
618	spin_unlock(&oxu->mem_lock);
619
620	return;
621}
622
623static void qh_destroy(struct kref *kref)
624{
625	struct ehci_qh *qh = container_of(kref, struct ehci_qh, kref);
626	struct oxu_hcd *oxu = qh->oxu;
627
628	/* clean qtds first, and know this is not linked */
629	if (!list_empty(&qh->qtd_list) || qh->qh_next.ptr) {
630		oxu_dbg(oxu, "unused qh not empty!\n");
631		BUG();
632	}
633	if (qh->dummy)
634		oxu_qtd_free(oxu, qh->dummy);
635	oxu_qh_free(oxu, qh);
636}
637
638static struct ehci_qh *oxu_qh_alloc(struct oxu_hcd *oxu)
639{
640	int i;
641	struct ehci_qh *qh = NULL;
642
643	spin_lock(&oxu->mem_lock);
644
645	for (i = 0; i < QHEAD_NUM; i++)
646		if (!oxu->qh_used[i])
647			break;
648
649	if (i < QHEAD_NUM) {
650		qh = (struct ehci_qh *) &oxu->mem->qh_pool[i];
651		memset(qh, 0, sizeof *qh);
652
653		kref_init(&qh->kref);
654		qh->oxu = oxu;
655		qh->qh_dma = virt_to_phys(qh);
656		INIT_LIST_HEAD(&qh->qtd_list);
657
658		/* dummy td enables safe urb queuing */
659		qh->dummy = ehci_qtd_alloc(oxu);
660		if (qh->dummy == NULL) {
661			oxu_dbg(oxu, "no dummy td\n");
662			oxu->qh_used[i] = 0;
663			qh = NULL;
664			goto unlock;
665		}
666
667		oxu->qh_used[i] = 1;
668	}
669unlock:
670	spin_unlock(&oxu->mem_lock);
671
672	return qh;
673}
674
675/* to share a qh (cpu threads, or hc) */
676static inline struct ehci_qh *qh_get(struct ehci_qh *qh)
677{
678	kref_get(&qh->kref);
679	return qh;
680}
681
682static inline void qh_put(struct ehci_qh *qh)
683{
684	kref_put(&qh->kref, qh_destroy);
685}
686
687static void oxu_murb_free(struct oxu_hcd *oxu, struct oxu_murb *murb)
688{
689	int index;
690
691	spin_lock(&oxu->mem_lock);
692
693	index = murb - &oxu->murb_pool[0];
694	oxu->murb_used[index] = 0;
695
696	spin_unlock(&oxu->mem_lock);
697
698	return;
699}
700
701static struct oxu_murb *oxu_murb_alloc(struct oxu_hcd *oxu)
702
703{
704	int i;
705	struct oxu_murb *murb = NULL;
706
707	spin_lock(&oxu->mem_lock);
708
709	for (i = 0; i < MURB_NUM; i++)
710		if (!oxu->murb_used[i])
711			break;
712
713	if (i < MURB_NUM) {
714		murb = &(oxu->murb_pool)[i];
715
716		oxu->murb_used[i] = 1;
717	}
718
719	spin_unlock(&oxu->mem_lock);
720
721	return murb;
722}
723
724/* The queue heads and transfer descriptors are managed from pools tied
725 * to each of the "per device" structures.
726 * This is the initialisation and cleanup code.
727 */
728static void ehci_mem_cleanup(struct oxu_hcd *oxu)
729{
730	kfree(oxu->murb_pool);
731	oxu->murb_pool = NULL;
732
733	if (oxu->async)
734		qh_put(oxu->async);
735	oxu->async = NULL;
736
737	del_timer(&oxu->urb_timer);
738
739	oxu->periodic = NULL;
740
741	/* shadow periodic table */
742	kfree(oxu->pshadow);
743	oxu->pshadow = NULL;
744}
745
746/* Remember to add cleanup code (above) if you add anything here.
747 */
748static int ehci_mem_init(struct oxu_hcd *oxu, gfp_t flags)
749{
750	int i;
751
752	for (i = 0; i < oxu->periodic_size; i++)
753		oxu->mem->frame_list[i] = EHCI_LIST_END;
754	for (i = 0; i < QHEAD_NUM; i++)
755		oxu->qh_used[i] = 0;
756	for (i = 0; i < QTD_NUM; i++)
757		oxu->qtd_used[i] = 0;
758
759	oxu->murb_pool = kcalloc(MURB_NUM, sizeof(struct oxu_murb), flags);
760	if (!oxu->murb_pool)
761		goto fail;
762
763	for (i = 0; i < MURB_NUM; i++)
764		oxu->murb_used[i] = 0;
765
766	oxu->async = oxu_qh_alloc(oxu);
767	if (!oxu->async)
768		goto fail;
769
770	oxu->periodic = (__le32 *) &oxu->mem->frame_list;
771	oxu->periodic_dma = virt_to_phys(oxu->periodic);
772
773	for (i = 0; i < oxu->periodic_size; i++)
774		oxu->periodic[i] = EHCI_LIST_END;
775
776	/* software shadow of hardware table */
777	oxu->pshadow = kcalloc(oxu->periodic_size, sizeof(void *), flags);
778	if (oxu->pshadow != NULL)
779		return 0;
780
781fail:
782	oxu_dbg(oxu, "couldn't init memory\n");
783	ehci_mem_cleanup(oxu);
784	return -ENOMEM;
785}
786
787/* Fill a qtd, returning how much of the buffer we were able to queue up.
788 */
789static int qtd_fill(struct ehci_qtd *qtd, dma_addr_t buf, size_t len,
790				int token, int maxpacket)
791{
792	int i, count;
793	u64 addr = buf;
794
795	/* one buffer entry per 4K ... first might be short or unaligned */
796	qtd->hw_buf[0] = cpu_to_le32((u32)addr);
797	qtd->hw_buf_hi[0] = cpu_to_le32((u32)(addr >> 32));
798	count = 0x1000 - (buf & 0x0fff);	/* rest of that page */
799	if (likely(len < count))		/* ... iff needed */
800		count = len;
801	else {
802		buf +=  0x1000;
803		buf &= ~0x0fff;
804
805		/* per-qtd limit: from 16K to 20K (best alignment) */
806		for (i = 1; count < len && i < 5; i++) {
807			addr = buf;
808			qtd->hw_buf[i] = cpu_to_le32((u32)addr);
809			qtd->hw_buf_hi[i] = cpu_to_le32((u32)(addr >> 32));
810			buf += 0x1000;
811			if ((count + 0x1000) < len)
812				count += 0x1000;
813			else
814				count = len;
815		}
816
817		/* short packets may only terminate transfers */
818		if (count != len)
819			count -= (count % maxpacket);
820	}
821	qtd->hw_token = cpu_to_le32((count << 16) | token);
822	qtd->length = count;
823
824	return count;
825}
826
827static inline void qh_update(struct oxu_hcd *oxu,
828				struct ehci_qh *qh, struct ehci_qtd *qtd)
829{
830	/* writes to an active overlay are unsafe */
831	BUG_ON(qh->qh_state != QH_STATE_IDLE);
832
833	qh->hw_qtd_next = QTD_NEXT(qtd->qtd_dma);
834	qh->hw_alt_next = EHCI_LIST_END;
835
836	/* Except for control endpoints, we make hardware maintain data
837	 * toggle (like OHCI) ... here (re)initialize the toggle in the QH,
838	 * and set the pseudo-toggle in udev. Only usb_clear_halt() will
839	 * ever clear it.
840	 */
841	if (!(qh->hw_info1 & cpu_to_le32(1 << 14))) {
842		unsigned	is_out, epnum;
843
844		is_out = !(qtd->hw_token & cpu_to_le32(1 << 8));
845		epnum = (le32_to_cpup(&qh->hw_info1) >> 8) & 0x0f;
846		if (unlikely(!usb_gettoggle(qh->dev, epnum, is_out))) {
847			qh->hw_token &= ~cpu_to_le32(QTD_TOGGLE);
848			usb_settoggle(qh->dev, epnum, is_out, 1);
849		}
850	}
851
852	/* HC must see latest qtd and qh data before we clear ACTIVE+HALT */
853	wmb();
854	qh->hw_token &= cpu_to_le32(QTD_TOGGLE | QTD_STS_PING);
855}
856
857/* If it weren't for a common silicon quirk (writing the dummy into the qh
858 * overlay, so qh->hw_token wrongly becomes inactive/halted), only fault
859 * recovery (including urb dequeue) would need software changes to a QH...
860 */
861static void qh_refresh(struct oxu_hcd *oxu, struct ehci_qh *qh)
862{
863	struct ehci_qtd *qtd;
864
865	if (list_empty(&qh->qtd_list))
866		qtd = qh->dummy;
867	else {
868		qtd = list_entry(qh->qtd_list.next,
869				struct ehci_qtd, qtd_list);
870		/* first qtd may already be partially processed */
871		if (cpu_to_le32(qtd->qtd_dma) == qh->hw_current)
872			qtd = NULL;
873	}
874
875	if (qtd)
876		qh_update(oxu, qh, qtd);
877}
878
879static void qtd_copy_status(struct oxu_hcd *oxu, struct urb *urb,
880				size_t length, u32 token)
881{
882	/* count IN/OUT bytes, not SETUP (even short packets) */
883	if (likely(QTD_PID(token) != 2))
884		urb->actual_length += length - QTD_LENGTH(token);
885
886	/* don't modify error codes */
887	if (unlikely(urb->status != -EINPROGRESS))
888		return;
889
890	/* force cleanup after short read; not always an error */
891	if (unlikely(IS_SHORT_READ(token)))
892		urb->status = -EREMOTEIO;
893
894	/* serious "can't proceed" faults reported by the hardware */
895	if (token & QTD_STS_HALT) {
896		if (token & QTD_STS_BABBLE) {
897			/* FIXME "must" disable babbling device's port too */
898			urb->status = -EOVERFLOW;
899		} else if (token & QTD_STS_MMF) {
900			/* fs/ls interrupt xfer missed the complete-split */
901			urb->status = -EPROTO;
902		} else if (token & QTD_STS_DBE) {
903			urb->status = (QTD_PID(token) == 1) /* IN ? */
904				? -ENOSR  /* hc couldn't read data */
905				: -ECOMM; /* hc couldn't write data */
906		} else if (token & QTD_STS_XACT) {
907			/* timeout, bad crc, wrong PID, etc; retried */
908			if (QTD_CERR(token))
909				urb->status = -EPIPE;
910			else {
911				oxu_dbg(oxu, "devpath %s ep%d%s 3strikes\n",
912					urb->dev->devpath,
913					usb_pipeendpoint(urb->pipe),
914					usb_pipein(urb->pipe) ? "in" : "out");
915				urb->status = -EPROTO;
916			}
917		/* CERR nonzero + no errors + halt --> stall */
918		} else if (QTD_CERR(token))
919			urb->status = -EPIPE;
920		else	/* unknown */
921			urb->status = -EPROTO;
922
923		oxu_vdbg(oxu, "dev%d ep%d%s qtd token %08x --> status %d\n",
924			usb_pipedevice(urb->pipe),
925			usb_pipeendpoint(urb->pipe),
926			usb_pipein(urb->pipe) ? "in" : "out",
927			token, urb->status);
928	}
929}
930
931static void ehci_urb_done(struct oxu_hcd *oxu, struct urb *urb)
932__releases(oxu->lock)
933__acquires(oxu->lock)
934{
935	if (likely(urb->hcpriv != NULL)) {
936		struct ehci_qh	*qh = (struct ehci_qh *) urb->hcpriv;
937
938		/* S-mask in a QH means it's an interrupt urb */
939		if ((qh->hw_info2 & cpu_to_le32(QH_SMASK)) != 0) {
940
941			/* ... update hc-wide periodic stats (for usbfs) */
942			oxu_to_hcd(oxu)->self.bandwidth_int_reqs--;
943		}
944		qh_put(qh);
945	}
946
947	urb->hcpriv = NULL;
948	switch (urb->status) {
949	case -EINPROGRESS:		/* success */
950		urb->status = 0;
951	default:			/* fault */
952		break;
953	case -EREMOTEIO:		/* fault or normal */
954		if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
955			urb->status = 0;
956		break;
957	case -ECONNRESET:		/* canceled */
958	case -ENOENT:
959		break;
960	}
961
962#ifdef OXU_URB_TRACE
963	oxu_dbg(oxu, "%s %s urb %p ep%d%s status %d len %d/%d\n",
964		__func__, urb->dev->devpath, urb,
965		usb_pipeendpoint(urb->pipe),
966		usb_pipein(urb->pipe) ? "in" : "out",
967		urb->status,
968		urb->actual_length, urb->transfer_buffer_length);
969#endif
970
971	/* complete() can reenter this HCD */
972	spin_unlock(&oxu->lock);
973	usb_hcd_giveback_urb(oxu_to_hcd(oxu), urb, urb->status);
974	spin_lock(&oxu->lock);
975}
976
977static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
978static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh);
979
980static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
981static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh);
982
983#define HALT_BIT cpu_to_le32(QTD_STS_HALT)
984
985/* Process and free completed qtds for a qh, returning URBs to drivers.
986 * Chases up to qh->hw_current.  Returns number of completions called,
987 * indicating how much "real" work we did.
988 */
989static unsigned qh_completions(struct oxu_hcd *oxu, struct ehci_qh *qh)
990{
991	struct ehci_qtd *last = NULL, *end = qh->dummy;
992	struct list_head *entry, *tmp;
993	int stopped;
994	unsigned count = 0;
995	int do_status = 0;
996	u8 state;
997	struct oxu_murb *murb = NULL;
998
999	if (unlikely(list_empty(&qh->qtd_list)))
1000		return count;
1001
1002	/* completions (or tasks on other cpus) must never clobber HALT
1003	 * till we've gone through and cleaned everything up, even when
1004	 * they add urbs to this qh's queue or mark them for unlinking.
1005	 *
1006	 * NOTE:  unlinking expects to be done in queue order.
1007	 */
1008	state = qh->qh_state;
1009	qh->qh_state = QH_STATE_COMPLETING;
1010	stopped = (state == QH_STATE_IDLE);
1011
1012	/* remove de-activated QTDs from front of queue.
1013	 * after faults (including short reads), cleanup this urb
1014	 * then let the queue advance.
1015	 * if queue is stopped, handles unlinks.
1016	 */
1017	list_for_each_safe(entry, tmp, &qh->qtd_list) {
1018		struct ehci_qtd	*qtd;
1019		struct urb *urb;
1020		u32 token = 0;
1021
1022		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1023		urb = qtd->urb;
1024
1025		/* Clean up any state from previous QTD ...*/
1026		if (last) {
1027			if (likely(last->urb != urb)) {
1028				if (last->urb->complete == NULL) {
1029					murb = (struct oxu_murb *) last->urb;
1030					last->urb = murb->main;
1031					if (murb->last) {
1032						ehci_urb_done(oxu, last->urb);
1033						count++;
1034					}
1035					oxu_murb_free(oxu, murb);
1036				} else {
1037					ehci_urb_done(oxu, last->urb);
1038					count++;
1039				}
1040			}
1041			oxu_qtd_free(oxu, last);
1042			last = NULL;
1043		}
1044
1045		/* ignore urbs submitted during completions we reported */
1046		if (qtd == end)
1047			break;
1048
1049		/* hardware copies qtd out of qh overlay */
1050		rmb();
1051		token = le32_to_cpu(qtd->hw_token);
1052
1053		/* always clean up qtds the hc de-activated */
1054		if ((token & QTD_STS_ACTIVE) == 0) {
1055
1056			if ((token & QTD_STS_HALT) != 0) {
1057				stopped = 1;
1058
1059			/* magic dummy for some short reads; qh won't advance.
1060			 * that silicon quirk can kick in with this dummy too.
1061			 */
1062			} else if (IS_SHORT_READ(token) &&
1063					!(qtd->hw_alt_next & EHCI_LIST_END)) {
1064				stopped = 1;
1065				goto halt;
1066			}
1067
1068		/* stop scanning when we reach qtds the hc is using */
1069		} else if (likely(!stopped &&
1070				HC_IS_RUNNING(oxu_to_hcd(oxu)->state))) {
1071			break;
1072
1073		} else {
1074			stopped = 1;
1075
1076			if (unlikely(!HC_IS_RUNNING(oxu_to_hcd(oxu)->state)))
1077				urb->status = -ESHUTDOWN;
1078
1079			/* ignore active urbs unless some previous qtd
1080			 * for the urb faulted (including short read) or
1081			 * its urb was canceled.  we may patch qh or qtds.
1082			 */
1083			if (likely(urb->status == -EINPROGRESS))
1084				continue;
1085
1086			/* issue status after short control reads */
1087			if (unlikely(do_status != 0)
1088					&& QTD_PID(token) == 0 /* OUT */) {
1089				do_status = 0;
1090				continue;
1091			}
1092
1093			/* token in overlay may be most current */
1094			if (state == QH_STATE_IDLE
1095					&& cpu_to_le32(qtd->qtd_dma)
1096						== qh->hw_current)
1097				token = le32_to_cpu(qh->hw_token);
1098
1099			/* force halt for unlinked or blocked qh, so we'll
1100			 * patch the qh later and so that completions can't
1101			 * activate it while we "know" it's stopped.
1102			 */
1103			if ((HALT_BIT & qh->hw_token) == 0) {
1104halt:
1105				qh->hw_token |= HALT_BIT;
1106				wmb();
1107			}
1108		}
1109
1110		/* Remove it from the queue */
1111		qtd_copy_status(oxu, urb->complete ?
1112					urb : ((struct oxu_murb *) urb)->main,
1113				qtd->length, token);
1114		if ((usb_pipein(qtd->urb->pipe)) &&
1115				(NULL != qtd->transfer_buffer))
1116			memcpy(qtd->transfer_buffer, qtd->buffer, qtd->length);
1117		do_status = (urb->status == -EREMOTEIO)
1118				&& usb_pipecontrol(urb->pipe);
1119
1120		if (stopped && qtd->qtd_list.prev != &qh->qtd_list) {
1121			last = list_entry(qtd->qtd_list.prev,
1122					struct ehci_qtd, qtd_list);
1123			last->hw_next = qtd->hw_next;
1124		}
1125		list_del(&qtd->qtd_list);
1126		last = qtd;
1127	}
1128
1129	/* last urb's completion might still need calling */
1130	if (likely(last != NULL)) {
1131		if (last->urb->complete == NULL) {
1132			murb = (struct oxu_murb *) last->urb;
1133			last->urb = murb->main;
1134			if (murb->last) {
1135				ehci_urb_done(oxu, last->urb);
1136				count++;
1137			}
1138			oxu_murb_free(oxu, murb);
1139		} else {
1140			ehci_urb_done(oxu, last->urb);
1141			count++;
1142		}
1143		oxu_qtd_free(oxu, last);
1144	}
1145
1146	/* restore original state; caller must unlink or relink */
1147	qh->qh_state = state;
1148
1149	/* be sure the hardware's done with the qh before refreshing
1150	 * it after fault cleanup, or recovering from silicon wrongly
1151	 * overlaying the dummy qtd (which reduces DMA chatter).
1152	 */
1153	if (stopped != 0 || qh->hw_qtd_next == EHCI_LIST_END) {
1154		switch (state) {
1155		case QH_STATE_IDLE:
1156			qh_refresh(oxu, qh);
1157			break;
1158		case QH_STATE_LINKED:
1159			/* should be rare for periodic transfers,
1160			 * except maybe high bandwidth ...
1161			 */
1162			if ((cpu_to_le32(QH_SMASK)
1163					& qh->hw_info2) != 0) {
1164				intr_deschedule(oxu, qh);
1165				(void) qh_schedule(oxu, qh);
1166			} else
1167				unlink_async(oxu, qh);
1168			break;
1169		/* otherwise, unlink already started */
1170		}
1171	}
1172
1173	return count;
1174}
1175
1176/* High bandwidth multiplier, as encoded in highspeed endpoint descriptors */
1177#define hb_mult(wMaxPacketSize)		(1 + (((wMaxPacketSize) >> 11) & 0x03))
1178/* ... and packet size, for any kind of endpoint descriptor */
1179#define max_packet(wMaxPacketSize)	((wMaxPacketSize) & 0x07ff)
1180
1181/* Reverse of qh_urb_transaction: free a list of TDs.
1182 * used for cleanup after errors, before HC sees an URB's TDs.
1183 */
1184static void qtd_list_free(struct oxu_hcd *oxu,
1185				struct urb *urb, struct list_head *qtd_list)
1186{
1187	struct list_head *entry, *temp;
1188
1189	list_for_each_safe(entry, temp, qtd_list) {
1190		struct ehci_qtd	*qtd;
1191
1192		qtd = list_entry(entry, struct ehci_qtd, qtd_list);
1193		list_del(&qtd->qtd_list);
1194		oxu_qtd_free(oxu, qtd);
1195	}
1196}
1197
1198/* Create a list of filled qtds for this URB; won't link into qh.
1199 */
1200static struct list_head *qh_urb_transaction(struct oxu_hcd *oxu,
1201						struct urb *urb,
1202						struct list_head *head,
1203						gfp_t flags)
1204{
1205	struct ehci_qtd	*qtd, *qtd_prev;
1206	dma_addr_t buf;
1207	int len, maxpacket;
1208	int is_input;
1209	u32 token;
1210	void *transfer_buf = NULL;
1211	int ret;
1212
1213	/*
1214	 * URBs map to sequences of QTDs: one logical transaction
1215	 */
1216	qtd = ehci_qtd_alloc(oxu);
1217	if (unlikely(!qtd))
1218		return NULL;
1219	list_add_tail(&qtd->qtd_list, head);
1220	qtd->urb = urb;
1221
1222	token = QTD_STS_ACTIVE;
1223	token |= (EHCI_TUNE_CERR << 10);
1224	/* for split transactions, SplitXState initialized to zero */
1225
1226	len = urb->transfer_buffer_length;
1227	is_input = usb_pipein(urb->pipe);
1228	if (!urb->transfer_buffer && urb->transfer_buffer_length && is_input)
1229		urb->transfer_buffer = phys_to_virt(urb->transfer_dma);
1230
1231	if (usb_pipecontrol(urb->pipe)) {
1232		/* SETUP pid */
1233		ret = oxu_buf_alloc(oxu, qtd, sizeof(struct usb_ctrlrequest));
1234		if (ret)
1235			goto cleanup;
1236
1237		qtd_fill(qtd, qtd->buffer_dma, sizeof(struct usb_ctrlrequest),
1238				token | (2 /* "setup" */ << 8), 8);
1239		memcpy(qtd->buffer, qtd->urb->setup_packet,
1240				sizeof(struct usb_ctrlrequest));
1241
1242		/* ... and always at least one more pid */
1243		token ^= QTD_TOGGLE;
1244		qtd_prev = qtd;
1245		qtd = ehci_qtd_alloc(oxu);
1246		if (unlikely(!qtd))
1247			goto cleanup;
1248		qtd->urb = urb;
1249		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1250		list_add_tail(&qtd->qtd_list, head);
1251
1252		/* for zero length DATA stages, STATUS is always IN */
1253		if (len == 0)
1254			token |= (1 /* "in" */ << 8);
1255	}
1256
1257	/*
1258	 * Data transfer stage: buffer setup
1259	 */
1260
1261	ret = oxu_buf_alloc(oxu, qtd, len);
1262	if (ret)
1263		goto cleanup;
1264
1265	buf = qtd->buffer_dma;
1266	transfer_buf = urb->transfer_buffer;
1267
1268	if (!is_input)
1269		memcpy(qtd->buffer, qtd->urb->transfer_buffer, len);
1270
1271	if (is_input)
1272		token |= (1 /* "in" */ << 8);
1273	/* else it's already initted to "out" pid (0 << 8) */
1274
1275	maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input));
1276
1277	/*
1278	 * buffer gets wrapped in one or more qtds;
1279	 * last one may be "short" (including zero len)
1280	 * and may serve as a control status ack
1281	 */
1282	for (;;) {
1283		int this_qtd_len;
1284
1285		this_qtd_len = qtd_fill(qtd, buf, len, token, maxpacket);
1286		qtd->transfer_buffer = transfer_buf;
1287		len -= this_qtd_len;
1288		buf += this_qtd_len;
1289		transfer_buf += this_qtd_len;
1290		if (is_input)
1291			qtd->hw_alt_next = oxu->async->hw_alt_next;
1292
1293		/* qh makes control packets use qtd toggle; maybe switch it */
1294		if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0)
1295			token ^= QTD_TOGGLE;
1296
1297		if (likely(len <= 0))
1298			break;
1299
1300		qtd_prev = qtd;
1301		qtd = ehci_qtd_alloc(oxu);
1302		if (unlikely(!qtd))
1303			goto cleanup;
1304		if (likely(len > 0)) {
1305			ret = oxu_buf_alloc(oxu, qtd, len);
1306			if (ret)
1307				goto cleanup;
1308		}
1309		qtd->urb = urb;
1310		qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1311		list_add_tail(&qtd->qtd_list, head);
1312	}
1313
1314	/* unless the bulk/interrupt caller wants a chance to clean
1315	 * up after short reads, hc should advance qh past this urb
1316	 */
1317	if (likely((urb->transfer_flags & URB_SHORT_NOT_OK) == 0
1318				|| usb_pipecontrol(urb->pipe)))
1319		qtd->hw_alt_next = EHCI_LIST_END;
1320
1321	/*
1322	 * control requests may need a terminating data "status" ack;
1323	 * bulk ones may need a terminating short packet (zero length).
1324	 */
1325	if (likely(urb->transfer_buffer_length != 0)) {
1326		int	one_more = 0;
1327
1328		if (usb_pipecontrol(urb->pipe)) {
1329			one_more = 1;
1330			token ^= 0x0100;	/* "in" <--> "out"  */
1331			token |= QTD_TOGGLE;	/* force DATA1 */
1332		} else if (usb_pipebulk(urb->pipe)
1333				&& (urb->transfer_flags & URB_ZERO_PACKET)
1334				&& !(urb->transfer_buffer_length % maxpacket)) {
1335			one_more = 1;
1336		}
1337		if (one_more) {
1338			qtd_prev = qtd;
1339			qtd = ehci_qtd_alloc(oxu);
1340			if (unlikely(!qtd))
1341				goto cleanup;
1342			qtd->urb = urb;
1343			qtd_prev->hw_next = QTD_NEXT(qtd->qtd_dma);
1344			list_add_tail(&qtd->qtd_list, head);
1345
1346			/* never any data in such packets */
1347			qtd_fill(qtd, 0, 0, token, 0);
1348		}
1349	}
1350
1351	/* by default, enable interrupt on urb completion */
1352		qtd->hw_token |= cpu_to_le32(QTD_IOC);
1353	return head;
1354
1355cleanup:
1356	qtd_list_free(oxu, urb, head);
1357	return NULL;
1358}
1359
1360/* Each QH holds a qtd list; a QH is used for everything except iso.
1361 *
1362 * For interrupt urbs, the scheduler must set the microframe scheduling
1363 * mask(s) each time the QH gets scheduled.  For highspeed, that's
1364 * just one microframe in the s-mask.  For split interrupt transactions
1365 * there are additional complications: c-mask, maybe FSTNs.
1366 */
1367static struct ehci_qh *qh_make(struct oxu_hcd *oxu,
1368				struct urb *urb, gfp_t flags)
1369{
1370	struct ehci_qh *qh = oxu_qh_alloc(oxu);
1371	u32 info1 = 0, info2 = 0;
1372	int is_input, type;
1373	int maxp = 0;
1374
1375	if (!qh)
1376		return qh;
1377
1378	/*
1379	 * init endpoint/device data for this QH
1380	 */
1381	info1 |= usb_pipeendpoint(urb->pipe) << 8;
1382	info1 |= usb_pipedevice(urb->pipe) << 0;
1383
1384	is_input = usb_pipein(urb->pipe);
1385	type = usb_pipetype(urb->pipe);
1386	maxp = usb_maxpacket(urb->dev, urb->pipe, !is_input);
1387
1388	/* Compute interrupt scheduling parameters just once, and save.
1389	 * - allowing for high bandwidth, how many nsec/uframe are used?
1390	 * - split transactions need a second CSPLIT uframe; same question
1391	 * - splits also need a schedule gap (for full/low speed I/O)
1392	 * - qh has a polling interval
1393	 *
1394	 * For control/bulk requests, the HC or TT handles these.
1395	 */
1396	if (type == PIPE_INTERRUPT) {
1397		qh->usecs = NS_TO_US(usb_calc_bus_time(USB_SPEED_HIGH,
1398								is_input, 0,
1399				hb_mult(maxp) * max_packet(maxp)));
1400		qh->start = NO_FRAME;
1401
1402		if (urb->dev->speed == USB_SPEED_HIGH) {
1403			qh->c_usecs = 0;
1404			qh->gap_uf = 0;
1405
1406			qh->period = urb->interval >> 3;
1407			if (qh->period == 0 && urb->interval != 1) {
1408				/* NOTE interval 2 or 4 uframes could work.
1409				 * But interval 1 scheduling is simpler, and
1410				 * includes high bandwidth.
1411				 */
1412				dbg("intr period %d uframes, NYET!",
1413						urb->interval);
1414				goto done;
1415			}
1416		} else {
1417			struct usb_tt	*tt = urb->dev->tt;
1418			int		think_time;
1419
1420			/* gap is f(FS/LS transfer times) */
1421			qh->gap_uf = 1 + usb_calc_bus_time(urb->dev->speed,
1422					is_input, 0, maxp) / (125 * 1000);
1423
1424			/* FIXME this just approximates SPLIT/CSPLIT times */
1425			if (is_input) {		/* SPLIT, gap, CSPLIT+DATA */
1426				qh->c_usecs = qh->usecs + HS_USECS(0);
1427				qh->usecs = HS_USECS(1);
1428			} else {		/* SPLIT+DATA, gap, CSPLIT */
1429				qh->usecs += HS_USECS(1);
1430				qh->c_usecs = HS_USECS(0);
1431			}
1432
1433			think_time = tt ? tt->think_time : 0;
1434			qh->tt_usecs = NS_TO_US(think_time +
1435					usb_calc_bus_time(urb->dev->speed,
1436					is_input, 0, max_packet(maxp)));
1437			qh->period = urb->interval;
1438		}
1439	}
1440
1441	/* support for tt scheduling, and access to toggles */
1442	qh->dev = urb->dev;
1443
1444	/* using TT? */
1445	switch (urb->dev->speed) {
1446	case USB_SPEED_LOW:
1447		info1 |= (1 << 12);	/* EPS "low" */
1448		/* FALL THROUGH */
1449
1450	case USB_SPEED_FULL:
1451		/* EPS 0 means "full" */
1452		if (type != PIPE_INTERRUPT)
1453			info1 |= (EHCI_TUNE_RL_TT << 28);
1454		if (type == PIPE_CONTROL) {
1455			info1 |= (1 << 27);	/* for TT */
1456			info1 |= 1 << 14;	/* toggle from qtd */
1457		}
1458		info1 |= maxp << 16;
1459
1460		info2 |= (EHCI_TUNE_MULT_TT << 30);
1461		info2 |= urb->dev->ttport << 23;
1462
1463		/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets c-mask } */
1464
1465		break;
1466
1467	case USB_SPEED_HIGH:		/* no TT involved */
1468		info1 |= (2 << 12);	/* EPS "high" */
1469		if (type == PIPE_CONTROL) {
1470			info1 |= (EHCI_TUNE_RL_HS << 28);
1471			info1 |= 64 << 16;	/* usb2 fixed maxpacket */
1472			info1 |= 1 << 14;	/* toggle from qtd */
1473			info2 |= (EHCI_TUNE_MULT_HS << 30);
1474		} else if (type == PIPE_BULK) {
1475			info1 |= (EHCI_TUNE_RL_HS << 28);
1476			info1 |= 512 << 16;	/* usb2 fixed maxpacket */
1477			info2 |= (EHCI_TUNE_MULT_HS << 30);
1478		} else {		/* PIPE_INTERRUPT */
1479			info1 |= max_packet(maxp) << 16;
1480			info2 |= hb_mult(maxp) << 30;
1481		}
1482		break;
1483	default:
1484		dbg("bogus dev %p speed %d", urb->dev, urb->dev->speed);
1485done:
1486		qh_put(qh);
1487		return NULL;
1488	}
1489
1490	/* NOTE:  if (PIPE_INTERRUPT) { scheduler sets s-mask } */
1491
1492	/* init as live, toggle clear, advance to dummy */
1493	qh->qh_state = QH_STATE_IDLE;
1494	qh->hw_info1 = cpu_to_le32(info1);
1495	qh->hw_info2 = cpu_to_le32(info2);
1496	usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1);
1497	qh_refresh(oxu, qh);
1498	return qh;
1499}
1500
1501/* Move qh (and its qtds) onto async queue; maybe enable queue.
1502 */
1503static void qh_link_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1504{
1505	__le32 dma = QH_NEXT(qh->qh_dma);
1506	struct ehci_qh *head;
1507
1508	/* (re)start the async schedule? */
1509	head = oxu->async;
1510	timer_action_done(oxu, TIMER_ASYNC_OFF);
1511	if (!head->qh_next.qh) {
1512		u32	cmd = readl(&oxu->regs->command);
1513
1514		if (!(cmd & CMD_ASE)) {
1515			/* in case a clear of CMD_ASE didn't take yet */
1516			(void)handshake(oxu, &oxu->regs->status,
1517					STS_ASS, 0, 150);
1518			cmd |= CMD_ASE | CMD_RUN;
1519			writel(cmd, &oxu->regs->command);
1520			oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1521			/* posted write need not be known to HC yet ... */
1522		}
1523	}
1524
1525	/* clear halt and/or toggle; and maybe recover from silicon quirk */
1526	if (qh->qh_state == QH_STATE_IDLE)
1527		qh_refresh(oxu, qh);
1528
1529	/* splice right after start */
1530	qh->qh_next = head->qh_next;
1531	qh->hw_next = head->hw_next;
1532	wmb();
1533
1534	head->qh_next.qh = qh;
1535	head->hw_next = dma;
1536
1537	qh->qh_state = QH_STATE_LINKED;
1538	/* qtd completions reported later by interrupt */
1539}
1540
1541#define	QH_ADDR_MASK	cpu_to_le32(0x7f)
1542
1543/*
1544 * For control/bulk/interrupt, return QH with these TDs appended.
1545 * Allocates and initializes the QH if necessary.
1546 * Returns null if it can't allocate a QH it needs to.
1547 * If the QH has TDs (urbs) already, that's great.
1548 */
1549static struct ehci_qh *qh_append_tds(struct oxu_hcd *oxu,
1550				struct urb *urb, struct list_head *qtd_list,
1551				int epnum, void	**ptr)
1552{
1553	struct ehci_qh *qh = NULL;
1554
1555	qh = (struct ehci_qh *) *ptr;
1556	if (unlikely(qh == NULL)) {
1557		/* can't sleep here, we have oxu->lock... */
1558		qh = qh_make(oxu, urb, GFP_ATOMIC);
1559		*ptr = qh;
1560	}
1561	if (likely(qh != NULL)) {
1562		struct ehci_qtd	*qtd;
1563
1564		if (unlikely(list_empty(qtd_list)))
1565			qtd = NULL;
1566		else
1567			qtd = list_entry(qtd_list->next, struct ehci_qtd,
1568					qtd_list);
1569
1570		/* control qh may need patching ... */
1571		if (unlikely(epnum == 0)) {
1572
1573			/* usb_reset_device() briefly reverts to address 0 */
1574			if (usb_pipedevice(urb->pipe) == 0)
1575				qh->hw_info1 &= ~QH_ADDR_MASK;
1576		}
1577
1578		/* just one way to queue requests: swap with the dummy qtd.
1579		 * only hc or qh_refresh() ever modify the overlay.
1580		 */
1581		if (likely(qtd != NULL)) {
1582			struct ehci_qtd	*dummy;
1583			dma_addr_t dma;
1584			__le32 token;
1585
1586			/* to avoid racing the HC, use the dummy td instead of
1587			 * the first td of our list (becomes new dummy).  both
1588			 * tds stay deactivated until we're done, when the
1589			 * HC is allowed to fetch the old dummy (4.10.2).
1590			 */
1591			token = qtd->hw_token;
1592			qtd->hw_token = HALT_BIT;
1593			wmb();
1594			dummy = qh->dummy;
1595
1596			dma = dummy->qtd_dma;
1597			*dummy = *qtd;
1598			dummy->qtd_dma = dma;
1599
1600			list_del(&qtd->qtd_list);
1601			list_add(&dummy->qtd_list, qtd_list);
1602			list_splice(qtd_list, qh->qtd_list.prev);
1603
1604			ehci_qtd_init(qtd, qtd->qtd_dma);
1605			qh->dummy = qtd;
1606
1607			/* hc must see the new dummy at list end */
1608			dma = qtd->qtd_dma;
1609			qtd = list_entry(qh->qtd_list.prev,
1610					struct ehci_qtd, qtd_list);
1611			qtd->hw_next = QTD_NEXT(dma);
1612
1613			/* let the hc process these next qtds */
1614			dummy->hw_token = (token & ~(0x80));
1615			wmb();
1616			dummy->hw_token = token;
1617
1618			urb->hcpriv = qh_get(qh);
1619		}
1620	}
1621	return qh;
1622}
1623
1624static int submit_async(struct oxu_hcd	*oxu, struct urb *urb,
1625			struct list_head *qtd_list, gfp_t mem_flags)
1626{
1627	struct ehci_qtd	*qtd;
1628	int epnum;
1629	unsigned long flags;
1630	struct ehci_qh *qh = NULL;
1631	int rc = 0;
1632
1633	qtd = list_entry(qtd_list->next, struct ehci_qtd, qtd_list);
1634	epnum = urb->ep->desc.bEndpointAddress;
1635
1636#ifdef OXU_URB_TRACE
1637	oxu_dbg(oxu, "%s %s urb %p ep%d%s len %d, qtd %p [qh %p]\n",
1638		__func__, urb->dev->devpath, urb,
1639		epnum & 0x0f, (epnum & USB_DIR_IN) ? "in" : "out",
1640		urb->transfer_buffer_length,
1641		qtd, urb->ep->hcpriv);
1642#endif
1643
1644	spin_lock_irqsave(&oxu->lock, flags);
1645	if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
1646			       &oxu_to_hcd(oxu)->flags))) {
1647		rc = -ESHUTDOWN;
1648		goto done;
1649	}
1650
1651	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
1652	if (unlikely(qh == NULL)) {
1653		rc = -ENOMEM;
1654		goto done;
1655	}
1656
1657	/* Control/bulk operations through TTs don't need scheduling,
1658	 * the HC and TT handle it when the TT has a buffer ready.
1659	 */
1660	if (likely(qh->qh_state == QH_STATE_IDLE))
1661		qh_link_async(oxu, qh_get(qh));
1662done:
1663	spin_unlock_irqrestore(&oxu->lock, flags);
1664	if (unlikely(qh == NULL))
1665		qtd_list_free(oxu, urb, qtd_list);
1666	return rc;
1667}
1668
1669/* The async qh for the qtds being reclaimed are now unlinked from the HC */
1670
1671static void end_unlink_async(struct oxu_hcd *oxu)
1672{
1673	struct ehci_qh *qh = oxu->reclaim;
1674	struct ehci_qh *next;
1675
1676	timer_action_done(oxu, TIMER_IAA_WATCHDOG);
1677
1678	qh->qh_state = QH_STATE_IDLE;
1679	qh->qh_next.qh = NULL;
1680	qh_put(qh);			/* refcount from reclaim */
1681
1682	/* other unlink(s) may be pending (in QH_STATE_UNLINK_WAIT) */
1683	next = qh->reclaim;
1684	oxu->reclaim = next;
1685	oxu->reclaim_ready = 0;
1686	qh->reclaim = NULL;
1687
1688	qh_completions(oxu, qh);
1689
1690	if (!list_empty(&qh->qtd_list)
1691			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
1692		qh_link_async(oxu, qh);
1693	else {
1694		qh_put(qh);		/* refcount from async list */
1695
1696		/* it's not free to turn the async schedule on/off; leave it
1697		 * active but idle for a while once it empties.
1698		 */
1699		if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state)
1700				&& oxu->async->qh_next.qh == NULL)
1701			timer_action(oxu, TIMER_ASYNC_OFF);
1702	}
1703
1704	if (next) {
1705		oxu->reclaim = NULL;
1706		start_unlink_async(oxu, next);
1707	}
1708}
1709
1710/* makes sure the async qh will become idle */
1711/* caller must own oxu->lock */
1712
1713static void start_unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
1714{
1715	int cmd = readl(&oxu->regs->command);
1716	struct ehci_qh *prev;
1717
1718#ifdef DEBUG
1719	assert_spin_locked(&oxu->lock);
1720	if (oxu->reclaim || (qh->qh_state != QH_STATE_LINKED
1721				&& qh->qh_state != QH_STATE_UNLINK_WAIT))
1722		BUG();
1723#endif
1724
1725	/* stop async schedule right now? */
1726	if (unlikely(qh == oxu->async)) {
1727		/* can't get here without STS_ASS set */
1728		if (oxu_to_hcd(oxu)->state != HC_STATE_HALT
1729				&& !oxu->reclaim) {
1730			/* ... and CMD_IAAD clear */
1731			writel(cmd & ~CMD_ASE, &oxu->regs->command);
1732			wmb();
1733			/* handshake later, if we need to */
1734			timer_action_done(oxu, TIMER_ASYNC_OFF);
1735		}
1736		return;
1737	}
1738
1739	qh->qh_state = QH_STATE_UNLINK;
1740	oxu->reclaim = qh = qh_get(qh);
1741
1742	prev = oxu->async;
1743	while (prev->qh_next.qh != qh)
1744		prev = prev->qh_next.qh;
1745
1746	prev->hw_next = qh->hw_next;
1747	prev->qh_next = qh->qh_next;
1748	wmb();
1749
1750	if (unlikely(oxu_to_hcd(oxu)->state == HC_STATE_HALT)) {
1751		/* if (unlikely(qh->reclaim != 0))
1752		 *	this will recurse, probably not much
1753		 */
1754		end_unlink_async(oxu);
1755		return;
1756	}
1757
1758	oxu->reclaim_ready = 0;
1759	cmd |= CMD_IAAD;
1760	writel(cmd, &oxu->regs->command);
1761	(void) readl(&oxu->regs->command);
1762	timer_action(oxu, TIMER_IAA_WATCHDOG);
1763}
1764
1765static void scan_async(struct oxu_hcd *oxu)
1766{
1767	struct ehci_qh *qh;
1768	enum ehci_timer_action action = TIMER_IO_WATCHDOG;
1769
1770	if (!++(oxu->stamp))
1771		oxu->stamp++;
1772	timer_action_done(oxu, TIMER_ASYNC_SHRINK);
1773rescan:
1774	qh = oxu->async->qh_next.qh;
1775	if (likely(qh != NULL)) {
1776		do {
1777			/* clean any finished work for this qh */
1778			if (!list_empty(&qh->qtd_list)
1779					&& qh->stamp != oxu->stamp) {
1780				int temp;
1781
1782				/* unlinks could happen here; completion
1783				 * reporting drops the lock.  rescan using
1784				 * the latest schedule, but don't rescan
1785				 * qhs we already finished (no looping).
1786				 */
1787				qh = qh_get(qh);
1788				qh->stamp = oxu->stamp;
1789				temp = qh_completions(oxu, qh);
1790				qh_put(qh);
1791				if (temp != 0)
1792					goto rescan;
1793			}
1794
1795			/* unlink idle entries, reducing HC PCI usage as well
1796			 * as HCD schedule-scanning costs.  delay for any qh
1797			 * we just scanned, there's a not-unusual case that it
1798			 * doesn't stay idle for long.
1799			 * (plus, avoids some kind of re-activation race.)
1800			 */
1801			if (list_empty(&qh->qtd_list)) {
1802				if (qh->stamp == oxu->stamp)
1803					action = TIMER_ASYNC_SHRINK;
1804				else if (!oxu->reclaim
1805					    && qh->qh_state == QH_STATE_LINKED)
1806					start_unlink_async(oxu, qh);
1807			}
1808
1809			qh = qh->qh_next.qh;
1810		} while (qh);
1811	}
1812	if (action == TIMER_ASYNC_SHRINK)
1813		timer_action(oxu, TIMER_ASYNC_SHRINK);
1814}
1815
1816/*
1817 * periodic_next_shadow - return "next" pointer on shadow list
1818 * @periodic: host pointer to qh/itd/sitd
1819 * @tag: hardware tag for type of this record
1820 */
1821static union ehci_shadow *periodic_next_shadow(union ehci_shadow *periodic,
1822						__le32 tag)
1823{
1824	switch (tag) {
1825	default:
1826	case Q_TYPE_QH:
1827		return &periodic->qh->qh_next;
1828	}
1829}
1830
1831/* caller must hold oxu->lock */
1832static void periodic_unlink(struct oxu_hcd *oxu, unsigned frame, void *ptr)
1833{
1834	union ehci_shadow *prev_p = &oxu->pshadow[frame];
1835	__le32 *hw_p = &oxu->periodic[frame];
1836	union ehci_shadow here = *prev_p;
1837
1838	/* find predecessor of "ptr"; hw and shadow lists are in sync */
1839	while (here.ptr && here.ptr != ptr) {
1840		prev_p = periodic_next_shadow(prev_p, Q_NEXT_TYPE(*hw_p));
1841		hw_p = here.hw_next;
1842		here = *prev_p;
1843	}
1844	/* an interrupt entry (at list end) could have been shared */
1845	if (!here.ptr)
1846		return;
1847
1848	/* update shadow and hardware lists ... the old "next" pointers
1849	 * from ptr may still be in use, the caller updates them.
1850	 */
1851	*prev_p = *periodic_next_shadow(&here, Q_NEXT_TYPE(*hw_p));
1852	*hw_p = *here.hw_next;
1853}
1854
1855/* how many of the uframe's 125 usecs are allocated? */
1856static unsigned short periodic_usecs(struct oxu_hcd *oxu,
1857					unsigned frame, unsigned uframe)
1858{
1859	__le32 *hw_p = &oxu->periodic[frame];
1860	union ehci_shadow *q = &oxu->pshadow[frame];
1861	unsigned usecs = 0;
1862
1863	while (q->ptr) {
1864		switch (Q_NEXT_TYPE(*hw_p)) {
1865		case Q_TYPE_QH:
1866		default:
1867			/* is it in the S-mask? */
1868			if (q->qh->hw_info2 & cpu_to_le32(1 << uframe))
1869				usecs += q->qh->usecs;
1870			/* ... or C-mask? */
1871			if (q->qh->hw_info2 & cpu_to_le32(1 << (8 + uframe)))
1872				usecs += q->qh->c_usecs;
1873			hw_p = &q->qh->hw_next;
1874			q = &q->qh->qh_next;
1875			break;
1876		}
1877	}
1878#ifdef DEBUG
1879	if (usecs > 100)
1880		oxu_err(oxu, "uframe %d sched overrun: %d usecs\n",
1881						frame * 8 + uframe, usecs);
1882#endif
1883	return usecs;
1884}
1885
1886static int enable_periodic(struct oxu_hcd *oxu)
1887{
1888	u32 cmd;
1889	int status;
1890
1891	/* did clearing PSE did take effect yet?
1892	 * takes effect only at frame boundaries...
1893	 */
1894	status = handshake(oxu, &oxu->regs->status, STS_PSS, 0, 9 * 125);
1895	if (status != 0) {
1896		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1897		return status;
1898	}
1899
1900	cmd = readl(&oxu->regs->command) | CMD_PSE;
1901	writel(cmd, &oxu->regs->command);
1902	/* posted write ... PSS happens later */
1903	oxu_to_hcd(oxu)->state = HC_STATE_RUNNING;
1904
1905	/* make sure ehci_work scans these */
1906	oxu->next_uframe = readl(&oxu->regs->frame_index)
1907		% (oxu->periodic_size << 3);
1908	return 0;
1909}
1910
1911static int disable_periodic(struct oxu_hcd *oxu)
1912{
1913	u32 cmd;
1914	int status;
1915
1916	/* did setting PSE not take effect yet?
1917	 * takes effect only at frame boundaries...
1918	 */
1919	status = handshake(oxu, &oxu->regs->status, STS_PSS, STS_PSS, 9 * 125);
1920	if (status != 0) {
1921		oxu_to_hcd(oxu)->state = HC_STATE_HALT;
1922		return status;
1923	}
1924
1925	cmd = readl(&oxu->regs->command) & ~CMD_PSE;
1926	writel(cmd, &oxu->regs->command);
1927	/* posted write ... */
1928
1929	oxu->next_uframe = -1;
1930	return 0;
1931}
1932
1933/* periodic schedule slots have iso tds (normal or split) first, then a
1934 * sparse tree for active interrupt transfers.
1935 *
1936 * this just links in a qh; caller guarantees uframe masks are set right.
1937 * no FSTN support (yet; oxu 0.96+)
1938 */
1939static int qh_link_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
1940{
1941	unsigned i;
1942	unsigned period = qh->period;
1943
1944	dev_dbg(&qh->dev->dev,
1945		"link qh%d-%04x/%p start %d [%d/%d us]\n",
1946		period, le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
1947		qh, qh->start, qh->usecs, qh->c_usecs);
1948
1949	/* high bandwidth, or otherwise every microframe */
1950	if (period == 0)
1951		period = 1;
1952
1953	for (i = qh->start; i < oxu->periodic_size; i += period) {
1954		union ehci_shadow	*prev = &oxu->pshadow[i];
1955		__le32			*hw_p = &oxu->periodic[i];
1956		union ehci_shadow	here = *prev;
1957		__le32			type = 0;
1958
1959		/* skip the iso nodes at list head */
1960		while (here.ptr) {
1961			type = Q_NEXT_TYPE(*hw_p);
1962			if (type == Q_TYPE_QH)
1963				break;
1964			prev = periodic_next_shadow(prev, type);
1965			hw_p = &here.qh->hw_next;
1966			here = *prev;
1967		}
1968
1969		/* sorting each branch by period (slow-->fast)
1970		 * enables sharing interior tree nodes
1971		 */
1972		while (here.ptr && qh != here.qh) {
1973			if (qh->period > here.qh->period)
1974				break;
1975			prev = &here.qh->qh_next;
1976			hw_p = &here.qh->hw_next;
1977			here = *prev;
1978		}
1979		/* link in this qh, unless some earlier pass did that */
1980		if (qh != here.qh) {
1981			qh->qh_next = here;
1982			if (here.qh)
1983				qh->hw_next = *hw_p;
1984			wmb();
1985			prev->qh = qh;
1986			*hw_p = QH_NEXT(qh->qh_dma);
1987		}
1988	}
1989	qh->qh_state = QH_STATE_LINKED;
1990	qh_get(qh);
1991
1992	/* update per-qh bandwidth for usbfs */
1993	oxu_to_hcd(oxu)->self.bandwidth_allocated += qh->period
1994		? ((qh->usecs + qh->c_usecs) / qh->period)
1995		: (qh->usecs * 8);
1996
1997	/* maybe enable periodic schedule processing */
1998	if (!oxu->periodic_sched++)
1999		return enable_periodic(oxu);
2000
2001	return 0;
2002}
2003
2004static void qh_unlink_periodic(struct oxu_hcd *oxu, struct ehci_qh *qh)
2005{
2006	unsigned i;
2007	unsigned period;
2008
2009	/* FIXME:
2010	 *   IF this isn't high speed
2011	 *   and this qh is active in the current uframe
2012	 *   (and overlay token SplitXstate is false?)
2013	 * THEN
2014	 *   qh->hw_info1 |= cpu_to_le32(1 << 7 "ignore");
2015	 */
2016
2017	/* high bandwidth, or otherwise part of every microframe */
2018	period = qh->period;
2019	if (period == 0)
2020		period = 1;
2021
2022	for (i = qh->start; i < oxu->periodic_size; i += period)
2023		periodic_unlink(oxu, i, qh);
2024
2025	/* update per-qh bandwidth for usbfs */
2026	oxu_to_hcd(oxu)->self.bandwidth_allocated -= qh->period
2027		? ((qh->usecs + qh->c_usecs) / qh->period)
2028		: (qh->usecs * 8);
2029
2030	dev_dbg(&qh->dev->dev,
2031		"unlink qh%d-%04x/%p start %d [%d/%d us]\n",
2032		qh->period,
2033		le32_to_cpup(&qh->hw_info2) & (QH_CMASK | QH_SMASK),
2034		qh, qh->start, qh->usecs, qh->c_usecs);
2035
2036	/* qh->qh_next still "live" to HC */
2037	qh->qh_state = QH_STATE_UNLINK;
2038	qh->qh_next.ptr = NULL;
2039	qh_put(qh);
2040
2041	/* maybe turn off periodic schedule */
2042	oxu->periodic_sched--;
2043	if (!oxu->periodic_sched)
2044		(void) disable_periodic(oxu);
2045}
2046
2047static void intr_deschedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2048{
2049	unsigned wait;
2050
2051	qh_unlink_periodic(oxu, qh);
2052
2053	/* simple/paranoid:  always delay, expecting the HC needs to read
2054	 * qh->hw_next or finish a writeback after SPLIT/CSPLIT ... and
2055	 * expect khubd to clean up after any CSPLITs we won't issue.
2056	 * active high speed queues may need bigger delays...
2057	 */
2058	if (list_empty(&qh->qtd_list)
2059		|| (cpu_to_le32(QH_CMASK) & qh->hw_info2) != 0)
2060		wait = 2;
2061	else
2062		wait = 55;	/* worst case: 3 * 1024 */
2063
2064	udelay(wait);
2065	qh->qh_state = QH_STATE_IDLE;
2066	qh->hw_next = EHCI_LIST_END;
2067	wmb();
2068}
2069
2070static int check_period(struct oxu_hcd *oxu,
2071			unsigned frame, unsigned uframe,
2072			unsigned period, unsigned usecs)
2073{
2074	int claimed;
2075
2076	/* complete split running into next frame?
2077	 * given FSTN support, we could sometimes check...
2078	 */
2079	if (uframe >= 8)
2080		return 0;
2081
2082	/*
2083	 * 80% periodic == 100 usec/uframe available
2084	 * convert "usecs we need" to "max already claimed"
2085	 */
2086	usecs = 100 - usecs;
2087
2088	/* we "know" 2 and 4 uframe intervals were rejected; so
2089	 * for period 0, check _every_ microframe in the schedule.
2090	 */
2091	if (unlikely(period == 0)) {
2092		do {
2093			for (uframe = 0; uframe < 7; uframe++) {
2094				claimed = periodic_usecs(oxu, frame, uframe);
2095				if (claimed > usecs)
2096					return 0;
2097			}
2098		} while ((frame += 1) < oxu->periodic_size);
2099
2100	/* just check the specified uframe, at that period */
2101	} else {
2102		do {
2103			claimed = periodic_usecs(oxu, frame, uframe);
2104			if (claimed > usecs)
2105				return 0;
2106		} while ((frame += period) < oxu->periodic_size);
2107	}
2108
2109	return 1;
2110}
2111
2112static int check_intr_schedule(struct oxu_hcd	*oxu,
2113				unsigned frame, unsigned uframe,
2114				const struct ehci_qh *qh, __le32 *c_maskp)
2115{
2116	int retval = -ENOSPC;
2117
2118	if (qh->c_usecs && uframe >= 6)		/* FSTN territory? */
2119		goto done;
2120
2121	if (!check_period(oxu, frame, uframe, qh->period, qh->usecs))
2122		goto done;
2123	if (!qh->c_usecs) {
2124		retval = 0;
2125		*c_maskp = 0;
2126		goto done;
2127	}
2128
2129done:
2130	return retval;
2131}
2132
2133/* "first fit" scheduling policy used the first time through,
2134 * or when the previous schedule slot can't be re-used.
2135 */
2136static int qh_schedule(struct oxu_hcd *oxu, struct ehci_qh *qh)
2137{
2138	int		status;
2139	unsigned	uframe;
2140	__le32		c_mask;
2141	unsigned	frame;		/* 0..(qh->period - 1), or NO_FRAME */
2142
2143	qh_refresh(oxu, qh);
2144	qh->hw_next = EHCI_LIST_END;
2145	frame = qh->start;
2146
2147	/* reuse the previous schedule slots, if we can */
2148	if (frame < qh->period) {
2149		uframe = ffs(le32_to_cpup(&qh->hw_info2) & QH_SMASK);
2150		status = check_intr_schedule(oxu, frame, --uframe,
2151				qh, &c_mask);
2152	} else {
2153		uframe = 0;
2154		c_mask = 0;
2155		status = -ENOSPC;
2156	}
2157
2158	/* else scan the schedule to find a group of slots such that all
2159	 * uframes have enough periodic bandwidth available.
2160	 */
2161	if (status) {
2162		/* "normal" case, uframing flexible except with splits */
2163		if (qh->period) {
2164			frame = qh->period - 1;
2165			do {
2166				for (uframe = 0; uframe < 8; uframe++) {
2167					status = check_intr_schedule(oxu,
2168							frame, uframe, qh,
2169							&c_mask);
2170					if (status == 0)
2171						break;
2172				}
2173			} while (status && frame--);
2174
2175		/* qh->period == 0 means every uframe */
2176		} else {
2177			frame = 0;
2178			status = check_intr_schedule(oxu, 0, 0, qh, &c_mask);
2179		}
2180		if (status)
2181			goto done;
2182		qh->start = frame;
2183
2184		/* reset S-frame and (maybe) C-frame masks */
2185		qh->hw_info2 &= cpu_to_le32(~(QH_CMASK | QH_SMASK));
2186		qh->hw_info2 |= qh->period
2187			? cpu_to_le32(1 << uframe)
2188			: cpu_to_le32(QH_SMASK);
2189		qh->hw_info2 |= c_mask;
2190	} else
2191		oxu_dbg(oxu, "reused qh %p schedule\n", qh);
2192
2193	/* stuff into the periodic schedule */
2194	status = qh_link_periodic(oxu, qh);
2195done:
2196	return status;
2197}
2198
2199static int intr_submit(struct oxu_hcd *oxu, struct urb *urb,
2200			struct list_head *qtd_list, gfp_t mem_flags)
2201{
2202	unsigned epnum;
2203	unsigned long flags;
2204	struct ehci_qh *qh;
2205	int status = 0;
2206	struct list_head	empty;
2207
2208	/* get endpoint and transfer/schedule data */
2209	epnum = urb->ep->desc.bEndpointAddress;
2210
2211	spin_lock_irqsave(&oxu->lock, flags);
2212
2213	if (unlikely(!test_bit(HCD_FLAG_HW_ACCESSIBLE,
2214			       &oxu_to_hcd(oxu)->flags))) {
2215		status = -ESHUTDOWN;
2216		goto done;
2217	}
2218
2219	/* get qh and force any scheduling errors */
2220	INIT_LIST_HEAD(&empty);
2221	qh = qh_append_tds(oxu, urb, &empty, epnum, &urb->ep->hcpriv);
2222	if (qh == NULL) {
2223		status = -ENOMEM;
2224		goto done;
2225	}
2226	if (qh->qh_state == QH_STATE_IDLE) {
2227		status = qh_schedule(oxu, qh);
2228		if (status != 0)
2229			goto done;
2230	}
2231
2232	/* then queue the urb's tds to the qh */
2233	qh = qh_append_tds(oxu, urb, qtd_list, epnum, &urb->ep->hcpriv);
2234	BUG_ON(qh == NULL);
2235
2236	/* ... update usbfs periodic stats */
2237	oxu_to_hcd(oxu)->self.bandwidth_int_reqs++;
2238
2239done:
2240	spin_unlock_irqrestore(&oxu->lock, flags);
2241	if (status)
2242		qtd_list_free(oxu, urb, qtd_list);
2243
2244	return status;
2245}
2246
2247static inline int itd_submit(struct oxu_hcd *oxu, struct urb *urb,
2248						gfp_t mem_flags)
2249{
2250	oxu_dbg(oxu, "iso support is missing!\n");
2251	return -ENOSYS;
2252}
2253
2254static inline int sitd_submit(struct oxu_hcd *oxu, struct urb *urb,
2255						gfp_t mem_flags)
2256{
2257	oxu_dbg(oxu, "split iso support is missing!\n");
2258	return -ENOSYS;
2259}
2260
2261static void scan_periodic(struct oxu_hcd *oxu)
2262{
2263	unsigned frame, clock, now_uframe, mod;
2264	unsigned modified;
2265
2266	mod = oxu->periodic_size << 3;
2267
2268	/*
2269	 * When running, scan from last scan point up to "now"
2270	 * else clean up by scanning everything that's left.
2271	 * Touches as few pages as possible:  cache-friendly.
2272	 */
2273	now_uframe = oxu->next_uframe;
2274	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2275		clock = readl(&oxu->regs->frame_index);
2276	else
2277		clock = now_uframe + mod - 1;
2278	clock %= mod;
2279
2280	for (;;) {
2281		union ehci_shadow	q, *q_p;
2282		__le32			type, *hw_p;
2283		unsigned		uframes;
2284
2285		/* don't scan past the live uframe */
2286		frame = now_uframe >> 3;
2287		if (frame == (clock >> 3))
2288			uframes = now_uframe & 0x07;
2289		else {
2290			/* safe to scan the whole frame at once */
2291			now_uframe |= 0x07;
2292			uframes = 8;
2293		}
2294
2295restart:
2296		/* scan each element in frame's queue for completions */
2297		q_p = &oxu->pshadow[frame];
2298		hw_p = &oxu->periodic[frame];
2299		q.ptr = q_p->ptr;
2300		type = Q_NEXT_TYPE(*hw_p);
2301		modified = 0;
2302
2303		while (q.ptr != NULL) {
2304			union ehci_shadow temp;
2305			int live;
2306
2307			live = HC_IS_RUNNING(oxu_to_hcd(oxu)->state);
2308			switch (type) {
2309			case Q_TYPE_QH:
2310				/* handle any completions */
2311				temp.qh = qh_get(q.qh);
2312				type = Q_NEXT_TYPE(q.qh->hw_next);
2313				q = q.qh->qh_next;
2314				modified = qh_completions(oxu, temp.qh);
2315				if (unlikely(list_empty(&temp.qh->qtd_list)))
2316					intr_deschedule(oxu, temp.qh);
2317				qh_put(temp.qh);
2318				break;
2319			default:
2320				dbg("corrupt type %d frame %d shadow %p",
2321					type, frame, q.ptr);
2322				q.ptr = NULL;
2323			}
2324
2325			/* assume completion callbacks modify the queue */
2326			if (unlikely(modified))
2327				goto restart;
2328		}
2329
2330		/* Stop when we catch up to the HC */
2331
2332		/* FIXME:  this assumes we won't get lapped when
2333		 * latencies climb; that should be rare, but...
2334		 * detect it, and just go all the way around.
2335		 * FLR might help detect this case, so long as latencies
2336		 * don't exceed periodic_size msec (default 1.024 sec).
2337		 */
2338
2339		/* FIXME: likewise assumes HC doesn't halt mid-scan */
2340
2341		if (now_uframe == clock) {
2342			unsigned	now;
2343
2344			if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state))
2345				break;
2346			oxu->next_uframe = now_uframe;
2347			now = readl(&oxu->regs->frame_index) % mod;
2348			if (now_uframe == now)
2349				break;
2350
2351			/* rescan the rest of this frame, then ... */
2352			clock = now;
2353		} else {
2354			now_uframe++;
2355			now_uframe %= mod;
2356		}
2357	}
2358}
2359
2360/* On some systems, leaving remote wakeup enabled prevents system shutdown.
2361 * The firmware seems to think that powering off is a wakeup event!
2362 * This routine turns off remote wakeup and everything else, on all ports.
2363 */
2364static void ehci_turn_off_all_ports(struct oxu_hcd *oxu)
2365{
2366	int port = HCS_N_PORTS(oxu->hcs_params);
2367
2368	while (port--)
2369		writel(PORT_RWC_BITS, &oxu->regs->port_status[port]);
2370}
2371
2372static void ehci_port_power(struct oxu_hcd *oxu, int is_on)
2373{
2374	unsigned port;
2375
2376	if (!HCS_PPC(oxu->hcs_params))
2377		return;
2378
2379	oxu_dbg(oxu, "...power%s ports...\n", is_on ? "up" : "down");
2380	for (port = HCS_N_PORTS(oxu->hcs_params); port > 0; )
2381		(void) oxu_hub_control(oxu_to_hcd(oxu),
2382				is_on ? SetPortFeature : ClearPortFeature,
2383				USB_PORT_FEAT_POWER,
2384				port--, NULL, 0);
2385	msleep(20);
2386}
2387
2388/* Called from some interrupts, timers, and so on.
2389 * It calls driver completion functions, after dropping oxu->lock.
2390 */
2391static void ehci_work(struct oxu_hcd *oxu)
2392{
2393	timer_action_done(oxu, TIMER_IO_WATCHDOG);
2394	if (oxu->reclaim_ready)
2395		end_unlink_async(oxu);
2396
2397	/* another CPU may drop oxu->lock during a schedule scan while
2398	 * it reports urb completions.  this flag guards against bogus
2399	 * attempts at re-entrant schedule scanning.
2400	 */
2401	if (oxu->scanning)
2402		return;
2403	oxu->scanning = 1;
2404	scan_async(oxu);
2405	if (oxu->next_uframe != -1)
2406		scan_periodic(oxu);
2407	oxu->scanning = 0;
2408
2409	/* the IO watchdog guards against hardware or driver bugs that
2410	 * misplace IRQs, and should let us run completely without IRQs.
2411	 * such lossage has been observed on both VT6202 and VT8235.
2412	 */
2413	if (HC_IS_RUNNING(oxu_to_hcd(oxu)->state) &&
2414			(oxu->async->qh_next.ptr != NULL ||
2415			 oxu->periodic_sched != 0))
2416		timer_action(oxu, TIMER_IO_WATCHDOG);
2417}
2418
2419static void unlink_async(struct oxu_hcd *oxu, struct ehci_qh *qh)
2420{
2421	/* if we need to use IAA and it's busy, defer */
2422	if (qh->qh_state == QH_STATE_LINKED
2423			&& oxu->reclaim
2424			&& HC_IS_RUNNING(oxu_to_hcd(oxu)->state)) {
2425		struct ehci_qh		*last;
2426
2427		for (last = oxu->reclaim;
2428				last->reclaim;
2429				last = last->reclaim)
2430			continue;
2431		qh->qh_state = QH_STATE_UNLINK_WAIT;
2432		last->reclaim = qh;
2433
2434	/* bypass IAA if the hc can't care */
2435	} else if (!HC_IS_RUNNING(oxu_to_hcd(oxu)->state) && oxu->reclaim)
2436		end_unlink_async(oxu);
2437
2438	/* something else might have unlinked the qh by now */
2439	if (qh->qh_state == QH_STATE_LINKED)
2440		start_unlink_async(oxu, qh);
2441}
2442
2443/*
2444 * USB host controller methods
2445 */
2446
2447static irqreturn_t oxu210_hcd_irq(struct usb_hcd *hcd)
2448{
2449	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2450	u32 status, pcd_status = 0;
2451	int bh;
2452
2453	spin_lock(&oxu->lock);
2454
2455	status = readl(&oxu->regs->status);
2456
2457	/* e.g. cardbus physical eject */
2458	if (status == ~(u32) 0) {
2459		oxu_dbg(oxu, "device removed\n");
2460		goto dead;
2461	}
2462
2463	status &= INTR_MASK;
2464	if (!status) {			/* irq sharing? */
2465		spin_unlock(&oxu->lock);
2466		return IRQ_NONE;
2467	}
2468
2469	/* clear (just) interrupts */
2470	writel(status, &oxu->regs->status);
2471	readl(&oxu->regs->command);	/* unblock posted write */
2472	bh = 0;
2473
2474#ifdef OXU_VERBOSE_DEBUG
2475	/* unrequested/ignored: Frame List Rollover */
2476	dbg_status(oxu, "irq", status);
2477#endif
2478
2479	/* INT, ERR, and IAA interrupt rates can be throttled */
2480
2481	/* normal [4.15.1.2] or error [4.15.1.1] completion */
2482	if (likely((status & (STS_INT|STS_ERR)) != 0))
2483		bh = 1;
2484
2485	/* complete the unlinking of some qh [4.15.2.3] */
2486	if (status & STS_IAA) {
2487		oxu->reclaim_ready = 1;
2488		bh = 1;
2489	}
2490
2491	/* remote wakeup [4.3.1] */
2492	if (status & STS_PCD) {
2493		unsigned i = HCS_N_PORTS(oxu->hcs_params);
2494		pcd_status = status;
2495
2496		/* resume root hub? */
2497		if (!(readl(&oxu->regs->command) & CMD_RUN))
2498			usb_hcd_resume_root_hub(hcd);
2499
2500		while (i--) {
2501			int pstatus = readl(&oxu->regs->port_status[i]);
2502
2503			if (pstatus & PORT_OWNER)
2504				continue;
2505			if (!(pstatus & PORT_RESUME)
2506					|| oxu->reset_done[i] != 0)
2507				continue;
2508
2509			/* start 20 msec resume signaling from this port,
2510			 * and make khubd collect PORT_STAT_C_SUSPEND to
2511			 * stop that signaling.
2512			 */
2513			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
2514			oxu_dbg(oxu, "port %d remote wakeup\n", i + 1);
2515			mod_timer(&hcd->rh_timer, oxu->reset_done[i]);
2516		}
2517	}
2518
2519	/* PCI errors [4.15.2.4] */
2520	if (unlikely((status & STS_FATAL) != 0)) {
2521		/* bogus "fatal" IRQs appear on some chips... why?  */
2522		status = readl(&oxu->regs->status);
2523		dbg_cmd(oxu, "fatal", readl(&oxu->regs->command));
2524		dbg_status(oxu, "fatal", status);
2525		if (status & STS_HALT) {
2526			oxu_err(oxu, "fatal error\n");
2527dead:
2528			ehci_reset(oxu);
2529			writel(0, &oxu->regs->configured_flag);
2530			/* generic layer kills/unlinks all urbs, then
2531			 * uses oxu_stop to clean up the rest
2532			 */
2533			bh = 1;
2534		}
2535	}
2536
2537	if (bh)
2538		ehci_work(oxu);
2539	spin_unlock(&oxu->lock);
2540	if (pcd_status & STS_PCD)
2541		usb_hcd_poll_rh_status(hcd);
2542	return IRQ_HANDLED;
2543}
2544
2545static irqreturn_t oxu_irq(struct usb_hcd *hcd)
2546{
2547	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2548	int ret = IRQ_HANDLED;
2549
2550	u32 status = oxu_readl(hcd->regs, OXU_CHIPIRQSTATUS);
2551	u32 enable = oxu_readl(hcd->regs, OXU_CHIPIRQEN_SET);
2552
2553	/* Disable all interrupt */
2554	oxu_writel(hcd->regs, OXU_CHIPIRQEN_CLR, enable);
2555
2556	if ((oxu->is_otg && (status & OXU_USBOTGI)) ||
2557		(!oxu->is_otg && (status & OXU_USBSPHI)))
2558		oxu210_hcd_irq(hcd);
2559	else
2560		ret = IRQ_NONE;
2561
2562	/* Enable all interrupt back */
2563	oxu_writel(hcd->regs, OXU_CHIPIRQEN_SET, enable);
2564
2565	return ret;
2566}
2567
2568static void oxu_watchdog(unsigned long param)
2569{
2570	struct oxu_hcd	*oxu = (struct oxu_hcd *) param;
2571	unsigned long flags;
2572
2573	spin_lock_irqsave(&oxu->lock, flags);
2574
2575	/* lost IAA irqs wedge things badly; seen with a vt8235 */
2576	if (oxu->reclaim) {
2577		u32 status = readl(&oxu->regs->status);
2578		if (status & STS_IAA) {
2579			oxu_vdbg(oxu, "lost IAA\n");
2580			writel(STS_IAA, &oxu->regs->status);
2581			oxu->reclaim_ready = 1;
2582		}
2583	}
2584
2585	/* stop async processing after it's idled a bit */
2586	if (test_bit(TIMER_ASYNC_OFF, &oxu->actions))
2587		start_unlink_async(oxu, oxu->async);
2588
2589	/* oxu could run by timer, without IRQs ... */
2590	ehci_work(oxu);
2591
2592	spin_unlock_irqrestore(&oxu->lock, flags);
2593}
2594
2595/* One-time init, only for memory state.
2596 */
2597static int oxu_hcd_init(struct usb_hcd *hcd)
2598{
2599	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2600	u32 temp;
2601	int retval;
2602	u32 hcc_params;
2603
2604	spin_lock_init(&oxu->lock);
2605
2606	init_timer(&oxu->watchdog);
2607	oxu->watchdog.function = oxu_watchdog;
2608	oxu->watchdog.data = (unsigned long) oxu;
2609
2610	/*
2611	 * hw default: 1K periodic list heads, one per frame.
2612	 * periodic_size can shrink by USBCMD update if hcc_params allows.
2613	 */
2614	oxu->periodic_size = DEFAULT_I_TDPS;
2615	retval = ehci_mem_init(oxu, GFP_KERNEL);
2616	if (retval < 0)
2617		return retval;
2618
2619	/* controllers may cache some of the periodic schedule ... */
2620	hcc_params = readl(&oxu->caps->hcc_params);
2621	if (HCC_ISOC_CACHE(hcc_params))		/* full frame cache */
2622		oxu->i_thresh = 8;
2623	else					/* N microframes cached */
2624		oxu->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
2625
2626	oxu->reclaim = NULL;
2627	oxu->reclaim_ready = 0;
2628	oxu->next_uframe = -1;
2629
2630	/*
2631	 * dedicate a qh for the async ring head, since we couldn't unlink
2632	 * a 'real' qh without stopping the async schedule [4.8].  use it
2633	 * as the 'reclamation list head' too.
2634	 * its dummy is used in hw_alt_next of many tds, to prevent the qh
2635	 * from automatically advancing to the next td after short reads.
2636	 */
2637	oxu->async->qh_next.qh = NULL;
2638	oxu->async->hw_next = QH_NEXT(oxu->async->qh_dma);
2639	oxu->async->hw_info1 = cpu_to_le32(QH_HEAD);
2640	oxu->async->hw_token = cpu_to_le32(QTD_STS_HALT);
2641	oxu->async->hw_qtd_next = EHCI_LIST_END;
2642	oxu->async->qh_state = QH_STATE_LINKED;
2643	oxu->async->hw_alt_next = QTD_NEXT(oxu->async->dummy->qtd_dma);
2644
2645	/* clear interrupt enables, set irq latency */
2646	if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
2647		log2_irq_thresh = 0;
2648	temp = 1 << (16 + log2_irq_thresh);
2649	if (HCC_CANPARK(hcc_params)) {
2650		/* HW default park == 3, on hardware that supports it (like
2651		 * NVidia and ALI silicon), maximizes throughput on the async
2652		 * schedule by avoiding QH fetches between transfers.
2653		 *
2654		 * With fast usb storage devices and NForce2, "park" seems to
2655		 * make problems:  throughput reduction (!), data errors...
2656		 */
2657		if (park) {
2658			park = min(park, (unsigned) 3);
2659			temp |= CMD_PARK;
2660			temp |= park << 8;
2661		}
2662		oxu_dbg(oxu, "park %d\n", park);
2663	}
2664	if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
2665		/* periodic schedule size can be smaller than default */
2666		temp &= ~(3 << 2);
2667		temp |= (EHCI_TUNE_FLS << 2);
2668	}
2669	oxu->command = temp;
2670
2671	return 0;
2672}
2673
2674/* Called during probe() after chip reset completes.
2675 */
2676static int oxu_reset(struct usb_hcd *hcd)
2677{
2678	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2679	int ret;
2680
2681	spin_lock_init(&oxu->mem_lock);
2682	INIT_LIST_HEAD(&oxu->urb_list);
2683	oxu->urb_len = 0;
2684
2685	/* FIMXE */
2686	hcd->self.controller->dma_mask = NULL;
2687
2688	if (oxu->is_otg) {
2689		oxu->caps = hcd->regs + OXU_OTG_CAP_OFFSET;
2690		oxu->regs = hcd->regs + OXU_OTG_CAP_OFFSET + \
2691			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2692
2693		oxu->mem = hcd->regs + OXU_SPH_MEM;
2694	} else {
2695		oxu->caps = hcd->regs + OXU_SPH_CAP_OFFSET;
2696		oxu->regs = hcd->regs + OXU_SPH_CAP_OFFSET + \
2697			HC_LENGTH(readl(&oxu->caps->hc_capbase));
2698
2699		oxu->mem = hcd->regs + OXU_OTG_MEM;
2700	}
2701
2702	oxu->hcs_params = readl(&oxu->caps->hcs_params);
2703	oxu->sbrn = 0x20;
2704
2705	ret = oxu_hcd_init(hcd);
2706	if (ret)
2707		return ret;
2708
2709	return 0;
2710}
2711
2712static int oxu_run(struct usb_hcd *hcd)
2713{
2714	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2715	int retval;
2716	u32 temp, hcc_params;
2717
2718	hcd->uses_new_polling = 1;
2719	hcd->poll_rh = 0;
2720
2721	/* EHCI spec section 4.1 */
2722	retval = ehci_reset(oxu);
2723	if (retval != 0) {
2724		ehci_mem_cleanup(oxu);
2725		return retval;
2726	}
2727	writel(oxu->periodic_dma, &oxu->regs->frame_list);
2728	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
2729
2730	/* hcc_params controls whether oxu->regs->segment must (!!!)
2731	 * be used; it constrains QH/ITD/SITD and QTD locations.
2732	 * pci_pool consistent memory always uses segment zero.
2733	 * streaming mappings for I/O buffers, like pci_map_single(),
2734	 * can return segments above 4GB, if the device allows.
2735	 *
2736	 * NOTE:  the dma mask is visible through dma_supported(), so
2737	 * drivers can pass this info along ... like NETIF_F_HIGHDMA,
2738	 * Scsi_Host.highmem_io, and so forth.  It's readonly to all
2739	 * host side drivers though.
2740	 */
2741	hcc_params = readl(&oxu->caps->hcc_params);
2742	if (HCC_64BIT_ADDR(hcc_params))
2743		writel(0, &oxu->regs->segment);
2744
2745	oxu->command &= ~(CMD_LRESET | CMD_IAAD | CMD_PSE |
2746				CMD_ASE | CMD_RESET);
2747	oxu->command |= CMD_RUN;
2748	writel(oxu->command, &oxu->regs->command);
2749	dbg_cmd(oxu, "init", oxu->command);
2750
2751	/*
2752	 * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
2753	 * are explicitly handed to companion controller(s), so no TT is
2754	 * involved with the root hub.  (Except where one is integrated,
2755	 * and there's no companion controller unless maybe for USB OTG.)
2756	 */
2757	hcd->state = HC_STATE_RUNNING;
2758	writel(FLAG_CF, &oxu->regs->configured_flag);
2759	readl(&oxu->regs->command);	/* unblock posted writes */
2760
2761	temp = HC_VERSION(readl(&oxu->caps->hc_capbase));
2762	oxu_info(oxu, "USB %x.%x started, quasi-EHCI %x.%02x, driver %s%s\n",
2763		((oxu->sbrn & 0xf0)>>4), (oxu->sbrn & 0x0f),
2764		temp >> 8, temp & 0xff, DRIVER_VERSION,
2765		ignore_oc ? ", overcurrent ignored" : "");
2766
2767	writel(INTR_MASK, &oxu->regs->intr_enable); /* Turn On Interrupts */
2768
2769	return 0;
2770}
2771
2772static void oxu_stop(struct usb_hcd *hcd)
2773{
2774	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2775
2776	/* Turn off port power on all root hub ports. */
2777	ehci_port_power(oxu, 0);
2778
2779	/* no more interrupts ... */
2780	del_timer_sync(&oxu->watchdog);
2781
2782	spin_lock_irq(&oxu->lock);
2783	if (HC_IS_RUNNING(hcd->state))
2784		ehci_quiesce(oxu);
2785
2786	ehci_reset(oxu);
2787	writel(0, &oxu->regs->intr_enable);
2788	spin_unlock_irq(&oxu->lock);
2789
2790	/* let companion controllers work when we aren't */
2791	writel(0, &oxu->regs->configured_flag);
2792
2793	/* root hub is shut down separately (first, when possible) */
2794	spin_lock_irq(&oxu->lock);
2795	if (oxu->async)
2796		ehci_work(oxu);
2797	spin_unlock_irq(&oxu->lock);
2798	ehci_mem_cleanup(oxu);
2799
2800	dbg_status(oxu, "oxu_stop completed", readl(&oxu->regs->status));
2801}
2802
2803/* Kick in for silicon on any bus (not just pci, etc).
2804 * This forcibly disables dma and IRQs, helping kexec and other cases
2805 * where the next system software may expect clean state.
2806 */
2807static void oxu_shutdown(struct usb_hcd *hcd)
2808{
2809	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2810
2811	(void) ehci_halt(oxu);
2812	ehci_turn_off_all_ports(oxu);
2813
2814	/* make BIOS/etc use companion controller during reboot */
2815	writel(0, &oxu->regs->configured_flag);
2816
2817	/* unblock posted writes */
2818	readl(&oxu->regs->configured_flag);
2819}
2820
2821/* Non-error returns are a promise to giveback() the urb later
2822 * we drop ownership so next owner (or urb unlink) can get it
2823 *
2824 * urb + dev is in hcd.self.controller.urb_list
2825 * we're queueing TDs onto software and hardware lists
2826 *
2827 * hcd-specific init for hcpriv hasn't been done yet
2828 *
2829 * NOTE:  control, bulk, and interrupt share the same code to append TDs
2830 * to a (possibly active) QH, and the same QH scanning code.
2831 */
2832static int __oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2833				gfp_t mem_flags)
2834{
2835	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2836	struct list_head qtd_list;
2837
2838	INIT_LIST_HEAD(&qtd_list);
2839
2840	switch (usb_pipetype(urb->pipe)) {
2841	case PIPE_CONTROL:
2842	case PIPE_BULK:
2843	default:
2844		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2845			return -ENOMEM;
2846		return submit_async(oxu, urb, &qtd_list, mem_flags);
2847
2848	case PIPE_INTERRUPT:
2849		if (!qh_urb_transaction(oxu, urb, &qtd_list, mem_flags))
2850			return -ENOMEM;
2851		return intr_submit(oxu, urb, &qtd_list, mem_flags);
2852
2853	case PIPE_ISOCHRONOUS:
2854		if (urb->dev->speed == USB_SPEED_HIGH)
2855			return itd_submit(oxu, urb, mem_flags);
2856		else
2857			return sitd_submit(oxu, urb, mem_flags);
2858	}
2859}
2860
2861/* This function is responsible for breaking URBs with big data size
2862 * into smaller size and processing small urbs in sequence.
2863 */
2864static int oxu_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
2865				gfp_t mem_flags)
2866{
2867	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2868	int num, rem;
2869	int transfer_buffer_length;
2870	void *transfer_buffer;
2871	struct urb *murb;
2872	int i, ret;
2873
2874	/* If not bulk pipe just enqueue the URB */
2875	if (!usb_pipebulk(urb->pipe))
2876		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2877
2878	/* Otherwise we should verify the USB transfer buffer size! */
2879	transfer_buffer = urb->transfer_buffer;
2880	transfer_buffer_length = urb->transfer_buffer_length;
2881
2882	num = urb->transfer_buffer_length / 4096;
2883	rem = urb->transfer_buffer_length % 4096;
2884	if (rem != 0)
2885		num++;
2886
2887	/* If URB is smaller than 4096 bytes just enqueue it! */
2888	if (num == 1)
2889		return __oxu_urb_enqueue(hcd, urb, mem_flags);
2890
2891	/* Ok, we have more job to do! :) */
2892
2893	for (i = 0; i < num - 1; i++) {
2894		/* Get free micro URB poll till a free urb is recieved */
2895
2896		do {
2897			murb = (struct urb *) oxu_murb_alloc(oxu);
2898			if (!murb)
2899				schedule();
2900		} while (!murb);
2901
2902		/* Coping the urb */
2903		memcpy(murb, urb, sizeof(struct urb));
2904
2905		murb->transfer_buffer_length = 4096;
2906		murb->transfer_buffer = transfer_buffer + i * 4096;
2907
2908		/* Null pointer for the encodes that this is a micro urb */
2909		murb->complete = NULL;
2910
2911		((struct oxu_murb *) murb)->main = urb;
2912		((struct oxu_murb *) murb)->last = 0;
2913
2914		/* This loop is to guarantee urb to be processed when there's
2915		 * not enough resources at a particular time by retrying.
2916		 */
2917		do {
2918			ret  = __oxu_urb_enqueue(hcd, murb, mem_flags);
2919			if (ret)
2920				schedule();
2921		} while (ret);
2922	}
2923
2924	/* Last urb requires special handling  */
2925
2926	/* Get free micro URB poll till a free urb is recieved */
2927	do {
2928		murb = (struct urb *) oxu_murb_alloc(oxu);
2929		if (!murb)
2930			schedule();
2931	} while (!murb);
2932
2933	/* Coping the urb */
2934	memcpy(murb, urb, sizeof(struct urb));
2935
2936	murb->transfer_buffer_length = rem > 0 ? rem : 4096;
2937	murb->transfer_buffer = transfer_buffer + (num - 1) * 4096;
2938
2939	/* Null pointer for the encodes that this is a micro urb */
2940	murb->complete = NULL;
2941
2942	((struct oxu_murb *) murb)->main = urb;
2943	((struct oxu_murb *) murb)->last = 1;
2944
2945	do {
2946		ret = __oxu_urb_enqueue(hcd, murb, mem_flags);
2947		if (ret)
2948			schedule();
2949	} while (ret);
2950
2951	return ret;
2952}
2953
2954/* Remove from hardware lists.
2955 * Completions normally happen asynchronously
2956 */
2957static int oxu_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
2958{
2959	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
2960	struct ehci_qh *qh;
2961	unsigned long flags;
2962
2963	spin_lock_irqsave(&oxu->lock, flags);
2964	switch (usb_pipetype(urb->pipe)) {
2965	case PIPE_CONTROL:
2966	case PIPE_BULK:
2967	default:
2968		qh = (struct ehci_qh *) urb->hcpriv;
2969		if (!qh)
2970			break;
2971		unlink_async(oxu, qh);
2972		break;
2973
2974	case PIPE_INTERRUPT:
2975		qh = (struct ehci_qh *) urb->hcpriv;
2976		if (!qh)
2977			break;
2978		switch (qh->qh_state) {
2979		case QH_STATE_LINKED:
2980			intr_deschedule(oxu, qh);
2981			/* FALL THROUGH */
2982		case QH_STATE_IDLE:
2983			qh_completions(oxu, qh);
2984			break;
2985		default:
2986			oxu_dbg(oxu, "bogus qh %p state %d\n",
2987					qh, qh->qh_state);
2988			goto done;
2989		}
2990
2991		/* reschedule QH iff another request is queued */
2992		if (!list_empty(&qh->qtd_list)
2993				&& HC_IS_RUNNING(hcd->state)) {
2994			int status;
2995
2996			status = qh_schedule(oxu, qh);
2997			spin_unlock_irqrestore(&oxu->lock, flags);
2998
2999			if (status != 0) {
3000				/* shouldn't happen often, but ...
3001				 * FIXME kill those tds' urbs
3002				 */
3003				err("can't reschedule qh %p, err %d",
3004					qh, status);
3005			}
3006			return status;
3007		}
3008		break;
3009	}
3010done:
3011	spin_unlock_irqrestore(&oxu->lock, flags);
3012	return 0;
3013}
3014
3015/* Bulk qh holds the data toggle */
3016static void oxu_endpoint_disable(struct usb_hcd *hcd,
3017					struct usb_host_endpoint *ep)
3018{
3019	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3020	unsigned long		flags;
3021	struct ehci_qh		*qh, *tmp;
3022
3023	/* ASSERT:  any requests/urbs are being unlinked */
3024	/* ASSERT:  nobody can be submitting urbs for this any more */
3025
3026rescan:
3027	spin_lock_irqsave(&oxu->lock, flags);
3028	qh = ep->hcpriv;
3029	if (!qh)
3030		goto done;
3031
3032	/* endpoints can be iso streams.  for now, we don't
3033	 * accelerate iso completions ... so spin a while.
3034	 */
3035	if (qh->hw_info1 == 0) {
3036		oxu_vdbg(oxu, "iso delay\n");
3037		goto idle_timeout;
3038	}
3039
3040	if (!HC_IS_RUNNING(hcd->state))
3041		qh->qh_state = QH_STATE_IDLE;
3042	switch (qh->qh_state) {
3043	case QH_STATE_LINKED:
3044		for (tmp = oxu->async->qh_next.qh;
3045				tmp && tmp != qh;
3046				tmp = tmp->qh_next.qh)
3047			continue;
3048		/* periodic qh self-unlinks on empty */
3049		if (!tmp)
3050			goto nogood;
3051		unlink_async(oxu, qh);
3052		/* FALL THROUGH */
3053	case QH_STATE_UNLINK:		/* wait for hw to finish? */
3054idle_timeout:
3055		spin_unlock_irqrestore(&oxu->lock, flags);
3056		schedule_timeout_uninterruptible(1);
3057		goto rescan;
3058	case QH_STATE_IDLE:		/* fully unlinked */
3059		if (list_empty(&qh->qtd_list)) {
3060			qh_put(qh);
3061			break;
3062		}
3063		/* else FALL THROUGH */
3064	default:
3065nogood:
3066		/* caller was supposed to have unlinked any requests;
3067		 * that's not our job.  just leak this memory.
3068		 */
3069		oxu_err(oxu, "qh %p (#%02x) state %d%s\n",
3070			qh, ep->desc.bEndpointAddress, qh->qh_state,
3071			list_empty(&qh->qtd_list) ? "" : "(has tds)");
3072		break;
3073	}
3074	ep->hcpriv = NULL;
3075done:
3076	spin_unlock_irqrestore(&oxu->lock, flags);
3077	return;
3078}
3079
3080static int oxu_get_frame(struct usb_hcd *hcd)
3081{
3082	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3083
3084	return (readl(&oxu->regs->frame_index) >> 3) %
3085		oxu->periodic_size;
3086}
3087
3088/* Build "status change" packet (one or two bytes) from HC registers */
3089static int oxu_hub_status_data(struct usb_hcd *hcd, char *buf)
3090{
3091	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3092	u32 temp, mask, status = 0;
3093	int ports, i, retval = 1;
3094	unsigned long flags;
3095
3096	/* if !USB_SUSPEND, root hub timers won't get shut down ... */
3097	if (!HC_IS_RUNNING(hcd->state))
3098		return 0;
3099
3100	/* init status to no-changes */
3101	buf[0] = 0;
3102	ports = HCS_N_PORTS(oxu->hcs_params);
3103	if (ports > 7) {
3104		buf[1] = 0;
3105		retval++;
3106	}
3107
3108	/* Some boards (mostly VIA?) report bogus overcurrent indications,
3109	 * causing massive log spam unless we completely ignore them.  It
3110	 * may be relevant that VIA VT8235 controlers, where PORT_POWER is
3111	 * always set, seem to clear PORT_OCC and PORT_CSC when writing to
3112	 * PORT_POWER; that's surprising, but maybe within-spec.
3113	 */
3114	if (!ignore_oc)
3115		mask = PORT_CSC | PORT_PEC | PORT_OCC;
3116	else
3117		mask = PORT_CSC | PORT_PEC;
3118
3119	/* no hub change reports (bit 0) for now (power, ...) */
3120
3121	/* port N changes (bit N)? */
3122	spin_lock_irqsave(&oxu->lock, flags);
3123	for (i = 0; i < ports; i++) {
3124		temp = readl(&oxu->regs->port_status[i]);
3125
3126		/*
3127		 * Return status information even for ports with OWNER set.
3128		 * Otherwise khubd wouldn't see the disconnect event when a
3129		 * high-speed device is switched over to the companion
3130		 * controller by the user.
3131		 */
3132
3133		if (!(temp & PORT_CONNECT))
3134			oxu->reset_done[i] = 0;
3135		if ((temp & mask) != 0 || ((temp & PORT_RESUME) != 0 &&
3136				time_after_eq(jiffies, oxu->reset_done[i]))) {
3137			if (i < 7)
3138				buf[0] |= 1 << (i + 1);
3139			else
3140				buf[1] |= 1 << (i - 7);
3141			status = STS_PCD;
3142		}
3143	}
3144	/* FIXME autosuspend idle root hubs */
3145	spin_unlock_irqrestore(&oxu->lock, flags);
3146	return status ? retval : 0;
3147}
3148
3149/* Returns the speed of a device attached to a port on the root hub. */
3150static inline unsigned int oxu_port_speed(struct oxu_hcd *oxu,
3151						unsigned int portsc)
3152{
3153	switch ((portsc >> 26) & 3) {
3154	case 0:
3155		return 0;
3156	case 1:
3157		return 1 << USB_PORT_FEAT_LOWSPEED;
3158	case 2:
3159	default:
3160		return 1 << USB_PORT_FEAT_HIGHSPEED;
3161	}
3162}
3163
3164#define	PORT_WAKE_BITS	(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
3165static int oxu_hub_control(struct usb_hcd *hcd, u16 typeReq,
3166				u16 wValue, u16 wIndex, char *buf, u16 wLength)
3167{
3168	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3169	int ports = HCS_N_PORTS(oxu->hcs_params);
3170	u32 __iomem *status_reg = &oxu->regs->port_status[wIndex - 1];
3171	u32 temp, status;
3172	unsigned long	flags;
3173	int retval = 0;
3174	unsigned selector;
3175
3176	/*
3177	 * FIXME:  support SetPortFeatures USB_PORT_FEAT_INDICATOR.
3178	 * HCS_INDICATOR may say we can change LEDs to off/amber/green.
3179	 * (track current state ourselves) ... blink for diagnostics,
3180	 * power, "this is the one", etc.  EHCI spec supports this.
3181	 */
3182
3183	spin_lock_irqsave(&oxu->lock, flags);
3184	switch (typeReq) {
3185	case ClearHubFeature:
3186		switch (wValue) {
3187		case C_HUB_LOCAL_POWER:
3188		case C_HUB_OVER_CURRENT:
3189			/* no hub-wide feature/status flags */
3190			break;
3191		default:
3192			goto error;
3193		}
3194		break;
3195	case ClearPortFeature:
3196		if (!wIndex || wIndex > ports)
3197			goto error;
3198		wIndex--;
3199		temp = readl(status_reg);
3200
3201		/*
3202		 * Even if OWNER is set, so the port is owned by the
3203		 * companion controller, khubd needs to be able to clear
3204		 * the port-change status bits (especially
3205		 * USB_PORT_FEAT_C_CONNECTION).
3206		 */
3207
3208		switch (wValue) {
3209		case USB_PORT_FEAT_ENABLE:
3210			writel(temp & ~PORT_PE, status_reg);
3211			break;
3212		case USB_PORT_FEAT_C_ENABLE:
3213			writel((temp & ~PORT_RWC_BITS) | PORT_PEC, status_reg);
3214			break;
3215		case USB_PORT_FEAT_SUSPEND:
3216			if (temp & PORT_RESET)
3217				goto error;
3218			if (temp & PORT_SUSPEND) {
3219				if ((temp & PORT_PE) == 0)
3220					goto error;
3221				/* resume signaling for 20 msec */
3222				temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
3223				writel(temp | PORT_RESUME, status_reg);
3224				oxu->reset_done[wIndex] = jiffies
3225						+ msecs_to_jiffies(20);
3226			}
3227			break;
3228		case USB_PORT_FEAT_C_SUSPEND:
3229			/* we auto-clear this feature */
3230			break;
3231		case USB_PORT_FEAT_POWER:
3232			if (HCS_PPC(oxu->hcs_params))
3233				writel(temp & ~(PORT_RWC_BITS | PORT_POWER),
3234					  status_reg);
3235			break;
3236		case USB_PORT_FEAT_C_CONNECTION:
3237			writel((temp & ~PORT_RWC_BITS) | PORT_CSC, status_reg);
3238			break;
3239		case USB_PORT_FEAT_C_OVER_CURRENT:
3240			writel((temp & ~PORT_RWC_BITS) | PORT_OCC, status_reg);
3241			break;
3242		case USB_PORT_FEAT_C_RESET:
3243			/* GetPortStatus clears reset */
3244			break;
3245		default:
3246			goto error;
3247		}
3248		readl(&oxu->regs->command);	/* unblock posted write */
3249		break;
3250	case GetHubDescriptor:
3251		ehci_hub_descriptor(oxu, (struct usb_hub_descriptor *)
3252			buf);
3253		break;
3254	case GetHubStatus:
3255		/* no hub-wide feature/status flags */
3256		memset(buf, 0, 4);
3257		break;
3258	case GetPortStatus:
3259		if (!wIndex || wIndex > ports)
3260			goto error;
3261		wIndex--;
3262		status = 0;
3263		temp = readl(status_reg);
3264
3265		/* wPortChange bits */
3266		if (temp & PORT_CSC)
3267			status |= 1 << USB_PORT_FEAT_C_CONNECTION;
3268		if (temp & PORT_PEC)
3269			status |= 1 << USB_PORT_FEAT_C_ENABLE;
3270		if ((temp & PORT_OCC) && !ignore_oc)
3271			status |= 1 << USB_PORT_FEAT_C_OVER_CURRENT;
3272
3273		/* whoever resumes must GetPortStatus to complete it!! */
3274		if (temp & PORT_RESUME) {
3275
3276			/* Remote Wakeup received? */
3277			if (!oxu->reset_done[wIndex]) {
3278				/* resume signaling for 20 msec */
3279				oxu->reset_done[wIndex] = jiffies
3280						+ msecs_to_jiffies(20);
3281				/* check the port again */
3282				mod_timer(&oxu_to_hcd(oxu)->rh_timer,
3283						oxu->reset_done[wIndex]);
3284			}
3285
3286			/* resume completed? */
3287			else if (time_after_eq(jiffies,
3288					oxu->reset_done[wIndex])) {
3289				status |= 1 << USB_PORT_FEAT_C_SUSPEND;
3290				oxu->reset_done[wIndex] = 0;
3291
3292				/* stop resume signaling */
3293				temp = readl(status_reg);
3294				writel(temp & ~(PORT_RWC_BITS | PORT_RESUME),
3295					status_reg);
3296				retval = handshake(oxu, status_reg,
3297					   PORT_RESUME, 0, 2000 /* 2msec */);
3298				if (retval != 0) {
3299					oxu_err(oxu,
3300						"port %d resume error %d\n",
3301						wIndex + 1, retval);
3302					goto error;
3303				}
3304				temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
3305			}
3306		}
3307
3308		/* whoever resets must GetPortStatus to complete it!! */
3309		if ((temp & PORT_RESET)
3310				&& time_after_eq(jiffies,
3311					oxu->reset_done[wIndex])) {
3312			status |= 1 << USB_PORT_FEAT_C_RESET;
3313			oxu->reset_done[wIndex] = 0;
3314
3315			/* force reset to complete */
3316			writel(temp & ~(PORT_RWC_BITS | PORT_RESET),
3317					status_reg);
3318			/* REVISIT:  some hardware needs 550+ usec to clear
3319			 * this bit; seems too long to spin routinely...
3320			 */
3321			retval = handshake(oxu, status_reg,
3322					PORT_RESET, 0, 750);
3323			if (retval != 0) {
3324				oxu_err(oxu, "port %d reset error %d\n",
3325					wIndex + 1, retval);
3326				goto error;
3327			}
3328
3329			/* see what we found out */
3330			temp = check_reset_complete(oxu, wIndex, status_reg,
3331					readl(status_reg));
3332		}
3333
3334		/* transfer dedicated ports to the companion hc */
3335		if ((temp & PORT_CONNECT) &&
3336				test_bit(wIndex, &oxu->companion_ports)) {
3337			temp &= ~PORT_RWC_BITS;
3338			temp |= PORT_OWNER;
3339			writel(temp, status_reg);
3340			oxu_dbg(oxu, "port %d --> companion\n", wIndex + 1);
3341			temp = readl(status_reg);
3342		}
3343
3344		/*
3345		 * Even if OWNER is set, there's no harm letting khubd
3346		 * see the wPortStatus values (they should all be 0 except
3347		 * for PORT_POWER anyway).
3348		 */
3349
3350		if (temp & PORT_CONNECT) {
3351			status |= 1 << USB_PORT_FEAT_CONNECTION;
3352			/* status may be from integrated TT */
3353			status |= oxu_port_speed(oxu, temp);
3354		}
3355		if (temp & PORT_PE)
3356			status |= 1 << USB_PORT_FEAT_ENABLE;
3357		if (temp & (PORT_SUSPEND|PORT_RESUME))
3358			status |= 1 << USB_PORT_FEAT_SUSPEND;
3359		if (temp & PORT_OC)
3360			status |= 1 << USB_PORT_FEAT_OVER_CURRENT;
3361		if (temp & PORT_RESET)
3362			status |= 1 << USB_PORT_FEAT_RESET;
3363		if (temp & PORT_POWER)
3364			status |= 1 << USB_PORT_FEAT_POWER;
3365
3366#ifndef	OXU_VERBOSE_DEBUG
3367	if (status & ~0xffff)	/* only if wPortChange is interesting */
3368#endif
3369		dbg_port(oxu, "GetStatus", wIndex + 1, temp);
3370		put_unaligned(cpu_to_le32(status), (__le32 *) buf);
3371		break;
3372	case SetHubFeature:
3373		switch (wValue) {
3374		case C_HUB_LOCAL_POWER:
3375		case C_HUB_OVER_CURRENT:
3376			/* no hub-wide feature/status flags */
3377			break;
3378		default:
3379			goto error;
3380		}
3381		break;
3382	case SetPortFeature:
3383		selector = wIndex >> 8;
3384		wIndex &= 0xff;
3385		if (!wIndex || wIndex > ports)
3386			goto error;
3387		wIndex--;
3388		temp = readl(status_reg);
3389		if (temp & PORT_OWNER)
3390			break;
3391
3392		temp &= ~PORT_RWC_BITS;
3393		switch (wValue) {
3394		case USB_PORT_FEAT_SUSPEND:
3395			if ((temp & PORT_PE) == 0
3396					|| (temp & PORT_RESET) != 0)
3397				goto error;
3398			if (device_may_wakeup(&hcd->self.root_hub->dev))
3399				temp |= PORT_WAKE_BITS;
3400			writel(temp | PORT_SUSPEND, status_reg);
3401			break;
3402		case USB_PORT_FEAT_POWER:
3403			if (HCS_PPC(oxu->hcs_params))
3404				writel(temp | PORT_POWER, status_reg);
3405			break;
3406		case USB_PORT_FEAT_RESET:
3407			if (temp & PORT_RESUME)
3408				goto error;
3409			/* line status bits may report this as low speed,
3410			 * which can be fine if this root hub has a
3411			 * transaction translator built in.
3412			 */
3413			oxu_vdbg(oxu, "port %d reset\n", wIndex + 1);
3414			temp |= PORT_RESET;
3415			temp &= ~PORT_PE;
3416
3417			/*
3418			 * caller must wait, then call GetPortStatus
3419			 * usb 2.0 spec says 50 ms resets on root
3420			 */
3421			oxu->reset_done[wIndex] = jiffies
3422					+ msecs_to_jiffies(50);
3423			writel(temp, status_reg);
3424			break;
3425
3426		/* For downstream facing ports (these):  one hub port is put
3427		 * into test mode according to USB2 11.24.2.13, then the hub
3428		 * must be reset (which for root hub now means rmmod+modprobe,
3429		 * or else system reboot).  See EHCI 2.3.9 and 4.14 for info
3430		 * about the EHCI-specific stuff.
3431		 */
3432		case USB_PORT_FEAT_TEST:
3433			if (!selector || selector > 5)
3434				goto error;
3435			ehci_quiesce(oxu);
3436			ehci_halt(oxu);
3437			temp |= selector << 16;
3438			writel(temp, status_reg);
3439			break;
3440
3441		default:
3442			goto error;
3443		}
3444		readl(&oxu->regs->command);	/* unblock posted writes */
3445		break;
3446
3447	default:
3448error:
3449		/* "stall" on error */
3450		retval = -EPIPE;
3451	}
3452	spin_unlock_irqrestore(&oxu->lock, flags);
3453	return retval;
3454}
3455
3456#ifdef CONFIG_PM
3457
3458static int oxu_bus_suspend(struct usb_hcd *hcd)
3459{
3460	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3461	int port;
3462	int mask;
3463
3464	oxu_dbg(oxu, "suspend root hub\n");
3465
3466	if (time_before(jiffies, oxu->next_statechange))
3467		msleep(5);
3468
3469	port = HCS_N_PORTS(oxu->hcs_params);
3470	spin_lock_irq(&oxu->lock);
3471
3472	/* stop schedules, clean any completed work */
3473	if (HC_IS_RUNNING(hcd->state)) {
3474		ehci_quiesce(oxu);
3475		hcd->state = HC_STATE_QUIESCING;
3476	}
3477	oxu->command = readl(&oxu->regs->command);
3478	if (oxu->reclaim)
3479		oxu->reclaim_ready = 1;
3480	ehci_work(oxu);
3481
3482	/* Unlike other USB host controller types, EHCI doesn't have
3483	 * any notion of "global" or bus-wide suspend.  The driver has
3484	 * to manually suspend all the active unsuspended ports, and
3485	 * then manually resume them in the bus_resume() routine.
3486	 */
3487	oxu->bus_suspended = 0;
3488	while (port--) {
3489		u32 __iomem *reg = &oxu->regs->port_status[port];
3490		u32 t1 = readl(reg) & ~PORT_RWC_BITS;
3491		u32 t2 = t1;
3492
3493		/* keep track of which ports we suspend */
3494		if ((t1 & PORT_PE) && !(t1 & PORT_OWNER) &&
3495				!(t1 & PORT_SUSPEND)) {
3496			t2 |= PORT_SUSPEND;
3497			set_bit(port, &oxu->bus_suspended);
3498		}
3499
3500		/* enable remote wakeup on all ports */
3501		if (device_may_wakeup(&hcd->self.root_hub->dev))
3502			t2 |= PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E;
3503		else
3504			t2 &= ~(PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E);
3505
3506		if (t1 != t2) {
3507			oxu_vdbg(oxu, "port %d, %08x -> %08x\n",
3508				port + 1, t1, t2);
3509			writel(t2, reg);
3510		}
3511	}
3512
3513	/* turn off now-idle HC */
3514	del_timer_sync(&oxu->watchdog);
3515	ehci_halt(oxu);
3516	hcd->state = HC_STATE_SUSPENDED;
3517
3518	/* allow remote wakeup */
3519	mask = INTR_MASK;
3520	if (!device_may_wakeup(&hcd->self.root_hub->dev))
3521		mask &= ~STS_PCD;
3522	writel(mask, &oxu->regs->intr_enable);
3523	readl(&oxu->regs->intr_enable);
3524
3525	oxu->next_statechange = jiffies + msecs_to_jiffies(10);
3526	spin_unlock_irq(&oxu->lock);
3527	return 0;
3528}
3529
3530/* Caller has locked the root hub, and should reset/reinit on error */
3531static int oxu_bus_resume(struct usb_hcd *hcd)
3532{
3533	struct oxu_hcd *oxu = hcd_to_oxu(hcd);
3534	u32 temp;
3535	int i;
3536
3537	if (time_before(jiffies, oxu->next_statechange))
3538		msleep(5);
3539	spin_lock_irq(&oxu->lock);
3540
3541	/* Ideally and we've got a real resume here, and no port's power
3542	 * was lost.  (For PCI, that means Vaux was maintained.)  But we
3543	 * could instead be restoring a swsusp snapshot -- so that BIOS was
3544	 * the last user of the controller, not reset/pm hardware keeping
3545	 * state we gave to it.
3546	 */
3547	temp = readl(&oxu->regs->intr_enable);
3548	oxu_dbg(oxu, "resume root hub%s\n", temp ? "" : " after power loss");
3549
3550	/* at least some APM implementations will try to deliver
3551	 * IRQs right away, so delay them until we're ready.
3552	 */
3553	writel(0, &oxu->regs->intr_enable);
3554
3555	/* re-init operational registers */
3556	writel(0, &oxu->regs->segment);
3557	writel(oxu->periodic_dma, &oxu->regs->frame_list);
3558	writel((u32) oxu->async->qh_dma, &oxu->regs->async_next);
3559
3560	/* restore CMD_RUN, framelist size, and irq threshold */
3561	writel(oxu->command, &oxu->regs->command);
3562
3563	/* Some controller/firmware combinations need a delay during which
3564	 * they set up the port statuses.  See Bugzilla #8190. */
3565	mdelay(8);
3566
3567	/* manually resume the ports we suspended during bus_suspend() */
3568	i = HCS_N_PORTS(oxu->hcs_params);
3569	while (i--) {
3570		temp = readl(&oxu->regs->port_status[i]);
3571		temp &= ~(PORT_RWC_BITS
3572			| PORT_WKOC_E | PORT_WKDISC_E | PORT_WKCONN_E);
3573		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3574			oxu->reset_done[i] = jiffies + msecs_to_jiffies(20);
3575			temp |= PORT_RESUME;
3576		}
3577		writel(temp, &oxu->regs->port_status[i]);
3578	}
3579	i = HCS_N_PORTS(oxu->hcs_params);
3580	mdelay(20);
3581	while (i--) {
3582		temp = readl(&oxu->regs->port_status[i]);
3583		if (test_bit(i, &oxu->bus_suspended) && (temp & PORT_SUSPEND)) {
3584			temp &= ~(PORT_RWC_BITS | PORT_RESUME);
3585			writel(temp, &oxu->regs->port_status[i]);
3586			oxu_vdbg(oxu, "resumed port %d\n", i + 1);
3587		}
3588	}
3589	(void) readl(&oxu->regs->command);
3590
3591	/* maybe re-activate the schedule(s) */
3592	temp = 0;
3593	if (oxu->async->qh_next.qh)
3594		temp |= CMD_ASE;
3595	if (oxu->periodic_sched)
3596		temp |= CMD_PSE;
3597	if (temp) {
3598		oxu->command |= temp;
3599		writel(oxu->command, &oxu->regs->command);
3600	}
3601
3602	oxu->next_statechange = jiffies + msecs_to_jiffies(5);
3603	hcd->state = HC_STATE_RUNNING;
3604
3605	/* Now we can safely re-enable irqs */
3606	writel(INTR_MASK, &oxu->regs->intr_enable);
3607
3608	spin_unlock_irq(&oxu->lock);
3609	return 0;
3610}
3611
3612#else
3613
3614static int oxu_bus_suspend(struct usb_hcd *hcd)
3615{
3616	return 0;
3617}
3618
3619static int oxu_bus_resume(struct usb_hcd *hcd)
3620{
3621	return 0;
3622}
3623
3624#endif	/* CONFIG_PM */
3625
3626static const struct hc_driver oxu_hc_driver = {
3627	.description =		"oxu210hp_hcd",
3628	.product_desc =		"oxu210hp HCD",
3629	.hcd_priv_size =	sizeof(struct oxu_hcd),
3630
3631	/*
3632	 * Generic hardware linkage
3633	 */
3634	.irq =			oxu_irq,
3635	.flags =		HCD_MEMORY | HCD_USB2,
3636
3637	/*
3638	 * Basic lifecycle operations
3639	 */
3640	.reset =		oxu_reset,
3641	.start =		oxu_run,
3642	.stop =			oxu_stop,
3643	.shutdown =		oxu_shutdown,
3644
3645	/*
3646	 * Managing i/o requests and associated device resources
3647	 */
3648	.urb_enqueue =		oxu_urb_enqueue,
3649	.urb_dequeue =		oxu_urb_dequeue,
3650	.endpoint_disable =	oxu_endpoint_disable,
3651
3652	/*
3653	 * Scheduling support
3654	 */
3655	.get_frame_number =	oxu_get_frame,
3656
3657	/*
3658	 * Root hub support
3659	 */
3660	.hub_status_data =	oxu_hub_status_data,
3661	.hub_control =		oxu_hub_control,
3662	.bus_suspend =		oxu_bus_suspend,
3663	.bus_resume =		oxu_bus_resume,
3664};
3665
3666/*
3667 * Module stuff
3668 */
3669
3670static void oxu_configuration(struct platform_device *pdev, void *base)
3671{
3672	u32 tmp;
3673
3674	/* Initialize top level registers.
3675	 * First write ever
3676	 */
3677	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3678	oxu_writel(base, OXU_SOFTRESET, OXU_SRESET);
3679	oxu_writel(base, OXU_HOSTIFCONFIG, 0x0000037D);
3680
3681	tmp = oxu_readl(base, OXU_PIOBURSTREADCTRL);
3682	oxu_writel(base, OXU_PIOBURSTREADCTRL, tmp | 0x0040);
3683
3684	oxu_writel(base, OXU_ASO, OXU_SPHPOEN | OXU_OVRCCURPUPDEN |
3685					OXU_COMPARATOR | OXU_ASO_OP);
3686
3687	tmp = oxu_readl(base, OXU_CLKCTRL_SET);
3688	oxu_writel(base, OXU_CLKCTRL_SET, tmp | OXU_SYSCLKEN | OXU_USBOTGCLKEN);
3689
3690	/* Clear all top interrupt enable */
3691	oxu_writel(base, OXU_CHIPIRQEN_CLR, 0xff);
3692
3693	/* Clear all top interrupt status */
3694	oxu_writel(base, OXU_CHIPIRQSTATUS, 0xff);
3695
3696	/* Enable all needed top interrupt except OTG SPH core */
3697	oxu_writel(base, OXU_CHIPIRQEN_SET, OXU_USBSPHLPWUI | OXU_USBOTGLPWUI);
3698}
3699
3700static int oxu_verify_id(struct platform_device *pdev, void *base)
3701{
3702	u32 id;
3703	char *bo[] = {
3704		"reserved",
3705		"128-pin LQFP",
3706		"84-pin TFBGA",
3707		"reserved",
3708	};
3709
3710	/* Read controller signature register to find a match */
3711	id = oxu_readl(base, OXU_DEVICEID);
3712	dev_info(&pdev->dev, "device ID %x\n", id);
3713	if ((id & OXU_REV_MASK) != (OXU_REV_2100 << OXU_REV_SHIFT))
3714		return -1;
3715
3716	dev_info(&pdev->dev, "found device %x %s (%04x:%04x)\n",
3717		id >> OXU_REV_SHIFT,
3718		bo[(id & OXU_BO_MASK) >> OXU_BO_SHIFT],
3719		(id & OXU_MAJ_REV_MASK) >> OXU_MAJ_REV_SHIFT,
3720		(id & OXU_MIN_REV_MASK) >> OXU_MIN_REV_SHIFT);
3721
3722	return 0;
3723}
3724
3725static const struct hc_driver oxu_hc_driver;
3726static struct usb_hcd *oxu_create(struct platform_device *pdev,
3727				unsigned long memstart, unsigned long memlen,
3728				void *base, int irq, int otg)
3729{
3730	struct device *dev = &pdev->dev;
3731
3732	struct usb_hcd *hcd;
3733	struct oxu_hcd *oxu;
3734	int ret;
3735
3736	/* Set endian mode and host mode */
3737	oxu_writel(base + (otg ? OXU_OTG_CORE_OFFSET : OXU_SPH_CORE_OFFSET),
3738				OXU_USBMODE,
3739				OXU_CM_HOST_ONLY | OXU_ES_LITTLE | OXU_VBPS);
3740
3741	hcd = usb_create_hcd(&oxu_hc_driver, dev,
3742				otg ? "oxu210hp_otg" : "oxu210hp_sph");
3743	if (!hcd)
3744		return ERR_PTR(-ENOMEM);
3745
3746	hcd->rsrc_start = memstart;
3747	hcd->rsrc_len = memlen;
3748	hcd->regs = base;
3749	hcd->irq = irq;
3750	hcd->state = HC_STATE_HALT;
3751
3752	oxu = hcd_to_oxu(hcd);
3753	oxu->is_otg = otg;
3754
3755	ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
3756	if (ret < 0)
3757		return ERR_PTR(ret);
3758
3759	return hcd;
3760}
3761
3762static int oxu_init(struct platform_device *pdev,
3763				unsigned long memstart, unsigned long memlen,
3764				void *base, int irq)
3765{
3766	struct oxu_info *info = platform_get_drvdata(pdev);
3767	struct usb_hcd *hcd;
3768	int ret;
3769
3770	/* First time configuration at start up */
3771	oxu_configuration(pdev, base);
3772
3773	ret = oxu_verify_id(pdev, base);
3774	if (ret) {
3775		dev_err(&pdev->dev, "no devices found!\n");
3776		return -ENODEV;
3777	}
3778
3779	/* Create the OTG controller */
3780	hcd = oxu_create(pdev, memstart, memlen, base, irq, 1);
3781	if (IS_ERR(hcd)) {
3782		dev_err(&pdev->dev, "cannot create OTG controller!\n");
3783		ret = PTR_ERR(hcd);
3784		goto error_create_otg;
3785	}
3786	info->hcd[0] = hcd;
3787
3788	/* Create the SPH host controller */
3789	hcd = oxu_create(pdev, memstart, memlen, base, irq, 0);
3790	if (IS_ERR(hcd)) {
3791		dev_err(&pdev->dev, "cannot create SPH controller!\n");
3792		ret = PTR_ERR(hcd);
3793		goto error_create_sph;
3794	}
3795	info->hcd[1] = hcd;
3796
3797	oxu_writel(base, OXU_CHIPIRQEN_SET,
3798		oxu_readl(base, OXU_CHIPIRQEN_SET) | 3);
3799
3800	return 0;
3801
3802error_create_sph:
3803	usb_remove_hcd(info->hcd[0]);
3804	usb_put_hcd(info->hcd[0]);
3805
3806error_create_otg:
3807	return ret;
3808}
3809
3810static int oxu_drv_probe(struct platform_device *pdev)
3811{
3812	struct resource *res;
3813	void *base;
3814	unsigned long memstart, memlen;
3815	int irq, ret;
3816	struct oxu_info *info;
3817
3818	if (usb_disabled())
3819		return -ENODEV;
3820
3821	/*
3822	 * Get the platform resources
3823	 */
3824	res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
3825	if (!res) {
3826		dev_err(&pdev->dev,
3827			"no IRQ! Check %s setup!\n", dev_name(&pdev->dev));
3828		return -ENODEV;
3829	}
3830	irq = res->start;
3831	dev_dbg(&pdev->dev, "IRQ resource %d\n", irq);
3832
3833	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3834	if (!res) {
3835		dev_err(&pdev->dev, "no registers address! Check %s setup!\n",
3836			dev_name(&pdev->dev));
3837		return -ENODEV;
3838	}
3839	memstart = res->start;
3840	memlen = res->end - res->start + 1;
3841	dev_dbg(&pdev->dev, "MEM resource %lx-%lx\n", memstart, memlen);
3842	if (!request_mem_region(memstart, memlen,
3843				oxu_hc_driver.description)) {
3844		dev_dbg(&pdev->dev, "memory area already in use\n");
3845		return -EBUSY;
3846	}
3847
3848	ret = set_irq_type(irq, IRQF_TRIGGER_FALLING);
3849	if (ret) {
3850		dev_err(&pdev->dev, "error setting irq type\n");
3851		ret = -EFAULT;
3852		goto error_set_irq_type;
3853	}
3854
3855	base = ioremap(memstart, memlen);
3856	if (!base) {
3857		dev_dbg(&pdev->dev, "error mapping memory\n");
3858		ret = -EFAULT;
3859		goto error_ioremap;
3860	}
3861
3862	/* Allocate a driver data struct to hold useful info for both
3863	 * SPH & OTG devices
3864	 */
3865	info = kzalloc(sizeof(struct oxu_info), GFP_KERNEL);
3866	if (!info) {
3867		dev_dbg(&pdev->dev, "error allocating memory\n");
3868		ret = -EFAULT;
3869		goto error_alloc;
3870	}
3871	platform_set_drvdata(pdev, info);
3872
3873	ret = oxu_init(pdev, memstart, memlen, base, irq);
3874	if (ret < 0) {
3875		dev_dbg(&pdev->dev, "cannot init USB devices\n");
3876		goto error_init;
3877	}
3878
3879	dev_info(&pdev->dev, "devices enabled and running\n");
3880	platform_set_drvdata(pdev, info);
3881
3882	return 0;
3883
3884error_init:
3885	kfree(info);
3886	platform_set_drvdata(pdev, NULL);
3887
3888error_alloc:
3889	iounmap(base);
3890
3891error_set_irq_type:
3892error_ioremap:
3893	release_mem_region(memstart, memlen);
3894
3895	dev_err(&pdev->dev, "init %s fail, %d\n", dev_name(&pdev->dev), ret);
3896	return ret;
3897}
3898
3899static void oxu_remove(struct platform_device *pdev, struct usb_hcd *hcd)
3900{
3901	usb_remove_hcd(hcd);
3902	usb_put_hcd(hcd);
3903}
3904
3905static int oxu_drv_remove(struct platform_device *pdev)
3906{
3907	struct oxu_info *info = platform_get_drvdata(pdev);
3908	unsigned long memstart = info->hcd[0]->rsrc_start,
3909			memlen = info->hcd[0]->rsrc_len;
3910	void *base = info->hcd[0]->regs;
3911
3912	oxu_remove(pdev, info->hcd[0]);
3913	oxu_remove(pdev, info->hcd[1]);
3914
3915	iounmap(base);
3916	release_mem_region(memstart, memlen);
3917
3918	kfree(info);
3919	platform_set_drvdata(pdev, NULL);
3920
3921	return 0;
3922}
3923
3924static void oxu_drv_shutdown(struct platform_device *pdev)
3925{
3926	oxu_drv_remove(pdev);
3927}
3928
3929#if 0
3930/* FIXME: TODO */
3931static int oxu_drv_suspend(struct device *dev)
3932{
3933	struct platform_device *pdev = to_platform_device(dev);
3934	struct usb_hcd *hcd = dev_get_drvdata(dev);
3935
3936	return 0;
3937}
3938
3939static int oxu_drv_resume(struct device *dev)
3940{
3941	struct platform_device *pdev = to_platform_device(dev);
3942	struct usb_hcd *hcd = dev_get_drvdata(dev);
3943
3944	return 0;
3945}
3946#else
3947#define oxu_drv_suspend	NULL
3948#define oxu_drv_resume	NULL
3949#endif
3950
3951static struct platform_driver oxu_driver = {
3952	.probe		= oxu_drv_probe,
3953	.remove		= oxu_drv_remove,
3954	.shutdown	= oxu_drv_shutdown,
3955	.suspend	= oxu_drv_suspend,
3956	.resume		= oxu_drv_resume,
3957	.driver = {
3958		.name = "oxu210hp-hcd",
3959		.bus = &platform_bus_type
3960	}
3961};
3962
3963static int __init oxu_module_init(void)
3964{
3965	int retval = 0;
3966
3967	retval = platform_driver_register(&oxu_driver);
3968	if (retval < 0)
3969		return retval;
3970
3971	return retval;
3972}
3973
3974static void __exit oxu_module_cleanup(void)
3975{
3976	platform_driver_unregister(&oxu_driver);
3977}
3978
3979module_init(oxu_module_init);
3980module_exit(oxu_module_cleanup);
3981
3982MODULE_DESCRIPTION("Oxford OXU210HP HCD driver - ver. " DRIVER_VERSION);
3983MODULE_AUTHOR("Rodolfo Giometti <giometti@linux.it>");
3984MODULE_LICENSE("GPL");
3985