musb_dsps.c revision 3b46dd76a9b3ce25a5177f61eed844f85ddb3ca6
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/init.h> 33#include <linux/io.h> 34#include <linux/of.h> 35#include <linux/err.h> 36#include <linux/platform_device.h> 37#include <linux/dma-mapping.h> 38#include <linux/pm_runtime.h> 39#include <linux/module.h> 40#include <linux/usb/nop-usb-xceiv.h> 41 42#include <linux/of.h> 43#include <linux/of_device.h> 44#include <linux/of_address.h> 45 46#include <plat/usb.h> 47 48#include "musb_core.h" 49 50#ifdef CONFIG_OF 51static const struct of_device_id musb_dsps_of_match[]; 52#endif 53 54/** 55 * avoid using musb_readx()/musb_writex() as glue layer should not be 56 * dependent on musb core layer symbols. 57 */ 58static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 59 { return __raw_readb(addr + offset); } 60 61static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 62 { return __raw_readl(addr + offset); } 63 64static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 65 { __raw_writeb(data, addr + offset); } 66 67static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 68 { __raw_writel(data, addr + offset); } 69 70/** 71 * DSPS musb wrapper register offset. 72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 73 * musb ips. 74 */ 75struct dsps_musb_wrapper { 76 u16 revision; 77 u16 control; 78 u16 status; 79 u16 eoi; 80 u16 epintr_set; 81 u16 epintr_clear; 82 u16 epintr_status; 83 u16 coreintr_set; 84 u16 coreintr_clear; 85 u16 coreintr_status; 86 u16 phy_utmi; 87 u16 mode; 88 89 /* bit positions for control */ 90 unsigned reset:5; 91 92 /* bit positions for interrupt */ 93 unsigned usb_shift:5; 94 u32 usb_mask; 95 u32 usb_bitmap; 96 unsigned drvvbus:5; 97 98 unsigned txep_shift:5; 99 u32 txep_mask; 100 u32 txep_bitmap; 101 102 unsigned rxep_shift:5; 103 u32 rxep_mask; 104 u32 rxep_bitmap; 105 106 /* bit positions for phy_utmi */ 107 unsigned otg_disable:5; 108 109 /* bit positions for mode */ 110 unsigned iddig:5; 111 /* miscellaneous stuff */ 112 u32 musb_core_offset; 113 u8 poll_seconds; 114 /* number of musb instances */ 115 u8 instances; 116}; 117 118/** 119 * DSPS glue structure. 120 */ 121struct dsps_glue { 122 struct device *dev; 123 struct platform_device *musb[2]; /* child musb pdev */ 124 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 125 struct timer_list timer[2]; /* otg_workaround timer */ 126 unsigned long last_timer[2]; /* last timer data for each instance */ 127}; 128 129/** 130 * dsps_musb_enable - enable interrupts 131 */ 132static void dsps_musb_enable(struct musb *musb) 133{ 134 struct device *dev = musb->controller; 135 struct platform_device *pdev = to_platform_device(dev->parent); 136 struct dsps_glue *glue = platform_get_drvdata(pdev); 137 const struct dsps_musb_wrapper *wrp = glue->wrp; 138 void __iomem *reg_base = musb->ctrl_base; 139 u32 epmask, coremask; 140 141 /* Workaround: setup IRQs through both register sets. */ 142 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 143 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 144 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 145 146 dsps_writel(reg_base, wrp->epintr_set, epmask); 147 dsps_writel(reg_base, wrp->coreintr_set, coremask); 148 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 149 dsps_writel(reg_base, wrp->coreintr_set, 150 (1 << wrp->drvvbus) << wrp->usb_shift); 151} 152 153/** 154 * dsps_musb_disable - disable HDRC and flush interrupts 155 */ 156static void dsps_musb_disable(struct musb *musb) 157{ 158 struct device *dev = musb->controller; 159 struct platform_device *pdev = to_platform_device(dev->parent); 160 struct dsps_glue *glue = platform_get_drvdata(pdev); 161 const struct dsps_musb_wrapper *wrp = glue->wrp; 162 void __iomem *reg_base = musb->ctrl_base; 163 164 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 165 dsps_writel(reg_base, wrp->epintr_clear, 166 wrp->txep_bitmap | wrp->rxep_bitmap); 167 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 168 dsps_writel(reg_base, wrp->eoi, 0); 169} 170 171static void otg_timer(unsigned long _musb) 172{ 173 struct musb *musb = (void *)_musb; 174 void __iomem *mregs = musb->mregs; 175 struct device *dev = musb->controller; 176 struct platform_device *pdev = to_platform_device(dev); 177 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 178 const struct dsps_musb_wrapper *wrp = glue->wrp; 179 u8 devctl; 180 unsigned long flags; 181 182 /* 183 * We poll because DSPS IP's won't expose several OTG-critical 184 * status change events (from the transceiver) otherwise. 185 */ 186 devctl = dsps_readb(mregs, MUSB_DEVCTL); 187 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 188 otg_state_string(musb->xceiv->state)); 189 190 spin_lock_irqsave(&musb->lock, flags); 191 switch (musb->xceiv->state) { 192 case OTG_STATE_A_WAIT_BCON: 193 devctl &= ~MUSB_DEVCTL_SESSION; 194 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 195 196 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 197 if (devctl & MUSB_DEVCTL_BDEVICE) { 198 musb->xceiv->state = OTG_STATE_B_IDLE; 199 MUSB_DEV_MODE(musb); 200 } else { 201 musb->xceiv->state = OTG_STATE_A_IDLE; 202 MUSB_HST_MODE(musb); 203 } 204 break; 205 case OTG_STATE_A_WAIT_VFALL: 206 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 207 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 208 MUSB_INTR_VBUSERROR << wrp->usb_shift); 209 break; 210 case OTG_STATE_B_IDLE: 211 devctl = dsps_readb(mregs, MUSB_DEVCTL); 212 if (devctl & MUSB_DEVCTL_BDEVICE) 213 mod_timer(&glue->timer[pdev->id], 214 jiffies + wrp->poll_seconds * HZ); 215 else 216 musb->xceiv->state = OTG_STATE_A_IDLE; 217 break; 218 default: 219 break; 220 } 221 spin_unlock_irqrestore(&musb->lock, flags); 222} 223 224static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 225{ 226 struct device *dev = musb->controller; 227 struct platform_device *pdev = to_platform_device(dev); 228 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 229 230 if (timeout == 0) 231 timeout = jiffies + msecs_to_jiffies(3); 232 233 /* Never idle if active, or when VBUS timeout is not set as host */ 234 if (musb->is_active || (musb->a_wait_bcon == 0 && 235 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 236 dev_dbg(musb->controller, "%s active, deleting timer\n", 237 otg_state_string(musb->xceiv->state)); 238 del_timer(&glue->timer[pdev->id]); 239 glue->last_timer[pdev->id] = jiffies; 240 return; 241 } 242 243 if (time_after(glue->last_timer[pdev->id], timeout) && 244 timer_pending(&glue->timer[pdev->id])) { 245 dev_dbg(musb->controller, 246 "Longer idle timer already pending, ignoring...\n"); 247 return; 248 } 249 glue->last_timer[pdev->id] = timeout; 250 251 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 252 otg_state_string(musb->xceiv->state), 253 jiffies_to_msecs(timeout - jiffies)); 254 mod_timer(&glue->timer[pdev->id], timeout); 255} 256 257static irqreturn_t dsps_interrupt(int irq, void *hci) 258{ 259 struct musb *musb = hci; 260 void __iomem *reg_base = musb->ctrl_base; 261 struct device *dev = musb->controller; 262 struct platform_device *pdev = to_platform_device(dev); 263 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 264 const struct dsps_musb_wrapper *wrp = glue->wrp; 265 unsigned long flags; 266 irqreturn_t ret = IRQ_NONE; 267 u32 epintr, usbintr; 268 269 spin_lock_irqsave(&musb->lock, flags); 270 271 /* Get endpoint interrupts */ 272 epintr = dsps_readl(reg_base, wrp->epintr_status); 273 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 274 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 275 276 if (epintr) 277 dsps_writel(reg_base, wrp->epintr_status, epintr); 278 279 /* Get usb core interrupts */ 280 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 281 if (!usbintr && !epintr) 282 goto eoi; 283 284 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 285 if (usbintr) 286 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 287 288 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 289 usbintr, epintr); 290 /* 291 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 292 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 293 * switch appropriately between halves of the OTG state machine. 294 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 295 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 296 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 297 */ 298 if (usbintr & MUSB_INTR_BABBLE) 299 pr_info("CAUTION: musb: Babble Interrupt Occured\n"); 300 301 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 302 int drvvbus = dsps_readl(reg_base, wrp->status); 303 void __iomem *mregs = musb->mregs; 304 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 305 int err; 306 307 err = musb->int_usb & MUSB_INTR_VBUSERROR; 308 if (err) { 309 /* 310 * The Mentor core doesn't debounce VBUS as needed 311 * to cope with device connect current spikes. This 312 * means it's not uncommon for bus-powered devices 313 * to get VBUS errors during enumeration. 314 * 315 * This is a workaround, but newer RTL from Mentor 316 * seems to allow a better one: "re"-starting sessions 317 * without waiting for VBUS to stop registering in 318 * devctl. 319 */ 320 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 321 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 322 mod_timer(&glue->timer[pdev->id], 323 jiffies + wrp->poll_seconds * HZ); 324 WARNING("VBUS error workaround (delay coming)\n"); 325 } else if (drvvbus) { 326 musb->is_active = 1; 327 MUSB_HST_MODE(musb); 328 musb->xceiv->otg->default_a = 1; 329 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 330 del_timer(&glue->timer[pdev->id]); 331 } else { 332 musb->is_active = 0; 333 MUSB_DEV_MODE(musb); 334 musb->xceiv->otg->default_a = 0; 335 musb->xceiv->state = OTG_STATE_B_IDLE; 336 } 337 338 /* NOTE: this must complete power-on within 100 ms. */ 339 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 340 drvvbus ? "on" : "off", 341 otg_state_string(musb->xceiv->state), 342 err ? " ERROR" : "", 343 devctl); 344 ret = IRQ_HANDLED; 345 } 346 347 if (musb->int_tx || musb->int_rx || musb->int_usb) 348 ret |= musb_interrupt(musb); 349 350 eoi: 351 /* EOI needs to be written for the IRQ to be re-asserted. */ 352 if (ret == IRQ_HANDLED || epintr || usbintr) 353 dsps_writel(reg_base, wrp->eoi, 1); 354 355 /* Poll for ID change */ 356 if (musb->xceiv->state == OTG_STATE_B_IDLE) 357 mod_timer(&glue->timer[pdev->id], 358 jiffies + wrp->poll_seconds * HZ); 359 360 spin_unlock_irqrestore(&musb->lock, flags); 361 362 return ret; 363} 364 365static int dsps_musb_init(struct musb *musb) 366{ 367 struct device *dev = musb->controller; 368 struct platform_device *pdev = to_platform_device(dev); 369 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 370 const struct dsps_musb_wrapper *wrp = glue->wrp; 371 void __iomem *reg_base = musb->ctrl_base; 372 u32 rev, val; 373 int status; 374 375 /* mentor core register starts at offset of 0x400 from musb base */ 376 musb->mregs += wrp->musb_core_offset; 377 378 /* Get the NOP PHY */ 379 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 380 if (IS_ERR_OR_NULL(musb->xceiv)) 381 return -ENODEV; 382 383 /* Returns zero if e.g. not clocked */ 384 rev = dsps_readl(reg_base, wrp->revision); 385 if (!rev) { 386 status = -ENODEV; 387 goto err0; 388 } 389 390 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb); 391 392 /* Reset the musb */ 393 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 394 395 musb->isr = dsps_interrupt; 396 397 /* reset the otgdisable bit, needed for host mode to work */ 398 val = dsps_readl(reg_base, wrp->phy_utmi); 399 val &= ~(1 << wrp->otg_disable); 400 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 401 402 /* clear level interrupt */ 403 dsps_writel(reg_base, wrp->eoi, 0); 404 405 return 0; 406err0: 407 usb_put_phy(musb->xceiv); 408 usb_nop_xceiv_unregister(); 409 return status; 410} 411 412static int dsps_musb_exit(struct musb *musb) 413{ 414 struct device *dev = musb->controller; 415 struct platform_device *pdev = to_platform_device(dev); 416 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 417 418 del_timer_sync(&glue->timer[pdev->id]); 419 420 /* NOP driver needs change if supporting dual instance */ 421 usb_put_phy(musb->xceiv); 422 usb_nop_xceiv_unregister(); 423 424 return 0; 425} 426 427static struct musb_platform_ops dsps_ops = { 428 .init = dsps_musb_init, 429 .exit = dsps_musb_exit, 430 431 .enable = dsps_musb_enable, 432 .disable = dsps_musb_disable, 433 434 .try_idle = dsps_musb_try_idle, 435}; 436 437static u64 musb_dmamask = DMA_BIT_MASK(32); 438 439static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) 440{ 441 struct device *dev = glue->dev; 442 struct platform_device *pdev = to_platform_device(dev); 443 struct musb_hdrc_platform_data *pdata = dev->platform_data; 444 struct device_node *np = pdev->dev.of_node; 445 struct musb_hdrc_config *config; 446 struct platform_device *musb; 447 struct resource *res; 448 struct resource resources[2]; 449 char res_name[10]; 450 int ret; 451 452 /* get memory resource */ 453 sprintf(res_name, "musb%d", id); 454 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); 455 if (!res) { 456 dev_err(dev, "%s get mem resource failed\n", res_name); 457 ret = -ENODEV; 458 goto err0; 459 } 460 res->parent = NULL; 461 resources[0] = *res; 462 463 /* get irq resource */ 464 sprintf(res_name, "musb%d-irq", id); 465 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); 466 if (!res) { 467 dev_err(dev, "%s get irq resource failed\n", res_name); 468 ret = -ENODEV; 469 goto err0; 470 } 471 res->parent = NULL; 472 resources[1] = *res; 473 resources[1].name = "mc"; 474 475 /* allocate the child platform device */ 476 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 477 if (!musb) { 478 dev_err(dev, "failed to allocate musb device\n"); 479 ret = -ENOMEM; 480 goto err0; 481 } 482 483 musb->dev.parent = dev; 484 musb->dev.dma_mask = &musb_dmamask; 485 musb->dev.coherent_dma_mask = musb_dmamask; 486 487 glue->musb[id] = musb; 488 489 ret = platform_device_add_resources(musb, resources, 2); 490 if (ret) { 491 dev_err(dev, "failed to add resources\n"); 492 goto err2; 493 } 494 495 if (np) { 496 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 497 if (!pdata) { 498 dev_err(&pdev->dev, 499 "failed to allocate musb platfrom data\n"); 500 ret = -ENOMEM; 501 goto err2; 502 } 503 504 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); 505 if (!config) { 506 dev_err(&pdev->dev, 507 "failed to allocate musb hdrc config\n"); 508 goto err2; 509 } 510 511 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps); 512 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits); 513 sprintf(res_name, "port%d-mode", id); 514 of_property_read_u32(np, res_name, (u32 *)&pdata->mode); 515 of_property_read_u32(np, "power", (u32 *)&pdata->power); 516 config->multipoint = of_property_read_bool(np, "multipoint"); 517 518 pdata->config = config; 519 } 520 521 pdata->platform_ops = &dsps_ops; 522 523 ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); 524 if (ret) { 525 dev_err(dev, "failed to add platform_data\n"); 526 goto err2; 527 } 528 529 ret = platform_device_add(musb); 530 if (ret) { 531 dev_err(dev, "failed to register musb device\n"); 532 goto err2; 533 } 534 535 return 0; 536 537err2: 538 platform_device_put(musb); 539err0: 540 return ret; 541} 542 543static int __devinit dsps_probe(struct platform_device *pdev) 544{ 545 struct device_node *np = pdev->dev.of_node; 546 const struct of_device_id *match; 547 const struct dsps_musb_wrapper *wrp; 548 struct dsps_glue *glue; 549 struct resource *iomem; 550 int ret, i; 551 552 match = of_match_node(musb_dsps_of_match, np); 553 if (!match) { 554 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 555 ret = -EINVAL; 556 goto err0; 557 } 558 wrp = match->data; 559 560 /* allocate glue */ 561 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 562 if (!glue) { 563 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 564 ret = -ENOMEM; 565 goto err0; 566 } 567 568 /* get memory resource */ 569 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 570 if (!iomem) { 571 dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); 572 ret = -ENODEV; 573 goto err1; 574 } 575 576 glue->dev = &pdev->dev; 577 578 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); 579 if (!glue->wrp) { 580 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); 581 ret = -ENOMEM; 582 goto err1; 583 } 584 platform_set_drvdata(pdev, glue); 585 586 /* enable the usbss clocks */ 587 pm_runtime_enable(&pdev->dev); 588 589 ret = pm_runtime_get_sync(&pdev->dev); 590 if (ret < 0) { 591 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 592 goto err2; 593 } 594 595 /* create the child platform device for all instances of musb */ 596 for (i = 0; i < wrp->instances ; i++) { 597 ret = dsps_create_musb_pdev(glue, i); 598 if (ret != 0) { 599 dev_err(&pdev->dev, "failed to create child pdev\n"); 600 /* release resources of previously created instances */ 601 for (i--; i >= 0 ; i--) 602 platform_device_unregister(glue->musb[i]); 603 goto err3; 604 } 605 } 606 607 return 0; 608 609err3: 610 pm_runtime_put(&pdev->dev); 611err2: 612 pm_runtime_disable(&pdev->dev); 613 kfree(glue->wrp); 614err1: 615 kfree(glue); 616err0: 617 return ret; 618} 619static int __devexit dsps_remove(struct platform_device *pdev) 620{ 621 struct dsps_glue *glue = platform_get_drvdata(pdev); 622 const struct dsps_musb_wrapper *wrp = glue->wrp; 623 int i; 624 625 /* delete the child platform device */ 626 for (i = 0; i < wrp->instances ; i++) 627 platform_device_unregister(glue->musb[i]); 628 629 /* disable usbss clocks */ 630 pm_runtime_put(&pdev->dev); 631 pm_runtime_disable(&pdev->dev); 632 kfree(glue->wrp); 633 kfree(glue); 634 return 0; 635} 636 637#ifdef CONFIG_PM_SLEEP 638static int dsps_suspend(struct device *dev) 639{ 640 return 0; 641} 642 643static int dsps_resume(struct device *dev) 644{ 645 return 0; 646} 647#endif 648 649static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 650 651static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { 652 .revision = 0x00, 653 .control = 0x14, 654 .status = 0x18, 655 .eoi = 0x24, 656 .epintr_set = 0x38, 657 .epintr_clear = 0x40, 658 .epintr_status = 0x30, 659 .coreintr_set = 0x3c, 660 .coreintr_clear = 0x44, 661 .coreintr_status = 0x34, 662 .phy_utmi = 0xe0, 663 .mode = 0xe8, 664 .reset = 0, 665 .otg_disable = 21, 666 .iddig = 8, 667 .usb_shift = 0, 668 .usb_mask = 0x1ff, 669 .usb_bitmap = (0x1ff << 0), 670 .drvvbus = 8, 671 .txep_shift = 0, 672 .txep_mask = 0xffff, 673 .txep_bitmap = (0xffff << 0), 674 .rxep_shift = 16, 675 .rxep_mask = 0xfffe, 676 .rxep_bitmap = (0xfffe << 16), 677 .musb_core_offset = 0x400, 678 .poll_seconds = 2, 679 .instances = 1, 680}; 681 682static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { 683 { 684 .name = "musb-ti81xx", 685 .driver_data = (kernel_ulong_t) &ti81xx_driver_data, 686 }, 687 { }, /* Terminating Entry */ 688}; 689MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); 690 691#ifdef CONFIG_OF 692static const struct of_device_id musb_dsps_of_match[] __devinitconst = { 693 { .compatible = "ti,musb-am33xx", 694 .data = (void *) &ti81xx_driver_data, }, 695 { }, 696}; 697MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 698#endif 699 700static struct platform_driver dsps_usbss_driver = { 701 .probe = dsps_probe, 702 .remove = __devexit_p(dsps_remove), 703 .driver = { 704 .name = "musb-dsps", 705 .pm = &dsps_pm_ops, 706 .of_match_table = of_match_ptr(musb_dsps_of_match), 707 }, 708 .id_table = musb_dsps_id_table, 709}; 710 711MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 712MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 713MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 714MODULE_LICENSE("GPL v2"); 715 716static int __init dsps_init(void) 717{ 718 return platform_driver_register(&dsps_usbss_driver); 719} 720subsys_initcall(dsps_init); 721 722static void __exit dsps_exit(void) 723{ 724 platform_driver_unregister(&dsps_usbss_driver); 725} 726module_exit(dsps_exit); 727