musb_dsps.c revision 65b3d52d02a558fbfe08e43688e15390c5ab3067
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/init.h> 33#include <linux/io.h> 34#include <linux/err.h> 35#include <linux/platform_device.h> 36#include <linux/dma-mapping.h> 37#include <linux/pm_runtime.h> 38#include <linux/module.h> 39 40#include <linux/of.h> 41#include <linux/of_device.h> 42#include <linux/of_address.h> 43 44#include <plat/usb.h> 45 46#include "musb_core.h" 47 48/** 49 * avoid using musb_readx()/musb_writex() as glue layer should not be 50 * dependent on musb core layer symbols. 51 */ 52static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 53 { return __raw_readb(addr + offset); } 54 55static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 56 { return __raw_readl(addr + offset); } 57 58static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 59 { __raw_writeb(data, addr + offset); } 60 61static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 62 { __raw_writel(data, addr + offset); } 63 64/** 65 * DSPS musb wrapper register offset. 66 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 67 * musb ips. 68 */ 69struct dsps_musb_wrapper { 70 u16 revision; 71 u16 control; 72 u16 status; 73 u16 eoi; 74 u16 epintr_set; 75 u16 epintr_clear; 76 u16 epintr_status; 77 u16 coreintr_set; 78 u16 coreintr_clear; 79 u16 coreintr_status; 80 u16 phy_utmi; 81 u16 mode; 82 83 /* bit positions for control */ 84 unsigned reset:5; 85 86 /* bit positions for interrupt */ 87 unsigned usb_shift:5; 88 u32 usb_mask; 89 u32 usb_bitmap; 90 unsigned drvvbus:5; 91 92 unsigned txep_shift:5; 93 u32 txep_mask; 94 u32 txep_bitmap; 95 96 unsigned rxep_shift:5; 97 u32 rxep_mask; 98 u32 rxep_bitmap; 99 100 /* bit positions for phy_utmi */ 101 unsigned otg_disable:5; 102 103 /* bit positions for mode */ 104 unsigned iddig:5; 105 /* miscellaneous stuff */ 106 u32 musb_core_offset; 107 u8 poll_seconds; 108}; 109 110/** 111 * DSPS glue structure. 112 */ 113struct dsps_glue { 114 struct device *dev; 115 struct platform_device *musb; /* child musb pdev */ 116 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 117 struct timer_list timer; /* otg_workaround timer */ 118}; 119 120/** 121 * dsps_musb_enable - enable interrupts 122 */ 123static void dsps_musb_enable(struct musb *musb) 124{ 125 struct device *dev = musb->controller; 126 struct platform_device *pdev = to_platform_device(dev->parent); 127 struct dsps_glue *glue = platform_get_drvdata(pdev); 128 const struct dsps_musb_wrapper *wrp = glue->wrp; 129 void __iomem *reg_base = musb->ctrl_base; 130 u32 epmask, coremask; 131 132 /* Workaround: setup IRQs through both register sets. */ 133 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 134 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 135 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 136 137 dsps_writel(reg_base, wrp->epintr_set, epmask); 138 dsps_writel(reg_base, wrp->coreintr_set, coremask); 139 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 140 dsps_writel(reg_base, wrp->coreintr_set, 141 (1 << wrp->drvvbus) << wrp->usb_shift); 142} 143 144/** 145 * dsps_musb_disable - disable HDRC and flush interrupts 146 */ 147static void dsps_musb_disable(struct musb *musb) 148{ 149 struct device *dev = musb->controller; 150 struct platform_device *pdev = to_platform_device(dev->parent); 151 struct dsps_glue *glue = platform_get_drvdata(pdev); 152 const struct dsps_musb_wrapper *wrp = glue->wrp; 153 void __iomem *reg_base = musb->ctrl_base; 154 155 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 156 dsps_writel(reg_base, wrp->epintr_clear, 157 wrp->txep_bitmap | wrp->rxep_bitmap); 158 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 159 dsps_writel(reg_base, wrp->eoi, 0); 160} 161 162static void otg_timer(unsigned long _musb) 163{ 164 struct musb *musb = (void *)_musb; 165 void __iomem *mregs = musb->mregs; 166 struct device *dev = musb->controller; 167 struct platform_device *pdev = to_platform_device(dev->parent); 168 struct dsps_glue *glue = platform_get_drvdata(pdev); 169 const struct dsps_musb_wrapper *wrp = glue->wrp; 170 u8 devctl; 171 unsigned long flags; 172 173 /* 174 * We poll because DSPS IP's won't expose several OTG-critical 175 * status change events (from the transceiver) otherwise. 176 */ 177 devctl = dsps_readb(mregs, MUSB_DEVCTL); 178 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 179 otg_state_string(musb->xceiv->state)); 180 181 spin_lock_irqsave(&musb->lock, flags); 182 switch (musb->xceiv->state) { 183 case OTG_STATE_A_WAIT_BCON: 184 devctl &= ~MUSB_DEVCTL_SESSION; 185 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 186 187 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 188 if (devctl & MUSB_DEVCTL_BDEVICE) { 189 musb->xceiv->state = OTG_STATE_B_IDLE; 190 MUSB_DEV_MODE(musb); 191 } else { 192 musb->xceiv->state = OTG_STATE_A_IDLE; 193 MUSB_HST_MODE(musb); 194 } 195 break; 196 case OTG_STATE_A_WAIT_VFALL: 197 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 198 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 199 MUSB_INTR_VBUSERROR << wrp->usb_shift); 200 break; 201 case OTG_STATE_B_IDLE: 202 devctl = dsps_readb(mregs, MUSB_DEVCTL); 203 if (devctl & MUSB_DEVCTL_BDEVICE) 204 mod_timer(&glue->timer, 205 jiffies + wrp->poll_seconds * HZ); 206 else 207 musb->xceiv->state = OTG_STATE_A_IDLE; 208 break; 209 default: 210 break; 211 } 212 spin_unlock_irqrestore(&musb->lock, flags); 213} 214 215static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 216{ 217 struct device *dev = musb->controller; 218 struct platform_device *pdev = to_platform_device(dev->parent); 219 struct dsps_glue *glue = platform_get_drvdata(pdev); 220 static unsigned long last_timer; 221 222 if (timeout == 0) 223 timeout = jiffies + msecs_to_jiffies(3); 224 225 /* Never idle if active, or when VBUS timeout is not set as host */ 226 if (musb->is_active || (musb->a_wait_bcon == 0 && 227 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 228 dev_dbg(musb->controller, "%s active, deleting timer\n", 229 otg_state_string(musb->xceiv->state)); 230 del_timer(&glue->timer); 231 last_timer = jiffies; 232 return; 233 } 234 235 if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) { 236 dev_dbg(musb->controller, 237 "Longer idle timer already pending, ignoring...\n"); 238 return; 239 } 240 last_timer = timeout; 241 242 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 243 otg_state_string(musb->xceiv->state), 244 jiffies_to_msecs(timeout - jiffies)); 245 mod_timer(&glue->timer, timeout); 246} 247 248static irqreturn_t dsps_interrupt(int irq, void *hci) 249{ 250 struct musb *musb = hci; 251 void __iomem *reg_base = musb->ctrl_base; 252 struct device *dev = musb->controller; 253 struct platform_device *pdev = to_platform_device(dev->parent); 254 struct dsps_glue *glue = platform_get_drvdata(pdev); 255 const struct dsps_musb_wrapper *wrp = glue->wrp; 256 unsigned long flags; 257 irqreturn_t ret = IRQ_NONE; 258 u32 epintr, usbintr; 259 260 spin_lock_irqsave(&musb->lock, flags); 261 262 /* Get endpoint interrupts */ 263 epintr = dsps_readl(reg_base, wrp->epintr_status); 264 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 265 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 266 267 if (epintr) 268 dsps_writel(reg_base, wrp->epintr_status, epintr); 269 270 /* Get usb core interrupts */ 271 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 272 if (!usbintr && !epintr) 273 goto eoi; 274 275 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 276 if (usbintr) 277 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 278 279 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 280 usbintr, epintr); 281 /* 282 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 283 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 284 * switch appropriately between halves of the OTG state machine. 285 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 286 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 287 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 288 */ 289 if (usbintr & MUSB_INTR_BABBLE) 290 pr_info("CAUTION: musb: Babble Interrupt Occured\n"); 291 292 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 293 int drvvbus = dsps_readl(reg_base, wrp->status); 294 void __iomem *mregs = musb->mregs; 295 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 296 int err; 297 298 err = musb->int_usb & MUSB_INTR_VBUSERROR; 299 if (err) { 300 /* 301 * The Mentor core doesn't debounce VBUS as needed 302 * to cope with device connect current spikes. This 303 * means it's not uncommon for bus-powered devices 304 * to get VBUS errors during enumeration. 305 * 306 * This is a workaround, but newer RTL from Mentor 307 * seems to allow a better one: "re"-starting sessions 308 * without waiting for VBUS to stop registering in 309 * devctl. 310 */ 311 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 312 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 313 mod_timer(&glue->timer, 314 jiffies + wrp->poll_seconds * HZ); 315 WARNING("VBUS error workaround (delay coming)\n"); 316 } else if (drvvbus) { 317 musb->is_active = 1; 318 MUSB_HST_MODE(musb); 319 musb->xceiv->otg->default_a = 1; 320 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 321 del_timer(&glue->timer); 322 } else { 323 musb->is_active = 0; 324 MUSB_DEV_MODE(musb); 325 musb->xceiv->otg->default_a = 0; 326 musb->xceiv->state = OTG_STATE_B_IDLE; 327 } 328 329 /* NOTE: this must complete power-on within 100 ms. */ 330 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 331 drvvbus ? "on" : "off", 332 otg_state_string(musb->xceiv->state), 333 err ? " ERROR" : "", 334 devctl); 335 ret = IRQ_HANDLED; 336 } 337 338 if (musb->int_tx || musb->int_rx || musb->int_usb) 339 ret |= musb_interrupt(musb); 340 341 eoi: 342 /* EOI needs to be written for the IRQ to be re-asserted. */ 343 if (ret == IRQ_HANDLED || epintr || usbintr) 344 dsps_writel(reg_base, wrp->eoi, 1); 345 346 /* Poll for ID change */ 347 if (musb->xceiv->state == OTG_STATE_B_IDLE) 348 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 349 350 spin_unlock_irqrestore(&musb->lock, flags); 351 352 return ret; 353} 354 355static int dsps_musb_init(struct musb *musb) 356{ 357 struct device *dev = musb->controller; 358 struct musb_hdrc_platform_data *plat = dev->platform_data; 359 struct platform_device *pdev = to_platform_device(dev->parent); 360 struct dsps_glue *glue = platform_get_drvdata(pdev); 361 const struct dsps_musb_wrapper *wrp = glue->wrp; 362 struct omap_musb_board_data *data = plat->board_data; 363 void __iomem *reg_base = musb->ctrl_base; 364 u32 rev, val; 365 int status; 366 367 /* mentor core register starts at offset of 0x400 from musb base */ 368 musb->mregs += wrp->musb_core_offset; 369 370 /* NOP driver needs change if supporting dual instance */ 371 usb_nop_xceiv_register(); 372 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 373 if (IS_ERR_OR_NULL(musb->xceiv)) 374 return -ENODEV; 375 376 /* Returns zero if e.g. not clocked */ 377 rev = dsps_readl(reg_base, wrp->revision); 378 if (!rev) { 379 status = -ENODEV; 380 goto err0; 381 } 382 383 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 384 385 /* Reset the musb */ 386 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 387 388 /* Start the on-chip PHY and its PLL. */ 389 if (data->set_phy_power) 390 data->set_phy_power(1); 391 392 musb->isr = dsps_interrupt; 393 394 /* reset the otgdisable bit, needed for host mode to work */ 395 val = dsps_readl(reg_base, wrp->phy_utmi); 396 val &= ~(1 << wrp->otg_disable); 397 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 398 399 /* clear level interrupt */ 400 dsps_writel(reg_base, wrp->eoi, 0); 401 402 return 0; 403err0: 404 usb_put_phy(musb->xceiv); 405 usb_nop_xceiv_unregister(); 406 return status; 407} 408 409static int dsps_musb_exit(struct musb *musb) 410{ 411 struct device *dev = musb->controller; 412 struct musb_hdrc_platform_data *plat = dev->platform_data; 413 struct omap_musb_board_data *data = plat->board_data; 414 struct platform_device *pdev = to_platform_device(dev->parent); 415 struct dsps_glue *glue = platform_get_drvdata(pdev); 416 417 del_timer_sync(&glue->timer); 418 419 /* Shutdown the on-chip PHY and its PLL. */ 420 if (data->set_phy_power) 421 data->set_phy_power(0); 422 423 /* NOP driver needs change if supporting dual instance */ 424 usb_put_phy(musb->xceiv); 425 usb_nop_xceiv_unregister(); 426 427 return 0; 428} 429 430static struct musb_platform_ops dsps_ops = { 431 .init = dsps_musb_init, 432 .exit = dsps_musb_exit, 433 434 .enable = dsps_musb_enable, 435 .disable = dsps_musb_disable, 436 437 .try_idle = dsps_musb_try_idle, 438}; 439 440static u64 musb_dmamask = DMA_BIT_MASK(32); 441 442static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) 443{ 444 struct device *dev = glue->dev; 445 struct platform_device *pdev = to_platform_device(dev); 446 struct musb_hdrc_platform_data *pdata = dev->platform_data; 447 struct platform_device *musb; 448 struct resource *res; 449 struct resource resources[2]; 450 char res_name[10]; 451 int ret, musbid; 452 453 /* get memory resource */ 454 sprintf(res_name, "musb%d", id); 455 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); 456 if (!res) { 457 dev_err(dev, "%s get mem resource failed\n", res_name); 458 ret = -ENODEV; 459 goto err0; 460 } 461 res->parent = NULL; 462 resources[0] = *res; 463 464 /* get irq resource */ 465 sprintf(res_name, "musb%d-irq", id); 466 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); 467 if (!res) { 468 dev_err(dev, "%s get irq resource failed\n", res_name); 469 ret = -ENODEV; 470 goto err0; 471 } 472 strcpy((u8 *)res->name, "mc"); 473 res->parent = NULL; 474 resources[1] = *res; 475 476 /* get the musb id */ 477 musbid = musb_get_id(dev, GFP_KERNEL); 478 if (musbid < 0) { 479 dev_err(dev, "failed to allocate musb id\n"); 480 ret = -ENOMEM; 481 goto err0; 482 } 483 /* allocate the child platform device */ 484 musb = platform_device_alloc("musb-hdrc", musbid); 485 if (!musb) { 486 dev_err(dev, "failed to allocate musb device\n"); 487 ret = -ENOMEM; 488 goto err1; 489 } 490 491 musb->id = musbid; 492 musb->dev.parent = dev; 493 musb->dev.dma_mask = &musb_dmamask; 494 musb->dev.coherent_dma_mask = musb_dmamask; 495 496 glue->musb = musb; 497 498 pdata->platform_ops = &dsps_ops; 499 500 ret = platform_device_add_resources(musb, resources, 2); 501 if (ret) { 502 dev_err(dev, "failed to add resources\n"); 503 goto err2; 504 } 505 506 ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); 507 if (ret) { 508 dev_err(dev, "failed to add platform_data\n"); 509 goto err2; 510 } 511 512 ret = platform_device_add(musb); 513 if (ret) { 514 dev_err(dev, "failed to register musb device\n"); 515 goto err2; 516 } 517 518 return 0; 519 520err2: 521 platform_device_put(musb); 522err1: 523 musb_put_id(dev, musbid); 524err0: 525 return ret; 526} 527 528static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue) 529{ 530 musb_put_id(glue->dev, glue->musb->id); 531 platform_device_del(glue->musb); 532 platform_device_put(glue->musb); 533} 534 535static int __devinit dsps_probe(struct platform_device *pdev) 536{ 537 const struct platform_device_id *id = platform_get_device_id(pdev); 538 const struct dsps_musb_wrapper *wrp = 539 (struct dsps_musb_wrapper *)id->driver_data; 540 struct dsps_glue *glue; 541 struct resource *iomem; 542 int ret; 543 544 /* allocate glue */ 545 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 546 if (!glue) { 547 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 548 ret = -ENOMEM; 549 goto err0; 550 } 551 552 /* get memory resource */ 553 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 554 if (!iomem) { 555 dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); 556 ret = -ENODEV; 557 goto err1; 558 } 559 560 glue->dev = &pdev->dev; 561 562 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); 563 if (!glue->wrp) { 564 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); 565 ret = -ENOMEM; 566 goto err1; 567 } 568 platform_set_drvdata(pdev, glue); 569 570 /* create the child platform device for first instances of musb */ 571 ret = dsps_create_musb_pdev(glue, 0); 572 if (ret != 0) { 573 dev_err(&pdev->dev, "failed to create child pdev\n"); 574 goto err2; 575 } 576 577 /* enable the usbss clocks */ 578 pm_runtime_enable(&pdev->dev); 579 580 ret = pm_runtime_get_sync(&pdev->dev); 581 if (ret < 0) { 582 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 583 goto err3; 584 } 585 586 return 0; 587 588err3: 589 pm_runtime_disable(&pdev->dev); 590err2: 591 kfree(glue->wrp); 592err1: 593 kfree(glue); 594err0: 595 return ret; 596} 597static int __devexit dsps_remove(struct platform_device *pdev) 598{ 599 struct dsps_glue *glue = platform_get_drvdata(pdev); 600 601 /* delete the child platform device */ 602 dsps_delete_musb_pdev(glue); 603 604 /* disable usbss clocks */ 605 pm_runtime_put(&pdev->dev); 606 pm_runtime_disable(&pdev->dev); 607 kfree(glue->wrp); 608 kfree(glue); 609 return 0; 610} 611 612#ifdef CONFIG_PM_SLEEP 613static int dsps_suspend(struct device *dev) 614{ 615 struct musb_hdrc_platform_data *plat = dev->platform_data; 616 struct omap_musb_board_data *data = plat->board_data; 617 618 /* Shutdown the on-chip PHY and its PLL. */ 619 if (data->set_phy_power) 620 data->set_phy_power(0); 621 622 return 0; 623} 624 625static int dsps_resume(struct device *dev) 626{ 627 struct musb_hdrc_platform_data *plat = dev->platform_data; 628 struct omap_musb_board_data *data = plat->board_data; 629 630 /* Start the on-chip PHY and its PLL. */ 631 if (data->set_phy_power) 632 data->set_phy_power(1); 633 634 return 0; 635} 636#endif 637 638static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 639 640static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { 641 .revision = 0x00, 642 .control = 0x14, 643 .status = 0x18, 644 .eoi = 0x24, 645 .epintr_set = 0x38, 646 .epintr_clear = 0x40, 647 .epintr_status = 0x30, 648 .coreintr_set = 0x3c, 649 .coreintr_clear = 0x44, 650 .coreintr_status = 0x34, 651 .phy_utmi = 0xe0, 652 .mode = 0xe8, 653 .reset = 0, 654 .otg_disable = 21, 655 .iddig = 8, 656 .usb_shift = 0, 657 .usb_mask = 0x1ff, 658 .usb_bitmap = (0x1ff << 0), 659 .drvvbus = 8, 660 .txep_shift = 0, 661 .txep_mask = 0xffff, 662 .txep_bitmap = (0xffff << 0), 663 .rxep_shift = 16, 664 .rxep_mask = 0xfffe, 665 .rxep_bitmap = (0xfffe << 16), 666 .musb_core_offset = 0x400, 667 .poll_seconds = 2, 668}; 669 670static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { 671 { 672 .name = "musb-ti81xx", 673 .driver_data = (kernel_ulong_t) &ti81xx_driver_data, 674 }, 675 { }, /* Terminating Entry */ 676}; 677MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); 678 679static const struct of_device_id musb_dsps_of_match[] __devinitconst = { 680 { .compatible = "musb-ti81xx", }, 681 { .compatible = "ti,ti81xx-musb", }, 682 { .compatible = "ti,am335x-musb", }, 683 { }, 684}; 685MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 686 687static struct platform_driver dsps_usbss_driver = { 688 .probe = dsps_probe, 689 .remove = __devexit_p(dsps_remove), 690 .driver = { 691 .name = "musb-dsps", 692 .pm = &dsps_pm_ops, 693 .of_match_table = musb_dsps_of_match, 694 }, 695 .id_table = musb_dsps_id_table, 696}; 697 698MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 699MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 700MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 701MODULE_LICENSE("GPL v2"); 702 703static int __init dsps_init(void) 704{ 705 return platform_driver_register(&dsps_usbss_driver); 706} 707subsys_initcall(dsps_init); 708 709static void __exit dsps_exit(void) 710{ 711 platform_driver_unregister(&dsps_usbss_driver); 712} 713module_exit(dsps_exit); 714