musb_dsps.c revision 78c289f8769aaefcc52d26ca53c8b2ee545fb332
1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA  02111-1307  USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32#include <linux/init.h>
33#include <linux/io.h>
34#include <linux/err.h>
35#include <linux/platform_device.h>
36#include <linux/dma-mapping.h>
37#include <linux/pm_runtime.h>
38#include <linux/module.h>
39#include <linux/usb/nop-usb-xceiv.h>
40
41#include <linux/of.h>
42#include <linux/of_device.h>
43#include <linux/of_address.h>
44
45#include <plat/usb.h>
46
47#include "musb_core.h"
48
49/**
50 * avoid using musb_readx()/musb_writex() as glue layer should not be
51 * dependent on musb core layer symbols.
52 */
53static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
54	{ return __raw_readb(addr + offset); }
55
56static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
57	{ return __raw_readl(addr + offset); }
58
59static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
60	{ __raw_writeb(data, addr + offset); }
61
62static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
63	{ __raw_writel(data, addr + offset); }
64
65/**
66 * DSPS musb wrapper register offset.
67 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
68 * musb ips.
69 */
70struct dsps_musb_wrapper {
71	u16	revision;
72	u16	control;
73	u16	status;
74	u16	eoi;
75	u16	epintr_set;
76	u16	epintr_clear;
77	u16	epintr_status;
78	u16	coreintr_set;
79	u16	coreintr_clear;
80	u16	coreintr_status;
81	u16	phy_utmi;
82	u16	mode;
83
84	/* bit positions for control */
85	unsigned	reset:5;
86
87	/* bit positions for interrupt */
88	unsigned	usb_shift:5;
89	u32		usb_mask;
90	u32		usb_bitmap;
91	unsigned	drvvbus:5;
92
93	unsigned	txep_shift:5;
94	u32		txep_mask;
95	u32		txep_bitmap;
96
97	unsigned	rxep_shift:5;
98	u32		rxep_mask;
99	u32		rxep_bitmap;
100
101	/* bit positions for phy_utmi */
102	unsigned	otg_disable:5;
103
104	/* bit positions for mode */
105	unsigned	iddig:5;
106	/* miscellaneous stuff */
107	u32		musb_core_offset;
108	u8		poll_seconds;
109};
110
111/**
112 * DSPS glue structure.
113 */
114struct dsps_glue {
115	struct device *dev;
116	struct platform_device *musb;	/* child musb pdev */
117	const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
118	struct timer_list timer;	/* otg_workaround timer */
119};
120
121/**
122 * dsps_musb_enable - enable interrupts
123 */
124static void dsps_musb_enable(struct musb *musb)
125{
126	struct device *dev = musb->controller;
127	struct platform_device *pdev = to_platform_device(dev->parent);
128	struct dsps_glue *glue = platform_get_drvdata(pdev);
129	const struct dsps_musb_wrapper *wrp = glue->wrp;
130	void __iomem *reg_base = musb->ctrl_base;
131	u32 epmask, coremask;
132
133	/* Workaround: setup IRQs through both register sets. */
134	epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
135	       ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
136	coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
137
138	dsps_writel(reg_base, wrp->epintr_set, epmask);
139	dsps_writel(reg_base, wrp->coreintr_set, coremask);
140	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
141	if (is_otg_enabled(musb))
142		dsps_writel(reg_base, wrp->coreintr_set,
143			    (1 << wrp->drvvbus) << wrp->usb_shift);
144}
145
146/**
147 * dsps_musb_disable - disable HDRC and flush interrupts
148 */
149static void dsps_musb_disable(struct musb *musb)
150{
151	struct device *dev = musb->controller;
152	struct platform_device *pdev = to_platform_device(dev->parent);
153	struct dsps_glue *glue = platform_get_drvdata(pdev);
154	const struct dsps_musb_wrapper *wrp = glue->wrp;
155	void __iomem *reg_base = musb->ctrl_base;
156
157	dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
158	dsps_writel(reg_base, wrp->epintr_clear,
159			 wrp->txep_bitmap | wrp->rxep_bitmap);
160	dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
161	dsps_writel(reg_base, wrp->eoi, 0);
162}
163
164static void otg_timer(unsigned long _musb)
165{
166	struct musb *musb = (void *)_musb;
167	void __iomem *mregs = musb->mregs;
168	struct device *dev = musb->controller;
169	struct platform_device *pdev = to_platform_device(dev->parent);
170	struct dsps_glue *glue = platform_get_drvdata(pdev);
171	const struct dsps_musb_wrapper *wrp = glue->wrp;
172	u8 devctl;
173	unsigned long flags;
174
175	/*
176	 * We poll because DSPS IP's won't expose several OTG-critical
177	 * status change events (from the transceiver) otherwise.
178	 */
179	devctl = dsps_readb(mregs, MUSB_DEVCTL);
180	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
181				otg_state_string(musb->xceiv->state));
182
183	spin_lock_irqsave(&musb->lock, flags);
184	switch (musb->xceiv->state) {
185	case OTG_STATE_A_WAIT_BCON:
186		devctl &= ~MUSB_DEVCTL_SESSION;
187		dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
188
189		devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
190		if (devctl & MUSB_DEVCTL_BDEVICE) {
191			musb->xceiv->state = OTG_STATE_B_IDLE;
192			MUSB_DEV_MODE(musb);
193		} else {
194			musb->xceiv->state = OTG_STATE_A_IDLE;
195			MUSB_HST_MODE(musb);
196		}
197		break;
198	case OTG_STATE_A_WAIT_VFALL:
199		musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
200		dsps_writel(musb->ctrl_base, wrp->coreintr_set,
201			    MUSB_INTR_VBUSERROR << wrp->usb_shift);
202		break;
203	case OTG_STATE_B_IDLE:
204		if (!is_peripheral_enabled(musb))
205			break;
206
207		devctl = dsps_readb(mregs, MUSB_DEVCTL);
208		if (devctl & MUSB_DEVCTL_BDEVICE)
209			mod_timer(&glue->timer,
210					jiffies + wrp->poll_seconds * HZ);
211		else
212			musb->xceiv->state = OTG_STATE_A_IDLE;
213		break;
214	default:
215		break;
216	}
217	spin_unlock_irqrestore(&musb->lock, flags);
218}
219
220static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
221{
222	struct device *dev = musb->controller;
223	struct platform_device *pdev = to_platform_device(dev->parent);
224	struct dsps_glue *glue = platform_get_drvdata(pdev);
225	static unsigned long last_timer;
226
227	if (!is_otg_enabled(musb))
228		return;
229
230	if (timeout == 0)
231		timeout = jiffies + msecs_to_jiffies(3);
232
233	/* Never idle if active, or when VBUS timeout is not set as host */
234	if (musb->is_active || (musb->a_wait_bcon == 0 &&
235				musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
236		dev_dbg(musb->controller, "%s active, deleting timer\n",
237				otg_state_string(musb->xceiv->state));
238		del_timer(&glue->timer);
239		last_timer = jiffies;
240		return;
241	}
242
243	if (time_after(last_timer, timeout) && timer_pending(&glue->timer)) {
244		dev_dbg(musb->controller,
245			"Longer idle timer already pending, ignoring...\n");
246		return;
247	}
248	last_timer = timeout;
249
250	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
251		otg_state_string(musb->xceiv->state),
252			jiffies_to_msecs(timeout - jiffies));
253	mod_timer(&glue->timer, timeout);
254}
255
256static irqreturn_t dsps_interrupt(int irq, void *hci)
257{
258	struct musb  *musb = hci;
259	void __iomem *reg_base = musb->ctrl_base;
260	struct device *dev = musb->controller;
261	struct platform_device *pdev = to_platform_device(dev->parent);
262	struct dsps_glue *glue = platform_get_drvdata(pdev);
263	const struct dsps_musb_wrapper *wrp = glue->wrp;
264	unsigned long flags;
265	irqreturn_t ret = IRQ_NONE;
266	u32 epintr, usbintr;
267
268	spin_lock_irqsave(&musb->lock, flags);
269
270	/* Get endpoint interrupts */
271	epintr = dsps_readl(reg_base, wrp->epintr_status);
272	musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
273	musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
274
275	if (epintr)
276		dsps_writel(reg_base, wrp->epintr_status, epintr);
277
278	/* Get usb core interrupts */
279	usbintr = dsps_readl(reg_base, wrp->coreintr_status);
280	if (!usbintr && !epintr)
281		goto eoi;
282
283	musb->int_usb =	(usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
284	if (usbintr)
285		dsps_writel(reg_base, wrp->coreintr_status, usbintr);
286
287	dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
288			usbintr, epintr);
289	/*
290	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
291	 * DSPS IP's missing ID change IRQ.  We need an ID change IRQ to
292	 * switch appropriately between halves of the OTG state machine.
293	 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
294	 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
295	 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
296	 */
297	if ((usbintr & MUSB_INTR_BABBLE) && is_host_enabled(musb))
298		pr_info("CAUTION: musb: Babble Interrupt Occured\n");
299
300	if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
301		int drvvbus = dsps_readl(reg_base, wrp->status);
302		void __iomem *mregs = musb->mregs;
303		u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
304		int err;
305
306		err = is_host_enabled(musb) && (musb->int_usb &
307						MUSB_INTR_VBUSERROR);
308		if (err) {
309			/*
310			 * The Mentor core doesn't debounce VBUS as needed
311			 * to cope with device connect current spikes. This
312			 * means it's not uncommon for bus-powered devices
313			 * to get VBUS errors during enumeration.
314			 *
315			 * This is a workaround, but newer RTL from Mentor
316			 * seems to allow a better one: "re"-starting sessions
317			 * without waiting for VBUS to stop registering in
318			 * devctl.
319			 */
320			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
321			musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
322			mod_timer(&glue->timer,
323					jiffies + wrp->poll_seconds * HZ);
324			WARNING("VBUS error workaround (delay coming)\n");
325		} else if (is_host_enabled(musb) && drvvbus) {
326			musb->is_active = 1;
327			MUSB_HST_MODE(musb);
328			musb->xceiv->otg->default_a = 1;
329			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
330			del_timer(&glue->timer);
331		} else {
332			musb->is_active = 0;
333			MUSB_DEV_MODE(musb);
334			musb->xceiv->otg->default_a = 0;
335			musb->xceiv->state = OTG_STATE_B_IDLE;
336		}
337
338		/* NOTE: this must complete power-on within 100 ms. */
339		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
340				drvvbus ? "on" : "off",
341				otg_state_string(musb->xceiv->state),
342				err ? " ERROR" : "",
343				devctl);
344		ret = IRQ_HANDLED;
345	}
346
347	if (musb->int_tx || musb->int_rx || musb->int_usb)
348		ret |= musb_interrupt(musb);
349
350 eoi:
351	/* EOI needs to be written for the IRQ to be re-asserted. */
352	if (ret == IRQ_HANDLED || epintr || usbintr)
353		dsps_writel(reg_base, wrp->eoi, 1);
354
355	/* Poll for ID change */
356	if (is_otg_enabled(musb) && musb->xceiv->state == OTG_STATE_B_IDLE)
357		mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
358
359	spin_unlock_irqrestore(&musb->lock, flags);
360
361	return ret;
362}
363
364static int dsps_musb_init(struct musb *musb)
365{
366	struct device *dev = musb->controller;
367	struct musb_hdrc_platform_data *plat = dev->platform_data;
368	struct platform_device *pdev = to_platform_device(dev->parent);
369	struct dsps_glue *glue = platform_get_drvdata(pdev);
370	const struct dsps_musb_wrapper *wrp = glue->wrp;
371	struct omap_musb_board_data *data = plat->board_data;
372	void __iomem *reg_base = musb->ctrl_base;
373	u32 rev, val;
374	int status;
375
376	/* mentor core register starts at offset of 0x400 from musb base */
377	musb->mregs += wrp->musb_core_offset;
378
379	/* NOP driver needs change if supporting dual instance */
380	usb_nop_xceiv_register();
381	musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
382	if (IS_ERR_OR_NULL(musb->xceiv))
383		return -ENODEV;
384
385	/* Returns zero if e.g. not clocked */
386	rev = dsps_readl(reg_base, wrp->revision);
387	if (!rev) {
388		status = -ENODEV;
389		goto err0;
390	}
391
392	if (is_host_enabled(musb))
393		setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
394
395	/* Reset the musb */
396	dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
397
398	/* Start the on-chip PHY and its PLL. */
399	if (data->set_phy_power)
400		data->set_phy_power(1);
401
402	musb->isr = dsps_interrupt;
403
404	/* reset the otgdisable bit, needed for host mode to work */
405	val = dsps_readl(reg_base, wrp->phy_utmi);
406	val &= ~(1 << wrp->otg_disable);
407	dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
408
409	/* clear level interrupt */
410	dsps_writel(reg_base, wrp->eoi, 0);
411
412	return 0;
413err0:
414	usb_put_phy(musb->xceiv);
415	usb_nop_xceiv_unregister();
416	return status;
417}
418
419static int dsps_musb_exit(struct musb *musb)
420{
421	struct device *dev = musb->controller;
422	struct musb_hdrc_platform_data *plat = dev->platform_data;
423	struct omap_musb_board_data *data = plat->board_data;
424	struct platform_device *pdev = to_platform_device(dev->parent);
425	struct dsps_glue *glue = platform_get_drvdata(pdev);
426
427	if (is_host_enabled(musb))
428		del_timer_sync(&glue->timer);
429
430	/* Shutdown the on-chip PHY and its PLL. */
431	if (data->set_phy_power)
432		data->set_phy_power(0);
433
434	/* NOP driver needs change if supporting dual instance */
435	usb_put_phy(musb->xceiv);
436	usb_nop_xceiv_unregister();
437
438	return 0;
439}
440
441static struct musb_platform_ops dsps_ops = {
442	.init		= dsps_musb_init,
443	.exit		= dsps_musb_exit,
444
445	.enable		= dsps_musb_enable,
446	.disable	= dsps_musb_disable,
447
448	.try_idle	= dsps_musb_try_idle,
449};
450
451static u64 musb_dmamask = DMA_BIT_MASK(32);
452
453static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
454{
455	struct device *dev = glue->dev;
456	struct platform_device *pdev = to_platform_device(dev);
457	struct musb_hdrc_platform_data  *pdata = dev->platform_data;
458	struct platform_device	*musb;
459	struct resource *res;
460	struct resource	resources[2];
461	char res_name[10];
462	int ret;
463
464	/* get memory resource */
465	sprintf(res_name, "musb%d", id);
466	res = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
467	if (!res) {
468		dev_err(dev, "%s get mem resource failed\n", res_name);
469		ret = -ENODEV;
470		goto err0;
471	}
472	res->parent = NULL;
473	resources[0] = *res;
474
475	/* get irq resource */
476	sprintf(res_name, "musb%d-irq", id);
477	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
478	if (!res) {
479		dev_err(dev, "%s get irq resource failed\n", res_name);
480		ret = -ENODEV;
481		goto err0;
482	}
483	strcpy((u8 *)res->name, "mc");
484	res->parent = NULL;
485	resources[1] = *res;
486
487	/* allocate the child platform device */
488	musb = platform_device_alloc("musb-hdrc", -1);
489	if (!musb) {
490		dev_err(dev, "failed to allocate musb device\n");
491		ret = -ENOMEM;
492		goto err0;
493	}
494
495	musb->dev.parent		= dev;
496	musb->dev.dma_mask		= &musb_dmamask;
497	musb->dev.coherent_dma_mask	= musb_dmamask;
498
499	glue->musb			= musb;
500
501	pdata->platform_ops		= &dsps_ops;
502
503	ret = platform_device_add_resources(musb, resources, 2);
504	if (ret) {
505		dev_err(dev, "failed to add resources\n");
506		goto err1;
507	}
508
509	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
510	if (ret) {
511		dev_err(dev, "failed to add platform_data\n");
512		goto err1;
513	}
514
515	ret = platform_device_add(musb);
516	if (ret) {
517		dev_err(dev, "failed to register musb device\n");
518		goto err1;
519	}
520
521	return 0;
522
523err1:
524	platform_device_put(musb);
525err0:
526	return ret;
527}
528
529static void __devexit dsps_delete_musb_pdev(struct dsps_glue *glue)
530{
531	platform_device_del(glue->musb);
532	platform_device_put(glue->musb);
533}
534
535static int __devinit dsps_probe(struct platform_device *pdev)
536{
537	const struct platform_device_id *id = platform_get_device_id(pdev);
538	const struct dsps_musb_wrapper *wrp =
539				(struct dsps_musb_wrapper *)id->driver_data;
540	struct dsps_glue *glue;
541	struct resource *iomem;
542	int ret;
543
544	/* allocate glue */
545	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
546	if (!glue) {
547		dev_err(&pdev->dev, "unable to allocate glue memory\n");
548		ret = -ENOMEM;
549		goto err0;
550	}
551
552	/* get memory resource */
553	iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
554	if (!iomem) {
555		dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
556		ret = -ENODEV;
557		goto err1;
558	}
559
560	glue->dev = &pdev->dev;
561
562	glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
563	if (!glue->wrp) {
564		dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
565		ret = -ENOMEM;
566		goto err1;
567	}
568	platform_set_drvdata(pdev, glue);
569
570	/* create the child platform device for first instances of musb */
571	ret = dsps_create_musb_pdev(glue, 0);
572	if (ret != 0) {
573		dev_err(&pdev->dev, "failed to create child pdev\n");
574		goto err2;
575	}
576
577	/* enable the usbss clocks */
578	pm_runtime_enable(&pdev->dev);
579
580	ret = pm_runtime_get_sync(&pdev->dev);
581	if (ret < 0) {
582		dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
583		goto err3;
584	}
585
586	return 0;
587
588err3:
589	pm_runtime_disable(&pdev->dev);
590err2:
591	kfree(glue->wrp);
592err1:
593	kfree(glue);
594err0:
595	return ret;
596}
597static int __devexit dsps_remove(struct platform_device *pdev)
598{
599	struct dsps_glue *glue = platform_get_drvdata(pdev);
600
601	/* delete the child platform device */
602	dsps_delete_musb_pdev(glue);
603
604	/* disable usbss clocks */
605	pm_runtime_put(&pdev->dev);
606	pm_runtime_disable(&pdev->dev);
607	kfree(glue->wrp);
608	kfree(glue);
609	return 0;
610}
611
612#ifdef CONFIG_PM_SLEEP
613static int dsps_suspend(struct device *dev)
614{
615	struct musb_hdrc_platform_data *plat = dev->platform_data;
616	struct omap_musb_board_data *data = plat->board_data;
617
618	/* Shutdown the on-chip PHY and its PLL. */
619	if (data->set_phy_power)
620		data->set_phy_power(0);
621
622	return 0;
623}
624
625static int dsps_resume(struct device *dev)
626{
627	struct musb_hdrc_platform_data *plat = dev->platform_data;
628	struct omap_musb_board_data *data = plat->board_data;
629
630	/* Start the on-chip PHY and its PLL. */
631	if (data->set_phy_power)
632		data->set_phy_power(1);
633
634	return 0;
635}
636#endif
637
638static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
639
640static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = {
641	.revision		= 0x00,
642	.control		= 0x14,
643	.status			= 0x18,
644	.eoi			= 0x24,
645	.epintr_set		= 0x38,
646	.epintr_clear		= 0x40,
647	.epintr_status		= 0x30,
648	.coreintr_set		= 0x3c,
649	.coreintr_clear		= 0x44,
650	.coreintr_status	= 0x34,
651	.phy_utmi		= 0xe0,
652	.mode			= 0xe8,
653	.reset			= 0,
654	.otg_disable		= 21,
655	.iddig			= 8,
656	.usb_shift		= 0,
657	.usb_mask		= 0x1ff,
658	.usb_bitmap		= (0x1ff << 0),
659	.drvvbus		= 8,
660	.txep_shift		= 0,
661	.txep_mask		= 0xffff,
662	.txep_bitmap		= (0xffff << 0),
663	.rxep_shift		= 16,
664	.rxep_mask		= 0xfffe,
665	.rxep_bitmap		= (0xfffe << 16),
666	.musb_core_offset	= 0x400,
667	.poll_seconds		= 2,
668};
669
670static const struct platform_device_id musb_dsps_id_table[] __devinitconst = {
671	{
672		.name	= "musb-ti81xx",
673		.driver_data	= (kernel_ulong_t) &ti81xx_driver_data,
674	},
675	{  },	/* Terminating Entry */
676};
677MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
678
679static const struct of_device_id musb_dsps_of_match[] __devinitconst = {
680	{ .compatible = "musb-ti81xx", },
681	{ .compatible = "ti,ti81xx-musb", },
682	{ .compatible = "ti,am335x-musb", },
683	{  },
684};
685MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
686
687static struct platform_driver dsps_usbss_driver = {
688	.probe		= dsps_probe,
689	.remove         = __devexit_p(dsps_remove),
690	.driver         = {
691		.name   = "musb-dsps",
692		.pm	= &dsps_pm_ops,
693		.of_match_table	= musb_dsps_of_match,
694	},
695	.id_table	= musb_dsps_id_table,
696};
697
698MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
699MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
700MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
701MODULE_LICENSE("GPL v2");
702
703static int __init dsps_init(void)
704{
705	return platform_driver_register(&dsps_usbss_driver);
706}
707subsys_initcall(dsps_init);
708
709static void __exit dsps_exit(void)
710{
711	platform_driver_unregister(&dsps_usbss_driver);
712}
713module_exit(dsps_exit);
714