musb_dsps.c revision 807d0d2b35f94a8074d195bfdabe407f0089a694 
1/*
2 * Texas Instruments DSPS platforms "glue layer"
3 *
4 * Copyright (C) 2012, by Texas Instruments
5 *
6 * Based on the am35x "glue layer" code.
7 *
8 * This file is part of the Inventra Controller Driver for Linux.
9 *
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
13 * Foundation.
14 *
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
19 * License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA  02111-1307  USA
25 *
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
30 */
31
32#include <linux/init.h>
33#include <linux/io.h>
34#include <linux/err.h>
35#include <linux/platform_device.h>
36#include <linux/dma-mapping.h>
37#include <linux/pm_runtime.h>
38#include <linux/module.h>
39#include <linux/usb/usb_phy_gen_xceiv.h>
40#include <linux/platform_data/usb-omap.h>
41#include <linux/sizes.h>
42
43#include <linux/of.h>
44#include <linux/of_device.h>
45#include <linux/of_address.h>
46#include <linux/of_irq.h>
47#include <linux/usb/of.h>
48
49#include "musb_core.h"
50
51static const struct of_device_id musb_dsps_of_match[];
52
53/**
54 * avoid using musb_readx()/musb_writex() as glue layer should not be
55 * dependent on musb core layer symbols.
56 */
57static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
58	{ return __raw_readb(addr + offset); }
59
60static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
61	{ return __raw_readl(addr + offset); }
62
63static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
64	{ __raw_writeb(data, addr + offset); }
65
66static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
67	{ __raw_writel(data, addr + offset); }
68
69/**
70 * DSPS musb wrapper register offset.
71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
72 * musb ips.
73 */
74struct dsps_musb_wrapper {
75	u16	revision;
76	u16	control;
77	u16	status;
78	u16	epintr_set;
79	u16	epintr_clear;
80	u16	epintr_status;
81	u16	coreintr_set;
82	u16	coreintr_clear;
83	u16	coreintr_status;
84	u16	phy_utmi;
85	u16	mode;
86
87	/* bit positions for control */
88	unsigned	reset:5;
89
90	/* bit positions for interrupt */
91	unsigned	usb_shift:5;
92	u32		usb_mask;
93	u32		usb_bitmap;
94	unsigned	drvvbus:5;
95
96	unsigned	txep_shift:5;
97	u32		txep_mask;
98	u32		txep_bitmap;
99
100	unsigned	rxep_shift:5;
101	u32		rxep_mask;
102	u32		rxep_bitmap;
103
104	/* bit positions for phy_utmi */
105	unsigned	otg_disable:5;
106
107	/* bit positions for mode */
108	unsigned	iddig:5;
109	/* miscellaneous stuff */
110	u8		poll_seconds;
111};
112
113/**
114 * DSPS glue structure.
115 */
116struct dsps_glue {
117	struct device *dev;
118	struct platform_device *musb;	/* child musb pdev */
119	const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
120	struct timer_list timer;	/* otg_workaround timer */
121	unsigned long last_timer;    /* last timer data for each instance */
122};
123
124static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
125{
126	struct device *dev = musb->controller;
127	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
128
129	if (timeout == 0)
130		timeout = jiffies + msecs_to_jiffies(3);
131
132	/* Never idle if active, or when VBUS timeout is not set as host */
133	if (musb->is_active || (musb->a_wait_bcon == 0 &&
134				musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
135		dev_dbg(musb->controller, "%s active, deleting timer\n",
136				usb_otg_state_string(musb->xceiv->state));
137		del_timer(&glue->timer);
138		glue->last_timer = jiffies;
139		return;
140	}
141	if (musb->port_mode == MUSB_PORT_MODE_HOST)
142		return;
143
144	if (!musb->g.dev.driver)
145		return;
146
147	if (time_after(glue->last_timer, timeout) &&
148				timer_pending(&glue->timer)) {
149		dev_dbg(musb->controller,
150			"Longer idle timer already pending, ignoring...\n");
151		return;
152	}
153	glue->last_timer = timeout;
154
155	dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
156		usb_otg_state_string(musb->xceiv->state),
157			jiffies_to_msecs(timeout - jiffies));
158	mod_timer(&glue->timer, timeout);
159}
160
161/**
162 * dsps_musb_enable - enable interrupts
163 */
164static void dsps_musb_enable(struct musb *musb)
165{
166	struct device *dev = musb->controller;
167	struct platform_device *pdev = to_platform_device(dev->parent);
168	struct dsps_glue *glue = platform_get_drvdata(pdev);
169	const struct dsps_musb_wrapper *wrp = glue->wrp;
170	void __iomem *reg_base = musb->ctrl_base;
171	u32 epmask, coremask;
172
173	/* Workaround: setup IRQs through both register sets. */
174	epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
175	       ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
176	coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
177
178	dsps_writel(reg_base, wrp->epintr_set, epmask);
179	dsps_writel(reg_base, wrp->coreintr_set, coremask);
180	/* Force the DRVVBUS IRQ so we can start polling for ID change. */
181	dsps_writel(reg_base, wrp->coreintr_set,
182		    (1 << wrp->drvvbus) << wrp->usb_shift);
183	dsps_musb_try_idle(musb, 0);
184}
185
186/**
187 * dsps_musb_disable - disable HDRC and flush interrupts
188 */
189static void dsps_musb_disable(struct musb *musb)
190{
191	struct device *dev = musb->controller;
192	struct platform_device *pdev = to_platform_device(dev->parent);
193	struct dsps_glue *glue = platform_get_drvdata(pdev);
194	const struct dsps_musb_wrapper *wrp = glue->wrp;
195	void __iomem *reg_base = musb->ctrl_base;
196
197	dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
198	dsps_writel(reg_base, wrp->epintr_clear,
199			 wrp->txep_bitmap | wrp->rxep_bitmap);
200	dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
201}
202
203static void otg_timer(unsigned long _musb)
204{
205	struct musb *musb = (void *)_musb;
206	void __iomem *mregs = musb->mregs;
207	struct device *dev = musb->controller;
208	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
209	const struct dsps_musb_wrapper *wrp = glue->wrp;
210	u8 devctl;
211	unsigned long flags;
212
213	/*
214	 * We poll because DSPS IP's won't expose several OTG-critical
215	 * status change events (from the transceiver) otherwise.
216	 */
217	devctl = dsps_readb(mregs, MUSB_DEVCTL);
218	dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
219				usb_otg_state_string(musb->xceiv->state));
220
221	spin_lock_irqsave(&musb->lock, flags);
222	switch (musb->xceiv->state) {
223	case OTG_STATE_A_WAIT_BCON:
224		devctl &= ~MUSB_DEVCTL_SESSION;
225		dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
226
227		devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
228		if (devctl & MUSB_DEVCTL_BDEVICE) {
229			musb->xceiv->state = OTG_STATE_B_IDLE;
230			MUSB_DEV_MODE(musb);
231		} else {
232			musb->xceiv->state = OTG_STATE_A_IDLE;
233			MUSB_HST_MODE(musb);
234		}
235		break;
236	case OTG_STATE_A_WAIT_VFALL:
237		musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
238		dsps_writel(musb->ctrl_base, wrp->coreintr_set,
239			    MUSB_INTR_VBUSERROR << wrp->usb_shift);
240		break;
241	case OTG_STATE_B_IDLE:
242		devctl = dsps_readb(mregs, MUSB_DEVCTL);
243		if (devctl & MUSB_DEVCTL_BDEVICE)
244			mod_timer(&glue->timer,
245					jiffies + wrp->poll_seconds * HZ);
246		else
247			musb->xceiv->state = OTG_STATE_A_IDLE;
248		break;
249	default:
250		break;
251	}
252	spin_unlock_irqrestore(&musb->lock, flags);
253}
254
255static irqreturn_t dsps_interrupt(int irq, void *hci)
256{
257	struct musb  *musb = hci;
258	void __iomem *reg_base = musb->ctrl_base;
259	struct device *dev = musb->controller;
260	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
261	const struct dsps_musb_wrapper *wrp = glue->wrp;
262	unsigned long flags;
263	irqreturn_t ret = IRQ_NONE;
264	u32 epintr, usbintr;
265
266	spin_lock_irqsave(&musb->lock, flags);
267
268	/* Get endpoint interrupts */
269	epintr = dsps_readl(reg_base, wrp->epintr_status);
270	musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
271	musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
272
273	if (epintr)
274		dsps_writel(reg_base, wrp->epintr_status, epintr);
275
276	/* Get usb core interrupts */
277	usbintr = dsps_readl(reg_base, wrp->coreintr_status);
278	if (!usbintr && !epintr)
279		goto out;
280
281	musb->int_usb =	(usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
282	if (usbintr)
283		dsps_writel(reg_base, wrp->coreintr_status, usbintr);
284
285	dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
286			usbintr, epintr);
287	/*
288	 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
289	 * DSPS IP's missing ID change IRQ.  We need an ID change IRQ to
290	 * switch appropriately between halves of the OTG state machine.
291	 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
292	 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
293	 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
294	 */
295	if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE)
296		pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
297
298	if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
299		int drvvbus = dsps_readl(reg_base, wrp->status);
300		void __iomem *mregs = musb->mregs;
301		u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
302		int err;
303
304		err = musb->int_usb & MUSB_INTR_VBUSERROR;
305		if (err) {
306			/*
307			 * The Mentor core doesn't debounce VBUS as needed
308			 * to cope with device connect current spikes. This
309			 * means it's not uncommon for bus-powered devices
310			 * to get VBUS errors during enumeration.
311			 *
312			 * This is a workaround, but newer RTL from Mentor
313			 * seems to allow a better one: "re"-starting sessions
314			 * without waiting for VBUS to stop registering in
315			 * devctl.
316			 */
317			musb->int_usb &= ~MUSB_INTR_VBUSERROR;
318			musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
319			mod_timer(&glue->timer,
320					jiffies + wrp->poll_seconds * HZ);
321			WARNING("VBUS error workaround (delay coming)\n");
322		} else if (drvvbus) {
323			MUSB_HST_MODE(musb);
324			musb->xceiv->otg->default_a = 1;
325			musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
326			del_timer(&glue->timer);
327		} else {
328			musb->is_active = 0;
329			MUSB_DEV_MODE(musb);
330			musb->xceiv->otg->default_a = 0;
331			musb->xceiv->state = OTG_STATE_B_IDLE;
332		}
333
334		/* NOTE: this must complete power-on within 100 ms. */
335		dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
336				drvvbus ? "on" : "off",
337				usb_otg_state_string(musb->xceiv->state),
338				err ? " ERROR" : "",
339				devctl);
340		ret = IRQ_HANDLED;
341	}
342
343	if (musb->int_tx || musb->int_rx || musb->int_usb)
344		ret |= musb_interrupt(musb);
345
346	/* Poll for ID change */
347	if (musb->xceiv->state == OTG_STATE_B_IDLE)
348		mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
349out:
350	spin_unlock_irqrestore(&musb->lock, flags);
351
352	return ret;
353}
354
355static int dsps_musb_init(struct musb *musb)
356{
357	struct device *dev = musb->controller;
358	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
359	struct platform_device *parent = to_platform_device(dev->parent);
360	const struct dsps_musb_wrapper *wrp = glue->wrp;
361	void __iomem *reg_base;
362	struct resource *r;
363	u32 rev, val;
364
365	r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
366	if (!r)
367		return -EINVAL;
368
369	reg_base = devm_ioremap_resource(dev, r);
370	if (IS_ERR(reg_base))
371		return PTR_ERR(reg_base);
372	musb->ctrl_base = reg_base;
373
374	/* NOP driver needs change if supporting dual instance */
375	musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
376	if (IS_ERR(musb->xceiv))
377		return PTR_ERR(musb->xceiv);
378
379	/* Returns zero if e.g. not clocked */
380	rev = dsps_readl(reg_base, wrp->revision);
381	if (!rev)
382		return -ENODEV;
383
384	usb_phy_init(musb->xceiv);
385	setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
386
387	/* Reset the musb */
388	dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
389
390	musb->isr = dsps_interrupt;
391
392	/* reset the otgdisable bit, needed for host mode to work */
393	val = dsps_readl(reg_base, wrp->phy_utmi);
394	val &= ~(1 << wrp->otg_disable);
395	dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
396
397	return 0;
398}
399
400static int dsps_musb_exit(struct musb *musb)
401{
402	struct device *dev = musb->controller;
403	struct dsps_glue *glue = dev_get_drvdata(dev->parent);
404
405	del_timer_sync(&glue->timer);
406
407	usb_phy_shutdown(musb->xceiv);
408	return 0;
409}
410
411static struct musb_platform_ops dsps_ops = {
412	.init		= dsps_musb_init,
413	.exit		= dsps_musb_exit,
414
415	.enable		= dsps_musb_enable,
416	.disable	= dsps_musb_disable,
417
418	.try_idle	= dsps_musb_try_idle,
419};
420
421static u64 musb_dmamask = DMA_BIT_MASK(32);
422
423static int get_int_prop(struct device_node *dn, const char *s)
424{
425	int ret;
426	u32 val;
427
428	ret = of_property_read_u32(dn, s, &val);
429	if (ret)
430		return 0;
431	return val;
432}
433
434static int get_musb_port_mode(struct device *dev)
435{
436	enum usb_dr_mode mode;
437
438	mode = of_usb_get_dr_mode(dev->of_node);
439	switch (mode) {
440	case USB_DR_MODE_HOST:
441		return MUSB_PORT_MODE_HOST;
442
443	case USB_DR_MODE_PERIPHERAL:
444		return MUSB_PORT_MODE_GADGET;
445
446	case USB_DR_MODE_UNKNOWN:
447	case USB_DR_MODE_OTG:
448	default:
449		return MUSB_PORT_MODE_DUAL_ROLE;
450	};
451}
452
453static int dsps_create_musb_pdev(struct dsps_glue *glue,
454		struct platform_device *parent)
455{
456	struct musb_hdrc_platform_data pdata;
457	struct resource	resources[2];
458	struct resource	*res;
459	struct device *dev = &parent->dev;
460	struct musb_hdrc_config	*config;
461	struct platform_device *musb;
462	struct device_node *dn = parent->dev.of_node;
463	int ret;
464
465	memset(resources, 0, sizeof(resources));
466	res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
467	if (!res) {
468		dev_err(dev, "failed to get memory.\n");
469		return -EINVAL;
470	}
471	resources[0] = *res;
472
473	res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
474	if (!res) {
475		dev_err(dev, "failed to get irq.\n");
476		return -EINVAL;
477	}
478	resources[1] = *res;
479
480	/* allocate the child platform device */
481	musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
482	if (!musb) {
483		dev_err(dev, "failed to allocate musb device\n");
484		return -ENOMEM;
485	}
486
487	musb->dev.parent		= dev;
488	musb->dev.dma_mask		= &musb_dmamask;
489	musb->dev.coherent_dma_mask	= musb_dmamask;
490	musb->dev.of_node		= of_node_get(dn);
491
492	glue->musb = musb;
493
494	ret = platform_device_add_resources(musb, resources,
495			ARRAY_SIZE(resources));
496	if (ret) {
497		dev_err(dev, "failed to add resources\n");
498		goto err;
499	}
500
501	config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
502	if (!config) {
503		dev_err(dev, "failed to allocate musb hdrc config\n");
504		ret = -ENOMEM;
505		goto err;
506	}
507	pdata.config = config;
508	pdata.platform_ops = &dsps_ops;
509
510	config->num_eps = get_int_prop(dn, "mentor,num-eps");
511	config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
512	pdata.mode = get_musb_port_mode(dev);
513	/* DT keeps this entry in mA, musb expects it as per USB spec */
514	pdata.power = get_int_prop(dn, "mentor,power") / 2;
515	config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
516
517	ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
518	if (ret) {
519		dev_err(dev, "failed to add platform_data\n");
520		goto err;
521	}
522
523	ret = platform_device_add(musb);
524	if (ret) {
525		dev_err(dev, "failed to register musb device\n");
526		goto err;
527	}
528	return 0;
529
530err:
531	platform_device_put(musb);
532	return ret;
533}
534
535static int dsps_probe(struct platform_device *pdev)
536{
537	const struct of_device_id *match;
538	const struct dsps_musb_wrapper *wrp;
539	struct dsps_glue *glue;
540	int ret;
541
542	match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
543	if (!match) {
544		dev_err(&pdev->dev, "fail to get matching of_match struct\n");
545		return -EINVAL;
546	}
547	wrp = match->data;
548
549	/* allocate glue */
550	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
551	if (!glue) {
552		dev_err(&pdev->dev, "unable to allocate glue memory\n");
553		return -ENOMEM;
554	}
555
556	glue->dev = &pdev->dev;
557	glue->wrp = wrp;
558
559	platform_set_drvdata(pdev, glue);
560	pm_runtime_enable(&pdev->dev);
561
562	ret = pm_runtime_get_sync(&pdev->dev);
563	if (ret < 0) {
564		dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
565		goto err2;
566	}
567
568	ret = dsps_create_musb_pdev(glue, pdev);
569	if (ret)
570		goto err3;
571
572	return 0;
573
574err3:
575	pm_runtime_put(&pdev->dev);
576err2:
577	pm_runtime_disable(&pdev->dev);
578	kfree(glue);
579	return ret;
580}
581
582static int dsps_remove(struct platform_device *pdev)
583{
584	struct dsps_glue *glue = platform_get_drvdata(pdev);
585
586	platform_device_unregister(glue->musb);
587
588	/* disable usbss clocks */
589	pm_runtime_put(&pdev->dev);
590	pm_runtime_disable(&pdev->dev);
591	kfree(glue);
592	return 0;
593}
594
595static const struct dsps_musb_wrapper am33xx_driver_data = {
596	.revision		= 0x00,
597	.control		= 0x14,
598	.status			= 0x18,
599	.epintr_set		= 0x38,
600	.epintr_clear		= 0x40,
601	.epintr_status		= 0x30,
602	.coreintr_set		= 0x3c,
603	.coreintr_clear		= 0x44,
604	.coreintr_status	= 0x34,
605	.phy_utmi		= 0xe0,
606	.mode			= 0xe8,
607	.reset			= 0,
608	.otg_disable		= 21,
609	.iddig			= 8,
610	.usb_shift		= 0,
611	.usb_mask		= 0x1ff,
612	.usb_bitmap		= (0x1ff << 0),
613	.drvvbus		= 8,
614	.txep_shift		= 0,
615	.txep_mask		= 0xffff,
616	.txep_bitmap		= (0xffff << 0),
617	.rxep_shift		= 16,
618	.rxep_mask		= 0xfffe,
619	.rxep_bitmap		= (0xfffe << 16),
620	.poll_seconds		= 2,
621};
622
623static const struct of_device_id musb_dsps_of_match[] = {
624	{ .compatible = "ti,musb-am33xx",
625		.data = (void *) &am33xx_driver_data, },
626	{  },
627};
628MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
629
630static struct platform_driver dsps_usbss_driver = {
631	.probe		= dsps_probe,
632	.remove         = dsps_remove,
633	.driver         = {
634		.name   = "musb-dsps",
635		.of_match_table	= musb_dsps_of_match,
636	},
637};
638
639MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
640MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
641MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
642MODULE_LICENSE("GPL v2");
643
644module_platform_driver(dsps_usbss_driver);
645