musb_dsps.c revision b991f9b77c029135f6e0d1d5d16869ebf755c4c0
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/init.h> 33#include <linux/io.h> 34#include <linux/err.h> 35#include <linux/platform_device.h> 36#include <linux/dma-mapping.h> 37#include <linux/pm_runtime.h> 38#include <linux/module.h> 39#include <linux/usb/usb_phy_gen_xceiv.h> 40#include <linux/platform_data/usb-omap.h> 41#include <linux/sizes.h> 42 43#include <linux/of.h> 44#include <linux/of_device.h> 45#include <linux/of_address.h> 46#include <linux/of_irq.h> 47#include <linux/usb/of.h> 48 49#include "musb_core.h" 50 51static const struct of_device_id musb_dsps_of_match[]; 52 53/** 54 * avoid using musb_readx()/musb_writex() as glue layer should not be 55 * dependent on musb core layer symbols. 56 */ 57static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 58 { return __raw_readb(addr + offset); } 59 60static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 61 { return __raw_readl(addr + offset); } 62 63static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 64 { __raw_writeb(data, addr + offset); } 65 66static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 67 { __raw_writel(data, addr + offset); } 68 69/** 70 * DSPS musb wrapper register offset. 71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 72 * musb ips. 73 */ 74struct dsps_musb_wrapper { 75 u16 revision; 76 u16 control; 77 u16 status; 78 u16 epintr_set; 79 u16 epintr_clear; 80 u16 epintr_status; 81 u16 coreintr_set; 82 u16 coreintr_clear; 83 u16 coreintr_status; 84 u16 phy_utmi; 85 u16 mode; 86 u16 tx_mode; 87 u16 rx_mode; 88 89 /* bit positions for control */ 90 unsigned reset:5; 91 92 /* bit positions for interrupt */ 93 unsigned usb_shift:5; 94 u32 usb_mask; 95 u32 usb_bitmap; 96 unsigned drvvbus:5; 97 98 unsigned txep_shift:5; 99 u32 txep_mask; 100 u32 txep_bitmap; 101 102 unsigned rxep_shift:5; 103 u32 rxep_mask; 104 u32 rxep_bitmap; 105 106 /* bit positions for phy_utmi */ 107 unsigned otg_disable:5; 108 109 /* bit positions for mode */ 110 unsigned iddig:5; 111 unsigned iddig_mux:5; 112 /* miscellaneous stuff */ 113 u8 poll_seconds; 114}; 115 116/** 117 * DSPS glue structure. 118 */ 119struct dsps_glue { 120 struct device *dev; 121 struct platform_device *musb; /* child musb pdev */ 122 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 123 struct timer_list timer; /* otg_workaround timer */ 124 unsigned long last_timer; /* last timer data for each instance */ 125}; 126 127static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 128{ 129 struct device *dev = musb->controller; 130 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 131 132 if (timeout == 0) 133 timeout = jiffies + msecs_to_jiffies(3); 134 135 /* Never idle if active, or when VBUS timeout is not set as host */ 136 if (musb->is_active || (musb->a_wait_bcon == 0 && 137 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 138 dev_dbg(musb->controller, "%s active, deleting timer\n", 139 usb_otg_state_string(musb->xceiv->state)); 140 del_timer(&glue->timer); 141 glue->last_timer = jiffies; 142 return; 143 } 144 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE) 145 return; 146 147 if (!musb->g.dev.driver) 148 return; 149 150 if (time_after(glue->last_timer, timeout) && 151 timer_pending(&glue->timer)) { 152 dev_dbg(musb->controller, 153 "Longer idle timer already pending, ignoring...\n"); 154 return; 155 } 156 glue->last_timer = timeout; 157 158 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 159 usb_otg_state_string(musb->xceiv->state), 160 jiffies_to_msecs(timeout - jiffies)); 161 mod_timer(&glue->timer, timeout); 162} 163 164/** 165 * dsps_musb_enable - enable interrupts 166 */ 167static void dsps_musb_enable(struct musb *musb) 168{ 169 struct device *dev = musb->controller; 170 struct platform_device *pdev = to_platform_device(dev->parent); 171 struct dsps_glue *glue = platform_get_drvdata(pdev); 172 const struct dsps_musb_wrapper *wrp = glue->wrp; 173 void __iomem *reg_base = musb->ctrl_base; 174 u32 epmask, coremask; 175 176 /* Workaround: setup IRQs through both register sets. */ 177 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 178 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 179 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 180 181 dsps_writel(reg_base, wrp->epintr_set, epmask); 182 dsps_writel(reg_base, wrp->coreintr_set, coremask); 183 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 184 dsps_writel(reg_base, wrp->coreintr_set, 185 (1 << wrp->drvvbus) << wrp->usb_shift); 186 dsps_musb_try_idle(musb, 0); 187} 188 189/** 190 * dsps_musb_disable - disable HDRC and flush interrupts 191 */ 192static void dsps_musb_disable(struct musb *musb) 193{ 194 struct device *dev = musb->controller; 195 struct platform_device *pdev = to_platform_device(dev->parent); 196 struct dsps_glue *glue = platform_get_drvdata(pdev); 197 const struct dsps_musb_wrapper *wrp = glue->wrp; 198 void __iomem *reg_base = musb->ctrl_base; 199 200 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 201 dsps_writel(reg_base, wrp->epintr_clear, 202 wrp->txep_bitmap | wrp->rxep_bitmap); 203 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 204} 205 206static void otg_timer(unsigned long _musb) 207{ 208 struct musb *musb = (void *)_musb; 209 void __iomem *mregs = musb->mregs; 210 struct device *dev = musb->controller; 211 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 212 const struct dsps_musb_wrapper *wrp = glue->wrp; 213 u8 devctl; 214 unsigned long flags; 215 int skip_session = 0; 216 217 /* 218 * We poll because DSPS IP's won't expose several OTG-critical 219 * status change events (from the transceiver) otherwise. 220 */ 221 devctl = dsps_readb(mregs, MUSB_DEVCTL); 222 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 223 usb_otg_state_string(musb->xceiv->state)); 224 225 spin_lock_irqsave(&musb->lock, flags); 226 switch (musb->xceiv->state) { 227 case OTG_STATE_A_WAIT_BCON: 228 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 229 skip_session = 1; 230 /* fall */ 231 232 case OTG_STATE_A_IDLE: 233 case OTG_STATE_B_IDLE: 234 if (devctl & MUSB_DEVCTL_BDEVICE) { 235 musb->xceiv->state = OTG_STATE_B_IDLE; 236 MUSB_DEV_MODE(musb); 237 } else { 238 musb->xceiv->state = OTG_STATE_A_IDLE; 239 MUSB_HST_MODE(musb); 240 } 241 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session) 242 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION); 243 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 244 break; 245 case OTG_STATE_A_WAIT_VFALL: 246 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 247 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 248 MUSB_INTR_VBUSERROR << wrp->usb_shift); 249 break; 250 default: 251 break; 252 } 253 spin_unlock_irqrestore(&musb->lock, flags); 254} 255 256static irqreturn_t dsps_interrupt(int irq, void *hci) 257{ 258 struct musb *musb = hci; 259 void __iomem *reg_base = musb->ctrl_base; 260 struct device *dev = musb->controller; 261 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 262 const struct dsps_musb_wrapper *wrp = glue->wrp; 263 unsigned long flags; 264 irqreturn_t ret = IRQ_NONE; 265 u32 epintr, usbintr; 266 267 spin_lock_irqsave(&musb->lock, flags); 268 269 /* Get endpoint interrupts */ 270 epintr = dsps_readl(reg_base, wrp->epintr_status); 271 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 272 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 273 274 if (epintr) 275 dsps_writel(reg_base, wrp->epintr_status, epintr); 276 277 /* Get usb core interrupts */ 278 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 279 if (!usbintr && !epintr) 280 goto out; 281 282 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 283 if (usbintr) 284 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 285 286 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 287 usbintr, epintr); 288 /* 289 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 290 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 291 * switch appropriately between halves of the OTG state machine. 292 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 293 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 294 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 295 */ 296 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) 297 pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); 298 299 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 300 int drvvbus = dsps_readl(reg_base, wrp->status); 301 void __iomem *mregs = musb->mregs; 302 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 303 int err; 304 305 err = musb->int_usb & MUSB_INTR_VBUSERROR; 306 if (err) { 307 /* 308 * The Mentor core doesn't debounce VBUS as needed 309 * to cope with device connect current spikes. This 310 * means it's not uncommon for bus-powered devices 311 * to get VBUS errors during enumeration. 312 * 313 * This is a workaround, but newer RTL from Mentor 314 * seems to allow a better one: "re"-starting sessions 315 * without waiting for VBUS to stop registering in 316 * devctl. 317 */ 318 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 319 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 320 mod_timer(&glue->timer, 321 jiffies + wrp->poll_seconds * HZ); 322 WARNING("VBUS error workaround (delay coming)\n"); 323 } else if (drvvbus) { 324 MUSB_HST_MODE(musb); 325 musb->xceiv->otg->default_a = 1; 326 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 327 del_timer(&glue->timer); 328 } else { 329 musb->is_active = 0; 330 MUSB_DEV_MODE(musb); 331 musb->xceiv->otg->default_a = 0; 332 musb->xceiv->state = OTG_STATE_B_IDLE; 333 } 334 335 /* NOTE: this must complete power-on within 100 ms. */ 336 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 337 drvvbus ? "on" : "off", 338 usb_otg_state_string(musb->xceiv->state), 339 err ? " ERROR" : "", 340 devctl); 341 ret = IRQ_HANDLED; 342 } 343 344 if (musb->int_tx || musb->int_rx || musb->int_usb) 345 ret |= musb_interrupt(musb); 346 347 /* Poll for ID change */ 348 if (musb->xceiv->state == OTG_STATE_B_IDLE) 349 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 350out: 351 spin_unlock_irqrestore(&musb->lock, flags); 352 353 return ret; 354} 355 356static int dsps_musb_init(struct musb *musb) 357{ 358 struct device *dev = musb->controller; 359 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 360 struct platform_device *parent = to_platform_device(dev->parent); 361 const struct dsps_musb_wrapper *wrp = glue->wrp; 362 void __iomem *reg_base; 363 struct resource *r; 364 u32 rev, val; 365 366 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 367 if (!r) 368 return -EINVAL; 369 370 reg_base = devm_ioremap_resource(dev, r); 371 if (IS_ERR(reg_base)) 372 return PTR_ERR(reg_base); 373 musb->ctrl_base = reg_base; 374 375 /* NOP driver needs change if supporting dual instance */ 376 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0); 377 if (IS_ERR(musb->xceiv)) 378 return PTR_ERR(musb->xceiv); 379 380 /* Returns zero if e.g. not clocked */ 381 rev = dsps_readl(reg_base, wrp->revision); 382 if (!rev) 383 return -ENODEV; 384 385 usb_phy_init(musb->xceiv); 386 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 387 388 /* Reset the musb */ 389 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 390 391 musb->isr = dsps_interrupt; 392 393 /* reset the otgdisable bit, needed for host mode to work */ 394 val = dsps_readl(reg_base, wrp->phy_utmi); 395 val &= ~(1 << wrp->otg_disable); 396 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 397 398 return 0; 399} 400 401static int dsps_musb_exit(struct musb *musb) 402{ 403 struct device *dev = musb->controller; 404 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 405 406 del_timer_sync(&glue->timer); 407 408 usb_phy_shutdown(musb->xceiv); 409 return 0; 410} 411 412static int dsps_musb_set_mode(struct musb *musb, u8 mode) 413{ 414 struct device *dev = musb->controller; 415 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 416 const struct dsps_musb_wrapper *wrp = glue->wrp; 417 void __iomem *ctrl_base = musb->ctrl_base; 418 void __iomem *base = musb->mregs; 419 u32 reg; 420 421 reg = dsps_readl(base, wrp->mode); 422 423 switch (mode) { 424 case MUSB_HOST: 425 reg &= ~(1 << wrp->iddig); 426 427 /* 428 * if we're setting mode to host-only or device-only, we're 429 * going to ignore whatever the PHY sends us and just force 430 * ID pin status by SW 431 */ 432 reg |= (1 << wrp->iddig_mux); 433 434 dsps_writel(base, wrp->mode, reg); 435 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02); 436 break; 437 case MUSB_PERIPHERAL: 438 reg |= (1 << wrp->iddig); 439 440 /* 441 * if we're setting mode to host-only or device-only, we're 442 * going to ignore whatever the PHY sends us and just force 443 * ID pin status by SW 444 */ 445 reg |= (1 << wrp->iddig_mux); 446 447 dsps_writel(base, wrp->mode, reg); 448 break; 449 case MUSB_OTG: 450 dsps_writel(base, wrp->phy_utmi, 0x02); 451 break; 452 default: 453 dev_err(glue->dev, "unsupported mode %d\n", mode); 454 return -EINVAL; 455 } 456 457 return 0; 458} 459 460static struct musb_platform_ops dsps_ops = { 461 .init = dsps_musb_init, 462 .exit = dsps_musb_exit, 463 464 .enable = dsps_musb_enable, 465 .disable = dsps_musb_disable, 466 467 .try_idle = dsps_musb_try_idle, 468 .set_mode = dsps_musb_set_mode, 469}; 470 471static u64 musb_dmamask = DMA_BIT_MASK(32); 472 473static int get_int_prop(struct device_node *dn, const char *s) 474{ 475 int ret; 476 u32 val; 477 478 ret = of_property_read_u32(dn, s, &val); 479 if (ret) 480 return 0; 481 return val; 482} 483 484static int get_musb_port_mode(struct device *dev) 485{ 486 enum usb_dr_mode mode; 487 488 mode = of_usb_get_dr_mode(dev->of_node); 489 switch (mode) { 490 case USB_DR_MODE_HOST: 491 return MUSB_PORT_MODE_HOST; 492 493 case USB_DR_MODE_PERIPHERAL: 494 return MUSB_PORT_MODE_GADGET; 495 496 case USB_DR_MODE_UNKNOWN: 497 case USB_DR_MODE_OTG: 498 default: 499 return MUSB_PORT_MODE_DUAL_ROLE; 500 } 501} 502 503static int dsps_create_musb_pdev(struct dsps_glue *glue, 504 struct platform_device *parent) 505{ 506 struct musb_hdrc_platform_data pdata; 507 struct resource resources[2]; 508 struct resource *res; 509 struct device *dev = &parent->dev; 510 struct musb_hdrc_config *config; 511 struct platform_device *musb; 512 struct device_node *dn = parent->dev.of_node; 513 int ret; 514 515 memset(resources, 0, sizeof(resources)); 516 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 517 if (!res) { 518 dev_err(dev, "failed to get memory.\n"); 519 return -EINVAL; 520 } 521 resources[0] = *res; 522 523 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 524 if (!res) { 525 dev_err(dev, "failed to get irq.\n"); 526 return -EINVAL; 527 } 528 resources[1] = *res; 529 530 /* allocate the child platform device */ 531 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 532 if (!musb) { 533 dev_err(dev, "failed to allocate musb device\n"); 534 return -ENOMEM; 535 } 536 537 musb->dev.parent = dev; 538 musb->dev.dma_mask = &musb_dmamask; 539 musb->dev.coherent_dma_mask = musb_dmamask; 540 musb->dev.of_node = of_node_get(dn); 541 542 glue->musb = musb; 543 544 ret = platform_device_add_resources(musb, resources, 545 ARRAY_SIZE(resources)); 546 if (ret) { 547 dev_err(dev, "failed to add resources\n"); 548 goto err; 549 } 550 551 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 552 if (!config) { 553 dev_err(dev, "failed to allocate musb hdrc config\n"); 554 ret = -ENOMEM; 555 goto err; 556 } 557 pdata.config = config; 558 pdata.platform_ops = &dsps_ops; 559 560 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 561 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 562 pdata.mode = get_musb_port_mode(dev); 563 /* DT keeps this entry in mA, musb expects it as per USB spec */ 564 pdata.power = get_int_prop(dn, "mentor,power") / 2; 565 config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); 566 567 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 568 if (ret) { 569 dev_err(dev, "failed to add platform_data\n"); 570 goto err; 571 } 572 573 ret = platform_device_add(musb); 574 if (ret) { 575 dev_err(dev, "failed to register musb device\n"); 576 goto err; 577 } 578 return 0; 579 580err: 581 platform_device_put(musb); 582 return ret; 583} 584 585static int dsps_probe(struct platform_device *pdev) 586{ 587 const struct of_device_id *match; 588 const struct dsps_musb_wrapper *wrp; 589 struct dsps_glue *glue; 590 int ret; 591 592 if (!strcmp(pdev->name, "musb-hdrc")) 593 return -ENODEV; 594 595 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 596 if (!match) { 597 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 598 return -EINVAL; 599 } 600 wrp = match->data; 601 602 /* allocate glue */ 603 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 604 if (!glue) { 605 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 606 return -ENOMEM; 607 } 608 609 glue->dev = &pdev->dev; 610 glue->wrp = wrp; 611 612 platform_set_drvdata(pdev, glue); 613 pm_runtime_enable(&pdev->dev); 614 615 ret = pm_runtime_get_sync(&pdev->dev); 616 if (ret < 0) { 617 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 618 goto err2; 619 } 620 621 ret = dsps_create_musb_pdev(glue, pdev); 622 if (ret) 623 goto err3; 624 625 return 0; 626 627err3: 628 pm_runtime_put(&pdev->dev); 629err2: 630 pm_runtime_disable(&pdev->dev); 631 kfree(glue); 632 return ret; 633} 634 635static int dsps_remove(struct platform_device *pdev) 636{ 637 struct dsps_glue *glue = platform_get_drvdata(pdev); 638 639 platform_device_unregister(glue->musb); 640 641 /* disable usbss clocks */ 642 pm_runtime_put(&pdev->dev); 643 pm_runtime_disable(&pdev->dev); 644 kfree(glue); 645 return 0; 646} 647 648static const struct dsps_musb_wrapper am33xx_driver_data = { 649 .revision = 0x00, 650 .control = 0x14, 651 .status = 0x18, 652 .epintr_set = 0x38, 653 .epintr_clear = 0x40, 654 .epintr_status = 0x30, 655 .coreintr_set = 0x3c, 656 .coreintr_clear = 0x44, 657 .coreintr_status = 0x34, 658 .phy_utmi = 0xe0, 659 .mode = 0xe8, 660 .tx_mode = 0x70, 661 .rx_mode = 0x74, 662 .reset = 0, 663 .otg_disable = 21, 664 .iddig = 8, 665 .iddig_mux = 7, 666 .usb_shift = 0, 667 .usb_mask = 0x1ff, 668 .usb_bitmap = (0x1ff << 0), 669 .drvvbus = 8, 670 .txep_shift = 0, 671 .txep_mask = 0xffff, 672 .txep_bitmap = (0xffff << 0), 673 .rxep_shift = 16, 674 .rxep_mask = 0xfffe, 675 .rxep_bitmap = (0xfffe << 16), 676 .poll_seconds = 2, 677}; 678 679static const struct of_device_id musb_dsps_of_match[] = { 680 { .compatible = "ti,musb-am33xx", 681 .data = (void *) &am33xx_driver_data, }, 682 { }, 683}; 684MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 685 686static struct platform_driver dsps_usbss_driver = { 687 .probe = dsps_probe, 688 .remove = dsps_remove, 689 .driver = { 690 .name = "musb-dsps", 691 .of_match_table = musb_dsps_of_match, 692 }, 693}; 694 695MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 696MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 697MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 698MODULE_LICENSE("GPL v2"); 699 700module_platform_driver(dsps_usbss_driver); 701