musb_dsps.c revision c031a7d419340f30e66dc18fab4373ad646ca7e6
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/init.h> 33#include <linux/io.h> 34#include <linux/err.h> 35#include <linux/platform_device.h> 36#include <linux/dma-mapping.h> 37#include <linux/pm_runtime.h> 38#include <linux/module.h> 39#include <linux/usb/usb_phy_gen_xceiv.h> 40#include <linux/platform_data/usb-omap.h> 41#include <linux/sizes.h> 42 43#include <linux/of.h> 44#include <linux/of_device.h> 45#include <linux/of_address.h> 46#include <linux/of_irq.h> 47#include <linux/usb/of.h> 48 49#include "musb_core.h" 50 51static const struct of_device_id musb_dsps_of_match[]; 52 53/** 54 * avoid using musb_readx()/musb_writex() as glue layer should not be 55 * dependent on musb core layer symbols. 56 */ 57static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 58 { return __raw_readb(addr + offset); } 59 60static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 61 { return __raw_readl(addr + offset); } 62 63static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 64 { __raw_writeb(data, addr + offset); } 65 66static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 67 { __raw_writel(data, addr + offset); } 68 69/** 70 * DSPS musb wrapper register offset. 71 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 72 * musb ips. 73 */ 74struct dsps_musb_wrapper { 75 u16 revision; 76 u16 control; 77 u16 status; 78 u16 epintr_set; 79 u16 epintr_clear; 80 u16 epintr_status; 81 u16 coreintr_set; 82 u16 coreintr_clear; 83 u16 coreintr_status; 84 u16 phy_utmi; 85 u16 mode; 86 87 /* bit positions for control */ 88 unsigned reset:5; 89 90 /* bit positions for interrupt */ 91 unsigned usb_shift:5; 92 u32 usb_mask; 93 u32 usb_bitmap; 94 unsigned drvvbus:5; 95 96 unsigned txep_shift:5; 97 u32 txep_mask; 98 u32 txep_bitmap; 99 100 unsigned rxep_shift:5; 101 u32 rxep_mask; 102 u32 rxep_bitmap; 103 104 /* bit positions for phy_utmi */ 105 unsigned otg_disable:5; 106 107 /* bit positions for mode */ 108 unsigned iddig:5; 109 /* miscellaneous stuff */ 110 u8 poll_seconds; 111}; 112 113/** 114 * DSPS glue structure. 115 */ 116struct dsps_glue { 117 struct device *dev; 118 struct platform_device *musb; /* child musb pdev */ 119 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 120 struct timer_list timer; /* otg_workaround timer */ 121 unsigned long last_timer; /* last timer data for each instance */ 122}; 123 124/** 125 * dsps_musb_enable - enable interrupts 126 */ 127static void dsps_musb_enable(struct musb *musb) 128{ 129 struct device *dev = musb->controller; 130 struct platform_device *pdev = to_platform_device(dev->parent); 131 struct dsps_glue *glue = platform_get_drvdata(pdev); 132 const struct dsps_musb_wrapper *wrp = glue->wrp; 133 void __iomem *reg_base = musb->ctrl_base; 134 u32 epmask, coremask; 135 136 /* Workaround: setup IRQs through both register sets. */ 137 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 138 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 139 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 140 141 dsps_writel(reg_base, wrp->epintr_set, epmask); 142 dsps_writel(reg_base, wrp->coreintr_set, coremask); 143 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 144 dsps_writel(reg_base, wrp->coreintr_set, 145 (1 << wrp->drvvbus) << wrp->usb_shift); 146} 147 148/** 149 * dsps_musb_disable - disable HDRC and flush interrupts 150 */ 151static void dsps_musb_disable(struct musb *musb) 152{ 153 struct device *dev = musb->controller; 154 struct platform_device *pdev = to_platform_device(dev->parent); 155 struct dsps_glue *glue = platform_get_drvdata(pdev); 156 const struct dsps_musb_wrapper *wrp = glue->wrp; 157 void __iomem *reg_base = musb->ctrl_base; 158 159 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 160 dsps_writel(reg_base, wrp->epintr_clear, 161 wrp->txep_bitmap | wrp->rxep_bitmap); 162 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 163} 164 165static void otg_timer(unsigned long _musb) 166{ 167 struct musb *musb = (void *)_musb; 168 void __iomem *mregs = musb->mregs; 169 struct device *dev = musb->controller; 170 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 171 const struct dsps_musb_wrapper *wrp = glue->wrp; 172 u8 devctl; 173 unsigned long flags; 174 175 /* 176 * We poll because DSPS IP's won't expose several OTG-critical 177 * status change events (from the transceiver) otherwise. 178 */ 179 devctl = dsps_readb(mregs, MUSB_DEVCTL); 180 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 181 usb_otg_state_string(musb->xceiv->state)); 182 183 spin_lock_irqsave(&musb->lock, flags); 184 switch (musb->xceiv->state) { 185 case OTG_STATE_A_WAIT_BCON: 186 devctl &= ~MUSB_DEVCTL_SESSION; 187 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 188 189 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 190 if (devctl & MUSB_DEVCTL_BDEVICE) { 191 musb->xceiv->state = OTG_STATE_B_IDLE; 192 MUSB_DEV_MODE(musb); 193 } else { 194 musb->xceiv->state = OTG_STATE_A_IDLE; 195 MUSB_HST_MODE(musb); 196 } 197 break; 198 case OTG_STATE_A_WAIT_VFALL: 199 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 200 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 201 MUSB_INTR_VBUSERROR << wrp->usb_shift); 202 break; 203 case OTG_STATE_B_IDLE: 204 devctl = dsps_readb(mregs, MUSB_DEVCTL); 205 if (devctl & MUSB_DEVCTL_BDEVICE) 206 mod_timer(&glue->timer, 207 jiffies + wrp->poll_seconds * HZ); 208 else 209 musb->xceiv->state = OTG_STATE_A_IDLE; 210 break; 211 default: 212 break; 213 } 214 spin_unlock_irqrestore(&musb->lock, flags); 215} 216 217static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 218{ 219 struct device *dev = musb->controller; 220 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 221 222 if (timeout == 0) 223 timeout = jiffies + msecs_to_jiffies(3); 224 225 /* Never idle if active, or when VBUS timeout is not set as host */ 226 if (musb->is_active || (musb->a_wait_bcon == 0 && 227 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 228 dev_dbg(musb->controller, "%s active, deleting timer\n", 229 usb_otg_state_string(musb->xceiv->state)); 230 del_timer(&glue->timer); 231 glue->last_timer = jiffies; 232 return; 233 } 234 235 if (time_after(glue->last_timer, timeout) && 236 timer_pending(&glue->timer)) { 237 dev_dbg(musb->controller, 238 "Longer idle timer already pending, ignoring...\n"); 239 return; 240 } 241 glue->last_timer = timeout; 242 243 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 244 usb_otg_state_string(musb->xceiv->state), 245 jiffies_to_msecs(timeout - jiffies)); 246 mod_timer(&glue->timer, timeout); 247} 248 249static irqreturn_t dsps_interrupt(int irq, void *hci) 250{ 251 struct musb *musb = hci; 252 void __iomem *reg_base = musb->ctrl_base; 253 struct device *dev = musb->controller; 254 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 255 const struct dsps_musb_wrapper *wrp = glue->wrp; 256 unsigned long flags; 257 irqreturn_t ret = IRQ_NONE; 258 u32 epintr, usbintr; 259 260 spin_lock_irqsave(&musb->lock, flags); 261 262 /* Get endpoint interrupts */ 263 epintr = dsps_readl(reg_base, wrp->epintr_status); 264 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 265 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 266 267 if (epintr) 268 dsps_writel(reg_base, wrp->epintr_status, epintr); 269 270 /* Get usb core interrupts */ 271 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 272 if (!usbintr && !epintr) 273 goto out; 274 275 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 276 if (usbintr) 277 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 278 279 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 280 usbintr, epintr); 281 /* 282 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 283 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 284 * switch appropriately between halves of the OTG state machine. 285 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 286 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 287 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 288 */ 289 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) 290 pr_info("CAUTION: musb: Babble Interrupt Occurred\n"); 291 292 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 293 int drvvbus = dsps_readl(reg_base, wrp->status); 294 void __iomem *mregs = musb->mregs; 295 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 296 int err; 297 298 err = musb->int_usb & MUSB_INTR_VBUSERROR; 299 if (err) { 300 /* 301 * The Mentor core doesn't debounce VBUS as needed 302 * to cope with device connect current spikes. This 303 * means it's not uncommon for bus-powered devices 304 * to get VBUS errors during enumeration. 305 * 306 * This is a workaround, but newer RTL from Mentor 307 * seems to allow a better one: "re"-starting sessions 308 * without waiting for VBUS to stop registering in 309 * devctl. 310 */ 311 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 312 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 313 mod_timer(&glue->timer, 314 jiffies + wrp->poll_seconds * HZ); 315 WARNING("VBUS error workaround (delay coming)\n"); 316 } else if (drvvbus) { 317 musb->is_active = 1; 318 MUSB_HST_MODE(musb); 319 musb->xceiv->otg->default_a = 1; 320 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 321 del_timer(&glue->timer); 322 } else { 323 musb->is_active = 0; 324 MUSB_DEV_MODE(musb); 325 musb->xceiv->otg->default_a = 0; 326 musb->xceiv->state = OTG_STATE_B_IDLE; 327 } 328 329 /* NOTE: this must complete power-on within 100 ms. */ 330 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 331 drvvbus ? "on" : "off", 332 usb_otg_state_string(musb->xceiv->state), 333 err ? " ERROR" : "", 334 devctl); 335 ret = IRQ_HANDLED; 336 } 337 338 if (musb->int_tx || musb->int_rx || musb->int_usb) 339 ret |= musb_interrupt(musb); 340 341 /* Poll for ID change */ 342 if (musb->xceiv->state == OTG_STATE_B_IDLE) 343 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ); 344out: 345 spin_unlock_irqrestore(&musb->lock, flags); 346 347 return ret; 348} 349 350static int dsps_musb_init(struct musb *musb) 351{ 352 struct device *dev = musb->controller; 353 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 354 struct platform_device *parent = to_platform_device(dev->parent); 355 const struct dsps_musb_wrapper *wrp = glue->wrp; 356 void __iomem *reg_base; 357 struct resource *r; 358 u32 rev, val; 359 360 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control"); 361 if (!r) 362 return -EINVAL; 363 364 reg_base = devm_ioremap_resource(dev, r); 365 if (IS_ERR(reg_base)) 366 return PTR_ERR(reg_base); 367 musb->ctrl_base = reg_base; 368 369 /* NOP driver needs change if supporting dual instance */ 370 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0); 371 if (IS_ERR(musb->xceiv)) 372 return PTR_ERR(musb->xceiv); 373 374 /* Returns zero if e.g. not clocked */ 375 rev = dsps_readl(reg_base, wrp->revision); 376 if (!rev) 377 return -ENODEV; 378 379 usb_phy_init(musb->xceiv); 380 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 381 382 /* Reset the musb */ 383 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 384 385 musb->isr = dsps_interrupt; 386 387 /* reset the otgdisable bit, needed for host mode to work */ 388 val = dsps_readl(reg_base, wrp->phy_utmi); 389 val &= ~(1 << wrp->otg_disable); 390 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 391 392 return 0; 393} 394 395static int dsps_musb_exit(struct musb *musb) 396{ 397 struct device *dev = musb->controller; 398 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 399 400 del_timer_sync(&glue->timer); 401 402 usb_phy_shutdown(musb->xceiv); 403 return 0; 404} 405 406static struct musb_platform_ops dsps_ops = { 407 .init = dsps_musb_init, 408 .exit = dsps_musb_exit, 409 410 .enable = dsps_musb_enable, 411 .disable = dsps_musb_disable, 412 413 .try_idle = dsps_musb_try_idle, 414}; 415 416static u64 musb_dmamask = DMA_BIT_MASK(32); 417 418static int get_int_prop(struct device_node *dn, const char *s) 419{ 420 int ret; 421 u32 val; 422 423 ret = of_property_read_u32(dn, s, &val); 424 if (ret) 425 return 0; 426 return val; 427} 428 429static int get_musb_port_mode(struct device *dev) 430{ 431 enum usb_dr_mode mode; 432 433 mode = of_usb_get_dr_mode(dev->of_node); 434 switch (mode) { 435 case USB_DR_MODE_HOST: 436 return MUSB_PORT_MODE_HOST; 437 438 case USB_DR_MODE_PERIPHERAL: 439 return MUSB_PORT_MODE_GADGET; 440 441 case USB_DR_MODE_UNKNOWN: 442 case USB_DR_MODE_OTG: 443 default: 444 return MUSB_PORT_MODE_DUAL_ROLE; 445 }; 446} 447 448static int dsps_create_musb_pdev(struct dsps_glue *glue, 449 struct platform_device *parent) 450{ 451 struct musb_hdrc_platform_data pdata; 452 struct resource resources[2]; 453 struct resource *res; 454 struct device *dev = &parent->dev; 455 struct musb_hdrc_config *config; 456 struct platform_device *musb; 457 struct device_node *dn = parent->dev.of_node; 458 int ret; 459 460 memset(resources, 0, sizeof(resources)); 461 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 462 if (!res) { 463 dev_err(dev, "failed to get memory.\n"); 464 return -EINVAL; 465 } 466 resources[0] = *res; 467 468 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc"); 469 if (!res) { 470 dev_err(dev, "failed to get irq.\n"); 471 return -EINVAL; 472 } 473 resources[1] = *res; 474 475 /* allocate the child platform device */ 476 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 477 if (!musb) { 478 dev_err(dev, "failed to allocate musb device\n"); 479 return -ENOMEM; 480 } 481 482 musb->dev.parent = dev; 483 musb->dev.dma_mask = &musb_dmamask; 484 musb->dev.coherent_dma_mask = musb_dmamask; 485 musb->dev.of_node = of_node_get(dn); 486 487 glue->musb = musb; 488 489 ret = platform_device_add_resources(musb, resources, 490 ARRAY_SIZE(resources)); 491 if (ret) { 492 dev_err(dev, "failed to add resources\n"); 493 goto err; 494 } 495 496 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL); 497 if (!config) { 498 dev_err(dev, "failed to allocate musb hdrc config\n"); 499 ret = -ENOMEM; 500 goto err; 501 } 502 pdata.config = config; 503 pdata.platform_ops = &dsps_ops; 504 505 config->num_eps = get_int_prop(dn, "mentor,num-eps"); 506 config->ram_bits = get_int_prop(dn, "mentor,ram-bits"); 507 pdata.mode = get_musb_port_mode(dev); 508 /* DT keeps this entry in mA, musb expects it as per USB spec */ 509 pdata.power = get_int_prop(dn, "mentor,power") / 2; 510 config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); 511 512 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 513 if (ret) { 514 dev_err(dev, "failed to add platform_data\n"); 515 goto err; 516 } 517 518 ret = platform_device_add(musb); 519 if (ret) { 520 dev_err(dev, "failed to register musb device\n"); 521 goto err; 522 } 523 return 0; 524 525err: 526 platform_device_put(musb); 527 return ret; 528} 529 530static int dsps_probe(struct platform_device *pdev) 531{ 532 const struct of_device_id *match; 533 const struct dsps_musb_wrapper *wrp; 534 struct dsps_glue *glue; 535 int ret; 536 537 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node); 538 if (!match) { 539 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 540 return -EINVAL; 541 } 542 wrp = match->data; 543 544 /* allocate glue */ 545 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 546 if (!glue) { 547 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 548 return -ENOMEM; 549 } 550 551 glue->dev = &pdev->dev; 552 glue->wrp = wrp; 553 554 platform_set_drvdata(pdev, glue); 555 pm_runtime_enable(&pdev->dev); 556 557 ret = pm_runtime_get_sync(&pdev->dev); 558 if (ret < 0) { 559 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 560 goto err2; 561 } 562 563 ret = dsps_create_musb_pdev(glue, pdev); 564 if (ret) 565 goto err3; 566 567 return 0; 568 569err3: 570 pm_runtime_put(&pdev->dev); 571err2: 572 pm_runtime_disable(&pdev->dev); 573 kfree(glue); 574 return ret; 575} 576 577static int dsps_remove(struct platform_device *pdev) 578{ 579 struct dsps_glue *glue = platform_get_drvdata(pdev); 580 581 platform_device_unregister(glue->musb); 582 583 /* disable usbss clocks */ 584 pm_runtime_put(&pdev->dev); 585 pm_runtime_disable(&pdev->dev); 586 kfree(glue); 587 return 0; 588} 589 590static const struct dsps_musb_wrapper am33xx_driver_data = { 591 .revision = 0x00, 592 .control = 0x14, 593 .status = 0x18, 594 .epintr_set = 0x38, 595 .epintr_clear = 0x40, 596 .epintr_status = 0x30, 597 .coreintr_set = 0x3c, 598 .coreintr_clear = 0x44, 599 .coreintr_status = 0x34, 600 .phy_utmi = 0xe0, 601 .mode = 0xe8, 602 .reset = 0, 603 .otg_disable = 21, 604 .iddig = 8, 605 .usb_shift = 0, 606 .usb_mask = 0x1ff, 607 .usb_bitmap = (0x1ff << 0), 608 .drvvbus = 8, 609 .txep_shift = 0, 610 .txep_mask = 0xffff, 611 .txep_bitmap = (0xffff << 0), 612 .rxep_shift = 16, 613 .rxep_mask = 0xfffe, 614 .rxep_bitmap = (0xfffe << 16), 615 .poll_seconds = 2, 616}; 617 618static const struct of_device_id musb_dsps_of_match[] = { 619 { .compatible = "ti,musb-am33xx", 620 .data = (void *) &am33xx_driver_data, }, 621 { }, 622}; 623MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 624 625static struct platform_driver dsps_usbss_driver = { 626 .probe = dsps_probe, 627 .remove = dsps_remove, 628 .driver = { 629 .name = "musb-dsps", 630 .of_match_table = of_match_ptr(musb_dsps_of_match), 631 }, 632}; 633 634MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 635MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 636MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 637MODULE_LICENSE("GPL v2"); 638 639module_platform_driver(dsps_usbss_driver); 640