musb_dsps.c revision d75542263a0b005876d112bbf9ffb23180cc3149
1/* 2 * Texas Instruments DSPS platforms "glue layer" 3 * 4 * Copyright (C) 2012, by Texas Instruments 5 * 6 * Based on the am35x "glue layer" code. 7 * 8 * This file is part of the Inventra Controller Driver for Linux. 9 * 10 * The Inventra Controller Driver for Linux is free software; you 11 * can redistribute it and/or modify it under the terms of the GNU 12 * General Public License version 2 as published by the Free Software 13 * Foundation. 14 * 15 * The Inventra Controller Driver for Linux is distributed in 16 * the hope that it will be useful, but WITHOUT ANY WARRANTY; 17 * without even the implied warranty of MERCHANTABILITY or 18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 19 * License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with The Inventra Controller Driver for Linux ; if not, 23 * write to the Free Software Foundation, Inc., 59 Temple Place, 24 * Suite 330, Boston, MA 02111-1307 USA 25 * 26 * musb_dsps.c will be a common file for all the TI DSPS platforms 27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x. 28 * For now only ti81x is using this and in future davinci.c, am35x.c 29 * da8xx.c would be merged to this file after testing. 30 */ 31 32#include <linux/init.h> 33#include <linux/io.h> 34#include <linux/of.h> 35#include <linux/err.h> 36#include <linux/platform_device.h> 37#include <linux/dma-mapping.h> 38#include <linux/pm_runtime.h> 39#include <linux/module.h> 40#include <linux/usb/nop-usb-xceiv.h> 41 42#include <linux/of.h> 43#include <linux/of_device.h> 44#include <linux/of_address.h> 45 46#include <plat/usb.h> 47 48#include "musb_core.h" 49 50#ifdef CONFIG_OF 51static const struct of_device_id musb_dsps_of_match[]; 52#endif 53 54/** 55 * avoid using musb_readx()/musb_writex() as glue layer should not be 56 * dependent on musb core layer symbols. 57 */ 58static inline u8 dsps_readb(const void __iomem *addr, unsigned offset) 59 { return __raw_readb(addr + offset); } 60 61static inline u32 dsps_readl(const void __iomem *addr, unsigned offset) 62 { return __raw_readl(addr + offset); } 63 64static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data) 65 { __raw_writeb(data, addr + offset); } 66 67static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data) 68 { __raw_writel(data, addr + offset); } 69 70/** 71 * DSPS musb wrapper register offset. 72 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS 73 * musb ips. 74 */ 75struct dsps_musb_wrapper { 76 u16 revision; 77 u16 control; 78 u16 status; 79 u16 eoi; 80 u16 epintr_set; 81 u16 epintr_clear; 82 u16 epintr_status; 83 u16 coreintr_set; 84 u16 coreintr_clear; 85 u16 coreintr_status; 86 u16 phy_utmi; 87 u16 mode; 88 89 /* bit positions for control */ 90 unsigned reset:5; 91 92 /* bit positions for interrupt */ 93 unsigned usb_shift:5; 94 u32 usb_mask; 95 u32 usb_bitmap; 96 unsigned drvvbus:5; 97 98 unsigned txep_shift:5; 99 u32 txep_mask; 100 u32 txep_bitmap; 101 102 unsigned rxep_shift:5; 103 u32 rxep_mask; 104 u32 rxep_bitmap; 105 106 /* bit positions for phy_utmi */ 107 unsigned otg_disable:5; 108 109 /* bit positions for mode */ 110 unsigned iddig:5; 111 /* miscellaneous stuff */ 112 u32 musb_core_offset; 113 u8 poll_seconds; 114 /* number of musb instances */ 115 u8 instances; 116}; 117 118/** 119 * DSPS glue structure. 120 */ 121struct dsps_glue { 122 struct device *dev; 123 struct platform_device *musb[2]; /* child musb pdev */ 124 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */ 125 struct timer_list timer[2]; /* otg_workaround timer */ 126 unsigned long last_timer[2]; /* last timer data for each instance */ 127 u32 __iomem *usb_ctrl[2]; 128}; 129 130#define DSPS_AM33XX_CONTROL_MODULE_PHYS_0 0x44e10620 131#define DSPS_AM33XX_CONTROL_MODULE_PHYS_1 0x44e10628 132 133static const resource_size_t dsps_control_module_phys[] = { 134 DSPS_AM33XX_CONTROL_MODULE_PHYS_0, 135 DSPS_AM33XX_CONTROL_MODULE_PHYS_1, 136}; 137 138/** 139 * musb_dsps_phy_control - phy on/off 140 * @glue: struct dsps_glue * 141 * @id: musb instance 142 * @on: flag for phy to be switched on or off 143 * 144 * This is to enable the PHY using usb_ctrl register in system control 145 * module space. 146 * 147 * XXX: This function will be removed once we have a seperate driver for 148 * control module 149 */ 150static void musb_dsps_phy_control(struct dsps_glue *glue, u8 id, u8 on) 151{ 152 u32 usbphycfg; 153 154 usbphycfg = readl(glue->usb_ctrl[id]); 155 156 if (on) { 157 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN); 158 usbphycfg |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN; 159 } else { 160 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN; 161 } 162 163 writel(usbphycfg, glue->usb_ctrl[id]); 164} 165/** 166 * dsps_musb_enable - enable interrupts 167 */ 168static void dsps_musb_enable(struct musb *musb) 169{ 170 struct device *dev = musb->controller; 171 struct platform_device *pdev = to_platform_device(dev->parent); 172 struct dsps_glue *glue = platform_get_drvdata(pdev); 173 const struct dsps_musb_wrapper *wrp = glue->wrp; 174 void __iomem *reg_base = musb->ctrl_base; 175 u32 epmask, coremask; 176 177 /* Workaround: setup IRQs through both register sets. */ 178 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) | 179 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift); 180 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF); 181 182 dsps_writel(reg_base, wrp->epintr_set, epmask); 183 dsps_writel(reg_base, wrp->coreintr_set, coremask); 184 /* Force the DRVVBUS IRQ so we can start polling for ID change. */ 185 dsps_writel(reg_base, wrp->coreintr_set, 186 (1 << wrp->drvvbus) << wrp->usb_shift); 187} 188 189/** 190 * dsps_musb_disable - disable HDRC and flush interrupts 191 */ 192static void dsps_musb_disable(struct musb *musb) 193{ 194 struct device *dev = musb->controller; 195 struct platform_device *pdev = to_platform_device(dev->parent); 196 struct dsps_glue *glue = platform_get_drvdata(pdev); 197 const struct dsps_musb_wrapper *wrp = glue->wrp; 198 void __iomem *reg_base = musb->ctrl_base; 199 200 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap); 201 dsps_writel(reg_base, wrp->epintr_clear, 202 wrp->txep_bitmap | wrp->rxep_bitmap); 203 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0); 204 dsps_writel(reg_base, wrp->eoi, 0); 205} 206 207static void otg_timer(unsigned long _musb) 208{ 209 struct musb *musb = (void *)_musb; 210 void __iomem *mregs = musb->mregs; 211 struct device *dev = musb->controller; 212 struct platform_device *pdev = to_platform_device(dev); 213 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 214 const struct dsps_musb_wrapper *wrp = glue->wrp; 215 u8 devctl; 216 unsigned long flags; 217 218 /* 219 * We poll because DSPS IP's won't expose several OTG-critical 220 * status change events (from the transceiver) otherwise. 221 */ 222 devctl = dsps_readb(mregs, MUSB_DEVCTL); 223 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl, 224 otg_state_string(musb->xceiv->state)); 225 226 spin_lock_irqsave(&musb->lock, flags); 227 switch (musb->xceiv->state) { 228 case OTG_STATE_A_WAIT_BCON: 229 devctl &= ~MUSB_DEVCTL_SESSION; 230 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl); 231 232 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL); 233 if (devctl & MUSB_DEVCTL_BDEVICE) { 234 musb->xceiv->state = OTG_STATE_B_IDLE; 235 MUSB_DEV_MODE(musb); 236 } else { 237 musb->xceiv->state = OTG_STATE_A_IDLE; 238 MUSB_HST_MODE(musb); 239 } 240 break; 241 case OTG_STATE_A_WAIT_VFALL: 242 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 243 dsps_writel(musb->ctrl_base, wrp->coreintr_set, 244 MUSB_INTR_VBUSERROR << wrp->usb_shift); 245 break; 246 case OTG_STATE_B_IDLE: 247 devctl = dsps_readb(mregs, MUSB_DEVCTL); 248 if (devctl & MUSB_DEVCTL_BDEVICE) 249 mod_timer(&glue->timer[pdev->id], 250 jiffies + wrp->poll_seconds * HZ); 251 else 252 musb->xceiv->state = OTG_STATE_A_IDLE; 253 break; 254 default: 255 break; 256 } 257 spin_unlock_irqrestore(&musb->lock, flags); 258} 259 260static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout) 261{ 262 struct device *dev = musb->controller; 263 struct platform_device *pdev = to_platform_device(dev); 264 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 265 266 if (timeout == 0) 267 timeout = jiffies + msecs_to_jiffies(3); 268 269 /* Never idle if active, or when VBUS timeout is not set as host */ 270 if (musb->is_active || (musb->a_wait_bcon == 0 && 271 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) { 272 dev_dbg(musb->controller, "%s active, deleting timer\n", 273 otg_state_string(musb->xceiv->state)); 274 del_timer(&glue->timer[pdev->id]); 275 glue->last_timer[pdev->id] = jiffies; 276 return; 277 } 278 279 if (time_after(glue->last_timer[pdev->id], timeout) && 280 timer_pending(&glue->timer[pdev->id])) { 281 dev_dbg(musb->controller, 282 "Longer idle timer already pending, ignoring...\n"); 283 return; 284 } 285 glue->last_timer[pdev->id] = timeout; 286 287 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n", 288 otg_state_string(musb->xceiv->state), 289 jiffies_to_msecs(timeout - jiffies)); 290 mod_timer(&glue->timer[pdev->id], timeout); 291} 292 293static irqreturn_t dsps_interrupt(int irq, void *hci) 294{ 295 struct musb *musb = hci; 296 void __iomem *reg_base = musb->ctrl_base; 297 struct device *dev = musb->controller; 298 struct platform_device *pdev = to_platform_device(dev); 299 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 300 const struct dsps_musb_wrapper *wrp = glue->wrp; 301 unsigned long flags; 302 irqreturn_t ret = IRQ_NONE; 303 u32 epintr, usbintr; 304 305 spin_lock_irqsave(&musb->lock, flags); 306 307 /* Get endpoint interrupts */ 308 epintr = dsps_readl(reg_base, wrp->epintr_status); 309 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift; 310 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift; 311 312 if (epintr) 313 dsps_writel(reg_base, wrp->epintr_status, epintr); 314 315 /* Get usb core interrupts */ 316 usbintr = dsps_readl(reg_base, wrp->coreintr_status); 317 if (!usbintr && !epintr) 318 goto eoi; 319 320 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift; 321 if (usbintr) 322 dsps_writel(reg_base, wrp->coreintr_status, usbintr); 323 324 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n", 325 usbintr, epintr); 326 /* 327 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for 328 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to 329 * switch appropriately between halves of the OTG state machine. 330 * Managing DEVCTL.SESSION per Mentor docs requires that we know its 331 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set. 332 * Also, DRVVBUS pulses for SRP (but not at 5V) ... 333 */ 334 if (usbintr & MUSB_INTR_BABBLE) 335 pr_info("CAUTION: musb: Babble Interrupt Occured\n"); 336 337 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) { 338 int drvvbus = dsps_readl(reg_base, wrp->status); 339 void __iomem *mregs = musb->mregs; 340 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL); 341 int err; 342 343 err = musb->int_usb & MUSB_INTR_VBUSERROR; 344 if (err) { 345 /* 346 * The Mentor core doesn't debounce VBUS as needed 347 * to cope with device connect current spikes. This 348 * means it's not uncommon for bus-powered devices 349 * to get VBUS errors during enumeration. 350 * 351 * This is a workaround, but newer RTL from Mentor 352 * seems to allow a better one: "re"-starting sessions 353 * without waiting for VBUS to stop registering in 354 * devctl. 355 */ 356 musb->int_usb &= ~MUSB_INTR_VBUSERROR; 357 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL; 358 mod_timer(&glue->timer[pdev->id], 359 jiffies + wrp->poll_seconds * HZ); 360 WARNING("VBUS error workaround (delay coming)\n"); 361 } else if (drvvbus) { 362 musb->is_active = 1; 363 MUSB_HST_MODE(musb); 364 musb->xceiv->otg->default_a = 1; 365 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE; 366 del_timer(&glue->timer[pdev->id]); 367 } else { 368 musb->is_active = 0; 369 MUSB_DEV_MODE(musb); 370 musb->xceiv->otg->default_a = 0; 371 musb->xceiv->state = OTG_STATE_B_IDLE; 372 } 373 374 /* NOTE: this must complete power-on within 100 ms. */ 375 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n", 376 drvvbus ? "on" : "off", 377 otg_state_string(musb->xceiv->state), 378 err ? " ERROR" : "", 379 devctl); 380 ret = IRQ_HANDLED; 381 } 382 383 if (musb->int_tx || musb->int_rx || musb->int_usb) 384 ret |= musb_interrupt(musb); 385 386 eoi: 387 /* EOI needs to be written for the IRQ to be re-asserted. */ 388 if (ret == IRQ_HANDLED || epintr || usbintr) 389 dsps_writel(reg_base, wrp->eoi, 1); 390 391 /* Poll for ID change */ 392 if (musb->xceiv->state == OTG_STATE_B_IDLE) 393 mod_timer(&glue->timer[pdev->id], 394 jiffies + wrp->poll_seconds * HZ); 395 396 spin_unlock_irqrestore(&musb->lock, flags); 397 398 return ret; 399} 400 401static int dsps_musb_init(struct musb *musb) 402{ 403 struct device *dev = musb->controller; 404 struct platform_device *pdev = to_platform_device(dev); 405 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 406 const struct dsps_musb_wrapper *wrp = glue->wrp; 407 void __iomem *reg_base = musb->ctrl_base; 408 u32 rev, val; 409 int status; 410 411 /* mentor core register starts at offset of 0x400 from musb base */ 412 musb->mregs += wrp->musb_core_offset; 413 414 /* NOP driver needs change if supporting dual instance */ 415 usb_nop_xceiv_register(); 416 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2); 417 if (IS_ERR_OR_NULL(musb->xceiv)) 418 return -ENODEV; 419 420 /* Returns zero if e.g. not clocked */ 421 rev = dsps_readl(reg_base, wrp->revision); 422 if (!rev) { 423 status = -ENODEV; 424 goto err0; 425 } 426 427 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb); 428 429 /* Reset the musb */ 430 dsps_writel(reg_base, wrp->control, (1 << wrp->reset)); 431 432 /* Start the on-chip PHY and its PLL. */ 433 musb_dsps_phy_control(glue, pdev->id, 1); 434 435 musb->isr = dsps_interrupt; 436 437 /* reset the otgdisable bit, needed for host mode to work */ 438 val = dsps_readl(reg_base, wrp->phy_utmi); 439 val &= ~(1 << wrp->otg_disable); 440 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); 441 442 /* clear level interrupt */ 443 dsps_writel(reg_base, wrp->eoi, 0); 444 445 return 0; 446err0: 447 usb_put_phy(musb->xceiv); 448 usb_nop_xceiv_unregister(); 449 return status; 450} 451 452static int dsps_musb_exit(struct musb *musb) 453{ 454 struct device *dev = musb->controller; 455 struct platform_device *pdev = to_platform_device(dev); 456 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 457 458 del_timer_sync(&glue->timer[pdev->id]); 459 460 /* Shutdown the on-chip PHY and its PLL. */ 461 musb_dsps_phy_control(glue, pdev->id, 0); 462 463 /* NOP driver needs change if supporting dual instance */ 464 usb_put_phy(musb->xceiv); 465 usb_nop_xceiv_unregister(); 466 467 return 0; 468} 469 470static struct musb_platform_ops dsps_ops = { 471 .init = dsps_musb_init, 472 .exit = dsps_musb_exit, 473 474 .enable = dsps_musb_enable, 475 .disable = dsps_musb_disable, 476 477 .try_idle = dsps_musb_try_idle, 478}; 479 480static u64 musb_dmamask = DMA_BIT_MASK(32); 481 482static int __devinit dsps_create_musb_pdev(struct dsps_glue *glue, u8 id) 483{ 484 struct device *dev = glue->dev; 485 struct platform_device *pdev = to_platform_device(dev); 486 struct musb_hdrc_platform_data *pdata = dev->platform_data; 487 struct device_node *np = pdev->dev.of_node; 488 struct musb_hdrc_config *config; 489 struct platform_device *musb; 490 struct resource *res; 491 struct resource resources[2]; 492 char res_name[10]; 493 int ret; 494 495 resources[0].start = dsps_control_module_phys[id]; 496 resources[0].end = resources[0].start + SZ_4 - 1; 497 resources[0].flags = IORESOURCE_MEM; 498 499 glue->usb_ctrl[id] = devm_request_and_ioremap(&pdev->dev, resources); 500 if (glue->usb_ctrl[id] == NULL) { 501 dev_err(dev, "Failed to obtain usb_ctrl%d memory\n", id); 502 ret = -ENODEV; 503 goto err0; 504 } 505 506 /* first resource is for usbss, so start index from 1 */ 507 res = platform_get_resource(pdev, IORESOURCE_MEM, id + 1); 508 if (!res) { 509 dev_err(dev, "failed to get memory for instance %d\n", id); 510 ret = -ENODEV; 511 goto err0; 512 } 513 res->parent = NULL; 514 resources[0] = *res; 515 516 /* first resource is for usbss, so start index from 1 */ 517 res = platform_get_resource(pdev, IORESOURCE_IRQ, id + 1); 518 if (!res) { 519 dev_err(dev, "failed to get irq for instance %d\n", id); 520 ret = -ENODEV; 521 goto err0; 522 } 523 res->parent = NULL; 524 resources[1] = *res; 525 resources[1].name = "mc"; 526 527 /* allocate the child platform device */ 528 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO); 529 if (!musb) { 530 dev_err(dev, "failed to allocate musb device\n"); 531 ret = -ENOMEM; 532 goto err0; 533 } 534 535 musb->dev.parent = dev; 536 musb->dev.dma_mask = &musb_dmamask; 537 musb->dev.coherent_dma_mask = musb_dmamask; 538 539 glue->musb[id] = musb; 540 541 ret = platform_device_add_resources(musb, resources, 2); 542 if (ret) { 543 dev_err(dev, "failed to add resources\n"); 544 goto err2; 545 } 546 547 if (np) { 548 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 549 if (!pdata) { 550 dev_err(&pdev->dev, 551 "failed to allocate musb platfrom data\n"); 552 ret = -ENOMEM; 553 goto err2; 554 } 555 556 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL); 557 if (!config) { 558 dev_err(&pdev->dev, 559 "failed to allocate musb hdrc config\n"); 560 goto err2; 561 } 562 563 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps); 564 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits); 565 sprintf(res_name, "port%d-mode", id); 566 of_property_read_u32(np, res_name, (u32 *)&pdata->mode); 567 of_property_read_u32(np, "power", (u32 *)&pdata->power); 568 config->multipoint = of_property_read_bool(np, "multipoint"); 569 570 pdata->config = config; 571 } 572 573 pdata->platform_ops = &dsps_ops; 574 575 ret = platform_device_add_data(musb, pdata, sizeof(*pdata)); 576 if (ret) { 577 dev_err(dev, "failed to add platform_data\n"); 578 goto err2; 579 } 580 581 ret = platform_device_add(musb); 582 if (ret) { 583 dev_err(dev, "failed to register musb device\n"); 584 goto err2; 585 } 586 587 return 0; 588 589err2: 590 platform_device_put(musb); 591err0: 592 return ret; 593} 594 595static int __devinit dsps_probe(struct platform_device *pdev) 596{ 597 struct device_node *np = pdev->dev.of_node; 598 const struct of_device_id *match; 599 const struct dsps_musb_wrapper *wrp; 600 struct dsps_glue *glue; 601 struct resource *iomem; 602 int ret, i; 603 604 match = of_match_node(musb_dsps_of_match, np); 605 if (!match) { 606 dev_err(&pdev->dev, "fail to get matching of_match struct\n"); 607 ret = -EINVAL; 608 goto err0; 609 } 610 wrp = match->data; 611 612 /* allocate glue */ 613 glue = kzalloc(sizeof(*glue), GFP_KERNEL); 614 if (!glue) { 615 dev_err(&pdev->dev, "unable to allocate glue memory\n"); 616 ret = -ENOMEM; 617 goto err0; 618 } 619 620 /* get memory resource */ 621 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 622 if (!iomem) { 623 dev_err(&pdev->dev, "failed to get usbss mem resourse\n"); 624 ret = -ENODEV; 625 goto err1; 626 } 627 628 glue->dev = &pdev->dev; 629 630 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL); 631 if (!glue->wrp) { 632 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n"); 633 ret = -ENOMEM; 634 goto err1; 635 } 636 platform_set_drvdata(pdev, glue); 637 638 /* enable the usbss clocks */ 639 pm_runtime_enable(&pdev->dev); 640 641 ret = pm_runtime_get_sync(&pdev->dev); 642 if (ret < 0) { 643 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED"); 644 goto err2; 645 } 646 647 /* create the child platform device for all instances of musb */ 648 for (i = 0; i < wrp->instances ; i++) { 649 ret = dsps_create_musb_pdev(glue, i); 650 if (ret != 0) { 651 dev_err(&pdev->dev, "failed to create child pdev\n"); 652 /* release resources of previously created instances */ 653 for (i--; i >= 0 ; i--) 654 platform_device_unregister(glue->musb[i]); 655 goto err3; 656 } 657 } 658 659 return 0; 660 661err3: 662 pm_runtime_put(&pdev->dev); 663err2: 664 pm_runtime_disable(&pdev->dev); 665 kfree(glue->wrp); 666err1: 667 kfree(glue); 668err0: 669 return ret; 670} 671static int __devexit dsps_remove(struct platform_device *pdev) 672{ 673 struct dsps_glue *glue = platform_get_drvdata(pdev); 674 const struct dsps_musb_wrapper *wrp = glue->wrp; 675 int i; 676 677 /* delete the child platform device */ 678 for (i = 0; i < wrp->instances ; i++) 679 platform_device_unregister(glue->musb[i]); 680 681 /* disable usbss clocks */ 682 pm_runtime_put(&pdev->dev); 683 pm_runtime_disable(&pdev->dev); 684 kfree(glue->wrp); 685 kfree(glue); 686 return 0; 687} 688 689#ifdef CONFIG_PM_SLEEP 690static int dsps_suspend(struct device *dev) 691{ 692 struct platform_device *pdev = to_platform_device(dev->parent); 693 struct dsps_glue *glue = platform_get_drvdata(pdev); 694 const struct dsps_musb_wrapper *wrp = glue->wrp; 695 int i; 696 697 for (i = 0; i < wrp->instances; i++) 698 musb_dsps_phy_control(glue, i, 0); 699 700 return 0; 701} 702 703static int dsps_resume(struct device *dev) 704{ 705 struct platform_device *pdev = to_platform_device(dev->parent); 706 struct dsps_glue *glue = platform_get_drvdata(pdev); 707 const struct dsps_musb_wrapper *wrp = glue->wrp; 708 int i; 709 710 for (i = 0; i < wrp->instances; i++) 711 musb_dsps_phy_control(glue, i, 1); 712 713 return 0; 714} 715#endif 716 717static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume); 718 719static const struct dsps_musb_wrapper ti81xx_driver_data __devinitconst = { 720 .revision = 0x00, 721 .control = 0x14, 722 .status = 0x18, 723 .eoi = 0x24, 724 .epintr_set = 0x38, 725 .epintr_clear = 0x40, 726 .epintr_status = 0x30, 727 .coreintr_set = 0x3c, 728 .coreintr_clear = 0x44, 729 .coreintr_status = 0x34, 730 .phy_utmi = 0xe0, 731 .mode = 0xe8, 732 .reset = 0, 733 .otg_disable = 21, 734 .iddig = 8, 735 .usb_shift = 0, 736 .usb_mask = 0x1ff, 737 .usb_bitmap = (0x1ff << 0), 738 .drvvbus = 8, 739 .txep_shift = 0, 740 .txep_mask = 0xffff, 741 .txep_bitmap = (0xffff << 0), 742 .rxep_shift = 16, 743 .rxep_mask = 0xfffe, 744 .rxep_bitmap = (0xfffe << 16), 745 .musb_core_offset = 0x400, 746 .poll_seconds = 2, 747 .instances = 1, 748}; 749 750static const struct platform_device_id musb_dsps_id_table[] __devinitconst = { 751 { 752 .name = "musb-ti81xx", 753 .driver_data = (kernel_ulong_t) &ti81xx_driver_data, 754 }, 755 { }, /* Terminating Entry */ 756}; 757MODULE_DEVICE_TABLE(platform, musb_dsps_id_table); 758 759#ifdef CONFIG_OF 760static const struct of_device_id musb_dsps_of_match[] __devinitconst = { 761 { .compatible = "ti,musb-am33xx", 762 .data = (void *) &ti81xx_driver_data, }, 763 { }, 764}; 765MODULE_DEVICE_TABLE(of, musb_dsps_of_match); 766#endif 767 768static struct platform_driver dsps_usbss_driver = { 769 .probe = dsps_probe, 770 .remove = __devexit_p(dsps_remove), 771 .driver = { 772 .name = "musb-dsps", 773 .pm = &dsps_pm_ops, 774 .of_match_table = of_match_ptr(musb_dsps_of_match), 775 }, 776 .id_table = musb_dsps_id_table, 777}; 778 779MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer"); 780MODULE_AUTHOR("Ravi B <ravibabu@ti.com>"); 781MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>"); 782MODULE_LICENSE("GPL v2"); 783 784static int __init dsps_init(void) 785{ 786 return platform_driver_register(&dsps_usbss_driver); 787} 788subsys_initcall(dsps_init); 789 790static void __exit dsps_exit(void) 791{ 792 platform_driver_unregister(&dsps_usbss_driver); 793} 794module_exit(dsps_exit); 795